Commit | Line | Data |
---|---|---|
a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
1965aae3 PA |
11 | #ifndef _ASM_X86_KVM_HOST_H |
12 | #define _ASM_X86_KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
34c16eec ZX |
17 | |
18 | #include <linux/kvm.h> | |
19 | #include <linux/kvm_para.h> | |
edf88417 | 20 | #include <linux/kvm_types.h> |
34c16eec | 21 | |
50d0a0f9 | 22 | #include <asm/pvclock-abi.h> |
e01a1b57 HB |
23 | #include <asm/desc.h> |
24 | ||
69a9f69b AK |
25 | #define KVM_MAX_VCPUS 16 |
26 | #define KVM_MEMORY_SLOTS 32 | |
27 | /* memory slots that does not exposed to userspace */ | |
28 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
29 | ||
30 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 31 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 32 | |
cd6e8f87 ZX |
33 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
34 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
35 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
36 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 37 | |
7d76b4d3 | 38 | #define KVM_GUEST_CR0_MASK \ |
cd6e8f87 ZX |
39 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ |
40 | | X86_CR0_NW | X86_CR0_CD) | |
7d76b4d3 | 41 | #define KVM_VM_CR0_ALWAYS_ON \ |
cd6e8f87 ZX |
42 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ |
43 | | X86_CR0_MP) | |
7d76b4d3 | 44 | #define KVM_GUEST_CR4_MASK \ |
cd6e8f87 ZX |
45 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
46 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | |
47 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | |
48 | ||
49 | #define INVALID_PAGE (~(hpa_t)0) | |
50 | #define UNMAPPED_GVA (~(gpa_t)0) | |
51 | ||
05da4558 MT |
52 | /* shadow tables are PAE even on non-PAE hosts */ |
53 | #define KVM_HPAGE_SHIFT 21 | |
54 | #define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT) | |
55 | #define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1)) | |
56 | ||
57 | #define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) | |
58 | ||
cd6e8f87 | 59 | #define DE_VECTOR 0 |
19bd8afd | 60 | #define DB_VECTOR 1 |
77ab6db0 JK |
61 | #define BP_VECTOR 3 |
62 | #define OF_VECTOR 4 | |
63 | #define BR_VECTOR 5 | |
cd6e8f87 ZX |
64 | #define UD_VECTOR 6 |
65 | #define NM_VECTOR 7 | |
66 | #define DF_VECTOR 8 | |
67 | #define TS_VECTOR 10 | |
68 | #define NP_VECTOR 11 | |
69 | #define SS_VECTOR 12 | |
70 | #define GP_VECTOR 13 | |
71 | #define PF_VECTOR 14 | |
77ab6db0 | 72 | #define MF_VECTOR 16 |
53371b50 | 73 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
74 | |
75 | #define SELECTOR_TI_MASK (1 << 2) | |
76 | #define SELECTOR_RPL_MASK 0x03 | |
77 | ||
78 | #define IOPL_SHIFT 12 | |
79 | ||
d69fb81f ZX |
80 | #define KVM_ALIAS_SLOTS 4 |
81 | ||
d657a98e ZX |
82 | #define KVM_PERMILLE_MMU_PAGES 20 |
83 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
84 | #define KVM_MMU_HASH_SHIFT 10 |
85 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
86 | #define KVM_MIN_FREE_MMU_PAGES 5 |
87 | #define KVM_REFILL_PAGES 25 | |
88 | #define KVM_MAX_CPUID_ENTRIES 40 | |
9ba075a6 | 89 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 90 | |
e9b11c17 ZX |
91 | extern spinlock_t kvm_lock; |
92 | extern struct list_head vm_list; | |
93 | ||
d657a98e ZX |
94 | struct kvm_vcpu; |
95 | struct kvm; | |
96 | ||
5fdbf976 | 97 | enum kvm_reg { |
2b3ccfa0 ZX |
98 | VCPU_REGS_RAX = 0, |
99 | VCPU_REGS_RCX = 1, | |
100 | VCPU_REGS_RDX = 2, | |
101 | VCPU_REGS_RBX = 3, | |
102 | VCPU_REGS_RSP = 4, | |
103 | VCPU_REGS_RBP = 5, | |
104 | VCPU_REGS_RSI = 6, | |
105 | VCPU_REGS_RDI = 7, | |
106 | #ifdef CONFIG_X86_64 | |
107 | VCPU_REGS_R8 = 8, | |
108 | VCPU_REGS_R9 = 9, | |
109 | VCPU_REGS_R10 = 10, | |
110 | VCPU_REGS_R11 = 11, | |
111 | VCPU_REGS_R12 = 12, | |
112 | VCPU_REGS_R13 = 13, | |
113 | VCPU_REGS_R14 = 14, | |
114 | VCPU_REGS_R15 = 15, | |
115 | #endif | |
5fdbf976 | 116 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
117 | NR_VCPU_REGS |
118 | }; | |
119 | ||
120 | enum { | |
81609e3e | 121 | VCPU_SREG_ES, |
2b3ccfa0 | 122 | VCPU_SREG_CS, |
81609e3e | 123 | VCPU_SREG_SS, |
2b3ccfa0 | 124 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
125 | VCPU_SREG_FS, |
126 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
127 | VCPU_SREG_TR, |
128 | VCPU_SREG_LDTR, | |
129 | }; | |
130 | ||
edf88417 | 131 | #include <asm/kvm_x86_emulate.h> |
2b3ccfa0 | 132 | |
d657a98e ZX |
133 | #define KVM_NR_MEM_OBJS 40 |
134 | ||
69a9f69b AK |
135 | struct kvm_guest_debug { |
136 | int enabled; | |
137 | unsigned long bp[4]; | |
138 | int singlestep; | |
139 | }; | |
140 | ||
d657a98e ZX |
141 | /* |
142 | * We don't want allocation failures within the mmu code, so we preallocate | |
143 | * enough memory for a single page fault in a cache. | |
144 | */ | |
145 | struct kvm_mmu_memory_cache { | |
146 | int nobjs; | |
147 | void *objects[KVM_NR_MEM_OBJS]; | |
148 | }; | |
149 | ||
150 | #define NR_PTE_CHAIN_ENTRIES 5 | |
151 | ||
152 | struct kvm_pte_chain { | |
153 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
154 | struct hlist_node link; | |
155 | }; | |
156 | ||
157 | /* | |
158 | * kvm_mmu_page_role, below, is defined as: | |
159 | * | |
160 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
161 | * bits 4:7 - page table level for this shadow (1-4) | |
162 | * bits 8:9 - page table quadrant for 2-level guests | |
163 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | |
164 | * bits 17:19 - common access permissions for all ptes in this shadow page | |
165 | */ | |
166 | union kvm_mmu_page_role { | |
167 | unsigned word; | |
168 | struct { | |
7d76b4d3 JP |
169 | unsigned glevels:4; |
170 | unsigned level:4; | |
171 | unsigned quadrant:2; | |
172 | unsigned pad_for_nice_hex_output:6; | |
173 | unsigned metaphysical:1; | |
174 | unsigned access:3; | |
2e53d63a | 175 | unsigned invalid:1; |
d657a98e ZX |
176 | }; |
177 | }; | |
178 | ||
179 | struct kvm_mmu_page { | |
180 | struct list_head link; | |
181 | struct hlist_node hash_link; | |
182 | ||
183 | /* | |
184 | * The following two entries are used to key the shadow page in the | |
185 | * hash table. | |
186 | */ | |
187 | gfn_t gfn; | |
188 | union kvm_mmu_page_role role; | |
189 | ||
190 | u64 *spt; | |
191 | /* hold the gfn of each spte inside spt */ | |
192 | gfn_t *gfns; | |
193 | unsigned long slot_bitmap; /* One bit set per slot which has memory | |
194 | * in this shadow page. | |
195 | */ | |
196 | int multimapped; /* More than one parent_pte? */ | |
197 | int root_count; /* Currently serving as active root */ | |
4731d4c7 MT |
198 | bool unsync; |
199 | bool unsync_children; | |
d657a98e ZX |
200 | union { |
201 | u64 *parent_pte; /* !multimapped */ | |
202 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
203 | }; | |
0074ff63 | 204 | DECLARE_BITMAP(unsync_child_bitmap, 512); |
d657a98e ZX |
205 | }; |
206 | ||
6ad18fba DH |
207 | struct kvm_pv_mmu_op_buffer { |
208 | void *ptr; | |
209 | unsigned len; | |
210 | unsigned processed; | |
211 | char buf[512] __aligned(sizeof(long)); | |
212 | }; | |
213 | ||
d657a98e ZX |
214 | /* |
215 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
216 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
217 | * mode. | |
218 | */ | |
219 | struct kvm_mmu { | |
220 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
221 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
222 | void (*free)(struct kvm_vcpu *vcpu); | |
223 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
224 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
225 | struct kvm_mmu_page *page); | |
e8bc217a MT |
226 | int (*sync_page)(struct kvm_vcpu *vcpu, |
227 | struct kvm_mmu_page *sp); | |
a7052897 | 228 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); |
d657a98e ZX |
229 | hpa_t root_hpa; |
230 | int root_level; | |
231 | int shadow_root_level; | |
232 | ||
233 | u64 *pae_root; | |
234 | }; | |
235 | ||
ad312c7c | 236 | struct kvm_vcpu_arch { |
34c16eec ZX |
237 | u64 host_tsc; |
238 | int interrupt_window_open; | |
239 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ | |
240 | DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); | |
5fdbf976 MT |
241 | /* |
242 | * rip and regs accesses must go through | |
243 | * kvm_{register,rip}_{read,write} functions. | |
244 | */ | |
245 | unsigned long regs[NR_VCPU_REGS]; | |
246 | u32 regs_avail; | |
247 | u32 regs_dirty; | |
34c16eec ZX |
248 | |
249 | unsigned long cr0; | |
250 | unsigned long cr2; | |
251 | unsigned long cr3; | |
252 | unsigned long cr4; | |
253 | unsigned long cr8; | |
254 | u64 pdptrs[4]; /* pae */ | |
255 | u64 shadow_efer; | |
256 | u64 apic_base; | |
257 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
34c16eec ZX |
258 | int mp_state; |
259 | int sipi_vector; | |
260 | u64 ia32_misc_enable_msr; | |
b209749f | 261 | bool tpr_access_reporting; |
34c16eec ZX |
262 | |
263 | struct kvm_mmu mmu; | |
6ad18fba DH |
264 | /* only needed in kvm_pv_mmu_op() path, but it's hot so |
265 | * put it here to avoid allocation */ | |
266 | struct kvm_pv_mmu_op_buffer mmu_op_buffer; | |
34c16eec ZX |
267 | |
268 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
269 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
270 | struct kvm_mmu_memory_cache mmu_page_cache; | |
271 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
272 | ||
273 | gfn_t last_pt_write_gfn; | |
274 | int last_pt_write_count; | |
275 | u64 *last_pte_updated; | |
1b7fcd32 | 276 | gfn_t last_pte_gfn; |
34c16eec | 277 | |
d7824fff | 278 | struct { |
35149e21 AL |
279 | gfn_t gfn; /* presumed gfn during guest pte update */ |
280 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
05da4558 | 281 | int largepage; |
e930bffe | 282 | unsigned long mmu_seq; |
d7824fff AK |
283 | } update_pte; |
284 | ||
34c16eec ZX |
285 | struct i387_fxsave_struct host_fx_image; |
286 | struct i387_fxsave_struct guest_fx_image; | |
287 | ||
288 | gva_t mmio_fault_cr2; | |
289 | struct kvm_pio_request pio; | |
290 | void *pio_data; | |
291 | ||
298101da AK |
292 | struct kvm_queued_exception { |
293 | bool pending; | |
294 | bool has_error_code; | |
295 | u8 nr; | |
296 | u32 error_code; | |
297 | } exception; | |
298 | ||
937a7eae AK |
299 | struct kvm_queued_interrupt { |
300 | bool pending; | |
301 | u8 nr; | |
302 | } interrupt; | |
303 | ||
34c16eec ZX |
304 | struct { |
305 | int active; | |
306 | u8 save_iopl; | |
307 | struct kvm_save_segment { | |
308 | u16 selector; | |
309 | unsigned long base; | |
310 | u32 limit; | |
311 | u32 ar; | |
312 | } tr, es, ds, fs, gs; | |
313 | } rmode; | |
314 | int halt_request; /* real mode on Intel only */ | |
315 | ||
316 | int cpuid_nent; | |
07716717 | 317 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
318 | /* emulate context */ |
319 | ||
320 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
321 | |
322 | gpa_t time; | |
50d0a0f9 GH |
323 | struct pvclock_vcpu_time_info hv_clock; |
324 | unsigned int hv_clock_tsc_khz; | |
18068523 GOC |
325 | unsigned int time_offset; |
326 | struct page *time_page; | |
3419ffc8 SY |
327 | |
328 | bool nmi_pending; | |
668f612f | 329 | bool nmi_injected; |
33f089ca | 330 | bool nmi_window_open; |
9ba075a6 AK |
331 | |
332 | u64 mtrr[0x100]; | |
34c16eec ZX |
333 | }; |
334 | ||
d69fb81f ZX |
335 | struct kvm_mem_alias { |
336 | gfn_t base_gfn; | |
337 | unsigned long npages; | |
338 | gfn_t target_gfn; | |
339 | }; | |
340 | ||
341 | struct kvm_arch{ | |
342 | int naliases; | |
343 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
f05e70ac ZX |
344 | |
345 | unsigned int n_free_mmu_pages; | |
346 | unsigned int n_requested_mmu_pages; | |
347 | unsigned int n_alloc_mmu_pages; | |
348 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
349 | /* | |
350 | * Hash table of struct kvm_mmu_page. | |
351 | */ | |
352 | struct list_head active_mmu_pages; | |
4d5c5d0f | 353 | struct list_head assigned_dev_head; |
62c476c7 | 354 | struct dmar_domain *intel_iommu_domain; |
d7deeeb0 ZX |
355 | struct kvm_pic *vpic; |
356 | struct kvm_ioapic *vioapic; | |
7837699f | 357 | struct kvm_pit *vpit; |
564f1537 | 358 | struct hlist_head irq_ack_notifier_list; |
bfc6d222 ZX |
359 | |
360 | int round_robin_prev_vcpu; | |
361 | unsigned int tss_addr; | |
362 | struct page *apic_access_page; | |
18068523 GOC |
363 | |
364 | gpa_t wall_clock; | |
b7ebfb05 SY |
365 | |
366 | struct page *ept_identity_pagetable; | |
367 | bool ept_identity_pagetable_done; | |
5550af4d SY |
368 | |
369 | unsigned long irq_sources_bitmap; | |
370 | unsigned long irq_states[KVM_IOAPIC_NUM_PINS]; | |
d69fb81f ZX |
371 | }; |
372 | ||
0711456c ZX |
373 | struct kvm_vm_stat { |
374 | u32 mmu_shadow_zapped; | |
375 | u32 mmu_pte_write; | |
376 | u32 mmu_pte_updated; | |
377 | u32 mmu_pde_zapped; | |
378 | u32 mmu_flooded; | |
379 | u32 mmu_recycled; | |
dfc5aa00 | 380 | u32 mmu_cache_miss; |
4731d4c7 | 381 | u32 mmu_unsync; |
0711456c | 382 | u32 remote_tlb_flush; |
05da4558 | 383 | u32 lpages; |
0711456c ZX |
384 | }; |
385 | ||
77b4c255 ZX |
386 | struct kvm_vcpu_stat { |
387 | u32 pf_fixed; | |
388 | u32 pf_guest; | |
389 | u32 tlb_flush; | |
390 | u32 invlpg; | |
391 | ||
392 | u32 exits; | |
393 | u32 io_exits; | |
394 | u32 mmio_exits; | |
395 | u32 signal_exits; | |
396 | u32 irq_window_exits; | |
f08864b4 | 397 | u32 nmi_window_exits; |
77b4c255 ZX |
398 | u32 halt_exits; |
399 | u32 halt_wakeup; | |
400 | u32 request_irq_exits; | |
c4abb7c9 | 401 | u32 request_nmi_exits; |
77b4c255 ZX |
402 | u32 irq_exits; |
403 | u32 host_state_reload; | |
404 | u32 efer_reload; | |
405 | u32 fpu_reload; | |
406 | u32 insn_emulation; | |
407 | u32 insn_emulation_fail; | |
f11c3a8d | 408 | u32 hypercalls; |
fa89a817 | 409 | u32 irq_injections; |
c4abb7c9 | 410 | u32 nmi_injections; |
77b4c255 | 411 | }; |
ad312c7c | 412 | |
e01a1b57 HB |
413 | struct descriptor_table { |
414 | u16 limit; | |
415 | unsigned long base; | |
416 | } __attribute__((packed)); | |
417 | ||
ea4a5ff8 ZX |
418 | struct kvm_x86_ops { |
419 | int (*cpu_has_kvm_support)(void); /* __init */ | |
420 | int (*disabled_by_bios)(void); /* __init */ | |
421 | void (*hardware_enable)(void *dummy); /* __init */ | |
422 | void (*hardware_disable)(void *dummy); | |
423 | void (*check_processor_compatibility)(void *rtn); | |
424 | int (*hardware_setup)(void); /* __init */ | |
425 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 426 | bool (*cpu_has_accelerated_tpr)(void); |
ea4a5ff8 ZX |
427 | |
428 | /* Create, but do not attach this VCPU */ | |
429 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
430 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
431 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
432 | ||
433 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
434 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
435 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
436 | |
437 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
438 | struct kvm_debug_guest *dbg); | |
439 | void (*guest_debug_pre)(struct kvm_vcpu *vcpu); | |
440 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
441 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
442 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
443 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
444 | struct kvm_segment *var, int seg); | |
2e4d2653 | 445 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
446 | void (*set_segment)(struct kvm_vcpu *vcpu, |
447 | struct kvm_segment *var, int seg); | |
448 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
449 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
450 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
451 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
452 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
453 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
454 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
455 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
456 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
457 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
458 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
459 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
460 | int *exception); | |
5fdbf976 | 461 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
462 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
463 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
464 | ||
465 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 466 | |
ea4a5ff8 ZX |
467 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); |
468 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | |
469 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
470 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | |
471 | unsigned char *hypercall_addr); | |
472 | int (*get_irq)(struct kvm_vcpu *vcpu); | |
473 | void (*set_irq)(struct kvm_vcpu *vcpu, int vec); | |
298101da AK |
474 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
475 | bool has_error_code, u32 error_code); | |
476 | bool (*exception_injected)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
477 | void (*inject_pending_irq)(struct kvm_vcpu *vcpu); |
478 | void (*inject_pending_vectors)(struct kvm_vcpu *vcpu, | |
479 | struct kvm_run *run); | |
480 | ||
481 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | |
67253af5 | 482 | int (*get_tdp_level)(void); |
ea4a5ff8 ZX |
483 | }; |
484 | ||
97896d04 ZX |
485 | extern struct kvm_x86_ops *kvm_x86_ops; |
486 | ||
54f1585a ZX |
487 | int kvm_mmu_module_init(void); |
488 | void kvm_mmu_module_exit(void); | |
489 | ||
490 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
491 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
492 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
493 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
494 | void kvm_mmu_set_base_ptes(u64 base_pte); |
495 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
496 | u64 dirty_mask, u64 nx_mask, u64 x_mask); | |
54f1585a ZX |
497 | |
498 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
499 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
500 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 501 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
502 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
503 | ||
cc4b6871 JR |
504 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
505 | ||
3200f405 | 506 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 507 | const void *val, int bytes); |
2f333bcb MT |
508 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
509 | gpa_t addr, unsigned long *ret); | |
510 | ||
511 | extern bool tdp_enabled; | |
9f811285 | 512 | |
54f1585a ZX |
513 | enum emulation_result { |
514 | EMULATE_DONE, /* no further processing */ | |
515 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
516 | EMULATE_FAIL, /* can't emulate this instruction */ | |
517 | }; | |
518 | ||
571008da SY |
519 | #define EMULTYPE_NO_DECODE (1 << 0) |
520 | #define EMULTYPE_TRAP_UD (1 << 1) | |
54f1585a | 521 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, |
571008da | 522 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
523 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
524 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
525 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
526 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
527 | unsigned long *rflags); | |
528 | ||
529 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
530 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
531 | unsigned long *rflags); | |
f2b4b7dd | 532 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
533 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
534 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
535 | ||
536 | struct x86_emulate_ctxt; | |
537 | ||
538 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
539 | int size, unsigned port); | |
540 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
541 | int size, unsigned long count, int down, | |
542 | gva_t address, int rep, unsigned port); | |
543 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
544 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
545 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
546 | int emulate_clts(struct kvm_vcpu *vcpu); | |
547 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
548 | unsigned long *dest); | |
549 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
550 | unsigned long value); | |
551 | ||
3e6e0aab GT |
552 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
553 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | |
554 | int type_bits, int seg); | |
555 | ||
37817f29 IE |
556 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
557 | ||
2d3ad1f4 | 558 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
9c20456a JR |
559 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
560 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
561 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
2d3ad1f4 AK |
562 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
563 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a ZX |
564 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
565 | ||
566 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
567 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
568 | ||
298101da AK |
569 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
570 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
571 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
572 | u32 error_code); | |
298101da | 573 | |
3de42dc0 XZ |
574 | void kvm_pic_set_irq(void *opaque, int irq, int level); |
575 | ||
3419ffc8 SY |
576 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
577 | ||
54f1585a ZX |
578 | void fx_init(struct kvm_vcpu *vcpu); |
579 | ||
580 | int emulator_read_std(unsigned long addr, | |
581 | void *val, | |
582 | unsigned int bytes, | |
583 | struct kvm_vcpu *vcpu); | |
584 | int emulator_write_emulated(unsigned long addr, | |
585 | const void *val, | |
586 | unsigned int bytes, | |
587 | struct kvm_vcpu *vcpu); | |
588 | ||
589 | unsigned long segment_base(u16 selector); | |
590 | ||
d835dfec | 591 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a ZX |
592 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
593 | const u8 *new, int bytes); | |
594 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); | |
595 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
596 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
597 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
0ba73cda | 598 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); |
54f1585a ZX |
599 | |
600 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
601 | ||
602 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
603 | ||
3067714c | 604 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
a7052897 | 605 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); |
34c16eec | 606 | |
18552672 | 607 | void kvm_enable_tdp(void); |
5f4cb662 | 608 | void kvm_disable_tdp(void); |
18552672 | 609 | |
a03490ed | 610 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 611 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d ZX |
612 | |
613 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
614 | { | |
615 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
616 | ||
617 | return (struct kvm_mmu_page *)page_private(page); | |
618 | } | |
619 | ||
d6e88aec | 620 | static inline u16 kvm_read_fs(void) |
ec6d273d ZX |
621 | { |
622 | u16 seg; | |
623 | asm("mov %%fs, %0" : "=g"(seg)); | |
624 | return seg; | |
625 | } | |
626 | ||
d6e88aec | 627 | static inline u16 kvm_read_gs(void) |
ec6d273d ZX |
628 | { |
629 | u16 seg; | |
630 | asm("mov %%gs, %0" : "=g"(seg)); | |
631 | return seg; | |
632 | } | |
633 | ||
d6e88aec | 634 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
635 | { |
636 | u16 ldt; | |
637 | asm("sldt %0" : "=g"(ldt)); | |
638 | return ldt; | |
639 | } | |
640 | ||
d6e88aec | 641 | static inline void kvm_load_fs(u16 sel) |
ec6d273d ZX |
642 | { |
643 | asm("mov %0, %%fs" : : "rm"(sel)); | |
644 | } | |
645 | ||
d6e88aec | 646 | static inline void kvm_load_gs(u16 sel) |
ec6d273d ZX |
647 | { |
648 | asm("mov %0, %%gs" : : "rm"(sel)); | |
649 | } | |
650 | ||
d6e88aec | 651 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
652 | { |
653 | asm("lldt %0" : : "rm"(sel)); | |
654 | } | |
ec6d273d | 655 | |
d6e88aec | 656 | static inline void kvm_get_idt(struct descriptor_table *table) |
ec6d273d ZX |
657 | { |
658 | asm("sidt %0" : "=m"(*table)); | |
659 | } | |
660 | ||
d6e88aec | 661 | static inline void kvm_get_gdt(struct descriptor_table *table) |
ec6d273d ZX |
662 | { |
663 | asm("sgdt %0" : "=m"(*table)); | |
664 | } | |
665 | ||
d6e88aec | 666 | static inline unsigned long kvm_read_tr_base(void) |
ec6d273d ZX |
667 | { |
668 | u16 tr; | |
669 | asm("str %0" : "=g"(tr)); | |
670 | return segment_base(tr); | |
671 | } | |
672 | ||
673 | #ifdef CONFIG_X86_64 | |
674 | static inline unsigned long read_msr(unsigned long msr) | |
675 | { | |
676 | u64 value; | |
677 | ||
678 | rdmsrl(msr, value); | |
679 | return value; | |
680 | } | |
681 | #endif | |
682 | ||
d6e88aec | 683 | static inline void kvm_fx_save(struct i387_fxsave_struct *image) |
ec6d273d ZX |
684 | { |
685 | asm("fxsave (%0)":: "r" (image)); | |
686 | } | |
687 | ||
d6e88aec | 688 | static inline void kvm_fx_restore(struct i387_fxsave_struct *image) |
ec6d273d ZX |
689 | { |
690 | asm("fxrstor (%0)":: "r" (image)); | |
691 | } | |
692 | ||
d6e88aec | 693 | static inline void kvm_fx_finit(void) |
ec6d273d ZX |
694 | { |
695 | asm("finit"); | |
696 | } | |
697 | ||
698 | static inline u32 get_rdx_init_val(void) | |
699 | { | |
700 | return 0x600; /* P6 family */ | |
701 | } | |
702 | ||
c1a5d4f9 AK |
703 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
704 | { | |
705 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
706 | } | |
707 | ||
ec6d273d ZX |
708 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" |
709 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | |
710 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | |
711 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | |
712 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | |
713 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | |
714 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | |
715 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | |
716 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | |
1439442c | 717 | #define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08" |
2384d2b3 | 718 | #define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08" |
ec6d273d ZX |
719 | |
720 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | |
721 | ||
722 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
723 | #define TSS_BASE_SIZE 0x68 | |
724 | #define TSS_IOPB_SIZE (65536 / 8) | |
725 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
726 | #define RMODE_TSS_SIZE \ |
727 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 728 | |
37817f29 IE |
729 | enum { |
730 | TASK_SWITCH_CALL = 0, | |
731 | TASK_SWITCH_IRET = 1, | |
732 | TASK_SWITCH_JMP = 2, | |
733 | TASK_SWITCH_GATE = 3, | |
734 | }; | |
735 | ||
4ecac3fd AK |
736 | /* |
737 | * Hardware virtualization extension instructions may fault if a | |
738 | * reboot turns off virtualization while processes are running. | |
739 | * Trap the fault and ignore the instruction if that happens. | |
740 | */ | |
741 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
742 | ||
743 | #define __kvm_handle_fault_on_reboot(insn) \ | |
744 | "666: " insn "\n\t" \ | |
18b13e54 | 745 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 746 | "667: \n\t" \ |
8ceed347 | 747 | __ASM_SIZE(push) " $666b \n\t" \ |
4ecac3fd AK |
748 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
749 | ".popsection \n\t" \ | |
750 | ".pushsection __ex_table, \"a\" \n\t" \ | |
8ceed347 | 751 | _ASM_PTR " 666b, 667b \n\t" \ |
4ecac3fd AK |
752 | ".popsection" |
753 | ||
e930bffe AA |
754 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
755 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
756 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
757 | ||
1965aae3 | 758 | #endif /* _ASM_X86_KVM_HOST_H */ |