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x86: expose number of page table levels on Kconfig level
[deliverable/linux.git] / arch / x86 / include / asm / paravirt_types.h
CommitLineData
ac5672f8
JF		 1#ifndef _ASM_X86_PARAVIRT_TYPES_H
2#define _ASM_X86_PARAVIRT_TYPES_H
3
4/* Bitmask of what can be clobbered: usually at least eax. */
5#define CLBR_NONE 0
6#define CLBR_EAX (1 << 0)
7#define CLBR_ECX (1 << 1)
8#define CLBR_EDX (1 << 2)
9#define CLBR_EDI (1 << 3)
10
11#ifdef CONFIG_X86_32
12/* CLBR_ANY should match all regs platform has. For i386, that's just it */
13#define CLBR_ANY ((1 << 4) - 1)
14
15#define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
16#define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
17#define CLBR_SCRATCH (0)
18#else
19#define CLBR_RAX CLBR_EAX
20#define CLBR_RCX CLBR_ECX
21#define CLBR_RDX CLBR_EDX
22#define CLBR_RDI CLBR_EDI
23#define CLBR_RSI (1 << 4)
24#define CLBR_R8 (1 << 5)
25#define CLBR_R9 (1 << 6)
26#define CLBR_R10 (1 << 7)
27#define CLBR_R11 (1 << 8)
28
29#define CLBR_ANY ((1 << 9) - 1)
30
31#define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
32 CLBR_RCX | CLBR_R8 | CLBR_R9)
33#define CLBR_RET_REG (CLBR_RAX)
34#define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
35
36#endif /* X86_64 */
37
38#define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
39
40#ifndef __ASSEMBLY__
41
42#include <asm/desc_defs.h>
43#include <asm/kmap_types.h>
318f5a2a 44#include <asm/pgtable_types.h>
ac5672f8
JF		 45
46struct page;
47struct thread_struct;
48struct desc_ptr;
49struct tss_struct;
50struct mm_struct;
51struct desc_struct;
52struct task_struct;
53struct cpumask;
54
55/*
56 * Wrapper type for pointers to code which uses the non-standard
57 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
58 */
59struct paravirt_callee_save {
60 void *func;
61};
62
63/* general info */
64struct pv_info {
65 unsigned int kernel_rpl;
66 int shared_kernel_pmd;
318f5a2a
AL		 67
68#ifdef CONFIG_X86_64
69 u16 extra_user_64bit_cs; /* __USER_CS if none */
70#endif
71
ac5672f8
JF		 72 int paravirt_enabled;
73 const char *name;
74};
75
76struct pv_init_ops {
77 /*
78 * Patch may replace one of the defined code sequences with
79 * arbitrary code, subject to the same register constraints.
80 * This generally means the code is not free to clobber any
81 * registers other than EAX. The patch function should return
82 * the number of bytes of code generated, as we nop pad the
83 * rest in generic code.
84 */
85 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
86 unsigned long addr, unsigned len);
ac5672f8
JF		 87};
88
89
90struct pv_lazy_ops {
91 /* Set deferred update mode, used for batching operations. */
92 void (*enter)(void);
93 void (*leave)(void);
511ba86e 94 void (*flush)(void);
ac5672f8
JF		 95};
96
97struct pv_time_ops {
ac5672f8 98 unsigned long long (*sched_clock)(void);
3c404b57 99 unsigned long long (*steal_clock)(int cpu);
ac5672f8
JF		 100 unsigned long (*get_tsc_khz)(void);
101};
102
103struct pv_cpu_ops {
104 /* hooks for various privileged instructions */
105 unsigned long (*get_debugreg)(int regno);
106 void (*set_debugreg)(int regno, unsigned long value);
107
108 void (*clts)(void);
109
110 unsigned long (*read_cr0)(void);
111 void (*write_cr0)(unsigned long);
112
113 unsigned long (*read_cr4_safe)(void);
114 unsigned long (*read_cr4)(void);
115 void (*write_cr4)(unsigned long);
116
117#ifdef CONFIG_X86_64
118 unsigned long (*read_cr8)(void);
119 void (*write_cr8)(unsigned long);
120#endif
121
122 /* Segment descriptor handling */
123 void (*load_tr_desc)(void);
124 void (*load_gdt)(const struct desc_ptr *);
125 void (*load_idt)(const struct desc_ptr *);
357d1226 126 /* store_gdt has been removed. */
ac5672f8
JF		 127 void (*store_idt)(struct desc_ptr *);
128 void (*set_ldt)(const void *desc, unsigned entries);
129 unsigned long (*store_tr)(void);
130 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
131#ifdef CONFIG_X86_64
132 void (*load_gs_index)(unsigned int idx);
133#endif
134 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
135 const void *desc);
136 void (*write_gdt_entry)(struct desc_struct *,
137 int entrynum, const void *desc, int size);
138 void (*write_idt_entry)(gate_desc *,
139 int entrynum, const gate_desc *gate);
140 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
141 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
142
143 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
144
145 void (*set_iopl_mask)(unsigned mask);
146
147 void (*wbinvd)(void);
148 void (*io_delay)(void);
149
150 /* cpuid emulation, mostly so that caps bits can be disabled */
151 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
152 unsigned int *ecx, unsigned int *edx);
153
154 /* MSR, PMC and TSR operations.
155 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
ac5672f8
JF		 156 u64 (*read_msr)(unsigned int msr, int *err);
157 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
158
159 u64 (*read_tsc)(void);
160 u64 (*read_pmc)(int counter);
161 unsigned long long (*read_tscp)(unsigned int *aux);
162
163 /*
164 * Atomically enable interrupts and return to userspace. This
165 * is only ever used to return to 32-bit processes; in a
166 * 64-bit kernel, it's used for 32-on-64 compat processes, but
167 * never native 64-bit processes. (Jump, not call.)
168 */
169 void (*irq_enable_sysexit)(void);
170
171 /*
172 * Switch to usermode gs and return to 64-bit usermode using
173 * sysret. Only used in 64-bit kernels to return to 64-bit
174 * processes. Usermode register state, including %rsp, must
175 * already be restored.
176 */
177 void (*usergs_sysret64)(void);
178
179 /*
180 * Switch to usermode gs and return to 32-bit usermode using
181 * sysret. Used to return to 32-on-64 compat processes.
182 * Other usermode register state, including %esp, must already
183 * be restored.
184 */
185 void (*usergs_sysret32)(void);
186
187 /* Normal iret. Jump to this with the standard iret stack
188 frame set up. */
189 void (*iret)(void);
190
191 void (*swapgs)(void);
192
193 void (*start_context_switch)(struct task_struct *prev);
194 void (*end_context_switch)(struct task_struct *next);
195};
196
197struct pv_irq_ops {
ac5672f8
JF		 198 /*
199 * Get/set interrupt state. save_fl and restore_fl are only
200 * expected to use X86_EFLAGS_IF; all other bits
201 * returned from save_fl are undefined, and may be ignored by
202 * restore_fl.
203 *
204 * NOTE: These functions callers expect the callee to preserve
205 * more registers than the standard C calling convention.
206 */
207 struct paravirt_callee_save save_fl;
208 struct paravirt_callee_save restore_fl;
209 struct paravirt_callee_save irq_disable;
210 struct paravirt_callee_save irq_enable;
211
212 void (*safe_halt)(void);
213 void (*halt)(void);
214
215#ifdef CONFIG_X86_64
216 void (*adjust_exception_frame)(void);
217#endif
218};
219
220struct pv_apic_ops {
221#ifdef CONFIG_X86_LOCAL_APIC
ac5672f8
JF		 222 void (*startup_ipi_hook)(int phys_apicid,
223 unsigned long start_eip,
224 unsigned long start_esp);
225#endif
226};
227
228struct pv_mmu_ops {
ac5672f8
JF		 229 unsigned long (*read_cr2)(void);
230 void (*write_cr2)(unsigned long);
231
232 unsigned long (*read_cr3)(void);
233 void (*write_cr3)(unsigned long);
234
235 /*
236 * Hooks for intercepting the creation/use/destruction of an
237 * mm_struct.
238 */
239 void (*activate_mm)(struct mm_struct *prev,
240 struct mm_struct *next);
241 void (*dup_mmap)(struct mm_struct *oldmm,
242 struct mm_struct *mm);
243 void (*exit_mmap)(struct mm_struct *mm);
244
245
246 /* TLB operations */
247 void (*flush_tlb_user)(void);
248 void (*flush_tlb_kernel)(void);
249 void (*flush_tlb_single)(unsigned long addr);
250 void (*flush_tlb_others)(const struct cpumask *cpus,
251 struct mm_struct *mm,
e7b52ffd
AS		 252 unsigned long start,
253 unsigned long end);
ac5672f8
JF		 254
255 /* Hooks for allocating and freeing a pagetable top-level */
256 int (*pgd_alloc)(struct mm_struct *mm);
257 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
258
259 /*
260 * Hooks for allocating/releasing pagetable pages when they're
261 * attached to a pagetable
262 */
263 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
264 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
ac5672f8
JF		 265 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
266 void (*release_pte)(unsigned long pfn);
267 void (*release_pmd)(unsigned long pfn);
268 void (*release_pud)(unsigned long pfn);
269
270 /* Pagetable manipulation functions */
271 void (*set_pte)(pte_t *ptep, pte_t pteval);
272 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
273 pte_t *ptep, pte_t pteval);
274 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
331127f7
AA		 275 void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr,
276 pmd_t *pmdp, pmd_t pmdval);
ac5672f8
JF		 277 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
278 pte_t *ptep);
279 void (*pte_update_defer)(struct mm_struct *mm,
280 unsigned long addr, pte_t *ptep);
331127f7
AA		 281 void (*pmd_update)(struct mm_struct *mm, unsigned long addr,
282 pmd_t *pmdp);
283 void (*pmd_update_defer)(struct mm_struct *mm,
284 unsigned long addr, pmd_t *pmdp);
ac5672f8
JF		 285
286 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
287 pte_t *ptep);
288 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
289 pte_t *ptep, pte_t pte);
290
291 struct paravirt_callee_save pte_val;
292 struct paravirt_callee_save make_pte;
293
294 struct paravirt_callee_save pgd_val;
295 struct paravirt_callee_save make_pgd;
296
98233368 297#if CONFIG_PGTABLE_LEVELS >= 3
ac5672f8
JF		 298#ifdef CONFIG_X86_PAE
299 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
300 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
301 pte_t *ptep);
302 void (*pmd_clear)(pmd_t *pmdp);
303
304#endif /* CONFIG_X86_PAE */
305
306 void (*set_pud)(pud_t *pudp, pud_t pudval);
307
308 struct paravirt_callee_save pmd_val;
309 struct paravirt_callee_save make_pmd;
310
98233368 311#if CONFIG_PGTABLE_LEVELS == 4
ac5672f8
JF		 312 struct paravirt_callee_save pud_val;
313 struct paravirt_callee_save make_pud;
314
315 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
98233368
KS		 316#endif /* CONFIG_PGTABLE_LEVELS == 4 */
317#endif /* CONFIG_PGTABLE_LEVELS >= 3 */
ac5672f8 318
ac5672f8
JF		 319 struct pv_lazy_ops lazy_mode;
320
321 /* dom0 ops */
322
323 /* Sometimes the physical address is a pfn, and sometimes its
324 an mfn. We can tell which is which from the index. */
325 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
326 phys_addr_t phys, pgprot_t flags);
327};
328
445c8951 329struct arch_spinlock;
545ac138
JF		 330#ifdef CONFIG_SMP
331#include <asm/spinlock_types.h>
332#else
333typedef u16 __ticket_t;
334#endif
335
ac5672f8 336struct pv_lock_ops {
354714dd 337 struct paravirt_callee_save lock_spinning;
545ac138 338 void (*unlock_kick)(struct arch_spinlock *lock, __ticket_t ticket);
ac5672f8
JF		 339};
340
341/* This contains all the paravirt structures: we get a convenient
342 * number for each function using the offset which we use to indicate
343 * what to patch. */
344struct paravirt_patch_template {
345 struct pv_init_ops pv_init_ops;
346 struct pv_time_ops pv_time_ops;
347 struct pv_cpu_ops pv_cpu_ops;
348 struct pv_irq_ops pv_irq_ops;
349 struct pv_apic_ops pv_apic_ops;
350 struct pv_mmu_ops pv_mmu_ops;
351 struct pv_lock_ops pv_lock_ops;
352};
353
354extern struct pv_info pv_info;
355extern struct pv_init_ops pv_init_ops;
356extern struct pv_time_ops pv_time_ops;
357extern struct pv_cpu_ops pv_cpu_ops;
358extern struct pv_irq_ops pv_irq_ops;
359extern struct pv_apic_ops pv_apic_ops;
360extern struct pv_mmu_ops pv_mmu_ops;
361extern struct pv_lock_ops pv_lock_ops;
362
363#define PARAVIRT_PATCH(x) \
364 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
365
366#define paravirt_type(op) \
367 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
368 [paravirt_opptr] "i" (&(op))
369#define paravirt_clobber(clobber) \
370 [paravirt_clobber] "i" (clobber)
371
372/*
373 * Generate some code, and mark it as patchable by the
374 * apply_paravirt() alternate instruction patcher.
375 */
376#define _paravirt_alt(insn_string, type, clobber) \
377 "771:\n\t" insn_string "\n" "772:\n" \
378 ".pushsection .parainstructions,\"a\"\n" \
379 _ASM_ALIGN "\n" \
380 _ASM_PTR " 771b\n" \
381 " .byte " type "\n" \
382 " .byte 772b-771b\n" \
383 " .short " clobber "\n" \
384 ".popsection\n"
385
386/* Generate patchable code, with the default asm parameters. */
387#define paravirt_alt(insn_string) \
388 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
389
390/* Simple instruction patching code. */
824a2870
AK		 391#define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t"
392
393#define DEF_NATIVE(ops, name, code) \
394 __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \
395 asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name))
ac5672f8
JF		 396
397unsigned paravirt_patch_nop(void);
398unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
399unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
400unsigned paravirt_patch_ignore(unsigned len);
401unsigned paravirt_patch_call(void *insnbuf,
402 const void *target, u16 tgt_clobbers,
403 unsigned long addr, u16 site_clobbers,
404 unsigned len);
405unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
406 unsigned long addr, unsigned len);
407unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
408 unsigned long addr, unsigned len);
409
410unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
411 const char *start, const char *end);
412
413unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
414 unsigned long addr, unsigned len);
415
416int paravirt_disable_iospace(void);
417
418/*
419 * This generates an indirect call based on the operation type number.
420 * The type number, computed in PARAVIRT_PATCH, is derived from the
421 * offset into the paravirt_patch_template structure, and can therefore be
422 * freely converted back into a structure offset.
423 */
424#define PARAVIRT_CALL "call *%c[paravirt_opptr];"
425
426/*
427 * These macros are intended to wrap calls through one of the paravirt
428 * ops structs, so that they can be later identified and patched at
429 * runtime.
430 *
431 * Normally, a call to a pv_op function is a simple indirect call:
432 * (pv_op_struct.operations)(args...).
433 *
434 * Unfortunately, this is a relatively slow operation for modern CPUs,
435 * because it cannot necessarily determine what the destination
436 * address is. In this case, the address is a runtime constant, so at
437 * the very least we can patch the call to e a simple direct call, or
438 * ideally, patch an inline implementation into the callsite. (Direct
439 * calls are essentially free, because the call and return addresses
440 * are completely predictable.)
441 *
442 * For i386, these macros rely on the standard gcc "regparm(3)" calling
443 * convention, in which the first three arguments are placed in %eax,
444 * %edx, %ecx (in that order), and the remaining arguments are placed
445 * on the stack. All caller-save registers (eax,edx,ecx) are expected
446 * to be modified (either clobbered or used for return values).
447 * X86_64, on the other hand, already specifies a register-based calling
448 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
449 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
450 * special handling for dealing with 4 arguments, unlike i386.
451 * However, x86_64 also have to clobber all caller saved registers, which
452 * unfortunately, are quite a bit (r8 - r11)
453 *
454 * The call instruction itself is marked by placing its start address
455 * and size into the .parainstructions section, so that
456 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
457 * appropriate patching under the control of the backend pv_init_ops
458 * implementation.
459 *
460 * Unfortunately there's no way to get gcc to generate the args setup
461 * for the call, and then allow the call itself to be generated by an
462 * inline asm. Because of this, we must do the complete arg setup and
463 * return value handling from within these macros. This is fairly
464 * cumbersome.
465 *
466 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
467 * It could be extended to more arguments, but there would be little
468 * to be gained from that. For each number of arguments, there are
469 * the two VCALL and CALL variants for void and non-void functions.
470 *
471 * When there is a return value, the invoker of the macro must specify
472 * the return type. The macro then uses sizeof() on that type to
473 * determine whether its a 32 or 64 bit value, and places the return
474 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
475 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
476 * the return value size.
477 *
478 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
479 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
480 * in low,high order
481 *
482 * Small structures are passed and returned in registers. The macro
483 * calling convention can't directly deal with this, so the wrapper
484 * functions must do this.
485 *
486 * These PVOP_* macros are only defined within this header. This
487 * means that all uses must be wrapped in inline functions. This also
488 * makes sure the incoming and outgoing types are always correct.
489 */
490#ifdef CONFIG_X86_32
491#define PVOP_VCALL_ARGS \
492 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
493#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
494
495#define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
496#define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
497#define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
498
499#define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
500 "=c" (__ecx)
501#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
502
503#define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
504#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
505
506#define EXTRA_CLOBBERS
507#define VEXTRA_CLOBBERS
508#else /* CONFIG_X86_64 */
71999d98 509/* [re]ax isn't an arg, but the return val */
ac5672f8
JF		 510#define PVOP_VCALL_ARGS \
511 unsigned long __edi = __edi, __esi = __esi, \
71999d98
JF		 512 __edx = __edx, __ecx = __ecx, __eax = __eax
513#define PVOP_CALL_ARGS PVOP_VCALL_ARGS
ac5672f8
JF		 514
515#define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
516#define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
517#define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
518#define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
519
520#define PVOP_VCALL_CLOBBERS "=D" (__edi), \
521 "=S" (__esi), "=d" (__edx), \
522 "=c" (__ecx)
523#define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
524
71999d98 525/* void functions are still allowed [re]ax for scratch */
ac5672f8
JF		 526#define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
527#define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
528
529#define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
530#define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
531#endif /* CONFIG_X86_32 */
532
533#ifdef CONFIG_PARAVIRT_DEBUG
534#define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
535#else
536#define PVOP_TEST_NULL(op) ((void)op)
537#endif
538
539#define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
540 pre, post, ...) \
541 ({ \
542 rettype __ret; \
543 PVOP_CALL_ARGS; \
544 PVOP_TEST_NULL(op); \
545 /* This is 32-bit specific, but is okay in 64-bit */ \
546 /* since this condition will never hold */ \
547 if (sizeof(rettype) > sizeof(unsigned long)) { \
548 asm volatile(pre \
549 paravirt_alt(PARAVIRT_CALL) \
550 post \
551 : call_clbr \
552 : paravirt_type(op), \
553 paravirt_clobber(clbr), \
554 ##__VA_ARGS__ \
555 : "memory", "cc" extra_clbr); \
556 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
557 } else { \
558 asm volatile(pre \
559 paravirt_alt(PARAVIRT_CALL) \
560 post \
561 : call_clbr \
562 : paravirt_type(op), \
563 paravirt_clobber(clbr), \
564 ##__VA_ARGS__ \
565 : "memory", "cc" extra_clbr); \
566 __ret = (rettype)__eax; \
567 } \
568 __ret; \
569 })
570
571#define __PVOP_CALL(rettype, op, pre, post, ...) \
572 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
573 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
574
575#define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
576 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
577 PVOP_CALLEE_CLOBBERS, , \
578 pre, post, ##__VA_ARGS__)
579
580
581#define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
582 ({ \
583 PVOP_VCALL_ARGS; \
584 PVOP_TEST_NULL(op); \
585 asm volatile(pre \
586 paravirt_alt(PARAVIRT_CALL) \
587 post \
588 : call_clbr \
589 : paravirt_type(op), \
590 paravirt_clobber(clbr), \
591 ##__VA_ARGS__ \
592 : "memory", "cc" extra_clbr); \
593 })
594
595#define __PVOP_VCALL(op, pre, post, ...) \
596 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
597 VEXTRA_CLOBBERS, \
598 pre, post, ##__VA_ARGS__)
599
71999d98
JF		 600#define __PVOP_VCALLEESAVE(op, pre, post, ...) \
601 ____PVOP_VCALL(op.func, CLBR_RET_REG, \
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JF		 602 PVOP_VCALLEE_CLOBBERS, , \
603 pre, post, ##__VA_ARGS__)
604
605
606
607#define PVOP_CALL0(rettype, op) \
608 __PVOP_CALL(rettype, op, "", "")
609#define PVOP_VCALL0(op) \
610 __PVOP_VCALL(op, "", "")
611
612#define PVOP_CALLEE0(rettype, op) \
613 __PVOP_CALLEESAVE(rettype, op, "", "")
614#define PVOP_VCALLEE0(op) \
615 __PVOP_VCALLEESAVE(op, "", "")
616
617
618#define PVOP_CALL1(rettype, op, arg1) \
619 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
620#define PVOP_VCALL1(op, arg1) \
621 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
622
623#define PVOP_CALLEE1(rettype, op, arg1) \
624 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
625#define PVOP_VCALLEE1(op, arg1) \
626 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
627
628
629#define PVOP_CALL2(rettype, op, arg1, arg2) \
630 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
631 PVOP_CALL_ARG2(arg2))
632#define PVOP_VCALL2(op, arg1, arg2) \
633 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
634 PVOP_CALL_ARG2(arg2))
635
636#define PVOP_CALLEE2(rettype, op, arg1, arg2) \
637 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
638 PVOP_CALL_ARG2(arg2))
639#define PVOP_VCALLEE2(op, arg1, arg2) \
640 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
641 PVOP_CALL_ARG2(arg2))
642
643
644#define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
645 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
646 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
647#define PVOP_VCALL3(op, arg1, arg2, arg3) \
648 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
649 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
650
651/* This is the only difference in x86_64. We can make it much simpler */
652#ifdef CONFIG_X86_32
653#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
654 __PVOP_CALL(rettype, op, \
655 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
656 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
657 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
658#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
659 __PVOP_VCALL(op, \
660 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
661 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
662 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
663#else
664#define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
665 __PVOP_CALL(rettype, op, "", "", \
666 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
667 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
668#define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
669 __PVOP_VCALL(op, "", "", \
670 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
671 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
672#endif
673
674/* Lazy mode for batching updates / context switch */
675enum paravirt_lazy_mode {
676 PARAVIRT_LAZY_NONE,
677 PARAVIRT_LAZY_MMU,
678 PARAVIRT_LAZY_CPU,
679};
680
681enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
682void paravirt_start_context_switch(struct task_struct *prev);
683void paravirt_end_context_switch(struct task_struct *next);
684
685void paravirt_enter_lazy_mmu(void);
686void paravirt_leave_lazy_mmu(void);
511ba86e 687void paravirt_flush_lazy_mmu(void);
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JF		 688
689void _paravirt_nop(void);
690u32 _paravirt_ident_32(u32);
691u64 _paravirt_ident_64(u64);
692
693#define paravirt_nop ((void *)_paravirt_nop)
694
695/* These all sit in the .parainstructions section to tell us what to patch. */
696struct paravirt_patch_site {
697 u8 *instr; /* original instructions */
698 u8 instrtype; /* type of this instruction */
699 u8 len; /* length of original instruction */
700 u16 clobbers; /* what registers you may clobber */
701};
702
703extern struct paravirt_patch_site __parainstructions[],
704 __parainstructions_end[];
705
706#endif /* __ASSEMBLY__ */
707
708#endif /* _ASM_X86_PARAVIRT_TYPES_H */
Linux kernel - Deliverables
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