Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
[deliverable/linux.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
4614139c 18#ifndef __ASSEMBLY__
55a6ca25
PA
19#include <asm/x86_init.h>
20
ef6bea6d 21void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
e1a58320
SS
22void ptdump_walk_pgd_level_checkwx(void);
23
24#ifdef CONFIG_DEBUG_WX
25#define debug_checkwx() ptdump_walk_pgd_level_checkwx()
26#else
27#define debug_checkwx() do { } while (0)
28#endif
ef6bea6d 29
8405b122
JF
30/*
31 * ZERO_PAGE is a global shared page that is always zero: used
32 * for zero-mapped memory areas etc..
33 */
277d5b40
AK
34extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
35 __visible;
8405b122
JF
36#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
37
e3ed910d
JF
38extern spinlock_t pgd_lock;
39extern struct list_head pgd_list;
8405b122 40
617d34d9
JF
41extern struct mm_struct *pgd_page_get_mm(struct page *page);
42
54321d94
JF
43#ifdef CONFIG_PARAVIRT
44#include <asm/paravirt.h>
45#else /* !CONFIG_PARAVIRT */
46#define set_pte(ptep, pte) native_set_pte(ptep, pte)
47#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 48#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
54321d94 49
54321d94
JF
50#define set_pte_atomic(ptep, pte) \
51 native_set_pte_atomic(ptep, pte)
52
53#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
54
55#ifndef __PAGETABLE_PUD_FOLDED
56#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
57#define pgd_clear(pgd) native_pgd_clear(pgd)
58#endif
59
60#ifndef set_pud
61# define set_pud(pudp, pud) native_set_pud(pudp, pud)
62#endif
63
64#ifndef __PAGETABLE_PMD_FOLDED
65#define pud_clear(pud) native_pud_clear(pud)
66#endif
67
68#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
69#define pmd_clear(pmd) native_pmd_clear(pmd)
70
71#define pte_update(mm, addr, ptep) do { } while (0)
54321d94 72
54321d94
JF
73#define pgd_val(x) native_pgd_val(x)
74#define __pgd(x) native_make_pgd(x)
75
76#ifndef __PAGETABLE_PUD_FOLDED
77#define pud_val(x) native_pud_val(x)
78#define __pud(x) native_make_pud(x)
79#endif
80
81#ifndef __PAGETABLE_PMD_FOLDED
82#define pmd_val(x) native_pmd_val(x)
83#define __pmd(x) native_make_pmd(x)
84#endif
85
86#define pte_val(x) native_pte_val(x)
87#define __pte(x) native_make_pte(x)
88
224101ed
JF
89#define arch_end_context_switch(prev) do {} while(0)
90
54321d94
JF
91#endif /* CONFIG_PARAVIRT */
92
4614139c
JF
93/*
94 * The following only work if pte_present() is true.
95 * Undefined behaviour if not..
96 */
3cbaeafe
JP
97static inline int pte_dirty(pte_t pte)
98{
a15af1c9 99 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
100}
101
102static inline int pte_young(pte_t pte)
103{
a15af1c9 104 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
105}
106
c164e038
KS
107static inline int pmd_dirty(pmd_t pmd)
108{
109 return pmd_flags(pmd) & _PAGE_DIRTY;
110}
3cbaeafe 111
f2d6bfe9
JW
112static inline int pmd_young(pmd_t pmd)
113{
114 return pmd_flags(pmd) & _PAGE_ACCESSED;
115}
116
3cbaeafe
JP
117static inline int pte_write(pte_t pte)
118{
a15af1c9 119 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
120}
121
3cbaeafe
JP
122static inline int pte_huge(pte_t pte)
123{
a15af1c9 124 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
125}
126
3cbaeafe
JP
127static inline int pte_global(pte_t pte)
128{
a15af1c9 129 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
130}
131
132static inline int pte_exec(pte_t pte)
133{
a15af1c9 134 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
135}
136
7e675137
NP
137static inline int pte_special(pte_t pte)
138{
c819f37e 139 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
140}
141
91030ca1
HD
142static inline unsigned long pte_pfn(pte_t pte)
143{
144 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
145}
146
087975b0
AM
147static inline unsigned long pmd_pfn(pmd_t pmd)
148{
f70abb0f 149 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
087975b0
AM
150}
151
0ee364eb
MG
152static inline unsigned long pud_pfn(pud_t pud)
153{
f70abb0f 154 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
0ee364eb
MG
155}
156
91030ca1
HD
157#define pte_page(pte) pfn_to_page(pte_pfn(pte))
158
3cbaeafe
JP
159static inline int pmd_large(pmd_t pte)
160{
027ef6c8 161 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
162}
163
f2d6bfe9
JW
164#ifdef CONFIG_TRANSPARENT_HUGEPAGE
165static inline int pmd_trans_splitting(pmd_t pmd)
166{
167 return pmd_val(pmd) & _PAGE_SPLITTING;
168}
169
170static inline int pmd_trans_huge(pmd_t pmd)
171{
172 return pmd_val(pmd) & _PAGE_PSE;
173}
4b7167b9
AA
174
175static inline int has_transparent_hugepage(void)
176{
177 return cpu_has_pse;
178}
f2d6bfe9
JW
179#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
180
6522869c
JF
181static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
182{
183 pteval_t v = native_pte_val(pte);
184
185 return native_make_pte(v | set);
186}
187
188static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
189{
190 pteval_t v = native_pte_val(pte);
191
192 return native_make_pte(v & ~clear);
193}
194
3cbaeafe
JP
195static inline pte_t pte_mkclean(pte_t pte)
196{
6522869c 197 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
198}
199
200static inline pte_t pte_mkold(pte_t pte)
201{
6522869c 202 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
203}
204
205static inline pte_t pte_wrprotect(pte_t pte)
206{
6522869c 207 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
208}
209
210static inline pte_t pte_mkexec(pte_t pte)
211{
6522869c 212 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
213}
214
215static inline pte_t pte_mkdirty(pte_t pte)
216{
0f8975ec 217 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
218}
219
220static inline pte_t pte_mkyoung(pte_t pte)
221{
6522869c 222 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
223}
224
225static inline pte_t pte_mkwrite(pte_t pte)
226{
6522869c 227 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
228}
229
230static inline pte_t pte_mkhuge(pte_t pte)
231{
6522869c 232 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
233}
234
235static inline pte_t pte_clrhuge(pte_t pte)
236{
6522869c 237 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
238}
239
240static inline pte_t pte_mkglobal(pte_t pte)
241{
6522869c 242 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
243}
244
245static inline pte_t pte_clrglobal(pte_t pte)
246{
6522869c 247 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 248}
4614139c 249
7e675137
NP
250static inline pte_t pte_mkspecial(pte_t pte)
251{
6522869c 252 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
253}
254
f2d6bfe9
JW
255static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
256{
257 pmdval_t v = native_pmd_val(pmd);
258
259 return __pmd(v | set);
260}
261
262static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
263{
264 pmdval_t v = native_pmd_val(pmd);
265
266 return __pmd(v & ~clear);
267}
268
269static inline pmd_t pmd_mkold(pmd_t pmd)
270{
271 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
272}
273
274static inline pmd_t pmd_wrprotect(pmd_t pmd)
275{
276 return pmd_clear_flags(pmd, _PAGE_RW);
277}
278
279static inline pmd_t pmd_mkdirty(pmd_t pmd)
280{
0f8975ec 281 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
282}
283
284static inline pmd_t pmd_mkhuge(pmd_t pmd)
285{
286 return pmd_set_flags(pmd, _PAGE_PSE);
287}
288
289static inline pmd_t pmd_mkyoung(pmd_t pmd)
290{
291 return pmd_set_flags(pmd, _PAGE_ACCESSED);
292}
293
294static inline pmd_t pmd_mkwrite(pmd_t pmd)
295{
296 return pmd_set_flags(pmd, _PAGE_RW);
297}
298
299static inline pmd_t pmd_mknotpresent(pmd_t pmd)
300{
21d9ee3e 301 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
f2d6bfe9
JW
302}
303
2bf01f9f 304#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
305static inline int pte_soft_dirty(pte_t pte)
306{
307 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
308}
309
310static inline int pmd_soft_dirty(pmd_t pmd)
311{
312 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
313}
314
315static inline pte_t pte_mksoft_dirty(pte_t pte)
316{
317 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
318}
319
320static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
321{
322 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
323}
324
a7b76174
MS
325static inline pte_t pte_clear_soft_dirty(pte_t pte)
326{
327 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
328}
329
330static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
331{
332 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
333}
334
2bf01f9f
CG
335#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
336
b534816b
JF
337/*
338 * Mask out unsupported bits in a present pgprot. Non-present pgprots
339 * can use those bits for other purposes, so leave them be.
340 */
341static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
342{
343 pgprotval_t protval = pgprot_val(pgprot);
344
345 if (protval & _PAGE_PRESENT)
346 protval &= __supported_pte_mask;
347
348 return protval;
349}
350
6fdc05d4
JF
351static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
352{
b534816b
JF
353 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
354 massage_pgprot(pgprot));
6fdc05d4
JF
355}
356
357static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
358{
b534816b
JF
359 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
360 massage_pgprot(pgprot));
6fdc05d4
JF
361}
362
38472311
IM
363static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
364{
365 pteval_t val = pte_val(pte);
366
367 /*
368 * Chop off the NX bit (if present), and add the NX portion of
369 * the newprot (if present):
370 */
1c12c4cf 371 val &= _PAGE_CHG_MASK;
b534816b 372 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
373
374 return __pte(val);
375}
376
c489f125
JW
377static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
378{
379 pmdval_t val = pmd_val(pmd);
380
381 val &= _HPAGE_CHG_MASK;
382 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
383
384 return __pmd(val);
385}
386
1c12c4cf
VP
387/* mprotect needs to preserve PAT bits when updating vm_page_prot */
388#define pgprot_modify pgprot_modify
389static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
390{
391 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
392 pgprotval_t addbits = pgprot_val(newprot);
393 return __pgprot(preservebits | addbits);
394}
395
bbac8c6d
TK
396#define pte_pgprot(x) __pgprot(pte_flags(x))
397#define pmd_pgprot(x) __pgprot(pmd_flags(x))
398#define pud_pgprot(x) __pgprot(pud_flags(x))
c6ca18eb 399
b534816b 400#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 401
1adcaafe 402static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
403 enum page_cache_mode pcm,
404 enum page_cache_mode new_pcm)
afc7d20c 405{
1adcaafe 406 /*
55a6ca25 407 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 408 */
8a271389 409 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
410 return 1;
411
afc7d20c 412 /*
413 * Certain new memtypes are not allowed with certain
414 * requested memtype:
415 * - request is uncached, return cannot be write-back
416 * - request is write-combine, return cannot be write-back
ecb2feba
TK
417 * - request is write-through, return cannot be write-back
418 * - request is write-through, return cannot be write-combine
afc7d20c 419 */
d85f3334
JG
420 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
421 new_pcm == _PAGE_CACHE_MODE_WB) ||
422 (pcm == _PAGE_CACHE_MODE_WC &&
ecb2feba
TK
423 new_pcm == _PAGE_CACHE_MODE_WB) ||
424 (pcm == _PAGE_CACHE_MODE_WT &&
425 new_pcm == _PAGE_CACHE_MODE_WB) ||
426 (pcm == _PAGE_CACHE_MODE_WT &&
427 new_pcm == _PAGE_CACHE_MODE_WC)) {
afc7d20c 428 return 0;
429 }
430
431 return 1;
432}
433
458a3e64
TH
434pmd_t *populate_extra_pmd(unsigned long vaddr);
435pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
436#endif /* __ASSEMBLY__ */
437
96a388de 438#ifdef CONFIG_X86_32
a1ce3928 439# include <asm/pgtable_32.h>
96a388de 440#else
a1ce3928 441# include <asm/pgtable_64.h>
96a388de 442#endif
6c386655 443
aca159db 444#ifndef __ASSEMBLY__
f476961c 445#include <linux/mm_types.h>
fa0f281c 446#include <linux/mmdebug.h>
4cbeb51b 447#include <linux/log2.h>
aca159db 448
a034a010
JF
449static inline int pte_none(pte_t pte)
450{
451 return !pte.pte;
452}
453
8de01da3
JF
454#define __HAVE_ARCH_PTE_SAME
455static inline int pte_same(pte_t a, pte_t b)
456{
457 return a.pte == b.pte;
458}
459
7c683851 460static inline int pte_present(pte_t a)
c46a7c81
MG
461{
462 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
463}
464
2c3cf556 465#define pte_accessible pte_accessible
20841405 466static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 467{
20841405
RR
468 if (pte_flags(a) & _PAGE_PRESENT)
469 return true;
470
21d9ee3e 471 if ((pte_flags(a) & _PAGE_PROTNONE) &&
20841405
RR
472 mm_tlb_flush_pending(mm))
473 return true;
474
475 return false;
2c3cf556
RR
476}
477
eb63657e 478static inline int pte_hidden(pte_t pte)
dfec072e 479{
eb63657e 480 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
481}
482
649e8ef6
JF
483static inline int pmd_present(pmd_t pmd)
484{
027ef6c8
AA
485 /*
486 * Checking for _PAGE_PSE is needed too because
487 * split_huge_page will temporarily clear the present bit (but
488 * the _PAGE_PSE flag will remain set at all times while the
489 * _PAGE_PRESENT bit is clear).
490 */
21d9ee3e 491 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
649e8ef6
JF
492}
493
e7bb4b6d
MG
494#ifdef CONFIG_NUMA_BALANCING
495/*
496 * These work without NUMA balancing but the kernel does not care. See the
497 * comment in include/asm-generic/pgtable.h
498 */
499static inline int pte_protnone(pte_t pte)
500{
e3a1f6ca
DV
501 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
502 == _PAGE_PROTNONE;
e7bb4b6d
MG
503}
504
505static inline int pmd_protnone(pmd_t pmd)
506{
e3a1f6ca
DV
507 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
508 == _PAGE_PROTNONE;
e7bb4b6d
MG
509}
510#endif /* CONFIG_NUMA_BALANCING */
511
4fea801a
JF
512static inline int pmd_none(pmd_t pmd)
513{
514 /* Only check low word on 32-bit platforms, since it might be
515 out of sync with upper half. */
26c8e317 516 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
517}
518
3ffb3564
JF
519static inline unsigned long pmd_page_vaddr(pmd_t pmd)
520{
f70abb0f 521 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
3ffb3564
JF
522}
523
e5f7f202
IM
524/*
525 * Currently stuck as a macro due to indirect forward reference to
526 * linux/mmzone.h's __section_mem_map_addr() definition:
527 */
f70abb0f
TK
528#define pmd_page(pmd) \
529 pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT)
20063ca4 530
e24d7eee
JF
531/*
532 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
533 *
534 * this macro returns the index of the entry in the pmd page which would
535 * control the given virtual address
536 */
ce0c0f9e 537static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
538{
539 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
540}
541
97e2817d
JF
542/*
543 * Conversion functions: convert a page and protection to a page entry,
544 * and a page entry and page directory to the page they refer to.
545 *
546 * (Currently stuck as a macro because of indirect forward reference
547 * to linux/mm.h:page_to_nid())
548 */
549#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
550
346309cf
JF
551/*
552 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
553 *
554 * this function returns the index of the entry in the pte page which would
555 * control the given virtual address
556 */
ce0c0f9e 557static inline unsigned long pte_index(unsigned long address)
346309cf
JF
558{
559 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
560}
561
3fbc2444
JF
562static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
563{
564 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
565}
566
99510238
JF
567static inline int pmd_bad(pmd_t pmd)
568{
18a7a199 569 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
570}
571
cc290ca3
JF
572static inline unsigned long pages_to_mb(unsigned long npg)
573{
574 return npg >> (20 - PAGE_SHIFT);
575}
576
98233368 577#if CONFIG_PGTABLE_LEVELS > 2
deb79cfb
JF
578static inline int pud_none(pud_t pud)
579{
26c8e317 580 return native_pud_val(pud) == 0;
deb79cfb
JF
581}
582
5ba7c913
JF
583static inline int pud_present(pud_t pud)
584{
18a7a199 585 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 586}
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587
588static inline unsigned long pud_page_vaddr(pud_t pud)
589{
f70abb0f 590 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
6fff47e3 591}
f476961c 592
e5f7f202
IM
593/*
594 * Currently stuck as a macro due to indirect forward reference to
595 * linux/mmzone.h's __section_mem_map_addr() definition:
596 */
f70abb0f
TK
597#define pud_page(pud) \
598 pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT)
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JF
599
600/* Find an entry in the second-level page table.. */
601static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
602{
603 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
604}
3180fba0 605
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JF
606static inline int pud_large(pud_t pud)
607{
e2f5bda9 608 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
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JF
609 (_PAGE_PSE | _PAGE_PRESENT);
610}
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JF
611
612static inline int pud_bad(pud_t pud)
613{
18a7a199 614 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 615}
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JF
616#else
617static inline int pud_large(pud_t pud)
618{
619 return 0;
620}
98233368 621#endif /* CONFIG_PGTABLE_LEVELS > 2 */
5ba7c913 622
98233368 623#if CONFIG_PGTABLE_LEVELS > 3
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JF
624static inline int pgd_present(pgd_t pgd)
625{
18a7a199 626 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 627}
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JF
628
629static inline unsigned long pgd_page_vaddr(pgd_t pgd)
630{
631 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
632}
777cba16 633
e5f7f202
IM
634/*
635 * Currently stuck as a macro due to indirect forward reference to
636 * linux/mmzone.h's __section_mem_map_addr() definition:
637 */
638#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
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JF
639
640/* to find an entry in a page-table-directory. */
ce0c0f9e 641static inline unsigned long pud_index(unsigned long address)
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JF
642{
643 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
644}
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JF
645
646static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
647{
648 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
649}
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JF
650
651static inline int pgd_bad(pgd_t pgd)
652{
18a7a199 653 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 654}
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JF
655
656static inline int pgd_none(pgd_t pgd)
657{
26c8e317 658 return !native_pgd_val(pgd);
7325cc2e 659}
98233368 660#endif /* CONFIG_PGTABLE_LEVELS > 3 */
9f38d7e8 661
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JF
662#endif /* __ASSEMBLY__ */
663
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JF
664/*
665 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
666 *
667 * this macro returns the index of the entry in the pgd page which would
668 * control the given virtual address
669 */
670#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
671
672/*
673 * pgd_offset() returns a (pgd_t *)
674 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
675 */
676#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
677/*
678 * a shortcut which implies the use of the kernel's pgd, instead
679 * of a process's
680 */
681#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
682
683
68db065c
JF
684#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
685#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
686
195466dc
JF
687#ifndef __ASSEMBLY__
688
2c1b284e 689extern int direct_gbpages;
22ddfcaa 690void init_mem_mapping(void);
8d57470d 691void early_alloc_pgt_buf(void);
2c1b284e 692
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JF
693/* local pte updates need not use xchg for locking */
694static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
695{
696 pte_t res = *ptep;
697
698 /* Pure native function needs no input for mm, addr */
699 native_pte_clear(NULL, 0, ptep);
700 return res;
701}
702
f2d6bfe9
JW
703static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
704{
705 pmd_t res = *pmdp;
706
707 native_pmd_clear(pmdp);
708 return res;
709}
710
4891645e
JF
711static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
712 pte_t *ptep , pte_t pte)
713{
714 native_set_pte(ptep, pte);
715}
716
0a47de52
AA
717static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
718 pmd_t *pmdp , pmd_t pmd)
719{
720 native_set_pmd(pmdp, pmd);
721}
722
195466dc
JF
723#ifndef CONFIG_PARAVIRT
724/*
725 * Rules for using pte_update - it must be called after any PTE update which
726 * has not been done using the set_pte / clear_pte interfaces. It is used by
727 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
728 * updates should either be sets, clears, or set_pte_atomic for P->P
729 * transitions, which means this hook should only be called for user PTEs.
730 * This hook implies a P->P protection or access change has taken place, which
d6ccc3ec 731 * requires a subsequent TLB flush.
195466dc
JF
732 */
733#define pte_update(mm, addr, ptep) do { } while (0)
195466dc
JF
734#endif
735
195466dc
JF
736/*
737 * We only update the dirty/accessed state if we set
738 * the dirty bit by hand in the kernel, since the hardware
739 * will do the accessed bit for us, and we don't want to
740 * race with other CPU's that might be updating the dirty
741 * bit at the same time.
742 */
bea41808
JF
743struct vm_area_struct;
744
195466dc 745#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
746extern int ptep_set_access_flags(struct vm_area_struct *vma,
747 unsigned long address, pte_t *ptep,
748 pte_t entry, int dirty);
195466dc
JF
749
750#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
751extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
752 unsigned long addr, pte_t *ptep);
195466dc
JF
753
754#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
755extern int ptep_clear_flush_young(struct vm_area_struct *vma,
756 unsigned long address, pte_t *ptep);
195466dc
JF
757
758#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
759static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
760 pte_t *ptep)
195466dc
JF
761{
762 pte_t pte = native_ptep_get_and_clear(ptep);
763 pte_update(mm, addr, ptep);
764 return pte;
765}
766
767#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
768static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
769 unsigned long addr, pte_t *ptep,
770 int full)
195466dc
JF
771{
772 pte_t pte;
773 if (full) {
774 /*
775 * Full address destruction in progress; paravirt does not
776 * care about updates and native needs no locking
777 */
778 pte = native_local_ptep_get_and_clear(ptep);
779 } else {
780 pte = ptep_get_and_clear(mm, addr, ptep);
781 }
782 return pte;
783}
784
785#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
786static inline void ptep_set_wrprotect(struct mm_struct *mm,
787 unsigned long addr, pte_t *ptep)
195466dc 788{
d8d89827 789 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
790 pte_update(mm, addr, ptep);
791}
792
2ac13462 793#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 794
f2d6bfe9
JW
795#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
796
797#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
798extern int pmdp_set_access_flags(struct vm_area_struct *vma,
799 unsigned long address, pmd_t *pmdp,
800 pmd_t entry, int dirty);
801
802#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
803extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
804 unsigned long addr, pmd_t *pmdp);
805
806#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
807extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
808 unsigned long address, pmd_t *pmdp);
809
810
811#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
812extern void pmdp_splitting_flush(struct vm_area_struct *vma,
813 unsigned long addr, pmd_t *pmdp);
814
815#define __HAVE_ARCH_PMD_WRITE
816static inline int pmd_write(pmd_t pmd)
817{
818 return pmd_flags(pmd) & _PAGE_RW;
819}
820
8809aa2d
AK
821#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
822static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
f2d6bfe9
JW
823 pmd_t *pmdp)
824{
d6ccc3ec 825 return native_pmdp_get_and_clear(pmdp);
f2d6bfe9
JW
826}
827
828#define __HAVE_ARCH_PMDP_SET_WRPROTECT
829static inline void pmdp_set_wrprotect(struct mm_struct *mm,
830 unsigned long addr, pmd_t *pmdp)
831{
832 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
f2d6bfe9
JW
833}
834
85958b46
JF
835/*
836 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
837 *
838 * dst - pointer to pgd range anwhere on a pgd page
839 * src - ""
840 * count - the number of pgds to copy.
841 *
842 * dst and src can be on the same page, but the range must not overlap,
843 * and must not cross a page boundary.
844 */
845static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
846{
847 memcpy(dst, src, count * sizeof(pgd_t));
848}
849
4cbeb51b
DH
850#define PTE_SHIFT ilog2(PTRS_PER_PTE)
851static inline int page_level_shift(enum pg_level level)
852{
853 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
854}
855static inline unsigned long page_level_size(enum pg_level level)
856{
857 return 1UL << page_level_shift(level);
858}
859static inline unsigned long page_level_mask(enum pg_level level)
860{
861 return ~(page_level_size(level) - 1);
862}
85958b46 863
602e0186
KS
864/*
865 * The x86 doesn't have any external MMU info: the kernel page
866 * tables contain all the necessary information.
867 */
868static inline void update_mmu_cache(struct vm_area_struct *vma,
869 unsigned long addr, pte_t *ptep)
870{
871}
872static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
873 unsigned long addr, pmd_t *pmd)
874{
875}
85958b46 876
2bf01f9f 877#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
fa0f281c
CG
878static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
879{
fa0f281c
CG
880 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
881}
882
883static inline int pte_swp_soft_dirty(pte_t pte)
884{
fa0f281c
CG
885 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
886}
887
888static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
889{
fa0f281c
CG
890 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
891}
2bf01f9f 892#endif
fa0f281c 893
195466dc
JF
894#include <asm-generic/pgtable.h>
895#endif /* __ASSEMBLY__ */
896
1965aae3 897#endif /* _ASM_X86_PGTABLE_H */
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