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dc1e35c6 SS |
1 | #ifndef __ASM_X86_XSAVE_H |
2 | #define __ASM_X86_XSAVE_H | |
3 | ||
6152e4b1 | 4 | #include <linux/types.h> |
dc1e35c6 | 5 | #include <asm/processor.h> |
dc1e35c6 | 6 | |
ee813d53 | 7 | #define XSTATE_CPUID 0x0000000d |
dc1e35c6 SS |
8 | |
9 | #define XSTATE_FP 0x1 | |
10 | #define XSTATE_SSE 0x2 | |
a30469e7 | 11 | #define XSTATE_YMM 0x4 |
dc1e35c6 SS |
12 | |
13 | #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE) | |
14 | ||
15 | #define FXSAVE_SIZE 512 | |
16 | ||
2d5b5a66 SY |
17 | #define XSAVE_HDR_SIZE 64 |
18 | #define XSAVE_HDR_OFFSET FXSAVE_SIZE | |
19 | ||
20 | #define XSAVE_YMM_SIZE 256 | |
21 | #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET) | |
5ee481da | 22 | |
dc1e35c6 SS |
23 | /* |
24 | * These are the features that the OS can handle currently. | |
25 | */ | |
a30469e7 | 26 | #define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) |
dc1e35c6 | 27 | |
b359e8a4 SS |
28 | #ifdef CONFIG_X86_64 |
29 | #define REX_PREFIX "0x48, " | |
30 | #else | |
31 | #define REX_PREFIX | |
32 | #endif | |
33 | ||
6152e4b1 PA |
34 | extern unsigned int xstate_size; |
35 | extern u64 pcntxt_mask; | |
5b3efd50 | 36 | extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS]; |
304bceda | 37 | extern struct xsave_struct *init_xstate_buf; |
dc1e35c6 | 38 | |
dc1e35c6 | 39 | extern void xsave_init(void); |
5b3efd50 | 40 | extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask); |
b359e8a4 SS |
41 | extern int init_fpu(struct task_struct *child); |
42 | ||
0ca5bd0d | 43 | static inline int fpu_xrstor_checking(struct xsave_struct *fx) |
b359e8a4 SS |
44 | { |
45 | int err; | |
46 | ||
47 | asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t" | |
48 | "2:\n" | |
49 | ".section .fixup,\"ax\"\n" | |
50 | "3: movl $-1,%[err]\n" | |
51 | " jmp 2b\n" | |
52 | ".previous\n" | |
53 | _ASM_EXTABLE(1b, 3b) | |
54 | : [err] "=r" (err) | |
55 | : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0) | |
56 | : "memory"); | |
57 | ||
58 | return err; | |
59 | } | |
60 | ||
c37b5efe | 61 | static inline int xsave_user(struct xsave_struct __user *buf) |
9dc89c0f SS |
62 | { |
63 | int err; | |
8e221b6d SS |
64 | |
65 | /* | |
66 | * Clear the xsave header first, so that reserved fields are | |
67 | * initialized to zero. | |
68 | */ | |
72a671ce | 69 | err = __clear_user(&buf->xsave_hdr, sizeof(buf->xsave_hdr)); |
8e221b6d SS |
70 | if (unlikely(err)) |
71 | return -EFAULT; | |
72 | ||
63bcff2a PA |
73 | __asm__ __volatile__(ASM_STAC "\n" |
74 | "1: .byte " REX_PREFIX "0x0f,0xae,0x27\n" | |
75 | "2: " ASM_CLAC "\n" | |
9dc89c0f SS |
76 | ".section .fixup,\"ax\"\n" |
77 | "3: movl $-1,%[err]\n" | |
78 | " jmp 2b\n" | |
79 | ".previous\n" | |
7a040a43 | 80 | _ASM_EXTABLE(1b,3b) |
9dc89c0f SS |
81 | : [err] "=r" (err) |
82 | : "D" (buf), "a" (-1), "d" (-1), "0" (0) | |
83 | : "memory"); | |
9dc89c0f SS |
84 | return err; |
85 | } | |
86 | ||
6152e4b1 | 87 | static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask) |
9dc89c0f SS |
88 | { |
89 | int err; | |
90 | struct xsave_struct *xstate = ((__force struct xsave_struct *)buf); | |
6152e4b1 PA |
91 | u32 lmask = mask; |
92 | u32 hmask = mask >> 32; | |
9dc89c0f | 93 | |
63bcff2a PA |
94 | __asm__ __volatile__(ASM_STAC "\n" |
95 | "1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n" | |
96 | "2: " ASM_CLAC "\n" | |
9dc89c0f SS |
97 | ".section .fixup,\"ax\"\n" |
98 | "3: movl $-1,%[err]\n" | |
99 | " jmp 2b\n" | |
100 | ".previous\n" | |
7a040a43 | 101 | _ASM_EXTABLE(1b,3b) |
9dc89c0f SS |
102 | : [err] "=r" (err) |
103 | : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0) | |
104 | : "memory"); /* memory required? */ | |
105 | return err; | |
106 | } | |
107 | ||
6152e4b1 | 108 | static inline void xrstor_state(struct xsave_struct *fx, u64 mask) |
9dc89c0f | 109 | { |
6152e4b1 PA |
110 | u32 lmask = mask; |
111 | u32 hmask = mask >> 32; | |
112 | ||
9dc89c0f SS |
113 | asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t" |
114 | : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) | |
115 | : "memory"); | |
116 | } | |
117 | ||
29104e10 SS |
118 | static inline void xsave_state(struct xsave_struct *fx, u64 mask) |
119 | { | |
120 | u32 lmask = mask; | |
121 | u32 hmask = mask >> 32; | |
122 | ||
123 | asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t" | |
124 | : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) | |
125 | : "memory"); | |
126 | } | |
127 | ||
86603283 | 128 | static inline void fpu_xsave(struct fpu *fpu) |
b359e8a4 SS |
129 | { |
130 | /* This, however, we can work around by forcing the compiler to select | |
131 | an addressing mode that doesn't require extended registers. */ | |
6bad06b7 SS |
132 | alternative_input( |
133 | ".byte " REX_PREFIX "0x0f,0xae,0x27", | |
134 | ".byte " REX_PREFIX "0x0f,0xae,0x37", | |
135 | X86_FEATURE_XSAVEOPT, | |
136 | [fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) : | |
137 | "memory"); | |
b359e8a4 | 138 | } |
dc1e35c6 | 139 | #endif |