Merge remote-tracking branch 'asoc/fix/core' into asoc-component
[deliverable/linux.git] / arch / x86 / include / asm / xsave.h
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1#ifndef __ASM_X86_XSAVE_H
2#define __ASM_X86_XSAVE_H
3
6152e4b1 4#include <linux/types.h>
dc1e35c6 5#include <asm/processor.h>
dc1e35c6 6
ee813d53 7#define XSTATE_CPUID 0x0000000d
dc1e35c6 8
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9#define XSTATE_FP 0x1
10#define XSTATE_SSE 0x2
11#define XSTATE_YMM 0x4
12#define XSTATE_BNDREGS 0x8
13#define XSTATE_BNDCSR 0x10
14#define XSTATE_OPMASK 0x20
15#define XSTATE_ZMM_Hi256 0x40
16#define XSTATE_Hi16_ZMM 0x80
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17
18#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
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19/* Bit 63 of XCR0 is reserved for future expansion */
20#define XSTATE_EXTEND_MASK (~(XSTATE_FPSSE | (1ULL << 63)))
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21
22#define FXSAVE_SIZE 512
23
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24#define XSAVE_HDR_SIZE 64
25#define XSAVE_HDR_OFFSET FXSAVE_SIZE
26
27#define XSAVE_YMM_SIZE 256
28#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
5ee481da 29
e7d820a5 30/* Supported features which support lazy state saving */
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31#define XSTATE_LAZY (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
32 | XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM)
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33
34/* Supported features which require eager state saving */
35#define XSTATE_EAGER (XSTATE_BNDREGS | XSTATE_BNDCSR)
36
37/* All currently supported features */
38#define XCNTXT_MASK (XSTATE_LAZY | XSTATE_EAGER)
dc1e35c6 39
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40#ifdef CONFIG_X86_64
41#define REX_PREFIX "0x48, "
42#else
43#define REX_PREFIX
44#endif
45
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46extern unsigned int xstate_size;
47extern u64 pcntxt_mask;
5b3efd50 48extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
304bceda 49extern struct xsave_struct *init_xstate_buf;
dc1e35c6 50
dc1e35c6 51extern void xsave_init(void);
5b3efd50 52extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
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53extern int init_fpu(struct task_struct *child);
54
0ca5bd0d 55static inline int fpu_xrstor_checking(struct xsave_struct *fx)
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56{
57 int err;
58
59 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
60 "2:\n"
61 ".section .fixup,\"ax\"\n"
62 "3: movl $-1,%[err]\n"
63 " jmp 2b\n"
64 ".previous\n"
65 _ASM_EXTABLE(1b, 3b)
66 : [err] "=r" (err)
67 : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
68 : "memory");
69
70 return err;
71}
72
c37b5efe 73static inline int xsave_user(struct xsave_struct __user *buf)
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74{
75 int err;
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76
77 /*
78 * Clear the xsave header first, so that reserved fields are
79 * initialized to zero.
80 */
72a671ce 81 err = __clear_user(&buf->xsave_hdr, sizeof(buf->xsave_hdr));
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82 if (unlikely(err))
83 return -EFAULT;
84
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85 __asm__ __volatile__(ASM_STAC "\n"
86 "1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
87 "2: " ASM_CLAC "\n"
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88 ".section .fixup,\"ax\"\n"
89 "3: movl $-1,%[err]\n"
90 " jmp 2b\n"
91 ".previous\n"
7a040a43 92 _ASM_EXTABLE(1b,3b)
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93 : [err] "=r" (err)
94 : "D" (buf), "a" (-1), "d" (-1), "0" (0)
95 : "memory");
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96 return err;
97}
98
6152e4b1 99static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
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100{
101 int err;
102 struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
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103 u32 lmask = mask;
104 u32 hmask = mask >> 32;
9dc89c0f 105
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106 __asm__ __volatile__(ASM_STAC "\n"
107 "1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
108 "2: " ASM_CLAC "\n"
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109 ".section .fixup,\"ax\"\n"
110 "3: movl $-1,%[err]\n"
111 " jmp 2b\n"
112 ".previous\n"
7a040a43 113 _ASM_EXTABLE(1b,3b)
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114 : [err] "=r" (err)
115 : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
116 : "memory"); /* memory required? */
117 return err;
118}
119
6152e4b1 120static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
9dc89c0f 121{
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122 u32 lmask = mask;
123 u32 hmask = mask >> 32;
124
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125 asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
126 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
127 : "memory");
128}
129
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130static inline void xsave_state(struct xsave_struct *fx, u64 mask)
131{
132 u32 lmask = mask;
133 u32 hmask = mask >> 32;
134
135 asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t"
136 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
137 : "memory");
138}
139
86603283 140static inline void fpu_xsave(struct fpu *fpu)
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141{
142 /* This, however, we can work around by forcing the compiler to select
143 an addressing mode that doesn't require extended registers. */
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144 alternative_input(
145 ".byte " REX_PREFIX "0x0f,0xae,0x27",
146 ".byte " REX_PREFIX "0x0f,0xae,0x37",
147 X86_FEATURE_XSAVEOPT,
148 [fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) :
149 "memory");
b359e8a4 150}
dc1e35c6 151#endif
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