[deliverable/linux.git] / arch / x86 / include / asm / xsave.h

#ifndef __ASM_X86_XSAVE_H
#define __ASM_X86_XSAVE_H

#include <linux/types.h>
#include <asm/processor.h>
#include <asm/i387.h>

#define XSTATE_FP	0x1
#define XSTATE_SSE	0x2
#define XSTATE_YMM	0x4

#define XSTATE_FPSSE	(XSTATE_FP | XSTATE_SSE)

#define FXSAVE_SIZE	512

#define XSAVE_HDR_SIZE	    64
#define XSAVE_HDR_OFFSET    FXSAVE_SIZE

#define XSAVE_YMM_SIZE	    256
#define XSAVE_YMM_OFFSET    (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)

/*
 * These are the features that the OS can handle currently.
 */
#define XCNTXT_MASK	(XSTATE_FP | XSTATE_SSE | XSTATE_YMM)

#ifdef CONFIG_X86_64
#define REX_PREFIX	"0x48, "
#else
#define REX_PREFIX
#endif

extern unsigned int xstate_size;
extern u64 pcntxt_mask;
extern struct xsave_struct *init_xstate_buf;
extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];

extern void xsave_cntxt_init(void);
extern void xsave_init(void);
extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
extern int init_fpu(struct task_struct *child);
extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
			    void __user *fpstate,
			    struct _fpx_sw_bytes *sw);

static inline int fpu_xrstor_checking(struct fpu *fpu)
{
	struct xsave_struct *fx = &fpu->state->xsave;
	int err;

	asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
		     "2:\n"
		     ".section .fixup,\"ax\"\n"
		     "3:  movl $-1,%[err]\n"
		     "    jmp  2b\n"
		     ".previous\n"
		     _ASM_EXTABLE(1b, 3b)
		     : [err] "=r" (err)
		     : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
		     : "memory");

	return err;
}

static inline int xsave_user(struct xsave_struct __user *buf)
{
	int err;
	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
			     "2:\n"
			     ".section .fixup,\"ax\"\n"
			     "3:  movl $-1,%[err]\n"
			     "    jmp  2b\n"
			     ".previous\n"
			     ".section __ex_table,\"a\"\n"
			     _ASM_ALIGN "\n"
			     _ASM_PTR "1b,3b\n"
			     ".previous"
			     : [err] "=r" (err)
			     : "D" (buf), "a" (-1), "d" (-1), "0" (0)
			     : "memory");
	if (unlikely(err) && __clear_user(buf, xstate_size))
		err = -EFAULT;
	/* No need to clear here because the caller clears USED_MATH */
	return err;
}

static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
{
	int err;
	struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
	u32 lmask = mask;
	u32 hmask = mask >> 32;

	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
			     "2:\n"
			     ".section .fixup,\"ax\"\n"
			     "3:  movl $-1,%[err]\n"
			     "    jmp  2b\n"
			     ".previous\n"
			     ".section __ex_table,\"a\"\n"
			     _ASM_ALIGN "\n"
			     _ASM_PTR "1b,3b\n"
			     ".previous"
			     : [err] "=r" (err)
			     : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
			     : "memory");	/* memory required? */
	return err;
}

static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
{
	u32 lmask = mask;
	u32 hmask = mask >> 32;

	asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
		     : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
		     :   "memory");
}

static inline void fpu_xsave(struct fpu *fpu)
{
	/* This, however, we can work around by forcing the compiler to select
	   an addressing mode that doesn't require extended registers. */
	__asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
			     : : "D" (&(fpu->state->xsave)),
				 "a" (-1), "d"(-1) : "memory");
}
#endif
Commit	Line	Data
dc1e35c6 SS	1	#ifndef __ASM_X86_XSAVE_H
	2	#define __ASM_X86_XSAVE_H
	3
6152e4b1	4	#include <linux/types.h>
dc1e35c6 SS	5	#include <asm/processor.h>
	6	#include <asm/i387.h>
	7
	8	#define XSTATE_FP 0x1
	9	#define XSTATE_SSE 0x2
a30469e7	10	#define XSTATE_YMM 0x4
dc1e35c6 SS	11
	12	#define XSTATE_FPSSE (XSTATE_FP \| XSTATE_SSE)
	13
	14	#define FXSAVE_SIZE 512
	15
2d5b5a66 SY	16	#define XSAVE_HDR_SIZE 64
	17	#define XSAVE_HDR_OFFSET FXSAVE_SIZE
	18
	19	#define XSAVE_YMM_SIZE 256
	20	#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
5ee481da	21
dc1e35c6 SS	22	/*
	23	* These are the features that the OS can handle currently.
	24	*/
a30469e7	25	#define XCNTXT_MASK (XSTATE_FP \| XSTATE_SSE \| XSTATE_YMM)
dc1e35c6	26
b359e8a4 SS	27	#ifdef CONFIG_X86_64
	28	#define REX_PREFIX "0x48, "
	29	#else
	30	#define REX_PREFIX
	31	#endif
	32
6152e4b1 PA	33	extern unsigned int xstate_size;
6152e4b1 PA	34	extern u64 pcntxt_mask;
dc1e35c6	35	extern struct xsave_struct *init_xstate_buf;
5b3efd50	36	extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
dc1e35c6 SS	37
	38	extern void xsave_cntxt_init(void);
	39	extern void xsave_init(void);
5b3efd50	40	extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
b359e8a4	41	extern int init_fpu(struct task_struct *child);
c37b5efe SS	42	extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
	43	void __user *fpstate,
	44	struct _fpx_sw_bytes *sw);
b359e8a4	45
86603283	46	static inline int fpu_xrstor_checking(struct fpu *fpu)
b359e8a4	47	{
86603283	48	struct xsave_struct *fx = &fpu->state->xsave;
b359e8a4 SS	49	int err;
	50
	51	asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
	52	"2:\n"
	53	".section .fixup,\"ax\"\n"
	54	"3: movl $-1,%[err]\n"
	55	" jmp 2b\n"
	56	".previous\n"
	57	_ASM_EXTABLE(1b, 3b)
	58	: [err] "=r" (err)
	59	: "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
	60	: "memory");
	61
	62	return err;
	63	}
	64
c37b5efe	65	static inline int xsave_user(struct xsave_struct __user *buf)
9dc89c0f SS	66	{
	67	int err;
	68	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
	69	"2:\n"
	70	".section .fixup,\"ax\"\n"
	71	"3: movl $-1,%[err]\n"
	72	" jmp 2b\n"
	73	".previous\n"
	74	".section __ex_table,\"a\"\n"
	75	_ASM_ALIGN "\n"
	76	_ASM_PTR "1b,3b\n"
	77	".previous"
	78	: [err] "=r" (err)
	79	: "D" (buf), "a" (-1), "d" (-1), "0" (0)
	80	: "memory");
	81	if (unlikely(err) && __clear_user(buf, xstate_size))
	82	err = -EFAULT;
	83	/* No need to clear here because the caller clears USED_MATH */
	84	return err;
	85	}
	86
6152e4b1	87	static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
9dc89c0f SS	88	{
	89	int err;
	90	struct xsave_struct xstate = ((__force struct xsave_struct )buf);
6152e4b1 PA	91	u32 lmask = mask;
6152e4b1 PA	92	u32 hmask = mask >> 32;
9dc89c0f SS	93
	94	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
	95	"2:\n"
	96	".section .fixup,\"ax\"\n"
	97	"3: movl $-1,%[err]\n"
	98	" jmp 2b\n"
	99	".previous\n"
	100	".section __ex_table,\"a\"\n"
	101	_ASM_ALIGN "\n"
	102	_ASM_PTR "1b,3b\n"
	103	".previous"
	104	: [err] "=r" (err)
	105	: "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
	106	: "memory"); /* memory required? */
	107	return err;
	108	}
	109
6152e4b1	110	static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
9dc89c0f	111	{
6152e4b1 PA	112	u32 lmask = mask;
	113	u32 hmask = mask >> 32;
	114
9dc89c0f SS	115	asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
	116	: : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
	117	: "memory");
	118	}
	119
86603283	120	static inline void fpu_xsave(struct fpu *fpu)
b359e8a4 SS	121	{
	122	/* This, however, we can work around by forcing the compiler to select
	123	an addressing mode that doesn't require extended registers. */
	124	__asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
86603283	125	: : "D" (&(fpu->state->xsave)),
b359e8a4 SS	126	"a" (-1), "d"(-1) : "memory");
b359e8a4 SS	127	}
dc1e35c6	128	#endif