Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
f0f4c343 | 34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/io_apic.h> | |
39 | #include <asm/apic.h> | |
183fe065 | 40 | #include <asm/genapic.h> |
1da177e4 | 41 | #include <asm/io.h> |
1da177e4 | 42 | #include <asm/mpspec.h> |
dfac2189 | 43 | #include <asm/smp.h> |
1da177e4 | 44 | |
f6bc4029 GOC |
45 | #ifdef CONFIG_X86_LOCAL_APIC |
46 | # include <mach_apic.h> | |
47 | #endif | |
48 | ||
e8924acb | 49 | static int __initdata acpi_force = 0; |
1a3f239d | 50 | |
df3bb57d AK |
51 | #ifdef CONFIG_ACPI |
52 | int acpi_disabled = 0; | |
53 | #else | |
54 | int acpi_disabled = 1; | |
55 | #endif | |
56 | EXPORT_SYMBOL(acpi_disabled); | |
57 | ||
1da177e4 LT |
58 | #ifdef CONFIG_X86_64 |
59 | ||
1da177e4 | 60 | #include <asm/proto.h> |
ae261868 | 61 | #include <asm/genapic.h> |
637029c6 | 62 | |
4be44fcd | 63 | #else /* X86 */ |
1da177e4 LT |
64 | |
65 | #ifdef CONFIG_X86_LOCAL_APIC | |
66 | #include <mach_apic.h> | |
67 | #include <mach_mpparse.h> | |
4be44fcd | 68 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 69 | |
4be44fcd | 70 | #endif /* X86 */ |
1da177e4 LT |
71 | |
72 | #define BAD_MADT_ENTRY(entry, end) ( \ | |
73 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | |
5f3b1a8b | 74 | ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) |
1da177e4 LT |
75 | |
76 | #define PREFIX "ACPI: " | |
77 | ||
90d53909 | 78 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
79 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
80 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
81 | int acpi_ht __initdata = 1; /* enable HT */ |
82 | ||
83 | int acpi_lapic; | |
84 | int acpi_ioapic; | |
85 | int acpi_strict; | |
1da177e4 | 86 | |
471694ea MR |
87 | static int disable_irq0_through_ioapic __initdata; |
88 | ||
5f3b1a8b | 89 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
90 | int acpi_sci_override_gsi __initdata; |
91 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 92 | int acpi_use_timer_override __initdata; |
1da177e4 LT |
93 | |
94 | #ifdef CONFIG_X86_LOCAL_APIC | |
95 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
96 | #endif | |
97 | ||
98 | #ifndef __HAVE_ARCH_CMPXCHG | |
99 | #warning ACPI uses CMPXCHG, i486 and later hardware | |
100 | #endif | |
101 | ||
1da177e4 LT |
102 | /* -------------------------------------------------------------------------- |
103 | Boot-time Configuration | |
104 | -------------------------------------------------------------------------- */ | |
105 | ||
106 | /* | |
107 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 108 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 109 | */ |
4be44fcd | 110 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 LT |
111 | |
112 | #ifdef CONFIG_X86_64 | |
113 | ||
114 | /* rely on all ACPI tables being in the direct mapping */ | |
2fdf0741 | 115 | char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size) |
1da177e4 LT |
116 | { |
117 | if (!phys_addr || !size) | |
4be44fcd | 118 | return NULL; |
1da177e4 | 119 | |
67794292 | 120 | if (phys_addr+size <= (max_pfn_mapped << PAGE_SHIFT) + PAGE_SIZE) |
1da177e4 LT |
121 | return __va(phys_addr); |
122 | ||
123 | return NULL; | |
124 | } | |
125 | ||
126 | #else | |
127 | ||
128 | /* | |
129 | * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, | |
130 | * to map the target physical address. The problem is that set_fixmap() | |
131 | * provides a single page, and it is possible that the page is not | |
132 | * sufficient. | |
133 | * By using this area, we can map up to MAX_IO_APICS pages temporarily, | |
134 | * i.e. until the next __va_range() call. | |
135 | * | |
136 | * Important Safety Note: The fixed I/O APIC page numbers are *subtracted* | |
137 | * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and | |
138 | * count idx down while incrementing the phys address. | |
139 | */ | |
2fdf0741 | 140 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 LT |
141 | { |
142 | unsigned long base, offset, mapped_size; | |
143 | int idx; | |
144 | ||
4be44fcd LB |
145 | if (phys + size < 8 * 1024 * 1024) |
146 | return __va(phys); | |
1da177e4 LT |
147 | |
148 | offset = phys & (PAGE_SIZE - 1); | |
149 | mapped_size = PAGE_SIZE - offset; | |
150 | set_fixmap(FIX_ACPI_END, phys); | |
151 | base = fix_to_virt(FIX_ACPI_END); | |
152 | ||
153 | /* | |
154 | * Most cases can be covered by the below. | |
155 | */ | |
156 | idx = FIX_ACPI_END; | |
157 | while (mapped_size < size) { | |
158 | if (--idx < FIX_ACPI_BEGIN) | |
159 | return NULL; /* cannot handle this */ | |
160 | phys += PAGE_SIZE; | |
161 | set_fixmap(idx, phys); | |
162 | mapped_size += PAGE_SIZE; | |
163 | } | |
164 | ||
4be44fcd | 165 | return ((unsigned char *)base + offset); |
1da177e4 LT |
166 | } |
167 | #endif | |
168 | ||
169 | #ifdef CONFIG_PCI_MMCONFIG | |
54549391 | 170 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
15a58ed1 | 171 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
54549391 GKH |
172 | int pci_mmcfg_config_num; |
173 | ||
ceb6c468 | 174 | int __init acpi_parse_mcfg(struct acpi_table_header *header) |
1da177e4 LT |
175 | { |
176 | struct acpi_table_mcfg *mcfg; | |
54549391 GKH |
177 | unsigned long i; |
178 | int config_size; | |
1da177e4 | 179 | |
ceb6c468 | 180 | if (!header) |
1da177e4 LT |
181 | return -EINVAL; |
182 | ||
ceb6c468 | 183 | mcfg = (struct acpi_table_mcfg *)header; |
1da177e4 | 184 | |
54549391 GKH |
185 | /* how many config structures do we have */ |
186 | pci_mmcfg_config_num = 0; | |
ceb6c468 | 187 | i = header->length - sizeof(struct acpi_table_mcfg); |
15a58ed1 | 188 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
54549391 | 189 | ++pci_mmcfg_config_num; |
15a58ed1 | 190 | i -= sizeof(struct acpi_mcfg_allocation); |
54549391 GKH |
191 | }; |
192 | if (pci_mmcfg_config_num == 0) { | |
193 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); | |
1da177e4 LT |
194 | return -ENODEV; |
195 | } | |
196 | ||
54549391 GKH |
197 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
198 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); | |
199 | if (!pci_mmcfg_config) { | |
200 | printk(KERN_WARNING PREFIX | |
201 | "No memory for MCFG config tables\n"); | |
202 | return -ENOMEM; | |
203 | } | |
204 | ||
ad363f80 | 205 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
54549391 | 206 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
15a58ed1 | 207 | if (pci_mmcfg_config[i].address > 0xFFFFFFFF) { |
54549391 GKH |
208 | printk(KERN_ERR PREFIX |
209 | "MMCONFIG not in low 4GB of memory\n"); | |
acc7c2e0 KR |
210 | kfree(pci_mmcfg_config); |
211 | pci_mmcfg_config_num = 0; | |
54549391 GKH |
212 | return -ENODEV; |
213 | } | |
214 | } | |
1da177e4 LT |
215 | |
216 | return 0; | |
217 | } | |
4be44fcd | 218 | #endif /* CONFIG_PCI_MMCONFIG */ |
1da177e4 LT |
219 | |
220 | #ifdef CONFIG_X86_LOCAL_APIC | |
15a58ed1 | 221 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 222 | { |
4be44fcd | 223 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 224 | |
15a58ed1 | 225 | if (!cpu_has_apic) |
1da177e4 LT |
226 | return -EINVAL; |
227 | ||
15a58ed1 | 228 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
229 | if (!madt) { |
230 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
231 | return -ENODEV; | |
232 | } | |
233 | ||
ad363f80 AS |
234 | if (madt->address) { |
235 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
236 | |
237 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 238 | madt->address); |
1da177e4 LT |
239 | } |
240 | ||
241 | acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); | |
4be44fcd | 242 | |
1da177e4 LT |
243 | return 0; |
244 | } | |
245 | ||
dfac2189 AS |
246 | static void __cpuinit acpi_register_lapic(int id, u8 enabled) |
247 | { | |
fb3bbd6a YL |
248 | unsigned int ver = 0; |
249 | ||
dfac2189 AS |
250 | if (!enabled) { |
251 | ++disabled_cpus; | |
252 | return; | |
253 | } | |
254 | ||
fb3bbd6a YL |
255 | #ifdef CONFIG_X86_32 |
256 | if (boot_cpu_physical_apicid != -1U) | |
257 | ver = apic_version[boot_cpu_physical_apicid]; | |
258 | #endif | |
259 | ||
260 | generic_processor_info(id, ver); | |
dfac2189 AS |
261 | } |
262 | ||
1da177e4 | 263 | static int __init |
5f3b1a8b | 264 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 265 | { |
5f3b1a8b | 266 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 267 | |
5f3b1a8b | 268 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
269 | |
270 | if (BAD_MADT_ENTRY(processor, end)) | |
271 | return -EINVAL; | |
272 | ||
273 | acpi_table_print_madt_entry(header); | |
274 | ||
7f66ae48 AR |
275 | /* |
276 | * We need to register disabled CPU as well to permit | |
277 | * counting disabled CPUs. This allows us to size | |
278 | * cpus_possible_map more accurately, to permit | |
279 | * to not preallocating memory for all NR_CPUS | |
280 | * when we use CPU hotplug. | |
281 | */ | |
dfac2189 AS |
282 | acpi_register_lapic(processor->id, /* APIC ID */ |
283 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
284 | |
285 | return 0; | |
286 | } | |
287 | ||
ac049c1d JS |
288 | static int __init |
289 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
290 | { | |
291 | struct acpi_madt_local_sapic *processor = NULL; | |
292 | ||
293 | processor = (struct acpi_madt_local_sapic *)header; | |
294 | ||
295 | if (BAD_MADT_ENTRY(processor, end)) | |
296 | return -EINVAL; | |
297 | ||
298 | acpi_table_print_madt_entry(header); | |
299 | ||
dfac2189 AS |
300 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
301 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
302 | |
303 | return 0; | |
304 | } | |
305 | ||
1da177e4 | 306 | static int __init |
5f3b1a8b | 307 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 308 | const unsigned long end) |
1da177e4 | 309 | { |
5f3b1a8b | 310 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 311 | |
5f3b1a8b | 312 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
313 | |
314 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
315 | return -EINVAL; | |
316 | ||
317 | acpi_lapic_addr = lapic_addr_ovr->address; | |
318 | ||
319 | return 0; | |
320 | } | |
321 | ||
322 | static int __init | |
5f3b1a8b | 323 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 324 | { |
5f3b1a8b | 325 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 326 | |
5f3b1a8b | 327 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
328 | |
329 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
330 | return -EINVAL; | |
331 | ||
332 | acpi_table_print_madt_entry(header); | |
333 | ||
334 | if (lapic_nmi->lint != 1) | |
335 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
336 | ||
337 | return 0; | |
338 | } | |
339 | ||
4be44fcd | 340 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 341 | |
8466361a | 342 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
343 | |
344 | static int __init | |
5f3b1a8b | 345 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 346 | { |
5f3b1a8b | 347 | struct acpi_madt_io_apic *ioapic = NULL; |
1da177e4 | 348 | |
5f3b1a8b | 349 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
350 | |
351 | if (BAD_MADT_ENTRY(ioapic, end)) | |
352 | return -EINVAL; | |
4be44fcd | 353 | |
1da177e4 LT |
354 | acpi_table_print_madt_entry(header); |
355 | ||
4be44fcd LB |
356 | mp_register_ioapic(ioapic->id, |
357 | ioapic->address, ioapic->global_irq_base); | |
358 | ||
1da177e4 LT |
359 | return 0; |
360 | } | |
361 | ||
362 | /* | |
363 | * Parse Interrupt Source Override for the ACPI SCI | |
364 | */ | |
e82c354b | 365 | static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
1da177e4 LT |
366 | { |
367 | if (trigger == 0) /* compatible SCI trigger is level */ | |
368 | trigger = 3; | |
369 | ||
370 | if (polarity == 0) /* compatible SCI polarity is low */ | |
371 | polarity = 3; | |
372 | ||
373 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
374 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
375 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 376 | |
5f3b1a8b AS |
377 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
378 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 LT |
379 | |
380 | /* | |
4be44fcd | 381 | * mp_config_acpi_legacy_irqs() already setup IRQs < 16 |
1da177e4 LT |
382 | * If GSI is < 16, this will update its flags, |
383 | * else it will create a new mp_irqs[] entry. | |
384 | */ | |
7bdd21ce | 385 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
1da177e4 LT |
386 | |
387 | /* | |
388 | * stash over-ride to indicate we've been here | |
cee324b1 | 389 | * and for later update of acpi_gbl_FADT |
1da177e4 | 390 | */ |
7bdd21ce | 391 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
392 | return; |
393 | } | |
394 | ||
395 | static int __init | |
5f3b1a8b | 396 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 397 | const unsigned long end) |
1da177e4 | 398 | { |
5f3b1a8b | 399 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 400 | |
5f3b1a8b | 401 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
402 | |
403 | if (BAD_MADT_ENTRY(intsrc, end)) | |
404 | return -EINVAL; | |
405 | ||
406 | acpi_table_print_madt_entry(header); | |
407 | ||
5f3b1a8b | 408 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
7bdd21ce | 409 | acpi_sci_ioapic_setup(intsrc->global_irq, |
5f3b1a8b AS |
410 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
411 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); | |
1da177e4 LT |
412 | return 0; |
413 | } | |
414 | ||
415 | if (acpi_skip_timer_override && | |
5f3b1a8b | 416 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
4be44fcd LB |
417 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
418 | return 0; | |
1da177e4 LT |
419 | } |
420 | ||
5f3b1a8b AS |
421 | mp_override_legacy_irq(intsrc->source_irq, |
422 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
423 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
424 | intsrc->global_irq); | |
1da177e4 LT |
425 | |
426 | return 0; | |
427 | } | |
428 | ||
1da177e4 | 429 | static int __init |
5f3b1a8b | 430 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 431 | { |
5f3b1a8b | 432 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 433 | |
5f3b1a8b | 434 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
435 | |
436 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
437 | return -EINVAL; | |
438 | ||
439 | acpi_table_print_madt_entry(header); | |
440 | ||
441 | /* TBD: Support nimsrc entries? */ | |
442 | ||
443 | return 0; | |
444 | } | |
445 | ||
4be44fcd | 446 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 447 | |
1da177e4 LT |
448 | /* |
449 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 450 | * |
1da177e4 LT |
451 | * use ELCR to set PIC-mode trigger type for SCI |
452 | * | |
453 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
454 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
455 | * | |
456 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
457 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
458 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
459 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
460 | */ |
461 | ||
4be44fcd | 462 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
463 | { |
464 | unsigned int mask = 1 << irq; | |
465 | unsigned int old, new; | |
466 | ||
467 | /* Real old ELCR mask */ | |
468 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
469 | ||
470 | /* | |
27b46d76 | 471 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
472 | * since we will set it correctly as we enable the PCI irq |
473 | * routing. | |
474 | */ | |
475 | new = acpi_noirq ? old : 0; | |
476 | ||
477 | /* | |
478 | * Update SCI information in the ELCR, it isn't in the PCI | |
479 | * routing tables.. | |
480 | */ | |
481 | switch (trigger) { | |
4be44fcd | 482 | case 1: /* Edge - clear */ |
1da177e4 LT |
483 | new &= ~mask; |
484 | break; | |
4be44fcd | 485 | case 3: /* Level - set */ |
1da177e4 LT |
486 | new |= mask; |
487 | break; | |
488 | } | |
489 | ||
490 | if (old == new) | |
491 | return; | |
492 | ||
493 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
494 | outb(new, 0x4d0); | |
495 | outb(new >> 8, 0x4d1); | |
496 | } | |
497 | ||
1da177e4 LT |
498 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) |
499 | { | |
f023d764 | 500 | *irq = gsi; |
1da177e4 LT |
501 | return 0; |
502 | } | |
503 | ||
1f3a6a15 KK |
504 | /* |
505 | * success: return IRQ number (>=0) | |
506 | * failure: return < 0 | |
507 | */ | |
cb654695 | 508 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) |
1da177e4 LT |
509 | { |
510 | unsigned int irq; | |
511 | unsigned int plat_gsi = gsi; | |
512 | ||
513 | #ifdef CONFIG_PCI | |
514 | /* | |
515 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
516 | */ | |
517 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | |
cb654695 | 518 | if (triggering == ACPI_LEVEL_SENSITIVE) |
4be44fcd | 519 | eisa_set_level_irq(gsi); |
1da177e4 LT |
520 | } |
521 | #endif | |
522 | ||
523 | #ifdef CONFIG_X86_IO_APIC | |
524 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | |
cb654695 | 525 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); |
1da177e4 LT |
526 | } |
527 | #endif | |
528 | acpi_gsi_to_irq(plat_gsi, &irq); | |
529 | return irq; | |
530 | } | |
4be44fcd | 531 | |
1da177e4 LT |
532 | /* |
533 | * ACPI based hotplug support for CPU | |
534 | */ | |
535 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
009cbadb SR |
536 | |
537 | static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
1da177e4 | 538 | { |
73fea175 AR |
539 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
540 | union acpi_object *obj; | |
5f3b1a8b | 541 | struct acpi_madt_local_apic *lapic; |
73fea175 AR |
542 | cpumask_t tmp_map, new_map; |
543 | u8 physid; | |
544 | int cpu; | |
545 | ||
546 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) | |
547 | return -EINVAL; | |
548 | ||
549 | if (!buffer.length || !buffer.pointer) | |
550 | return -EINVAL; | |
551 | ||
552 | obj = buffer.pointer; | |
553 | if (obj->type != ACPI_TYPE_BUFFER || | |
554 | obj->buffer.length < sizeof(*lapic)) { | |
555 | kfree(buffer.pointer); | |
556 | return -EINVAL; | |
557 | } | |
558 | ||
5f3b1a8b | 559 | lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer; |
73fea175 | 560 | |
5f3b1a8b AS |
561 | if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC || |
562 | !(lapic->lapic_flags & ACPI_MADT_ENABLED)) { | |
73fea175 AR |
563 | kfree(buffer.pointer); |
564 | return -EINVAL; | |
565 | } | |
566 | ||
567 | physid = lapic->id; | |
568 | ||
569 | kfree(buffer.pointer); | |
570 | buffer.length = ACPI_ALLOCATE_BUFFER; | |
571 | buffer.pointer = NULL; | |
572 | ||
573 | tmp_map = cpu_present_map; | |
dfac2189 | 574 | acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED); |
73fea175 AR |
575 | |
576 | /* | |
577 | * If mp_register_lapic successfully generates a new logical cpu | |
578 | * number, then the following will get us exactly what was mapped | |
579 | */ | |
580 | cpus_andnot(new_map, cpu_present_map, tmp_map); | |
581 | if (cpus_empty(new_map)) { | |
582 | printk ("Unable to map lapic to logical cpu number\n"); | |
583 | return -EINVAL; | |
584 | } | |
585 | ||
586 | cpu = first_cpu(new_map); | |
587 | ||
588 | *pcpu = cpu; | |
589 | return 0; | |
1da177e4 | 590 | } |
1da177e4 | 591 | |
009cbadb SR |
592 | /* wrapper to silence section mismatch warning */ |
593 | int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
594 | { | |
595 | return _acpi_map_lsapic(handle, pcpu); | |
596 | } | |
4be44fcd | 597 | EXPORT_SYMBOL(acpi_map_lsapic); |
1da177e4 | 598 | |
4be44fcd | 599 | int acpi_unmap_lsapic(int cpu) |
1da177e4 | 600 | { |
71fff5e6 | 601 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
73fea175 AR |
602 | cpu_clear(cpu, cpu_present_map); |
603 | num_processors--; | |
604 | ||
605 | return (0); | |
1da177e4 | 606 | } |
4be44fcd | 607 | |
1da177e4 | 608 | EXPORT_SYMBOL(acpi_unmap_lsapic); |
4be44fcd | 609 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 610 | |
4be44fcd | 611 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a KK |
612 | { |
613 | /* TBD */ | |
614 | return -EINVAL; | |
615 | } | |
4be44fcd | 616 | |
b1bb248a KK |
617 | EXPORT_SYMBOL(acpi_register_ioapic); |
618 | ||
4be44fcd | 619 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a KK |
620 | { |
621 | /* TBD */ | |
622 | return -EINVAL; | |
623 | } | |
4be44fcd | 624 | |
b1bb248a KK |
625 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
626 | ||
5f3b1a8b | 627 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 628 | { |
5f3b1a8b | 629 | struct acpi_table_boot *sb; |
1da177e4 | 630 | |
5f3b1a8b | 631 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
632 | if (!sb) { |
633 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
634 | return -ENODEV; | |
635 | } | |
636 | ||
5f3b1a8b | 637 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
638 | |
639 | return 0; | |
640 | } | |
641 | ||
1da177e4 | 642 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 643 | #include <asm/hpet.h> |
1da177e4 | 644 | |
a1dfd851 AD |
645 | static struct __initdata resource *hpet_res; |
646 | ||
5f3b1a8b | 647 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
648 | { |
649 | struct acpi_table_hpet *hpet_tbl; | |
650 | ||
5f3b1a8b | 651 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
652 | if (!hpet_tbl) { |
653 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
654 | return -ENODEV; | |
655 | } | |
656 | ||
ad363f80 | 657 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
658 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
659 | "memory.\n"); | |
660 | return -1; | |
661 | } | |
f0f4c343 | 662 | |
2d0c87c3 | 663 | hpet_address = hpet_tbl->address.address; |
f4df73c2 TG |
664 | |
665 | /* | |
666 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
667 | * want to allocate a resource there. | |
668 | */ | |
669 | if (!hpet_address) { | |
670 | printk(KERN_WARNING PREFIX | |
671 | "HPET id: %#x base: %#lx is invalid\n", | |
672 | hpet_tbl->id, hpet_address); | |
673 | return 0; | |
674 | } | |
675 | #ifdef CONFIG_X86_64 | |
676 | /* | |
677 | * Some even more broken BIOSes advertise HPET at | |
678 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
679 | * some noise: | |
680 | */ | |
681 | if (hpet_address == 0xfed0000000000000UL) { | |
682 | if (!hpet_force_user) { | |
683 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
684 | "base: 0xfed0000000000000 is bogus\n " | |
685 | "try hpet=force on the kernel command line to " | |
686 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
687 | hpet_address = 0; | |
688 | return 0; | |
689 | } | |
690 | printk(KERN_WARNING PREFIX | |
691 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
692 | "to 0xfed00000.\n", hpet_tbl->id); | |
693 | hpet_address >>= 32; | |
694 | } | |
695 | #endif | |
4be44fcd | 696 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 697 | hpet_tbl->id, hpet_address); |
1da177e4 | 698 | |
a1dfd851 AD |
699 | /* |
700 | * Allocate and initialize the HPET firmware resource for adding into | |
701 | * the resource tree during the lateinit timeframe. | |
702 | */ | |
703 | #define HPET_RESOURCE_NAME_SIZE 9 | |
704 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
705 | ||
a1dfd851 AD |
706 | hpet_res->name = (void *)&hpet_res[1]; |
707 | hpet_res->flags = IORESOURCE_MEM; | |
708 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
709 | hpet_tbl->sequence); | |
710 | ||
711 | hpet_res->start = hpet_address; | |
712 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
713 | ||
1da177e4 LT |
714 | return 0; |
715 | } | |
a1dfd851 AD |
716 | |
717 | /* | |
718 | * hpet_insert_resource inserts the HPET resources used into the resource | |
719 | * tree. | |
720 | */ | |
721 | static __init int hpet_insert_resource(void) | |
722 | { | |
723 | if (!hpet_res) | |
724 | return 1; | |
725 | ||
726 | return insert_resource(&iomem_resource, hpet_res); | |
727 | } | |
728 | ||
729 | late_initcall(hpet_insert_resource); | |
730 | ||
1da177e4 LT |
731 | #else |
732 | #define acpi_parse_hpet NULL | |
733 | #endif | |
734 | ||
5f3b1a8b | 735 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 736 | { |
90660ec3 | 737 | |
1da177e4 LT |
738 | #ifdef CONFIG_X86_PM_TIMER |
739 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 740 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 741 | /* FADT rev. 2 */ |
5f3b1a8b | 742 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 743 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
744 | return 0; |
745 | ||
5f3b1a8b | 746 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
747 | /* |
748 | * "X" fields are optional extensions to the original V1.0 | |
749 | * fields, so we must selectively expand V1.0 fields if the | |
750 | * corresponding X field is zero. | |
751 | */ | |
752 | if (!pmtmr_ioport) | |
5f3b1a8b | 753 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
754 | } else { |
755 | /* FADT rev. 1 */ | |
5f3b1a8b | 756 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
757 | } |
758 | if (pmtmr_ioport) | |
4be44fcd LB |
759 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
760 | pmtmr_ioport); | |
1da177e4 LT |
761 | #endif |
762 | return 0; | |
763 | } | |
764 | ||
1da177e4 LT |
765 | #ifdef CONFIG_X86_LOCAL_APIC |
766 | /* | |
767 | * Parse LAPIC entries in MADT | |
768 | * returns 0 on success, < 0 on error | |
769 | */ | |
31d2092e AS |
770 | |
771 | static void __init acpi_register_lapic_address(unsigned long address) | |
772 | { | |
773 | mp_lapic_addr = address; | |
774 | ||
775 | set_fixmap_nocache(FIX_APIC_BASE, address); | |
fb3bbd6a | 776 | if (boot_cpu_physical_apicid == -1U) { |
31d2092e | 777 | boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); |
fb3bbd6a YL |
778 | #ifdef CONFIG_X86_32 |
779 | apic_version[boot_cpu_physical_apicid] = | |
780 | GET_APIC_VERSION(apic_read(APIC_LVR)); | |
781 | #endif | |
782 | } | |
31d2092e AS |
783 | } |
784 | ||
cbf9bd60 YL |
785 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
786 | { | |
787 | int count; | |
788 | ||
789 | if (!cpu_has_apic) | |
790 | return -ENODEV; | |
791 | ||
792 | /* | |
793 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
794 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
795 | */ | |
796 | ||
797 | count = | |
798 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, | |
799 | acpi_parse_lapic_addr_ovr, 0); | |
800 | if (count < 0) { | |
801 | printk(KERN_ERR PREFIX | |
802 | "Error parsing LAPIC address override entry\n"); | |
803 | return count; | |
804 | } | |
805 | ||
806 | acpi_register_lapic_address(acpi_lapic_addr); | |
807 | ||
808 | return count; | |
809 | } | |
810 | ||
4be44fcd | 811 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
812 | { |
813 | int count; | |
814 | ||
0fcd2709 AK |
815 | if (!cpu_has_apic) |
816 | return -ENODEV; | |
817 | ||
5f3b1a8b | 818 | /* |
1da177e4 LT |
819 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
820 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
821 | */ | |
822 | ||
4be44fcd | 823 | count = |
5f3b1a8b | 824 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
4be44fcd | 825 | acpi_parse_lapic_addr_ovr, 0); |
1da177e4 | 826 | if (count < 0) { |
4be44fcd LB |
827 | printk(KERN_ERR PREFIX |
828 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
829 | return count; |
830 | } | |
831 | ||
31d2092e | 832 | acpi_register_lapic_address(acpi_lapic_addr); |
1da177e4 | 833 | |
ac049c1d JS |
834 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
835 | acpi_parse_sapic, MAX_APICS); | |
836 | ||
837 | if (!count) | |
838 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, | |
839 | acpi_parse_lapic, MAX_APICS); | |
4be44fcd | 840 | if (!count) { |
1da177e4 LT |
841 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
842 | /* TBD: Cleanup to allow fallback to MPS */ | |
843 | return -ENODEV; | |
4be44fcd | 844 | } else if (count < 0) { |
1da177e4 LT |
845 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
846 | /* TBD: Cleanup to allow fallback to MPS */ | |
847 | return count; | |
848 | } | |
849 | ||
4be44fcd | 850 | count = |
5f3b1a8b | 851 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0); |
1da177e4 LT |
852 | if (count < 0) { |
853 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); | |
854 | /* TBD: Cleanup to allow fallback to MPS */ | |
855 | return count; | |
856 | } | |
857 | return 0; | |
858 | } | |
4be44fcd | 859 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 860 | |
8466361a | 861 | #ifdef CONFIG_X86_IO_APIC |
11113f84 AS |
862 | #define MP_ISA_BUS 0 |
863 | ||
d49c4288 | 864 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
865 | extern int es7000_plat; |
866 | #endif | |
867 | ||
5f895148 AS |
868 | static struct { |
869 | int apic_id; | |
870 | int gsi_base; | |
871 | int gsi_end; | |
872 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | |
873 | } mp_ioapic_routing[MAX_IO_APICS]; | |
11113f84 AS |
874 | |
875 | static int mp_find_ioapic(int gsi) | |
876 | { | |
877 | int i = 0; | |
878 | ||
879 | /* Find the IOAPIC that manages this GSI. */ | |
880 | for (i = 0; i < nr_ioapics; i++) { | |
881 | if ((gsi >= mp_ioapic_routing[i].gsi_base) | |
882 | && (gsi <= mp_ioapic_routing[i].gsi_end)) | |
883 | return i; | |
884 | } | |
885 | ||
886 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); | |
887 | return -1; | |
888 | } | |
889 | ||
890 | static u8 __init uniq_ioapic_id(u8 id) | |
891 | { | |
892 | #ifdef CONFIG_X86_32 | |
893 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && | |
894 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) | |
895 | return io_apic_get_unique_id(nr_ioapics, id); | |
896 | else | |
897 | return id; | |
898 | #else | |
899 | int i; | |
900 | DECLARE_BITMAP(used, 256); | |
901 | bitmap_zero(used, 256); | |
902 | for (i = 0; i < nr_ioapics; i++) { | |
ec2cd0a2 AS |
903 | struct mp_config_ioapic *ia = &mp_ioapics[i]; |
904 | __set_bit(ia->mp_apicid, used); | |
11113f84 AS |
905 | } |
906 | if (!test_bit(id, used)) | |
907 | return id; | |
908 | return find_first_zero_bit(used, 256); | |
909 | #endif | |
910 | } | |
911 | ||
912 | static int bad_ioapic(unsigned long address) | |
913 | { | |
914 | if (nr_ioapics >= MAX_IO_APICS) { | |
915 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
916 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
917 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
918 | } | |
919 | if (!address) { | |
920 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
921 | " found in table, skipping!\n"); | |
922 | return 1; | |
923 | } | |
924 | return 0; | |
925 | } | |
926 | ||
927 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |
928 | { | |
929 | int idx = 0; | |
930 | ||
931 | if (bad_ioapic(address)) | |
932 | return; | |
933 | ||
934 | idx = nr_ioapics; | |
935 | ||
ec2cd0a2 AS |
936 | mp_ioapics[idx].mp_type = MP_IOAPIC; |
937 | mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; | |
938 | mp_ioapics[idx].mp_apicaddr = address; | |
11113f84 AS |
939 | |
940 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | |
ec2cd0a2 | 941 | mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); |
11113f84 | 942 | #ifdef CONFIG_X86_32 |
ec2cd0a2 | 943 | mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); |
11113f84 | 944 | #else |
ec2cd0a2 | 945 | mp_ioapics[idx].mp_apicver = 0; |
11113f84 AS |
946 | #endif |
947 | /* | |
948 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | |
949 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | |
950 | */ | |
ec2cd0a2 | 951 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; |
11113f84 AS |
952 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
953 | mp_ioapic_routing[idx].gsi_end = gsi_base + | |
954 | io_apic_get_redir_entries(idx); | |
955 | ||
ec2cd0a2 AS |
956 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " |
957 | "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, | |
958 | mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, | |
11113f84 AS |
959 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
960 | ||
961 | nr_ioapics++; | |
962 | } | |
963 | ||
fcfa146e YL |
964 | static void assign_to_mp_irq(struct mp_config_intsrc *m, |
965 | struct mp_config_intsrc *mp_irq) | |
966 | { | |
967 | memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
968 | } | |
969 | ||
970 | static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, | |
971 | struct mp_config_intsrc *m) | |
972 | { | |
973 | return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
974 | } | |
975 | ||
976 | static void save_mp_irq(struct mp_config_intsrc *m) | |
977 | { | |
978 | int i; | |
979 | ||
980 | for (i = 0; i < mp_irq_entries; i++) { | |
981 | if (!mp_irq_cmp(&mp_irqs[i], m)) | |
982 | return; | |
983 | } | |
984 | ||
985 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
986 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | |
987 | panic("Max # of irq sources exceeded!!\n"); | |
988 | } | |
989 | ||
11113f84 AS |
990 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
991 | { | |
6df8809b YL |
992 | int ioapic; |
993 | int pin; | |
fcfa146e | 994 | struct mp_config_intsrc mp_irq; |
11113f84 | 995 | |
471694ea MR |
996 | /* Skip the 8254 timer interrupt (IRQ 0) if requested. */ |
997 | if (bus_irq == 0 && disable_irq0_through_ioapic) | |
998 | return; | |
999 | ||
11113f84 AS |
1000 | /* |
1001 | * Convert 'gsi' to 'ioapic.pin'. | |
1002 | */ | |
1003 | ioapic = mp_find_ioapic(gsi); | |
1004 | if (ioapic < 0) | |
1005 | return; | |
1006 | pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1007 | ||
1008 | /* | |
1009 | * TBD: This check is for faulty timer entries, where the override | |
1010 | * erroneously sets the trigger to level, resulting in a HUGE | |
1011 | * increase of timer interrupts! | |
1012 | */ | |
1013 | if ((bus_irq == 0) && (trigger == 3)) | |
1014 | trigger = 1; | |
1015 | ||
fcfa146e YL |
1016 | mp_irq.mp_type = MP_INTSRC; |
1017 | mp_irq.mp_irqtype = mp_INT; | |
1018 | mp_irq.mp_irqflag = (trigger << 2) | polarity; | |
1019 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1020 | mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ | |
1021 | mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ | |
1022 | mp_irq.mp_dstirq = pin; /* INTIN# */ | |
11113f84 | 1023 | |
fcfa146e | 1024 | save_mp_irq(&mp_irq); |
11113f84 AS |
1025 | } |
1026 | ||
1027 | void __init mp_config_acpi_legacy_irqs(void) | |
1028 | { | |
6df8809b YL |
1029 | int i; |
1030 | int ioapic; | |
1031 | unsigned int dstapic; | |
fcfa146e | 1032 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
1033 | |
1034 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | |
1035 | /* | |
1036 | * Fabricate the legacy ISA bus (bus #31). | |
1037 | */ | |
1038 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1039 | #endif | |
1040 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
1041 | Dprintk("Bus #%d is ISA\n", MP_ISA_BUS); | |
1042 | ||
d49c4288 | 1043 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
1044 | /* |
1045 | * Older generations of ES7000 have no legacy identity mappings | |
1046 | */ | |
1047 | if (es7000_plat == 1) | |
1048 | return; | |
1049 | #endif | |
1050 | ||
1051 | /* | |
1052 | * Locate the IOAPIC that manages the ISA IRQs (0-15). | |
1053 | */ | |
1054 | ioapic = mp_find_ioapic(0); | |
1055 | if (ioapic < 0) | |
1056 | return; | |
6df8809b | 1057 | dstapic = mp_ioapics[ioapic].mp_apicid; |
11113f84 | 1058 | |
11113f84 AS |
1059 | /* |
1060 | * Use the default configuration for the IRQs 0-15. Unless | |
1061 | * overridden by (MADT) interrupt source override entries. | |
1062 | */ | |
1063 | for (i = 0; i < 16; i++) { | |
1064 | int idx; | |
1065 | ||
471694ea MR |
1066 | /* Skip the 8254 timer interrupt (IRQ 0) if requested. */ |
1067 | if (i == 0 && disable_irq0_through_ioapic) | |
1068 | continue; | |
1069 | ||
11113f84 | 1070 | for (idx = 0; idx < mp_irq_entries; idx++) { |
2fddb6e2 | 1071 | struct mp_config_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1072 | |
1073 | /* Do we already have a mapping for this ISA IRQ? */ | |
2fddb6e2 AS |
1074 | if (irq->mp_srcbus == MP_ISA_BUS |
1075 | && irq->mp_srcbusirq == i) | |
11113f84 AS |
1076 | break; |
1077 | ||
1078 | /* Do we already have a mapping for this IOAPIC pin */ | |
6df8809b YL |
1079 | if (irq->mp_dstapic == dstapic && |
1080 | irq->mp_dstirq == i) | |
11113f84 AS |
1081 | break; |
1082 | } | |
1083 | ||
1084 | if (idx != mp_irq_entries) { | |
1085 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1086 | continue; /* IRQ already used */ | |
1087 | } | |
1088 | ||
fcfa146e YL |
1089 | mp_irq.mp_type = MP_INTSRC; |
1090 | mp_irq.mp_irqflag = 0; /* Conforming */ | |
1091 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1092 | mp_irq.mp_dstapic = dstapic; | |
1093 | mp_irq.mp_irqtype = mp_INT; | |
1094 | mp_irq.mp_srcbusirq = i; /* Identity mapped */ | |
1095 | mp_irq.mp_dstirq = i; | |
11113f84 | 1096 | |
fcfa146e | 1097 | save_mp_irq(&mp_irq); |
11113f84 AS |
1098 | } |
1099 | } | |
1100 | ||
1101 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | |
1102 | { | |
1103 | int ioapic; | |
1104 | int ioapic_pin; | |
1105 | #ifdef CONFIG_X86_32 | |
1106 | #define MAX_GSI_NUM 4096 | |
1107 | #define IRQ_COMPRESSION_START 64 | |
1108 | ||
1109 | static int pci_irq = IRQ_COMPRESSION_START; | |
1110 | /* | |
1111 | * Mapping between Global System Interrupts, which | |
1112 | * represent all possible interrupts, and IRQs | |
1113 | * assigned to actual devices. | |
1114 | */ | |
1115 | static int gsi_to_irq[MAX_GSI_NUM]; | |
1116 | #else | |
1117 | ||
1118 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
1119 | return gsi; | |
1120 | #endif | |
1121 | ||
1122 | /* Don't set up the ACPI SCI because it's already set up */ | |
1123 | if (acpi_gbl_FADT.sci_interrupt == gsi) | |
1124 | return gsi; | |
1125 | ||
1126 | ioapic = mp_find_ioapic(gsi); | |
1127 | if (ioapic < 0) { | |
1128 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | |
1129 | return gsi; | |
1130 | } | |
1131 | ||
1132 | ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1133 | ||
1134 | #ifdef CONFIG_X86_32 | |
1135 | if (ioapic_renumber_irq) | |
1136 | gsi = ioapic_renumber_irq(ioapic, gsi); | |
1137 | #endif | |
1138 | ||
1139 | /* | |
1140 | * Avoid pin reprogramming. PRTs typically include entries | |
1141 | * with redundant pin->gsi mappings (but unique PCI devices); | |
1142 | * we only program the IOAPIC on the first. | |
1143 | */ | |
1144 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | |
1145 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | |
1146 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | |
1147 | ioapic_pin); | |
1148 | return gsi; | |
1149 | } | |
1150 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | |
1151 | Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", | |
1152 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); | |
1153 | #ifdef CONFIG_X86_32 | |
1154 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | |
1155 | #else | |
1156 | return gsi; | |
1157 | #endif | |
1158 | } | |
1159 | ||
1160 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | |
1161 | #ifdef CONFIG_X86_32 | |
1162 | /* | |
1163 | * For GSI >= 64, use IRQ compression | |
1164 | */ | |
1165 | if ((gsi >= IRQ_COMPRESSION_START) | |
1166 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | |
1167 | /* | |
1168 | * For PCI devices assign IRQs in order, avoiding gaps | |
1169 | * due to unused I/O APIC pins. | |
1170 | */ | |
1171 | int irq = gsi; | |
1172 | if (gsi < MAX_GSI_NUM) { | |
1173 | /* | |
1174 | * Retain the VIA chipset work-around (gsi > 15), but | |
1175 | * avoid a problem where the 8254 timer (IRQ0) is setup | |
1176 | * via an override (so it's not on pin 0 of the ioapic), | |
1177 | * and at the same time, the pin 0 interrupt is a PCI | |
1178 | * type. The gsi > 15 test could cause these two pins | |
1179 | * to be shared as IRQ0, and they are not shareable. | |
1180 | * So test for this condition, and if necessary, avoid | |
1181 | * the pin collision. | |
1182 | */ | |
1183 | gsi = pci_irq++; | |
1184 | /* | |
1185 | * Don't assign IRQ used by ACPI SCI | |
1186 | */ | |
1187 | if (gsi == acpi_gbl_FADT.sci_interrupt) | |
1188 | gsi = pci_irq++; | |
1189 | gsi_to_irq[irq] = gsi; | |
1190 | } else { | |
1191 | printk(KERN_ERR "GSI %u is too high\n", gsi); | |
1192 | return gsi; | |
1193 | } | |
1194 | } | |
1195 | #endif | |
1196 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | |
1197 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | |
1198 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
1199 | return gsi; | |
1200 | } | |
1201 | ||
2944e16b YL |
1202 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
1203 | u32 gsi, int triggering, int polarity) | |
1204 | { | |
fcfa146e YL |
1205 | #ifdef CONFIG_X86_MPPARSE |
1206 | struct mp_config_intsrc mp_irq; | |
2944e16b YL |
1207 | int ioapic; |
1208 | ||
fcfa146e | 1209 | if (!acpi_ioapic) |
d867e531 YL |
1210 | return 0; |
1211 | ||
2944e16b | 1212 | /* print the entry should happen on mptable identically */ |
fcfa146e YL |
1213 | mp_irq.mp_type = MP_INTSRC; |
1214 | mp_irq.mp_irqtype = mp_INT; | |
1215 | mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
2944e16b | 1216 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
fcfa146e YL |
1217 | mp_irq.mp_srcbus = number; |
1218 | mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
2944e16b | 1219 | ioapic = mp_find_ioapic(gsi); |
fcfa146e YL |
1220 | mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; |
1221 | mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
2944e16b | 1222 | |
fcfa146e YL |
1223 | save_mp_irq(&mp_irq); |
1224 | #endif | |
2944e16b YL |
1225 | return 0; |
1226 | } | |
1227 | ||
1da177e4 LT |
1228 | /* |
1229 | * Parse IOAPIC related entries in MADT | |
1230 | * returns 0 on success, < 0 on error | |
1231 | */ | |
4be44fcd | 1232 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1233 | { |
1234 | int count; | |
1235 | ||
1236 | /* | |
1237 | * ACPI interpreter is required to complete interrupt setup, | |
1238 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1239 | * If MPS is present, it will handle them, | |
1240 | * otherwise the system will stay in PIC mode | |
1241 | */ | |
1242 | if (acpi_disabled || acpi_noirq) { | |
1243 | return -ENODEV; | |
4be44fcd | 1244 | } |
1da177e4 | 1245 | |
5f3b1a8b | 1246 | if (!cpu_has_apic) |
d3b6a349 AK |
1247 | return -ENODEV; |
1248 | ||
1da177e4 | 1249 | /* |
4be44fcd | 1250 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1251 | */ |
1252 | if (skip_ioapic_setup) { | |
1253 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1254 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1255 | return -ENODEV; |
1256 | } | |
1257 | ||
4be44fcd | 1258 | count = |
5f3b1a8b | 1259 | acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
4be44fcd | 1260 | MAX_IO_APICS); |
1da177e4 LT |
1261 | if (!count) { |
1262 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1263 | return -ENODEV; | |
4be44fcd | 1264 | } else if (count < 0) { |
1da177e4 LT |
1265 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1266 | return count; | |
1267 | } | |
1268 | ||
4be44fcd | 1269 | count = |
5f3b1a8b | 1270 | acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr, |
4be44fcd | 1271 | NR_IRQ_VECTORS); |
1da177e4 | 1272 | if (count < 0) { |
4be44fcd LB |
1273 | printk(KERN_ERR PREFIX |
1274 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1275 | /* TBD: Cleanup to allow fallback to MPS */ |
1276 | return count; | |
1277 | } | |
1278 | ||
1279 | /* | |
1280 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1281 | * pretend we got one so we can set the SCI flags. | |
1282 | */ | |
1283 | if (!acpi_sci_override_gsi) | |
cee324b1 | 1284 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); |
1da177e4 LT |
1285 | |
1286 | /* Fill in identity legacy mapings where no override */ | |
1287 | mp_config_acpi_legacy_irqs(); | |
1288 | ||
4be44fcd | 1289 | count = |
5f3b1a8b | 1290 | acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src, |
4be44fcd | 1291 | NR_IRQ_VECTORS); |
1da177e4 LT |
1292 | if (count < 0) { |
1293 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1294 | /* TBD: Cleanup to allow fallback to MPS */ | |
1295 | return count; | |
1296 | } | |
1297 | ||
1298 | return 0; | |
1299 | } | |
1300 | #else | |
1301 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1302 | { | |
1303 | return -1; | |
1304 | } | |
8466361a | 1305 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1306 | |
cbf9bd60 YL |
1307 | static void __init early_acpi_process_madt(void) |
1308 | { | |
1309 | #ifdef CONFIG_X86_LOCAL_APIC | |
1310 | int error; | |
1311 | ||
1312 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1313 | ||
1314 | /* | |
1315 | * Parse MADT LAPIC entries | |
1316 | */ | |
1317 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1318 | if (!error) { | |
1319 | acpi_lapic = 1; | |
1320 | smp_found_config = 1; | |
1321 | } | |
1322 | if (error == -EINVAL) { | |
1323 | /* | |
1324 | * Dell Precision Workstation 410, 610 come here. | |
1325 | */ | |
1326 | printk(KERN_ERR PREFIX | |
1327 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1328 | disable_acpi(); | |
1329 | } | |
1330 | } | |
1331 | #endif | |
1332 | } | |
1333 | ||
4be44fcd | 1334 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1335 | { |
1336 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1337 | int error; |
1da177e4 | 1338 | |
7f8f97c3 | 1339 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1340 | |
1341 | /* | |
1342 | * Parse MADT LAPIC entries | |
1343 | */ | |
1344 | error = acpi_parse_madt_lapic_entries(); | |
1345 | if (!error) { | |
1346 | acpi_lapic = 1; | |
1347 | ||
911a62d4 VP |
1348 | #ifdef CONFIG_X86_GENERICARCH |
1349 | generic_bigsmp_probe(); | |
1350 | #endif | |
1da177e4 LT |
1351 | /* |
1352 | * Parse MADT IO-APIC entries | |
1353 | */ | |
1354 | error = acpi_parse_madt_ioapic_entries(); | |
1355 | if (!error) { | |
1356 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
1357 | acpi_irq_balance_set(NULL); | |
1358 | acpi_ioapic = 1; | |
1359 | ||
1360 | smp_found_config = 1; | |
3c43f039 | 1361 | setup_apic_routing(); |
1da177e4 LT |
1362 | } |
1363 | } | |
1364 | if (error == -EINVAL) { | |
1365 | /* | |
1366 | * Dell Precision Workstation 410, 610 come here. | |
1367 | */ | |
4be44fcd LB |
1368 | printk(KERN_ERR PREFIX |
1369 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1370 | disable_acpi(); |
1371 | } | |
1372 | } | |
1373 | #endif | |
1374 | return; | |
1375 | } | |
1376 | ||
1855256c | 1377 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1378 | { |
1379 | if (!acpi_force) { | |
1380 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1381 | d->ident); | |
1382 | acpi_noirq_set(); | |
1383 | } | |
1384 | return 0; | |
1385 | } | |
1386 | ||
1855256c | 1387 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1388 | { |
1389 | if (!acpi_force) { | |
1390 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1391 | d->ident); | |
1392 | acpi_disable_pci(); | |
1393 | } | |
1394 | return 0; | |
1395 | } | |
aea00143 | 1396 | |
1855256c | 1397 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1398 | { |
1399 | if (!acpi_force) { | |
4be44fcd | 1400 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1401 | disable_acpi(); |
1402 | } else { | |
1403 | printk(KERN_NOTICE | |
1404 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1405 | } | |
1406 | return 0; | |
1407 | } | |
1408 | ||
1409 | /* | |
1410 | * Limit ACPI to CPU enumeration for HT | |
1411 | */ | |
1855256c | 1412 | static int __init force_acpi_ht(const struct dmi_system_id *d) |
aea00143 AP |
1413 | { |
1414 | if (!acpi_force) { | |
4be44fcd LB |
1415 | printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", |
1416 | d->ident); | |
aea00143 AP |
1417 | disable_acpi(); |
1418 | acpi_ht = 1; | |
1419 | } else { | |
1420 | printk(KERN_NOTICE | |
1421 | "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); | |
1422 | } | |
1423 | return 0; | |
1424 | } | |
1425 | ||
9340e1cc MG |
1426 | /* |
1427 | * Don't register any I/O APIC entries for the 8254 timer IRQ. | |
1428 | */ | |
1429 | static int __init | |
1430 | dmi_disable_irq0_through_ioapic(const struct dmi_system_id *d) | |
1431 | { | |
1432 | pr_notice("%s detected: disabling IRQ 0 through I/O APIC\n", d->ident); | |
1433 | disable_irq0_through_ioapic = 1; | |
1434 | return 0; | |
1435 | } | |
1436 | ||
e2079c43 RW |
1437 | /* |
1438 | * Force ignoring BIOS IRQ0 pin2 override | |
1439 | */ | |
1440 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1441 | { | |
1442 | pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident); | |
1443 | acpi_skip_timer_override = 1; | |
1444 | force_mask_ioapic_irq_2(); | |
1445 | return 0; | |
1446 | } | |
1447 | ||
aea00143 AP |
1448 | /* |
1449 | * If your system is blacklisted here, but you find that acpi=force | |
1450 | * works for you, please contact acpi-devel@sourceforge.net | |
1451 | */ | |
1452 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1453 | /* | |
1454 | * Boxes that need ACPI disabled | |
1455 | */ | |
1456 | { | |
4be44fcd LB |
1457 | .callback = dmi_disable_acpi, |
1458 | .ident = "IBM Thinkpad", | |
1459 | .matches = { | |
1460 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1461 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1462 | }, | |
1463 | }, | |
aea00143 AP |
1464 | |
1465 | /* | |
1466 | * Boxes that need acpi=ht | |
1467 | */ | |
1468 | { | |
4be44fcd LB |
1469 | .callback = force_acpi_ht, |
1470 | .ident = "FSC Primergy T850", | |
1471 | .matches = { | |
1472 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1473 | DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"), | |
1474 | }, | |
1475 | }, | |
aea00143 | 1476 | { |
4be44fcd LB |
1477 | .callback = force_acpi_ht, |
1478 | .ident = "HP VISUALIZE NT Workstation", | |
1479 | .matches = { | |
1480 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
1481 | DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"), | |
1482 | }, | |
1483 | }, | |
aea00143 | 1484 | { |
4be44fcd LB |
1485 | .callback = force_acpi_ht, |
1486 | .ident = "Compaq Workstation W8000", | |
1487 | .matches = { | |
1488 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
1489 | DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"), | |
1490 | }, | |
1491 | }, | |
aea00143 | 1492 | { |
4be44fcd LB |
1493 | .callback = force_acpi_ht, |
1494 | .ident = "ASUS P4B266", | |
1495 | .matches = { | |
1496 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1497 | DMI_MATCH(DMI_BOARD_NAME, "P4B266"), | |
1498 | }, | |
1499 | }, | |
aea00143 | 1500 | { |
4be44fcd LB |
1501 | .callback = force_acpi_ht, |
1502 | .ident = "ASUS P2B-DS", | |
1503 | .matches = { | |
1504 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1505 | DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"), | |
1506 | }, | |
1507 | }, | |
aea00143 | 1508 | { |
4be44fcd LB |
1509 | .callback = force_acpi_ht, |
1510 | .ident = "ASUS CUR-DLS", | |
1511 | .matches = { | |
1512 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1513 | DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"), | |
1514 | }, | |
1515 | }, | |
aea00143 | 1516 | { |
4be44fcd LB |
1517 | .callback = force_acpi_ht, |
1518 | .ident = "ABIT i440BX-W83977", | |
1519 | .matches = { | |
1520 | DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"), | |
1521 | DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"), | |
1522 | }, | |
1523 | }, | |
aea00143 | 1524 | { |
4be44fcd LB |
1525 | .callback = force_acpi_ht, |
1526 | .ident = "IBM Bladecenter", | |
1527 | .matches = { | |
1528 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1529 | DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"), | |
1530 | }, | |
1531 | }, | |
aea00143 | 1532 | { |
4be44fcd LB |
1533 | .callback = force_acpi_ht, |
1534 | .ident = "IBM eServer xSeries 360", | |
1535 | .matches = { | |
1536 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1537 | DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"), | |
1538 | }, | |
1539 | }, | |
aea00143 | 1540 | { |
4be44fcd LB |
1541 | .callback = force_acpi_ht, |
1542 | .ident = "IBM eserver xSeries 330", | |
1543 | .matches = { | |
1544 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1545 | DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"), | |
1546 | }, | |
1547 | }, | |
aea00143 | 1548 | { |
4be44fcd LB |
1549 | .callback = force_acpi_ht, |
1550 | .ident = "IBM eserver xSeries 440", | |
1551 | .matches = { | |
1552 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1553 | DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"), | |
1554 | }, | |
1555 | }, | |
aea00143 | 1556 | |
aea00143 AP |
1557 | /* |
1558 | * Boxes that need ACPI PCI IRQ routing disabled | |
1559 | */ | |
1560 | { | |
4be44fcd LB |
1561 | .callback = disable_acpi_irq, |
1562 | .ident = "ASUS A7V", | |
1563 | .matches = { | |
1564 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1565 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1566 | /* newer BIOS, Revision 1011, does work */ | |
1567 | DMI_MATCH(DMI_BIOS_VERSION, | |
1568 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1569 | }, | |
1570 | }, | |
74586fca LB |
1571 | { |
1572 | /* | |
1573 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1574 | * for LPC bridge, which is needed for the PCI | |
1575 | * interrupt links to work. DSDT fix is in bug 5966. | |
1576 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1577 | */ | |
1578 | .callback = disable_acpi_irq, | |
1579 | .ident = "IBM Thinkpad 600 Series 2645", | |
1580 | .matches = { | |
1581 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1582 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1583 | }, | |
1584 | }, | |
1585 | { | |
1586 | .callback = disable_acpi_irq, | |
1587 | .ident = "IBM Thinkpad 600 Series 2646", | |
1588 | .matches = { | |
1589 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1590 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1591 | }, | |
1592 | }, | |
aea00143 AP |
1593 | /* |
1594 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1595 | */ | |
4be44fcd LB |
1596 | { /* _BBN 0 bug */ |
1597 | .callback = disable_acpi_pci, | |
1598 | .ident = "ASUS PR-DLS", | |
1599 | .matches = { | |
1600 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1601 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1602 | DMI_MATCH(DMI_BIOS_VERSION, | |
1603 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1604 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1605 | }, | |
1606 | }, | |
aea00143 | 1607 | { |
4be44fcd LB |
1608 | .callback = disable_acpi_pci, |
1609 | .ident = "Acer TravelMate 36x Laptop", | |
1610 | .matches = { | |
1611 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1612 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1613 | }, | |
1614 | }, | |
9340e1cc MG |
1615 | /* |
1616 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1617 | * which includes some code which overrides all temperature | |
1618 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1619 | * is enabled. This input is incorrectly designated the | |
1620 | * ISA IRQ 0 via an interrupt source override even though | |
1621 | * it is wired to the output of the master 8259A and INTIN0 | |
1622 | * is not connected at all. Abandon any attempts to route | |
1623 | * IRQ 0 through the I/O APIC therefore. | |
1624 | */ | |
1625 | { | |
1626 | .callback = dmi_disable_irq0_through_ioapic, | |
1627 | .ident = "HP NX6125 laptop", | |
1628 | .matches = { | |
1629 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1630 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1631 | }, | |
1632 | }, | |
1633 | { | |
1634 | .callback = dmi_disable_irq0_through_ioapic, | |
1635 | .ident = "HP NX6325 laptop", | |
1636 | .matches = { | |
1637 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1638 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1639 | }, | |
1640 | }, | |
e2079c43 RW |
1641 | /* |
1642 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1643 | * which includes some code which overrides all temperature | |
1644 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1645 | * is enabled. This input is incorrectly designated the | |
1646 | * ISA IRQ 0 via an interrupt source override even though | |
1647 | * it is wired to the output of the master 8259A and INTIN0 | |
1648 | * is not connected at all. Force ignoring BIOS IRQ0 pin2 | |
1649 | * override in that cases. | |
1650 | */ | |
1651 | { | |
1652 | .callback = dmi_ignore_irq0_timer_override, | |
1653 | .ident = "HP NX6125 laptop", | |
1654 | .matches = { | |
1655 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1656 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1657 | }, | |
1658 | }, | |
1659 | { | |
1660 | .callback = dmi_ignore_irq0_timer_override, | |
1661 | .ident = "HP NX6325 laptop", | |
1662 | .matches = { | |
1663 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1664 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1665 | }, | |
1666 | }, | |
4be44fcd | 1667 | {} |
aea00143 AP |
1668 | }; |
1669 | ||
1da177e4 LT |
1670 | /* |
1671 | * acpi_boot_table_init() and acpi_boot_init() | |
1672 | * called from setup_arch(), always. | |
1673 | * 1. checksums all tables | |
1674 | * 2. enumerates lapics | |
1675 | * 3. enumerates io-apics | |
1676 | * | |
1677 | * acpi_table_init() is separate to allow reading SRAT without | |
1678 | * other side effects. | |
1679 | * | |
1680 | * side effects of acpi_boot_init: | |
1681 | * acpi_lapic = 1 if LAPIC found | |
1682 | * acpi_ioapic = 1 if IOAPIC found | |
1683 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1684 | * if acpi_blacklisted() acpi_disabled = 1; | |
1685 | * acpi_irq_model=... | |
1686 | * ... | |
1687 | * | |
1688 | * return value: (currently ignored) | |
1689 | * 0: success | |
1690 | * !0: failure | |
1691 | */ | |
1692 | ||
4be44fcd | 1693 | int __init acpi_boot_table_init(void) |
1da177e4 LT |
1694 | { |
1695 | int error; | |
1696 | ||
aea00143 | 1697 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1698 | |
1da177e4 LT |
1699 | /* |
1700 | * If acpi_disabled, bail out | |
1701 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1702 | */ | |
1703 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1704 | return 1; |
1da177e4 | 1705 | |
5f3b1a8b | 1706 | /* |
1da177e4 LT |
1707 | * Initialize the ACPI boot-time table parser. |
1708 | */ | |
1709 | error = acpi_table_init(); | |
1710 | if (error) { | |
1711 | disable_acpi(); | |
1712 | return error; | |
1713 | } | |
1da177e4 | 1714 | |
5f3b1a8b | 1715 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1716 | |
1717 | /* | |
1718 | * blacklist may disable ACPI entirely | |
1719 | */ | |
1720 | error = acpi_blacklisted(); | |
1721 | if (error) { | |
1da177e4 LT |
1722 | if (acpi_force) { |
1723 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1724 | } else { | |
1725 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1726 | disable_acpi(); | |
1727 | return error; | |
1728 | } | |
1729 | } | |
cbf9bd60 YL |
1730 | |
1731 | return 0; | |
1732 | } | |
1733 | ||
1734 | int __init early_acpi_boot_init(void) | |
1735 | { | |
1736 | /* | |
1737 | * If acpi_disabled, bail out | |
1738 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1739 | */ | |
1740 | if (acpi_disabled && !acpi_ht) | |
1741 | return 1; | |
1742 | ||
1743 | /* | |
1744 | * Process the Multiple APIC Description Table (MADT), if present | |
1745 | */ | |
1746 | early_acpi_process_madt(); | |
1da177e4 LT |
1747 | |
1748 | return 0; | |
1749 | } | |
1750 | ||
1da177e4 LT |
1751 | int __init acpi_boot_init(void) |
1752 | { | |
1753 | /* | |
1754 | * If acpi_disabled, bail out | |
1755 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1756 | */ | |
1757 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1758 | return 1; |
1da177e4 | 1759 | |
5f3b1a8b | 1760 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1761 | |
1762 | /* | |
1763 | * set sci_int and PM timer address | |
1764 | */ | |
ceb6c468 | 1765 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1766 | |
1767 | /* | |
1768 | * Process the Multiple APIC Description Table (MADT), if present | |
1769 | */ | |
1770 | acpi_process_madt(); | |
1771 | ||
5f3b1a8b | 1772 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 LT |
1773 | |
1774 | return 0; | |
1775 | } | |
1a3f239d RR |
1776 | |
1777 | static int __init parse_acpi(char *arg) | |
1778 | { | |
1779 | if (!arg) | |
1780 | return -EINVAL; | |
1781 | ||
1782 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1783 | if (strcmp(arg, "off") == 0) { | |
1784 | disable_acpi(); | |
1785 | } | |
1786 | /* acpi=force to over-ride black-list */ | |
1787 | else if (strcmp(arg, "force") == 0) { | |
1788 | acpi_force = 1; | |
1789 | acpi_ht = 1; | |
1790 | acpi_disabled = 0; | |
1791 | } | |
1792 | /* acpi=strict disables out-of-spec workarounds */ | |
1793 | else if (strcmp(arg, "strict") == 0) { | |
1794 | acpi_strict = 1; | |
1795 | } | |
1796 | /* Limit ACPI just to boot-time to enable HT */ | |
1797 | else if (strcmp(arg, "ht") == 0) { | |
1798 | if (!acpi_force) | |
1799 | disable_acpi(); | |
1800 | acpi_ht = 1; | |
1801 | } | |
1802 | /* "acpi=noirq" disables ACPI interrupt routing */ | |
1803 | else if (strcmp(arg, "noirq") == 0) { | |
1804 | acpi_noirq_set(); | |
1805 | } else { | |
1806 | /* Core will printk when we return error. */ | |
1807 | return -EINVAL; | |
1808 | } | |
1809 | return 0; | |
1810 | } | |
1811 | early_param("acpi", parse_acpi); | |
1812 | ||
1813 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1814 | static int __init parse_pci(char *arg) | |
1815 | { | |
1816 | if (arg && strcmp(arg, "noacpi") == 0) | |
1817 | acpi_disable_pci(); | |
1818 | return 0; | |
1819 | } | |
1820 | early_param("pci", parse_pci); | |
1821 | ||
3c999f14 YL |
1822 | int __init acpi_mps_check(void) |
1823 | { | |
1824 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1825 | /* mptable code is not built-in*/ | |
1826 | if (acpi_disabled || acpi_noirq) { | |
1827 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1828 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1829 | "may have problem\n"); | |
1830 | return 1; | |
1831 | } | |
1832 | #endif | |
1833 | return 0; | |
1834 | } | |
1835 | ||
1a3f239d RR |
1836 | #ifdef CONFIG_X86_IO_APIC |
1837 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1838 | { | |
1839 | acpi_skip_timer_override = 1; | |
1840 | return 0; | |
1841 | } | |
1842 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1843 | |
1844 | static int __init parse_acpi_use_timer_override(char *arg) | |
1845 | { | |
1846 | acpi_use_timer_override = 1; | |
1847 | return 0; | |
1848 | } | |
1849 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1850 | #endif /* CONFIG_X86_IO_APIC */ |
1851 | ||
1852 | static int __init setup_acpi_sci(char *s) | |
1853 | { | |
1854 | if (!s) | |
1855 | return -EINVAL; | |
1856 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1857 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1858 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1859 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1860 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1861 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1862 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1863 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1864 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1865 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1866 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1867 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1868 | else |
1869 | return -EINVAL; | |
1870 | return 0; | |
1871 | } | |
1872 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1873 | |
1874 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1875 | { | |
1876 | unsigned int old, new, val; | |
1877 | do { | |
1878 | old = *lock; | |
1879 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1880 | val = cmpxchg(lock, old, new); | |
1881 | } while (unlikely (val != old)); | |
1882 | return (new < 3) ? -1 : 0; | |
1883 | } | |
1884 | ||
1885 | int __acpi_release_global_lock(unsigned int *lock) | |
1886 | { | |
1887 | unsigned int old, new, val; | |
1888 | do { | |
1889 | old = *lock; | |
1890 | new = old & ~0x3; | |
1891 | val = cmpxchg(lock, old, new); | |
1892 | } while (unlikely (val != old)); | |
1893 | return old & 0x1; | |
1894 | } |