Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
f0f4c343 | 34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/io_apic.h> | |
39 | #include <asm/apic.h> | |
183fe065 | 40 | #include <asm/genapic.h> |
1da177e4 | 41 | #include <asm/io.h> |
1da177e4 | 42 | #include <asm/mpspec.h> |
dfac2189 | 43 | #include <asm/smp.h> |
1da177e4 | 44 | |
f6bc4029 GOC |
45 | #ifdef CONFIG_X86_LOCAL_APIC |
46 | # include <mach_apic.h> | |
47 | #endif | |
48 | ||
e8924acb | 49 | static int __initdata acpi_force = 0; |
1a3f239d | 50 | |
df3bb57d AK |
51 | #ifdef CONFIG_ACPI |
52 | int acpi_disabled = 0; | |
53 | #else | |
54 | int acpi_disabled = 1; | |
55 | #endif | |
56 | EXPORT_SYMBOL(acpi_disabled); | |
57 | ||
1da177e4 LT |
58 | #ifdef CONFIG_X86_64 |
59 | ||
1da177e4 | 60 | #include <asm/proto.h> |
ae261868 | 61 | #include <asm/genapic.h> |
637029c6 | 62 | |
4be44fcd | 63 | #else /* X86 */ |
1da177e4 LT |
64 | |
65 | #ifdef CONFIG_X86_LOCAL_APIC | |
66 | #include <mach_apic.h> | |
67 | #include <mach_mpparse.h> | |
4be44fcd | 68 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 69 | |
4be44fcd | 70 | #endif /* X86 */ |
1da177e4 LT |
71 | |
72 | #define BAD_MADT_ENTRY(entry, end) ( \ | |
73 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | |
5f3b1a8b | 74 | ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) |
1da177e4 LT |
75 | |
76 | #define PREFIX "ACPI: " | |
77 | ||
90d53909 | 78 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
79 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
80 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
81 | int acpi_ht __initdata = 1; /* enable HT */ |
82 | ||
83 | int acpi_lapic; | |
84 | int acpi_ioapic; | |
85 | int acpi_strict; | |
1da177e4 | 86 | |
471694ea MR |
87 | static int disable_irq0_through_ioapic __initdata; |
88 | ||
5f3b1a8b | 89 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
90 | int acpi_sci_override_gsi __initdata; |
91 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 92 | int acpi_use_timer_override __initdata; |
1da177e4 LT |
93 | |
94 | #ifdef CONFIG_X86_LOCAL_APIC | |
95 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
96 | #endif | |
97 | ||
98 | #ifndef __HAVE_ARCH_CMPXCHG | |
99 | #warning ACPI uses CMPXCHG, i486 and later hardware | |
100 | #endif | |
101 | ||
1da177e4 LT |
102 | /* -------------------------------------------------------------------------- |
103 | Boot-time Configuration | |
104 | -------------------------------------------------------------------------- */ | |
105 | ||
106 | /* | |
107 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 108 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 109 | */ |
4be44fcd | 110 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 | 111 | |
1da177e4 LT |
112 | |
113 | /* | |
114 | * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, | |
115 | * to map the target physical address. The problem is that set_fixmap() | |
116 | * provides a single page, and it is possible that the page is not | |
117 | * sufficient. | |
118 | * By using this area, we can map up to MAX_IO_APICS pages temporarily, | |
119 | * i.e. until the next __va_range() call. | |
120 | * | |
121 | * Important Safety Note: The fixed I/O APIC page numbers are *subtracted* | |
122 | * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and | |
123 | * count idx down while incrementing the phys address. | |
124 | */ | |
2fdf0741 | 125 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 LT |
126 | { |
127 | unsigned long base, offset, mapped_size; | |
128 | int idx; | |
129 | ||
f34fa82b YL |
130 | if (!phys || !size) |
131 | return NULL; | |
132 | ||
133 | if (phys+size <= (max_pfn_mapped << PAGE_SHIFT)) | |
4be44fcd | 134 | return __va(phys); |
1da177e4 LT |
135 | |
136 | offset = phys & (PAGE_SIZE - 1); | |
137 | mapped_size = PAGE_SIZE - offset; | |
f34fa82b | 138 | clear_fixmap(FIX_ACPI_END); |
1da177e4 LT |
139 | set_fixmap(FIX_ACPI_END, phys); |
140 | base = fix_to_virt(FIX_ACPI_END); | |
141 | ||
142 | /* | |
143 | * Most cases can be covered by the below. | |
144 | */ | |
145 | idx = FIX_ACPI_END; | |
146 | while (mapped_size < size) { | |
147 | if (--idx < FIX_ACPI_BEGIN) | |
148 | return NULL; /* cannot handle this */ | |
149 | phys += PAGE_SIZE; | |
f34fa82b | 150 | clear_fixmap(idx); |
1da177e4 LT |
151 | set_fixmap(idx, phys); |
152 | mapped_size += PAGE_SIZE; | |
153 | } | |
154 | ||
4be44fcd | 155 | return ((unsigned char *)base + offset); |
1da177e4 | 156 | } |
1da177e4 LT |
157 | |
158 | #ifdef CONFIG_PCI_MMCONFIG | |
54549391 | 159 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
15a58ed1 | 160 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
54549391 GKH |
161 | int pci_mmcfg_config_num; |
162 | ||
ceb6c468 | 163 | int __init acpi_parse_mcfg(struct acpi_table_header *header) |
1da177e4 LT |
164 | { |
165 | struct acpi_table_mcfg *mcfg; | |
54549391 GKH |
166 | unsigned long i; |
167 | int config_size; | |
1da177e4 | 168 | |
ceb6c468 | 169 | if (!header) |
1da177e4 LT |
170 | return -EINVAL; |
171 | ||
ceb6c468 | 172 | mcfg = (struct acpi_table_mcfg *)header; |
1da177e4 | 173 | |
54549391 GKH |
174 | /* how many config structures do we have */ |
175 | pci_mmcfg_config_num = 0; | |
ceb6c468 | 176 | i = header->length - sizeof(struct acpi_table_mcfg); |
15a58ed1 | 177 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
54549391 | 178 | ++pci_mmcfg_config_num; |
15a58ed1 | 179 | i -= sizeof(struct acpi_mcfg_allocation); |
54549391 GKH |
180 | }; |
181 | if (pci_mmcfg_config_num == 0) { | |
182 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); | |
1da177e4 LT |
183 | return -ENODEV; |
184 | } | |
185 | ||
54549391 GKH |
186 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
187 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); | |
188 | if (!pci_mmcfg_config) { | |
189 | printk(KERN_WARNING PREFIX | |
190 | "No memory for MCFG config tables\n"); | |
191 | return -ENOMEM; | |
192 | } | |
193 | ||
ad363f80 | 194 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
54549391 | 195 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
15a58ed1 | 196 | if (pci_mmcfg_config[i].address > 0xFFFFFFFF) { |
54549391 GKH |
197 | printk(KERN_ERR PREFIX |
198 | "MMCONFIG not in low 4GB of memory\n"); | |
acc7c2e0 KR |
199 | kfree(pci_mmcfg_config); |
200 | pci_mmcfg_config_num = 0; | |
54549391 GKH |
201 | return -ENODEV; |
202 | } | |
203 | } | |
1da177e4 LT |
204 | |
205 | return 0; | |
206 | } | |
4be44fcd | 207 | #endif /* CONFIG_PCI_MMCONFIG */ |
1da177e4 LT |
208 | |
209 | #ifdef CONFIG_X86_LOCAL_APIC | |
15a58ed1 | 210 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 211 | { |
4be44fcd | 212 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 213 | |
15a58ed1 | 214 | if (!cpu_has_apic) |
1da177e4 LT |
215 | return -EINVAL; |
216 | ||
15a58ed1 | 217 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
218 | if (!madt) { |
219 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
220 | return -ENODEV; | |
221 | } | |
222 | ||
ad363f80 AS |
223 | if (madt->address) { |
224 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
225 | |
226 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 227 | madt->address); |
1da177e4 LT |
228 | } |
229 | ||
230 | acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); | |
4be44fcd | 231 | |
1da177e4 LT |
232 | return 0; |
233 | } | |
234 | ||
dfac2189 AS |
235 | static void __cpuinit acpi_register_lapic(int id, u8 enabled) |
236 | { | |
fb3bbd6a YL |
237 | unsigned int ver = 0; |
238 | ||
dfac2189 AS |
239 | if (!enabled) { |
240 | ++disabled_cpus; | |
241 | return; | |
242 | } | |
243 | ||
fb3bbd6a YL |
244 | #ifdef CONFIG_X86_32 |
245 | if (boot_cpu_physical_apicid != -1U) | |
246 | ver = apic_version[boot_cpu_physical_apicid]; | |
247 | #endif | |
248 | ||
249 | generic_processor_info(id, ver); | |
dfac2189 AS |
250 | } |
251 | ||
1da177e4 | 252 | static int __init |
5f3b1a8b | 253 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 254 | { |
5f3b1a8b | 255 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 256 | |
5f3b1a8b | 257 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
258 | |
259 | if (BAD_MADT_ENTRY(processor, end)) | |
260 | return -EINVAL; | |
261 | ||
262 | acpi_table_print_madt_entry(header); | |
263 | ||
7f66ae48 AR |
264 | /* |
265 | * We need to register disabled CPU as well to permit | |
266 | * counting disabled CPUs. This allows us to size | |
267 | * cpus_possible_map more accurately, to permit | |
268 | * to not preallocating memory for all NR_CPUS | |
269 | * when we use CPU hotplug. | |
270 | */ | |
dfac2189 AS |
271 | acpi_register_lapic(processor->id, /* APIC ID */ |
272 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
273 | |
274 | return 0; | |
275 | } | |
276 | ||
ac049c1d JS |
277 | static int __init |
278 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
279 | { | |
280 | struct acpi_madt_local_sapic *processor = NULL; | |
281 | ||
282 | processor = (struct acpi_madt_local_sapic *)header; | |
283 | ||
284 | if (BAD_MADT_ENTRY(processor, end)) | |
285 | return -EINVAL; | |
286 | ||
287 | acpi_table_print_madt_entry(header); | |
288 | ||
dfac2189 AS |
289 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
290 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
291 | |
292 | return 0; | |
293 | } | |
294 | ||
1da177e4 | 295 | static int __init |
5f3b1a8b | 296 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 297 | const unsigned long end) |
1da177e4 | 298 | { |
5f3b1a8b | 299 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 300 | |
5f3b1a8b | 301 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
302 | |
303 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
304 | return -EINVAL; | |
305 | ||
306 | acpi_lapic_addr = lapic_addr_ovr->address; | |
307 | ||
308 | return 0; | |
309 | } | |
310 | ||
311 | static int __init | |
5f3b1a8b | 312 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 313 | { |
5f3b1a8b | 314 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 315 | |
5f3b1a8b | 316 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
317 | |
318 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
319 | return -EINVAL; | |
320 | ||
321 | acpi_table_print_madt_entry(header); | |
322 | ||
323 | if (lapic_nmi->lint != 1) | |
324 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
4be44fcd | 329 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 330 | |
8466361a | 331 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
332 | |
333 | static int __init | |
5f3b1a8b | 334 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 335 | { |
5f3b1a8b | 336 | struct acpi_madt_io_apic *ioapic = NULL; |
1da177e4 | 337 | |
5f3b1a8b | 338 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
339 | |
340 | if (BAD_MADT_ENTRY(ioapic, end)) | |
341 | return -EINVAL; | |
4be44fcd | 342 | |
1da177e4 LT |
343 | acpi_table_print_madt_entry(header); |
344 | ||
4be44fcd LB |
345 | mp_register_ioapic(ioapic->id, |
346 | ioapic->address, ioapic->global_irq_base); | |
347 | ||
1da177e4 LT |
348 | return 0; |
349 | } | |
350 | ||
351 | /* | |
352 | * Parse Interrupt Source Override for the ACPI SCI | |
353 | */ | |
e82c354b | 354 | static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
1da177e4 LT |
355 | { |
356 | if (trigger == 0) /* compatible SCI trigger is level */ | |
357 | trigger = 3; | |
358 | ||
359 | if (polarity == 0) /* compatible SCI polarity is low */ | |
360 | polarity = 3; | |
361 | ||
362 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
363 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
364 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 365 | |
5f3b1a8b AS |
366 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
367 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 LT |
368 | |
369 | /* | |
4be44fcd | 370 | * mp_config_acpi_legacy_irqs() already setup IRQs < 16 |
1da177e4 LT |
371 | * If GSI is < 16, this will update its flags, |
372 | * else it will create a new mp_irqs[] entry. | |
373 | */ | |
7bdd21ce | 374 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
1da177e4 LT |
375 | |
376 | /* | |
377 | * stash over-ride to indicate we've been here | |
cee324b1 | 378 | * and for later update of acpi_gbl_FADT |
1da177e4 | 379 | */ |
7bdd21ce | 380 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
381 | return; |
382 | } | |
383 | ||
384 | static int __init | |
5f3b1a8b | 385 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 386 | const unsigned long end) |
1da177e4 | 387 | { |
5f3b1a8b | 388 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 389 | |
5f3b1a8b | 390 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
391 | |
392 | if (BAD_MADT_ENTRY(intsrc, end)) | |
393 | return -EINVAL; | |
394 | ||
395 | acpi_table_print_madt_entry(header); | |
396 | ||
5f3b1a8b | 397 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
7bdd21ce | 398 | acpi_sci_ioapic_setup(intsrc->global_irq, |
5f3b1a8b AS |
399 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
400 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); | |
1da177e4 LT |
401 | return 0; |
402 | } | |
403 | ||
404 | if (acpi_skip_timer_override && | |
5f3b1a8b | 405 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
4be44fcd LB |
406 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
407 | return 0; | |
1da177e4 LT |
408 | } |
409 | ||
5f3b1a8b AS |
410 | mp_override_legacy_irq(intsrc->source_irq, |
411 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
412 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
413 | intsrc->global_irq); | |
1da177e4 LT |
414 | |
415 | return 0; | |
416 | } | |
417 | ||
1da177e4 | 418 | static int __init |
5f3b1a8b | 419 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 420 | { |
5f3b1a8b | 421 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 422 | |
5f3b1a8b | 423 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
424 | |
425 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
426 | return -EINVAL; | |
427 | ||
428 | acpi_table_print_madt_entry(header); | |
429 | ||
430 | /* TBD: Support nimsrc entries? */ | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
4be44fcd | 435 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 436 | |
1da177e4 LT |
437 | /* |
438 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 439 | * |
1da177e4 LT |
440 | * use ELCR to set PIC-mode trigger type for SCI |
441 | * | |
442 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
443 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
444 | * | |
445 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
446 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
447 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
448 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
449 | */ |
450 | ||
4be44fcd | 451 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
452 | { |
453 | unsigned int mask = 1 << irq; | |
454 | unsigned int old, new; | |
455 | ||
456 | /* Real old ELCR mask */ | |
457 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
458 | ||
459 | /* | |
27b46d76 | 460 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
461 | * since we will set it correctly as we enable the PCI irq |
462 | * routing. | |
463 | */ | |
464 | new = acpi_noirq ? old : 0; | |
465 | ||
466 | /* | |
467 | * Update SCI information in the ELCR, it isn't in the PCI | |
468 | * routing tables.. | |
469 | */ | |
470 | switch (trigger) { | |
4be44fcd | 471 | case 1: /* Edge - clear */ |
1da177e4 LT |
472 | new &= ~mask; |
473 | break; | |
4be44fcd | 474 | case 3: /* Level - set */ |
1da177e4 LT |
475 | new |= mask; |
476 | break; | |
477 | } | |
478 | ||
479 | if (old == new) | |
480 | return; | |
481 | ||
482 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
483 | outb(new, 0x4d0); | |
484 | outb(new >> 8, 0x4d1); | |
485 | } | |
486 | ||
1da177e4 LT |
487 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) |
488 | { | |
f023d764 | 489 | *irq = gsi; |
1da177e4 LT |
490 | return 0; |
491 | } | |
492 | ||
1f3a6a15 KK |
493 | /* |
494 | * success: return IRQ number (>=0) | |
495 | * failure: return < 0 | |
496 | */ | |
cb654695 | 497 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) |
1da177e4 LT |
498 | { |
499 | unsigned int irq; | |
500 | unsigned int plat_gsi = gsi; | |
501 | ||
502 | #ifdef CONFIG_PCI | |
503 | /* | |
504 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
505 | */ | |
506 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | |
cb654695 | 507 | if (triggering == ACPI_LEVEL_SENSITIVE) |
4be44fcd | 508 | eisa_set_level_irq(gsi); |
1da177e4 LT |
509 | } |
510 | #endif | |
511 | ||
512 | #ifdef CONFIG_X86_IO_APIC | |
513 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | |
cb654695 | 514 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); |
1da177e4 LT |
515 | } |
516 | #endif | |
517 | acpi_gsi_to_irq(plat_gsi, &irq); | |
518 | return irq; | |
519 | } | |
4be44fcd | 520 | |
1da177e4 LT |
521 | /* |
522 | * ACPI based hotplug support for CPU | |
523 | */ | |
524 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
009cbadb SR |
525 | |
526 | static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
1da177e4 | 527 | { |
73fea175 AR |
528 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
529 | union acpi_object *obj; | |
5f3b1a8b | 530 | struct acpi_madt_local_apic *lapic; |
73fea175 AR |
531 | cpumask_t tmp_map, new_map; |
532 | u8 physid; | |
533 | int cpu; | |
534 | ||
535 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) | |
536 | return -EINVAL; | |
537 | ||
538 | if (!buffer.length || !buffer.pointer) | |
539 | return -EINVAL; | |
540 | ||
541 | obj = buffer.pointer; | |
542 | if (obj->type != ACPI_TYPE_BUFFER || | |
543 | obj->buffer.length < sizeof(*lapic)) { | |
544 | kfree(buffer.pointer); | |
545 | return -EINVAL; | |
546 | } | |
547 | ||
5f3b1a8b | 548 | lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer; |
73fea175 | 549 | |
5f3b1a8b AS |
550 | if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC || |
551 | !(lapic->lapic_flags & ACPI_MADT_ENABLED)) { | |
73fea175 AR |
552 | kfree(buffer.pointer); |
553 | return -EINVAL; | |
554 | } | |
555 | ||
556 | physid = lapic->id; | |
557 | ||
558 | kfree(buffer.pointer); | |
559 | buffer.length = ACPI_ALLOCATE_BUFFER; | |
560 | buffer.pointer = NULL; | |
561 | ||
562 | tmp_map = cpu_present_map; | |
dfac2189 | 563 | acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED); |
73fea175 AR |
564 | |
565 | /* | |
566 | * If mp_register_lapic successfully generates a new logical cpu | |
567 | * number, then the following will get us exactly what was mapped | |
568 | */ | |
569 | cpus_andnot(new_map, cpu_present_map, tmp_map); | |
570 | if (cpus_empty(new_map)) { | |
571 | printk ("Unable to map lapic to logical cpu number\n"); | |
572 | return -EINVAL; | |
573 | } | |
574 | ||
575 | cpu = first_cpu(new_map); | |
576 | ||
577 | *pcpu = cpu; | |
578 | return 0; | |
1da177e4 | 579 | } |
1da177e4 | 580 | |
009cbadb SR |
581 | /* wrapper to silence section mismatch warning */ |
582 | int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
583 | { | |
584 | return _acpi_map_lsapic(handle, pcpu); | |
585 | } | |
4be44fcd | 586 | EXPORT_SYMBOL(acpi_map_lsapic); |
1da177e4 | 587 | |
4be44fcd | 588 | int acpi_unmap_lsapic(int cpu) |
1da177e4 | 589 | { |
71fff5e6 | 590 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
73fea175 AR |
591 | cpu_clear(cpu, cpu_present_map); |
592 | num_processors--; | |
593 | ||
594 | return (0); | |
1da177e4 | 595 | } |
4be44fcd | 596 | |
1da177e4 | 597 | EXPORT_SYMBOL(acpi_unmap_lsapic); |
4be44fcd | 598 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 599 | |
4be44fcd | 600 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a KK |
601 | { |
602 | /* TBD */ | |
603 | return -EINVAL; | |
604 | } | |
4be44fcd | 605 | |
b1bb248a KK |
606 | EXPORT_SYMBOL(acpi_register_ioapic); |
607 | ||
4be44fcd | 608 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a KK |
609 | { |
610 | /* TBD */ | |
611 | return -EINVAL; | |
612 | } | |
4be44fcd | 613 | |
b1bb248a KK |
614 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
615 | ||
5f3b1a8b | 616 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 617 | { |
5f3b1a8b | 618 | struct acpi_table_boot *sb; |
1da177e4 | 619 | |
5f3b1a8b | 620 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
621 | if (!sb) { |
622 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
623 | return -ENODEV; | |
624 | } | |
625 | ||
5f3b1a8b | 626 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
627 | |
628 | return 0; | |
629 | } | |
630 | ||
1da177e4 | 631 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 632 | #include <asm/hpet.h> |
1da177e4 | 633 | |
a1dfd851 AD |
634 | static struct __initdata resource *hpet_res; |
635 | ||
5f3b1a8b | 636 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
637 | { |
638 | struct acpi_table_hpet *hpet_tbl; | |
639 | ||
5f3b1a8b | 640 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
641 | if (!hpet_tbl) { |
642 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
643 | return -ENODEV; | |
644 | } | |
645 | ||
ad363f80 | 646 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
647 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
648 | "memory.\n"); | |
649 | return -1; | |
650 | } | |
f0f4c343 | 651 | |
2d0c87c3 | 652 | hpet_address = hpet_tbl->address.address; |
f4df73c2 TG |
653 | |
654 | /* | |
655 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
656 | * want to allocate a resource there. | |
657 | */ | |
658 | if (!hpet_address) { | |
659 | printk(KERN_WARNING PREFIX | |
660 | "HPET id: %#x base: %#lx is invalid\n", | |
661 | hpet_tbl->id, hpet_address); | |
662 | return 0; | |
663 | } | |
664 | #ifdef CONFIG_X86_64 | |
665 | /* | |
666 | * Some even more broken BIOSes advertise HPET at | |
667 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
668 | * some noise: | |
669 | */ | |
670 | if (hpet_address == 0xfed0000000000000UL) { | |
671 | if (!hpet_force_user) { | |
672 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
673 | "base: 0xfed0000000000000 is bogus\n " | |
674 | "try hpet=force on the kernel command line to " | |
675 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
676 | hpet_address = 0; | |
677 | return 0; | |
678 | } | |
679 | printk(KERN_WARNING PREFIX | |
680 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
681 | "to 0xfed00000.\n", hpet_tbl->id); | |
682 | hpet_address >>= 32; | |
683 | } | |
684 | #endif | |
4be44fcd | 685 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 686 | hpet_tbl->id, hpet_address); |
1da177e4 | 687 | |
a1dfd851 AD |
688 | /* |
689 | * Allocate and initialize the HPET firmware resource for adding into | |
690 | * the resource tree during the lateinit timeframe. | |
691 | */ | |
692 | #define HPET_RESOURCE_NAME_SIZE 9 | |
693 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
694 | ||
a1dfd851 AD |
695 | hpet_res->name = (void *)&hpet_res[1]; |
696 | hpet_res->flags = IORESOURCE_MEM; | |
697 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
698 | hpet_tbl->sequence); | |
699 | ||
700 | hpet_res->start = hpet_address; | |
701 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
702 | ||
1da177e4 LT |
703 | return 0; |
704 | } | |
a1dfd851 AD |
705 | |
706 | /* | |
707 | * hpet_insert_resource inserts the HPET resources used into the resource | |
708 | * tree. | |
709 | */ | |
710 | static __init int hpet_insert_resource(void) | |
711 | { | |
712 | if (!hpet_res) | |
713 | return 1; | |
714 | ||
715 | return insert_resource(&iomem_resource, hpet_res); | |
716 | } | |
717 | ||
718 | late_initcall(hpet_insert_resource); | |
719 | ||
1da177e4 LT |
720 | #else |
721 | #define acpi_parse_hpet NULL | |
722 | #endif | |
723 | ||
5f3b1a8b | 724 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 725 | { |
90660ec3 | 726 | |
1da177e4 LT |
727 | #ifdef CONFIG_X86_PM_TIMER |
728 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 729 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 730 | /* FADT rev. 2 */ |
5f3b1a8b | 731 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 732 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
733 | return 0; |
734 | ||
5f3b1a8b | 735 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
736 | /* |
737 | * "X" fields are optional extensions to the original V1.0 | |
738 | * fields, so we must selectively expand V1.0 fields if the | |
739 | * corresponding X field is zero. | |
740 | */ | |
741 | if (!pmtmr_ioport) | |
5f3b1a8b | 742 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
743 | } else { |
744 | /* FADT rev. 1 */ | |
5f3b1a8b | 745 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
746 | } |
747 | if (pmtmr_ioport) | |
4be44fcd LB |
748 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
749 | pmtmr_ioport); | |
1da177e4 LT |
750 | #endif |
751 | return 0; | |
752 | } | |
753 | ||
1da177e4 LT |
754 | #ifdef CONFIG_X86_LOCAL_APIC |
755 | /* | |
756 | * Parse LAPIC entries in MADT | |
757 | * returns 0 on success, < 0 on error | |
758 | */ | |
31d2092e AS |
759 | |
760 | static void __init acpi_register_lapic_address(unsigned long address) | |
761 | { | |
762 | mp_lapic_addr = address; | |
763 | ||
764 | set_fixmap_nocache(FIX_APIC_BASE, address); | |
fb3bbd6a | 765 | if (boot_cpu_physical_apicid == -1U) { |
31d2092e | 766 | boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); |
fb3bbd6a YL |
767 | #ifdef CONFIG_X86_32 |
768 | apic_version[boot_cpu_physical_apicid] = | |
769 | GET_APIC_VERSION(apic_read(APIC_LVR)); | |
770 | #endif | |
771 | } | |
31d2092e AS |
772 | } |
773 | ||
cbf9bd60 YL |
774 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
775 | { | |
776 | int count; | |
777 | ||
778 | if (!cpu_has_apic) | |
779 | return -ENODEV; | |
780 | ||
781 | /* | |
782 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
783 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
784 | */ | |
785 | ||
786 | count = | |
787 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, | |
788 | acpi_parse_lapic_addr_ovr, 0); | |
789 | if (count < 0) { | |
790 | printk(KERN_ERR PREFIX | |
791 | "Error parsing LAPIC address override entry\n"); | |
792 | return count; | |
793 | } | |
794 | ||
795 | acpi_register_lapic_address(acpi_lapic_addr); | |
796 | ||
797 | return count; | |
798 | } | |
799 | ||
4be44fcd | 800 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
801 | { |
802 | int count; | |
803 | ||
0fcd2709 AK |
804 | if (!cpu_has_apic) |
805 | return -ENODEV; | |
806 | ||
5f3b1a8b | 807 | /* |
1da177e4 LT |
808 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
809 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
810 | */ | |
811 | ||
4be44fcd | 812 | count = |
5f3b1a8b | 813 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
4be44fcd | 814 | acpi_parse_lapic_addr_ovr, 0); |
1da177e4 | 815 | if (count < 0) { |
4be44fcd LB |
816 | printk(KERN_ERR PREFIX |
817 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
818 | return count; |
819 | } | |
820 | ||
31d2092e | 821 | acpi_register_lapic_address(acpi_lapic_addr); |
1da177e4 | 822 | |
ac049c1d JS |
823 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
824 | acpi_parse_sapic, MAX_APICS); | |
825 | ||
826 | if (!count) | |
827 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, | |
828 | acpi_parse_lapic, MAX_APICS); | |
4be44fcd | 829 | if (!count) { |
1da177e4 LT |
830 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
831 | /* TBD: Cleanup to allow fallback to MPS */ | |
832 | return -ENODEV; | |
4be44fcd | 833 | } else if (count < 0) { |
1da177e4 LT |
834 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
835 | /* TBD: Cleanup to allow fallback to MPS */ | |
836 | return count; | |
837 | } | |
838 | ||
4be44fcd | 839 | count = |
5f3b1a8b | 840 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0); |
1da177e4 LT |
841 | if (count < 0) { |
842 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); | |
843 | /* TBD: Cleanup to allow fallback to MPS */ | |
844 | return count; | |
845 | } | |
846 | return 0; | |
847 | } | |
4be44fcd | 848 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 849 | |
8466361a | 850 | #ifdef CONFIG_X86_IO_APIC |
11113f84 AS |
851 | #define MP_ISA_BUS 0 |
852 | ||
d49c4288 | 853 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
854 | extern int es7000_plat; |
855 | #endif | |
856 | ||
5f895148 AS |
857 | static struct { |
858 | int apic_id; | |
859 | int gsi_base; | |
860 | int gsi_end; | |
861 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | |
862 | } mp_ioapic_routing[MAX_IO_APICS]; | |
11113f84 AS |
863 | |
864 | static int mp_find_ioapic(int gsi) | |
865 | { | |
866 | int i = 0; | |
867 | ||
868 | /* Find the IOAPIC that manages this GSI. */ | |
869 | for (i = 0; i < nr_ioapics; i++) { | |
870 | if ((gsi >= mp_ioapic_routing[i].gsi_base) | |
871 | && (gsi <= mp_ioapic_routing[i].gsi_end)) | |
872 | return i; | |
873 | } | |
874 | ||
875 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); | |
876 | return -1; | |
877 | } | |
878 | ||
879 | static u8 __init uniq_ioapic_id(u8 id) | |
880 | { | |
881 | #ifdef CONFIG_X86_32 | |
882 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && | |
883 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) | |
884 | return io_apic_get_unique_id(nr_ioapics, id); | |
885 | else | |
886 | return id; | |
887 | #else | |
888 | int i; | |
889 | DECLARE_BITMAP(used, 256); | |
890 | bitmap_zero(used, 256); | |
891 | for (i = 0; i < nr_ioapics; i++) { | |
ec2cd0a2 AS |
892 | struct mp_config_ioapic *ia = &mp_ioapics[i]; |
893 | __set_bit(ia->mp_apicid, used); | |
11113f84 AS |
894 | } |
895 | if (!test_bit(id, used)) | |
896 | return id; | |
897 | return find_first_zero_bit(used, 256); | |
898 | #endif | |
899 | } | |
900 | ||
901 | static int bad_ioapic(unsigned long address) | |
902 | { | |
903 | if (nr_ioapics >= MAX_IO_APICS) { | |
904 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
905 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
906 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
907 | } | |
908 | if (!address) { | |
909 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
910 | " found in table, skipping!\n"); | |
911 | return 1; | |
912 | } | |
913 | return 0; | |
914 | } | |
915 | ||
916 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |
917 | { | |
918 | int idx = 0; | |
919 | ||
920 | if (bad_ioapic(address)) | |
921 | return; | |
922 | ||
923 | idx = nr_ioapics; | |
924 | ||
ec2cd0a2 AS |
925 | mp_ioapics[idx].mp_type = MP_IOAPIC; |
926 | mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; | |
927 | mp_ioapics[idx].mp_apicaddr = address; | |
11113f84 AS |
928 | |
929 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | |
ec2cd0a2 | 930 | mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); |
11113f84 | 931 | #ifdef CONFIG_X86_32 |
ec2cd0a2 | 932 | mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); |
11113f84 | 933 | #else |
ec2cd0a2 | 934 | mp_ioapics[idx].mp_apicver = 0; |
11113f84 AS |
935 | #endif |
936 | /* | |
937 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | |
938 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | |
939 | */ | |
ec2cd0a2 | 940 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; |
11113f84 AS |
941 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
942 | mp_ioapic_routing[idx].gsi_end = gsi_base + | |
943 | io_apic_get_redir_entries(idx); | |
944 | ||
ec2cd0a2 AS |
945 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " |
946 | "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, | |
947 | mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, | |
11113f84 AS |
948 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
949 | ||
950 | nr_ioapics++; | |
951 | } | |
952 | ||
fcfa146e YL |
953 | static void assign_to_mp_irq(struct mp_config_intsrc *m, |
954 | struct mp_config_intsrc *mp_irq) | |
955 | { | |
956 | memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
957 | } | |
958 | ||
959 | static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, | |
960 | struct mp_config_intsrc *m) | |
961 | { | |
962 | return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
963 | } | |
964 | ||
965 | static void save_mp_irq(struct mp_config_intsrc *m) | |
966 | { | |
967 | int i; | |
968 | ||
969 | for (i = 0; i < mp_irq_entries; i++) { | |
970 | if (!mp_irq_cmp(&mp_irqs[i], m)) | |
971 | return; | |
972 | } | |
973 | ||
974 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
975 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | |
976 | panic("Max # of irq sources exceeded!!\n"); | |
977 | } | |
978 | ||
11113f84 AS |
979 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
980 | { | |
6df8809b YL |
981 | int ioapic; |
982 | int pin; | |
fcfa146e | 983 | struct mp_config_intsrc mp_irq; |
11113f84 | 984 | |
471694ea MR |
985 | /* Skip the 8254 timer interrupt (IRQ 0) if requested. */ |
986 | if (bus_irq == 0 && disable_irq0_through_ioapic) | |
987 | return; | |
988 | ||
11113f84 AS |
989 | /* |
990 | * Convert 'gsi' to 'ioapic.pin'. | |
991 | */ | |
992 | ioapic = mp_find_ioapic(gsi); | |
993 | if (ioapic < 0) | |
994 | return; | |
995 | pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
996 | ||
997 | /* | |
998 | * TBD: This check is for faulty timer entries, where the override | |
999 | * erroneously sets the trigger to level, resulting in a HUGE | |
1000 | * increase of timer interrupts! | |
1001 | */ | |
1002 | if ((bus_irq == 0) && (trigger == 3)) | |
1003 | trigger = 1; | |
1004 | ||
fcfa146e YL |
1005 | mp_irq.mp_type = MP_INTSRC; |
1006 | mp_irq.mp_irqtype = mp_INT; | |
1007 | mp_irq.mp_irqflag = (trigger << 2) | polarity; | |
1008 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1009 | mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ | |
1010 | mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ | |
1011 | mp_irq.mp_dstirq = pin; /* INTIN# */ | |
11113f84 | 1012 | |
fcfa146e | 1013 | save_mp_irq(&mp_irq); |
11113f84 AS |
1014 | } |
1015 | ||
1016 | void __init mp_config_acpi_legacy_irqs(void) | |
1017 | { | |
6df8809b YL |
1018 | int i; |
1019 | int ioapic; | |
1020 | unsigned int dstapic; | |
fcfa146e | 1021 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
1022 | |
1023 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | |
1024 | /* | |
1025 | * Fabricate the legacy ISA bus (bus #31). | |
1026 | */ | |
1027 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1028 | #endif | |
1029 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
1030 | Dprintk("Bus #%d is ISA\n", MP_ISA_BUS); | |
1031 | ||
d49c4288 | 1032 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
1033 | /* |
1034 | * Older generations of ES7000 have no legacy identity mappings | |
1035 | */ | |
1036 | if (es7000_plat == 1) | |
1037 | return; | |
1038 | #endif | |
1039 | ||
1040 | /* | |
1041 | * Locate the IOAPIC that manages the ISA IRQs (0-15). | |
1042 | */ | |
1043 | ioapic = mp_find_ioapic(0); | |
1044 | if (ioapic < 0) | |
1045 | return; | |
6df8809b | 1046 | dstapic = mp_ioapics[ioapic].mp_apicid; |
11113f84 | 1047 | |
11113f84 AS |
1048 | /* |
1049 | * Use the default configuration for the IRQs 0-15. Unless | |
1050 | * overridden by (MADT) interrupt source override entries. | |
1051 | */ | |
1052 | for (i = 0; i < 16; i++) { | |
1053 | int idx; | |
1054 | ||
471694ea MR |
1055 | /* Skip the 8254 timer interrupt (IRQ 0) if requested. */ |
1056 | if (i == 0 && disable_irq0_through_ioapic) | |
1057 | continue; | |
1058 | ||
11113f84 | 1059 | for (idx = 0; idx < mp_irq_entries; idx++) { |
2fddb6e2 | 1060 | struct mp_config_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1061 | |
1062 | /* Do we already have a mapping for this ISA IRQ? */ | |
2fddb6e2 AS |
1063 | if (irq->mp_srcbus == MP_ISA_BUS |
1064 | && irq->mp_srcbusirq == i) | |
11113f84 AS |
1065 | break; |
1066 | ||
1067 | /* Do we already have a mapping for this IOAPIC pin */ | |
6df8809b YL |
1068 | if (irq->mp_dstapic == dstapic && |
1069 | irq->mp_dstirq == i) | |
11113f84 AS |
1070 | break; |
1071 | } | |
1072 | ||
1073 | if (idx != mp_irq_entries) { | |
1074 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1075 | continue; /* IRQ already used */ | |
1076 | } | |
1077 | ||
fcfa146e YL |
1078 | mp_irq.mp_type = MP_INTSRC; |
1079 | mp_irq.mp_irqflag = 0; /* Conforming */ | |
1080 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1081 | mp_irq.mp_dstapic = dstapic; | |
1082 | mp_irq.mp_irqtype = mp_INT; | |
1083 | mp_irq.mp_srcbusirq = i; /* Identity mapped */ | |
1084 | mp_irq.mp_dstirq = i; | |
11113f84 | 1085 | |
fcfa146e | 1086 | save_mp_irq(&mp_irq); |
11113f84 AS |
1087 | } |
1088 | } | |
1089 | ||
1090 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | |
1091 | { | |
1092 | int ioapic; | |
1093 | int ioapic_pin; | |
1094 | #ifdef CONFIG_X86_32 | |
1095 | #define MAX_GSI_NUM 4096 | |
1096 | #define IRQ_COMPRESSION_START 64 | |
1097 | ||
1098 | static int pci_irq = IRQ_COMPRESSION_START; | |
1099 | /* | |
1100 | * Mapping between Global System Interrupts, which | |
1101 | * represent all possible interrupts, and IRQs | |
1102 | * assigned to actual devices. | |
1103 | */ | |
1104 | static int gsi_to_irq[MAX_GSI_NUM]; | |
1105 | #else | |
1106 | ||
1107 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
1108 | return gsi; | |
1109 | #endif | |
1110 | ||
1111 | /* Don't set up the ACPI SCI because it's already set up */ | |
1112 | if (acpi_gbl_FADT.sci_interrupt == gsi) | |
1113 | return gsi; | |
1114 | ||
1115 | ioapic = mp_find_ioapic(gsi); | |
1116 | if (ioapic < 0) { | |
1117 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | |
1118 | return gsi; | |
1119 | } | |
1120 | ||
1121 | ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1122 | ||
1123 | #ifdef CONFIG_X86_32 | |
1124 | if (ioapic_renumber_irq) | |
1125 | gsi = ioapic_renumber_irq(ioapic, gsi); | |
1126 | #endif | |
1127 | ||
1128 | /* | |
1129 | * Avoid pin reprogramming. PRTs typically include entries | |
1130 | * with redundant pin->gsi mappings (but unique PCI devices); | |
1131 | * we only program the IOAPIC on the first. | |
1132 | */ | |
1133 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | |
1134 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | |
1135 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | |
1136 | ioapic_pin); | |
1137 | return gsi; | |
1138 | } | |
1139 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | |
1140 | Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", | |
1141 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); | |
1142 | #ifdef CONFIG_X86_32 | |
1143 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | |
1144 | #else | |
1145 | return gsi; | |
1146 | #endif | |
1147 | } | |
1148 | ||
1149 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | |
1150 | #ifdef CONFIG_X86_32 | |
1151 | /* | |
1152 | * For GSI >= 64, use IRQ compression | |
1153 | */ | |
1154 | if ((gsi >= IRQ_COMPRESSION_START) | |
1155 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | |
1156 | /* | |
1157 | * For PCI devices assign IRQs in order, avoiding gaps | |
1158 | * due to unused I/O APIC pins. | |
1159 | */ | |
1160 | int irq = gsi; | |
1161 | if (gsi < MAX_GSI_NUM) { | |
1162 | /* | |
1163 | * Retain the VIA chipset work-around (gsi > 15), but | |
1164 | * avoid a problem where the 8254 timer (IRQ0) is setup | |
1165 | * via an override (so it's not on pin 0 of the ioapic), | |
1166 | * and at the same time, the pin 0 interrupt is a PCI | |
1167 | * type. The gsi > 15 test could cause these two pins | |
1168 | * to be shared as IRQ0, and they are not shareable. | |
1169 | * So test for this condition, and if necessary, avoid | |
1170 | * the pin collision. | |
1171 | */ | |
1172 | gsi = pci_irq++; | |
1173 | /* | |
1174 | * Don't assign IRQ used by ACPI SCI | |
1175 | */ | |
1176 | if (gsi == acpi_gbl_FADT.sci_interrupt) | |
1177 | gsi = pci_irq++; | |
1178 | gsi_to_irq[irq] = gsi; | |
1179 | } else { | |
1180 | printk(KERN_ERR "GSI %u is too high\n", gsi); | |
1181 | return gsi; | |
1182 | } | |
1183 | } | |
1184 | #endif | |
1185 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | |
1186 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | |
1187 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
1188 | return gsi; | |
1189 | } | |
1190 | ||
2944e16b YL |
1191 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
1192 | u32 gsi, int triggering, int polarity) | |
1193 | { | |
fcfa146e YL |
1194 | #ifdef CONFIG_X86_MPPARSE |
1195 | struct mp_config_intsrc mp_irq; | |
2944e16b YL |
1196 | int ioapic; |
1197 | ||
fcfa146e | 1198 | if (!acpi_ioapic) |
d867e531 YL |
1199 | return 0; |
1200 | ||
2944e16b | 1201 | /* print the entry should happen on mptable identically */ |
fcfa146e YL |
1202 | mp_irq.mp_type = MP_INTSRC; |
1203 | mp_irq.mp_irqtype = mp_INT; | |
1204 | mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
2944e16b | 1205 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
fcfa146e YL |
1206 | mp_irq.mp_srcbus = number; |
1207 | mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
2944e16b | 1208 | ioapic = mp_find_ioapic(gsi); |
fcfa146e YL |
1209 | mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; |
1210 | mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
2944e16b | 1211 | |
fcfa146e YL |
1212 | save_mp_irq(&mp_irq); |
1213 | #endif | |
2944e16b YL |
1214 | return 0; |
1215 | } | |
1216 | ||
1da177e4 LT |
1217 | /* |
1218 | * Parse IOAPIC related entries in MADT | |
1219 | * returns 0 on success, < 0 on error | |
1220 | */ | |
4be44fcd | 1221 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1222 | { |
1223 | int count; | |
1224 | ||
1225 | /* | |
1226 | * ACPI interpreter is required to complete interrupt setup, | |
1227 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1228 | * If MPS is present, it will handle them, | |
1229 | * otherwise the system will stay in PIC mode | |
1230 | */ | |
1231 | if (acpi_disabled || acpi_noirq) { | |
1232 | return -ENODEV; | |
4be44fcd | 1233 | } |
1da177e4 | 1234 | |
5f3b1a8b | 1235 | if (!cpu_has_apic) |
d3b6a349 AK |
1236 | return -ENODEV; |
1237 | ||
1da177e4 | 1238 | /* |
4be44fcd | 1239 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1240 | */ |
1241 | if (skip_ioapic_setup) { | |
1242 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1243 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1244 | return -ENODEV; |
1245 | } | |
1246 | ||
4be44fcd | 1247 | count = |
5f3b1a8b | 1248 | acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
4be44fcd | 1249 | MAX_IO_APICS); |
1da177e4 LT |
1250 | if (!count) { |
1251 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1252 | return -ENODEV; | |
4be44fcd | 1253 | } else if (count < 0) { |
1da177e4 LT |
1254 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1255 | return count; | |
1256 | } | |
1257 | ||
4be44fcd | 1258 | count = |
5f3b1a8b | 1259 | acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr, |
4be44fcd | 1260 | NR_IRQ_VECTORS); |
1da177e4 | 1261 | if (count < 0) { |
4be44fcd LB |
1262 | printk(KERN_ERR PREFIX |
1263 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1264 | /* TBD: Cleanup to allow fallback to MPS */ |
1265 | return count; | |
1266 | } | |
1267 | ||
1268 | /* | |
1269 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1270 | * pretend we got one so we can set the SCI flags. | |
1271 | */ | |
1272 | if (!acpi_sci_override_gsi) | |
cee324b1 | 1273 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); |
1da177e4 LT |
1274 | |
1275 | /* Fill in identity legacy mapings where no override */ | |
1276 | mp_config_acpi_legacy_irqs(); | |
1277 | ||
4be44fcd | 1278 | count = |
5f3b1a8b | 1279 | acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src, |
4be44fcd | 1280 | NR_IRQ_VECTORS); |
1da177e4 LT |
1281 | if (count < 0) { |
1282 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1283 | /* TBD: Cleanup to allow fallback to MPS */ | |
1284 | return count; | |
1285 | } | |
1286 | ||
1287 | return 0; | |
1288 | } | |
1289 | #else | |
1290 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1291 | { | |
1292 | return -1; | |
1293 | } | |
8466361a | 1294 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1295 | |
cbf9bd60 YL |
1296 | static void __init early_acpi_process_madt(void) |
1297 | { | |
1298 | #ifdef CONFIG_X86_LOCAL_APIC | |
1299 | int error; | |
1300 | ||
1301 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1302 | ||
1303 | /* | |
1304 | * Parse MADT LAPIC entries | |
1305 | */ | |
1306 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1307 | if (!error) { | |
1308 | acpi_lapic = 1; | |
1309 | smp_found_config = 1; | |
1310 | } | |
1311 | if (error == -EINVAL) { | |
1312 | /* | |
1313 | * Dell Precision Workstation 410, 610 come here. | |
1314 | */ | |
1315 | printk(KERN_ERR PREFIX | |
1316 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1317 | disable_acpi(); | |
1318 | } | |
1319 | } | |
1320 | #endif | |
1321 | } | |
1322 | ||
4be44fcd | 1323 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1324 | { |
1325 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1326 | int error; |
1da177e4 | 1327 | |
7f8f97c3 | 1328 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1329 | |
1330 | /* | |
1331 | * Parse MADT LAPIC entries | |
1332 | */ | |
1333 | error = acpi_parse_madt_lapic_entries(); | |
1334 | if (!error) { | |
1335 | acpi_lapic = 1; | |
1336 | ||
911a62d4 VP |
1337 | #ifdef CONFIG_X86_GENERICARCH |
1338 | generic_bigsmp_probe(); | |
1339 | #endif | |
1da177e4 LT |
1340 | /* |
1341 | * Parse MADT IO-APIC entries | |
1342 | */ | |
1343 | error = acpi_parse_madt_ioapic_entries(); | |
1344 | if (!error) { | |
1345 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
1346 | acpi_irq_balance_set(NULL); | |
1347 | acpi_ioapic = 1; | |
1348 | ||
1349 | smp_found_config = 1; | |
3c43f039 | 1350 | setup_apic_routing(); |
1da177e4 LT |
1351 | } |
1352 | } | |
1353 | if (error == -EINVAL) { | |
1354 | /* | |
1355 | * Dell Precision Workstation 410, 610 come here. | |
1356 | */ | |
4be44fcd LB |
1357 | printk(KERN_ERR PREFIX |
1358 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1359 | disable_acpi(); |
1360 | } | |
1361 | } | |
1362 | #endif | |
1363 | return; | |
1364 | } | |
1365 | ||
1855256c | 1366 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1367 | { |
1368 | if (!acpi_force) { | |
1369 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1370 | d->ident); | |
1371 | acpi_noirq_set(); | |
1372 | } | |
1373 | return 0; | |
1374 | } | |
1375 | ||
1855256c | 1376 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1377 | { |
1378 | if (!acpi_force) { | |
1379 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1380 | d->ident); | |
1381 | acpi_disable_pci(); | |
1382 | } | |
1383 | return 0; | |
1384 | } | |
aea00143 | 1385 | |
1855256c | 1386 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1387 | { |
1388 | if (!acpi_force) { | |
4be44fcd | 1389 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1390 | disable_acpi(); |
1391 | } else { | |
1392 | printk(KERN_NOTICE | |
1393 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1394 | } | |
1395 | return 0; | |
1396 | } | |
1397 | ||
1398 | /* | |
1399 | * Limit ACPI to CPU enumeration for HT | |
1400 | */ | |
1855256c | 1401 | static int __init force_acpi_ht(const struct dmi_system_id *d) |
aea00143 AP |
1402 | { |
1403 | if (!acpi_force) { | |
4be44fcd LB |
1404 | printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", |
1405 | d->ident); | |
aea00143 AP |
1406 | disable_acpi(); |
1407 | acpi_ht = 1; | |
1408 | } else { | |
1409 | printk(KERN_NOTICE | |
1410 | "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); | |
1411 | } | |
1412 | return 0; | |
1413 | } | |
1414 | ||
9340e1cc MG |
1415 | /* |
1416 | * Don't register any I/O APIC entries for the 8254 timer IRQ. | |
1417 | */ | |
1418 | static int __init | |
1419 | dmi_disable_irq0_through_ioapic(const struct dmi_system_id *d) | |
1420 | { | |
1421 | pr_notice("%s detected: disabling IRQ 0 through I/O APIC\n", d->ident); | |
1422 | disable_irq0_through_ioapic = 1; | |
1423 | return 0; | |
1424 | } | |
1425 | ||
e2079c43 RW |
1426 | /* |
1427 | * Force ignoring BIOS IRQ0 pin2 override | |
1428 | */ | |
1429 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1430 | { | |
1431 | pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident); | |
1432 | acpi_skip_timer_override = 1; | |
1433 | force_mask_ioapic_irq_2(); | |
1434 | return 0; | |
1435 | } | |
1436 | ||
aea00143 AP |
1437 | /* |
1438 | * If your system is blacklisted here, but you find that acpi=force | |
1439 | * works for you, please contact acpi-devel@sourceforge.net | |
1440 | */ | |
1441 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1442 | /* | |
1443 | * Boxes that need ACPI disabled | |
1444 | */ | |
1445 | { | |
4be44fcd LB |
1446 | .callback = dmi_disable_acpi, |
1447 | .ident = "IBM Thinkpad", | |
1448 | .matches = { | |
1449 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1450 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1451 | }, | |
1452 | }, | |
aea00143 AP |
1453 | |
1454 | /* | |
1455 | * Boxes that need acpi=ht | |
1456 | */ | |
1457 | { | |
4be44fcd LB |
1458 | .callback = force_acpi_ht, |
1459 | .ident = "FSC Primergy T850", | |
1460 | .matches = { | |
1461 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1462 | DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"), | |
1463 | }, | |
1464 | }, | |
aea00143 | 1465 | { |
4be44fcd LB |
1466 | .callback = force_acpi_ht, |
1467 | .ident = "HP VISUALIZE NT Workstation", | |
1468 | .matches = { | |
1469 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
1470 | DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"), | |
1471 | }, | |
1472 | }, | |
aea00143 | 1473 | { |
4be44fcd LB |
1474 | .callback = force_acpi_ht, |
1475 | .ident = "Compaq Workstation W8000", | |
1476 | .matches = { | |
1477 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
1478 | DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"), | |
1479 | }, | |
1480 | }, | |
aea00143 | 1481 | { |
4be44fcd LB |
1482 | .callback = force_acpi_ht, |
1483 | .ident = "ASUS P4B266", | |
1484 | .matches = { | |
1485 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1486 | DMI_MATCH(DMI_BOARD_NAME, "P4B266"), | |
1487 | }, | |
1488 | }, | |
aea00143 | 1489 | { |
4be44fcd LB |
1490 | .callback = force_acpi_ht, |
1491 | .ident = "ASUS P2B-DS", | |
1492 | .matches = { | |
1493 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1494 | DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"), | |
1495 | }, | |
1496 | }, | |
aea00143 | 1497 | { |
4be44fcd LB |
1498 | .callback = force_acpi_ht, |
1499 | .ident = "ASUS CUR-DLS", | |
1500 | .matches = { | |
1501 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1502 | DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"), | |
1503 | }, | |
1504 | }, | |
aea00143 | 1505 | { |
4be44fcd LB |
1506 | .callback = force_acpi_ht, |
1507 | .ident = "ABIT i440BX-W83977", | |
1508 | .matches = { | |
1509 | DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"), | |
1510 | DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"), | |
1511 | }, | |
1512 | }, | |
aea00143 | 1513 | { |
4be44fcd LB |
1514 | .callback = force_acpi_ht, |
1515 | .ident = "IBM Bladecenter", | |
1516 | .matches = { | |
1517 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1518 | DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"), | |
1519 | }, | |
1520 | }, | |
aea00143 | 1521 | { |
4be44fcd LB |
1522 | .callback = force_acpi_ht, |
1523 | .ident = "IBM eServer xSeries 360", | |
1524 | .matches = { | |
1525 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1526 | DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"), | |
1527 | }, | |
1528 | }, | |
aea00143 | 1529 | { |
4be44fcd LB |
1530 | .callback = force_acpi_ht, |
1531 | .ident = "IBM eserver xSeries 330", | |
1532 | .matches = { | |
1533 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1534 | DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"), | |
1535 | }, | |
1536 | }, | |
aea00143 | 1537 | { |
4be44fcd LB |
1538 | .callback = force_acpi_ht, |
1539 | .ident = "IBM eserver xSeries 440", | |
1540 | .matches = { | |
1541 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1542 | DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"), | |
1543 | }, | |
1544 | }, | |
aea00143 | 1545 | |
aea00143 AP |
1546 | /* |
1547 | * Boxes that need ACPI PCI IRQ routing disabled | |
1548 | */ | |
1549 | { | |
4be44fcd LB |
1550 | .callback = disable_acpi_irq, |
1551 | .ident = "ASUS A7V", | |
1552 | .matches = { | |
1553 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1554 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1555 | /* newer BIOS, Revision 1011, does work */ | |
1556 | DMI_MATCH(DMI_BIOS_VERSION, | |
1557 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1558 | }, | |
1559 | }, | |
74586fca LB |
1560 | { |
1561 | /* | |
1562 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1563 | * for LPC bridge, which is needed for the PCI | |
1564 | * interrupt links to work. DSDT fix is in bug 5966. | |
1565 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1566 | */ | |
1567 | .callback = disable_acpi_irq, | |
1568 | .ident = "IBM Thinkpad 600 Series 2645", | |
1569 | .matches = { | |
1570 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1571 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1572 | }, | |
1573 | }, | |
1574 | { | |
1575 | .callback = disable_acpi_irq, | |
1576 | .ident = "IBM Thinkpad 600 Series 2646", | |
1577 | .matches = { | |
1578 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1579 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1580 | }, | |
1581 | }, | |
aea00143 AP |
1582 | /* |
1583 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1584 | */ | |
4be44fcd LB |
1585 | { /* _BBN 0 bug */ |
1586 | .callback = disable_acpi_pci, | |
1587 | .ident = "ASUS PR-DLS", | |
1588 | .matches = { | |
1589 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1590 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1591 | DMI_MATCH(DMI_BIOS_VERSION, | |
1592 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1593 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1594 | }, | |
1595 | }, | |
aea00143 | 1596 | { |
4be44fcd LB |
1597 | .callback = disable_acpi_pci, |
1598 | .ident = "Acer TravelMate 36x Laptop", | |
1599 | .matches = { | |
1600 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1601 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1602 | }, | |
1603 | }, | |
9340e1cc MG |
1604 | /* |
1605 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1606 | * which includes some code which overrides all temperature | |
1607 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1608 | * is enabled. This input is incorrectly designated the | |
1609 | * ISA IRQ 0 via an interrupt source override even though | |
1610 | * it is wired to the output of the master 8259A and INTIN0 | |
1611 | * is not connected at all. Abandon any attempts to route | |
1612 | * IRQ 0 through the I/O APIC therefore. | |
1613 | */ | |
1614 | { | |
1615 | .callback = dmi_disable_irq0_through_ioapic, | |
1616 | .ident = "HP NX6125 laptop", | |
1617 | .matches = { | |
1618 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1619 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1620 | }, | |
1621 | }, | |
1622 | { | |
1623 | .callback = dmi_disable_irq0_through_ioapic, | |
1624 | .ident = "HP NX6325 laptop", | |
1625 | .matches = { | |
1626 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1627 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1628 | }, | |
1629 | }, | |
e2079c43 RW |
1630 | /* |
1631 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1632 | * which includes some code which overrides all temperature | |
1633 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1634 | * is enabled. This input is incorrectly designated the | |
1635 | * ISA IRQ 0 via an interrupt source override even though | |
1636 | * it is wired to the output of the master 8259A and INTIN0 | |
1637 | * is not connected at all. Force ignoring BIOS IRQ0 pin2 | |
1638 | * override in that cases. | |
1639 | */ | |
1640 | { | |
1641 | .callback = dmi_ignore_irq0_timer_override, | |
1642 | .ident = "HP NX6125 laptop", | |
1643 | .matches = { | |
1644 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1645 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1646 | }, | |
1647 | }, | |
1648 | { | |
1649 | .callback = dmi_ignore_irq0_timer_override, | |
1650 | .ident = "HP NX6325 laptop", | |
1651 | .matches = { | |
1652 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1653 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1654 | }, | |
1655 | }, | |
4be44fcd | 1656 | {} |
aea00143 AP |
1657 | }; |
1658 | ||
1da177e4 LT |
1659 | /* |
1660 | * acpi_boot_table_init() and acpi_boot_init() | |
1661 | * called from setup_arch(), always. | |
1662 | * 1. checksums all tables | |
1663 | * 2. enumerates lapics | |
1664 | * 3. enumerates io-apics | |
1665 | * | |
1666 | * acpi_table_init() is separate to allow reading SRAT without | |
1667 | * other side effects. | |
1668 | * | |
1669 | * side effects of acpi_boot_init: | |
1670 | * acpi_lapic = 1 if LAPIC found | |
1671 | * acpi_ioapic = 1 if IOAPIC found | |
1672 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1673 | * if acpi_blacklisted() acpi_disabled = 1; | |
1674 | * acpi_irq_model=... | |
1675 | * ... | |
1676 | * | |
1677 | * return value: (currently ignored) | |
1678 | * 0: success | |
1679 | * !0: failure | |
1680 | */ | |
1681 | ||
4be44fcd | 1682 | int __init acpi_boot_table_init(void) |
1da177e4 LT |
1683 | { |
1684 | int error; | |
1685 | ||
aea00143 | 1686 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1687 | |
1da177e4 LT |
1688 | /* |
1689 | * If acpi_disabled, bail out | |
1690 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1691 | */ | |
1692 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1693 | return 1; |
1da177e4 | 1694 | |
5f3b1a8b | 1695 | /* |
1da177e4 LT |
1696 | * Initialize the ACPI boot-time table parser. |
1697 | */ | |
1698 | error = acpi_table_init(); | |
1699 | if (error) { | |
1700 | disable_acpi(); | |
1701 | return error; | |
1702 | } | |
1da177e4 | 1703 | |
5f3b1a8b | 1704 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1705 | |
1706 | /* | |
1707 | * blacklist may disable ACPI entirely | |
1708 | */ | |
1709 | error = acpi_blacklisted(); | |
1710 | if (error) { | |
1da177e4 LT |
1711 | if (acpi_force) { |
1712 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1713 | } else { | |
1714 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1715 | disable_acpi(); | |
1716 | return error; | |
1717 | } | |
1718 | } | |
cbf9bd60 YL |
1719 | |
1720 | return 0; | |
1721 | } | |
1722 | ||
1723 | int __init early_acpi_boot_init(void) | |
1724 | { | |
1725 | /* | |
1726 | * If acpi_disabled, bail out | |
1727 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1728 | */ | |
1729 | if (acpi_disabled && !acpi_ht) | |
1730 | return 1; | |
1731 | ||
1732 | /* | |
1733 | * Process the Multiple APIC Description Table (MADT), if present | |
1734 | */ | |
1735 | early_acpi_process_madt(); | |
1da177e4 LT |
1736 | |
1737 | return 0; | |
1738 | } | |
1739 | ||
1da177e4 LT |
1740 | int __init acpi_boot_init(void) |
1741 | { | |
1742 | /* | |
1743 | * If acpi_disabled, bail out | |
1744 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1745 | */ | |
1746 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1747 | return 1; |
1da177e4 | 1748 | |
5f3b1a8b | 1749 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1750 | |
1751 | /* | |
1752 | * set sci_int and PM timer address | |
1753 | */ | |
ceb6c468 | 1754 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1755 | |
1756 | /* | |
1757 | * Process the Multiple APIC Description Table (MADT), if present | |
1758 | */ | |
1759 | acpi_process_madt(); | |
1760 | ||
5f3b1a8b | 1761 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 LT |
1762 | |
1763 | return 0; | |
1764 | } | |
1a3f239d RR |
1765 | |
1766 | static int __init parse_acpi(char *arg) | |
1767 | { | |
1768 | if (!arg) | |
1769 | return -EINVAL; | |
1770 | ||
1771 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1772 | if (strcmp(arg, "off") == 0) { | |
1773 | disable_acpi(); | |
1774 | } | |
1775 | /* acpi=force to over-ride black-list */ | |
1776 | else if (strcmp(arg, "force") == 0) { | |
1777 | acpi_force = 1; | |
1778 | acpi_ht = 1; | |
1779 | acpi_disabled = 0; | |
1780 | } | |
1781 | /* acpi=strict disables out-of-spec workarounds */ | |
1782 | else if (strcmp(arg, "strict") == 0) { | |
1783 | acpi_strict = 1; | |
1784 | } | |
1785 | /* Limit ACPI just to boot-time to enable HT */ | |
1786 | else if (strcmp(arg, "ht") == 0) { | |
1787 | if (!acpi_force) | |
1788 | disable_acpi(); | |
1789 | acpi_ht = 1; | |
1790 | } | |
1791 | /* "acpi=noirq" disables ACPI interrupt routing */ | |
1792 | else if (strcmp(arg, "noirq") == 0) { | |
1793 | acpi_noirq_set(); | |
1794 | } else { | |
1795 | /* Core will printk when we return error. */ | |
1796 | return -EINVAL; | |
1797 | } | |
1798 | return 0; | |
1799 | } | |
1800 | early_param("acpi", parse_acpi); | |
1801 | ||
1802 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1803 | static int __init parse_pci(char *arg) | |
1804 | { | |
1805 | if (arg && strcmp(arg, "noacpi") == 0) | |
1806 | acpi_disable_pci(); | |
1807 | return 0; | |
1808 | } | |
1809 | early_param("pci", parse_pci); | |
1810 | ||
3c999f14 YL |
1811 | int __init acpi_mps_check(void) |
1812 | { | |
1813 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1814 | /* mptable code is not built-in*/ | |
1815 | if (acpi_disabled || acpi_noirq) { | |
1816 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1817 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1818 | "may have problem\n"); | |
1819 | return 1; | |
1820 | } | |
1821 | #endif | |
1822 | return 0; | |
1823 | } | |
1824 | ||
1a3f239d RR |
1825 | #ifdef CONFIG_X86_IO_APIC |
1826 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1827 | { | |
1828 | acpi_skip_timer_override = 1; | |
1829 | return 0; | |
1830 | } | |
1831 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1832 | |
1833 | static int __init parse_acpi_use_timer_override(char *arg) | |
1834 | { | |
1835 | acpi_use_timer_override = 1; | |
1836 | return 0; | |
1837 | } | |
1838 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1839 | #endif /* CONFIG_X86_IO_APIC */ |
1840 | ||
1841 | static int __init setup_acpi_sci(char *s) | |
1842 | { | |
1843 | if (!s) | |
1844 | return -EINVAL; | |
1845 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1846 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1847 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1848 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1849 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1850 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1851 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1852 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1853 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1854 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1855 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1856 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1857 | else |
1858 | return -EINVAL; | |
1859 | return 0; | |
1860 | } | |
1861 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1862 | |
1863 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1864 | { | |
1865 | unsigned int old, new, val; | |
1866 | do { | |
1867 | old = *lock; | |
1868 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1869 | val = cmpxchg(lock, old, new); | |
1870 | } while (unlikely (val != old)); | |
1871 | return (new < 3) ? -1 : 0; | |
1872 | } | |
1873 | ||
1874 | int __acpi_release_global_lock(unsigned int *lock) | |
1875 | { | |
1876 | unsigned int old, new, val; | |
1877 | do { | |
1878 | old = *lock; | |
1879 | new = old & ~0x3; | |
1880 | val = cmpxchg(lock, old, new); | |
1881 | } while (unlikely (val != old)); | |
1882 | return old & 0x1; | |
1883 | } |