Commit | Line | Data |
---|---|---|
c767a54b JP |
1 | #define pr_fmt(fmt) "SMP alternatives: " fmt |
2 | ||
9a0b5817 | 3 | #include <linux/module.h> |
f6a57033 | 4 | #include <linux/sched.h> |
2f1dafe5 | 5 | #include <linux/mutex.h> |
9a0b5817 | 6 | #include <linux/list.h> |
8b5a10fc | 7 | #include <linux/stringify.h> |
19d36ccd AK |
8 | #include <linux/mm.h> |
9 | #include <linux/vmalloc.h> | |
3945dab4 | 10 | #include <linux/memory.h> |
3d55cc8a | 11 | #include <linux/stop_machine.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
fd4363ff | 13 | #include <linux/kdebug.h> |
9a0b5817 GH |
14 | #include <asm/alternative.h> |
15 | #include <asm/sections.h> | |
19d36ccd | 16 | #include <asm/pgtable.h> |
8f4e956b AK |
17 | #include <asm/mce.h> |
18 | #include <asm/nmi.h> | |
e587cadd | 19 | #include <asm/cacheflush.h> |
78ff7fae | 20 | #include <asm/tlbflush.h> |
e587cadd | 21 | #include <asm/io.h> |
78ff7fae | 22 | #include <asm/fixmap.h> |
9a0b5817 | 23 | |
5e907bb0 IM |
24 | int __read_mostly alternatives_patched; |
25 | ||
26 | EXPORT_SYMBOL_GPL(alternatives_patched); | |
27 | ||
ab144f5e AK |
28 | #define MAX_PATCH_LEN (255-1) |
29 | ||
8b5a10fc | 30 | static int __initdata_or_module debug_alternative; |
b7fb4af0 | 31 | |
d167a518 GH |
32 | static int __init debug_alt(char *str) |
33 | { | |
34 | debug_alternative = 1; | |
35 | return 1; | |
36 | } | |
d167a518 GH |
37 | __setup("debug-alternative", debug_alt); |
38 | ||
09488165 JB |
39 | static int noreplace_smp; |
40 | ||
b7fb4af0 JF |
41 | static int __init setup_noreplace_smp(char *str) |
42 | { | |
43 | noreplace_smp = 1; | |
44 | return 1; | |
45 | } | |
46 | __setup("noreplace-smp", setup_noreplace_smp); | |
47 | ||
959b4fdf | 48 | #ifdef CONFIG_PARAVIRT |
8b5a10fc | 49 | static int __initdata_or_module noreplace_paravirt = 0; |
959b4fdf JF |
50 | |
51 | static int __init setup_noreplace_paravirt(char *str) | |
52 | { | |
53 | noreplace_paravirt = 1; | |
54 | return 1; | |
55 | } | |
56 | __setup("noreplace-paravirt", setup_noreplace_paravirt); | |
57 | #endif | |
b7fb4af0 | 58 | |
db477a33 BP |
59 | #define DPRINTK(fmt, args...) \ |
60 | do { \ | |
61 | if (debug_alternative) \ | |
62 | printk(KERN_DEBUG "%s: " fmt "\n", __func__, ##args); \ | |
c767a54b | 63 | } while (0) |
d167a518 | 64 | |
48c7a250 BP |
65 | #define DUMP_BYTES(buf, len, fmt, args...) \ |
66 | do { \ | |
67 | if (unlikely(debug_alternative)) { \ | |
68 | int j; \ | |
69 | \ | |
70 | if (!(len)) \ | |
71 | break; \ | |
72 | \ | |
73 | printk(KERN_DEBUG fmt, ##args); \ | |
74 | for (j = 0; j < (len) - 1; j++) \ | |
75 | printk(KERN_CONT "%02hhx ", buf[j]); \ | |
76 | printk(KERN_CONT "%02hhx\n", buf[j]); \ | |
77 | } \ | |
78 | } while (0) | |
79 | ||
dc326fca PA |
80 | /* |
81 | * Each GENERIC_NOPX is of X bytes, and defined as an array of bytes | |
82 | * that correspond to that nop. Getting from one nop to the next, we | |
83 | * add to the array the offset that is equal to the sum of all sizes of | |
84 | * nops preceding the one we are after. | |
85 | * | |
86 | * Note: The GENERIC_NOP5_ATOMIC is at the end, as it breaks the | |
87 | * nice symmetry of sizes of the previous nops. | |
88 | */ | |
8b5a10fc | 89 | #if defined(GENERIC_NOP1) && !defined(CONFIG_X86_64) |
dc326fca PA |
90 | static const unsigned char intelnops[] = |
91 | { | |
92 | GENERIC_NOP1, | |
93 | GENERIC_NOP2, | |
94 | GENERIC_NOP3, | |
95 | GENERIC_NOP4, | |
96 | GENERIC_NOP5, | |
97 | GENERIC_NOP6, | |
98 | GENERIC_NOP7, | |
99 | GENERIC_NOP8, | |
100 | GENERIC_NOP5_ATOMIC | |
101 | }; | |
102 | static const unsigned char * const intel_nops[ASM_NOP_MAX+2] = | |
103 | { | |
9a0b5817 GH |
104 | NULL, |
105 | intelnops, | |
106 | intelnops + 1, | |
107 | intelnops + 1 + 2, | |
108 | intelnops + 1 + 2 + 3, | |
109 | intelnops + 1 + 2 + 3 + 4, | |
110 | intelnops + 1 + 2 + 3 + 4 + 5, | |
111 | intelnops + 1 + 2 + 3 + 4 + 5 + 6, | |
112 | intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 113 | intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 114 | }; |
d167a518 GH |
115 | #endif |
116 | ||
117 | #ifdef K8_NOP1 | |
dc326fca PA |
118 | static const unsigned char k8nops[] = |
119 | { | |
120 | K8_NOP1, | |
121 | K8_NOP2, | |
122 | K8_NOP3, | |
123 | K8_NOP4, | |
124 | K8_NOP5, | |
125 | K8_NOP6, | |
126 | K8_NOP7, | |
127 | K8_NOP8, | |
128 | K8_NOP5_ATOMIC | |
129 | }; | |
130 | static const unsigned char * const k8_nops[ASM_NOP_MAX+2] = | |
131 | { | |
9a0b5817 GH |
132 | NULL, |
133 | k8nops, | |
134 | k8nops + 1, | |
135 | k8nops + 1 + 2, | |
136 | k8nops + 1 + 2 + 3, | |
137 | k8nops + 1 + 2 + 3 + 4, | |
138 | k8nops + 1 + 2 + 3 + 4 + 5, | |
139 | k8nops + 1 + 2 + 3 + 4 + 5 + 6, | |
140 | k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 141 | k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 142 | }; |
d167a518 GH |
143 | #endif |
144 | ||
8b5a10fc | 145 | #if defined(K7_NOP1) && !defined(CONFIG_X86_64) |
dc326fca PA |
146 | static const unsigned char k7nops[] = |
147 | { | |
148 | K7_NOP1, | |
149 | K7_NOP2, | |
150 | K7_NOP3, | |
151 | K7_NOP4, | |
152 | K7_NOP5, | |
153 | K7_NOP6, | |
154 | K7_NOP7, | |
155 | K7_NOP8, | |
156 | K7_NOP5_ATOMIC | |
157 | }; | |
158 | static const unsigned char * const k7_nops[ASM_NOP_MAX+2] = | |
159 | { | |
9a0b5817 GH |
160 | NULL, |
161 | k7nops, | |
162 | k7nops + 1, | |
163 | k7nops + 1 + 2, | |
164 | k7nops + 1 + 2 + 3, | |
165 | k7nops + 1 + 2 + 3 + 4, | |
166 | k7nops + 1 + 2 + 3 + 4 + 5, | |
167 | k7nops + 1 + 2 + 3 + 4 + 5 + 6, | |
168 | k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 169 | k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 170 | }; |
d167a518 GH |
171 | #endif |
172 | ||
32c464f5 | 173 | #ifdef P6_NOP1 |
cb09cad4 | 174 | static const unsigned char p6nops[] = |
dc326fca PA |
175 | { |
176 | P6_NOP1, | |
177 | P6_NOP2, | |
178 | P6_NOP3, | |
179 | P6_NOP4, | |
180 | P6_NOP5, | |
181 | P6_NOP6, | |
182 | P6_NOP7, | |
183 | P6_NOP8, | |
184 | P6_NOP5_ATOMIC | |
185 | }; | |
186 | static const unsigned char * const p6_nops[ASM_NOP_MAX+2] = | |
187 | { | |
32c464f5 JB |
188 | NULL, |
189 | p6nops, | |
190 | p6nops + 1, | |
191 | p6nops + 1 + 2, | |
192 | p6nops + 1 + 2 + 3, | |
193 | p6nops + 1 + 2 + 3 + 4, | |
194 | p6nops + 1 + 2 + 3 + 4 + 5, | |
195 | p6nops + 1 + 2 + 3 + 4 + 5 + 6, | |
196 | p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 197 | p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
32c464f5 JB |
198 | }; |
199 | #endif | |
200 | ||
dc326fca | 201 | /* Initialize these to a safe default */ |
d167a518 | 202 | #ifdef CONFIG_X86_64 |
dc326fca PA |
203 | const unsigned char * const *ideal_nops = p6_nops; |
204 | #else | |
205 | const unsigned char * const *ideal_nops = intel_nops; | |
206 | #endif | |
d167a518 | 207 | |
dc326fca | 208 | void __init arch_init_ideal_nops(void) |
d167a518 | 209 | { |
dc326fca PA |
210 | switch (boot_cpu_data.x86_vendor) { |
211 | case X86_VENDOR_INTEL: | |
d8d9766c PA |
212 | /* |
213 | * Due to a decoder implementation quirk, some | |
214 | * specific Intel CPUs actually perform better with | |
215 | * the "k8_nops" than with the SDM-recommended NOPs. | |
216 | */ | |
217 | if (boot_cpu_data.x86 == 6 && | |
218 | boot_cpu_data.x86_model >= 0x0f && | |
219 | boot_cpu_data.x86_model != 0x1c && | |
220 | boot_cpu_data.x86_model != 0x26 && | |
221 | boot_cpu_data.x86_model != 0x27 && | |
222 | boot_cpu_data.x86_model < 0x30) { | |
223 | ideal_nops = k8_nops; | |
224 | } else if (boot_cpu_has(X86_FEATURE_NOPL)) { | |
dc326fca PA |
225 | ideal_nops = p6_nops; |
226 | } else { | |
227 | #ifdef CONFIG_X86_64 | |
228 | ideal_nops = k8_nops; | |
229 | #else | |
230 | ideal_nops = intel_nops; | |
231 | #endif | |
232 | } | |
d6250a3f | 233 | break; |
f21262b8 BP |
234 | |
235 | case X86_VENDOR_AMD: | |
236 | if (boot_cpu_data.x86 > 0xf) { | |
237 | ideal_nops = p6_nops; | |
238 | return; | |
239 | } | |
240 | ||
241 | /* fall through */ | |
242 | ||
dc326fca PA |
243 | default: |
244 | #ifdef CONFIG_X86_64 | |
245 | ideal_nops = k8_nops; | |
246 | #else | |
247 | if (boot_cpu_has(X86_FEATURE_K8)) | |
248 | ideal_nops = k8_nops; | |
249 | else if (boot_cpu_has(X86_FEATURE_K7)) | |
250 | ideal_nops = k7_nops; | |
251 | else | |
252 | ideal_nops = intel_nops; | |
253 | #endif | |
254 | } | |
9a0b5817 GH |
255 | } |
256 | ||
ab144f5e | 257 | /* Use this to add nops to a buffer, then text_poke the whole buffer. */ |
8b5a10fc | 258 | static void __init_or_module add_nops(void *insns, unsigned int len) |
139ec7c4 | 259 | { |
139ec7c4 RR |
260 | while (len > 0) { |
261 | unsigned int noplen = len; | |
262 | if (noplen > ASM_NOP_MAX) | |
263 | noplen = ASM_NOP_MAX; | |
dc326fca | 264 | memcpy(insns, ideal_nops[noplen], noplen); |
139ec7c4 RR |
265 | insns += noplen; |
266 | len -= noplen; | |
267 | } | |
268 | } | |
269 | ||
d167a518 | 270 | extern struct alt_instr __alt_instructions[], __alt_instructions_end[]; |
5967ed87 | 271 | extern s32 __smp_locks[], __smp_locks_end[]; |
fa6f2cc7 | 272 | void *text_poke_early(void *addr, const void *opcode, size_t len); |
d167a518 | 273 | |
48c7a250 BP |
274 | /* |
275 | * Are we looking at a near JMP with a 1 or 4-byte displacement. | |
276 | */ | |
277 | static inline bool is_jmp(const u8 opcode) | |
278 | { | |
279 | return opcode == 0xeb || opcode == 0xe9; | |
280 | } | |
281 | ||
282 | static void __init_or_module | |
283 | recompute_jump(struct alt_instr *a, u8 *orig_insn, u8 *repl_insn, u8 *insnbuf) | |
284 | { | |
285 | u8 *next_rip, *tgt_rip; | |
286 | s32 n_dspl, o_dspl; | |
287 | int repl_len; | |
288 | ||
289 | if (a->replacementlen != 5) | |
290 | return; | |
291 | ||
292 | o_dspl = *(s32 *)(insnbuf + 1); | |
293 | ||
294 | /* next_rip of the replacement JMP */ | |
295 | next_rip = repl_insn + a->replacementlen; | |
296 | /* target rip of the replacement JMP */ | |
297 | tgt_rip = next_rip + o_dspl; | |
298 | n_dspl = tgt_rip - orig_insn; | |
299 | ||
300 | DPRINTK("target RIP: %p, new_displ: 0x%x", tgt_rip, n_dspl); | |
301 | ||
302 | if (tgt_rip - orig_insn >= 0) { | |
303 | if (n_dspl - 2 <= 127) | |
304 | goto two_byte_jmp; | |
305 | else | |
306 | goto five_byte_jmp; | |
307 | /* negative offset */ | |
308 | } else { | |
309 | if (((n_dspl - 2) & 0xff) == (n_dspl - 2)) | |
310 | goto two_byte_jmp; | |
311 | else | |
312 | goto five_byte_jmp; | |
313 | } | |
314 | ||
315 | two_byte_jmp: | |
316 | n_dspl -= 2; | |
317 | ||
318 | insnbuf[0] = 0xeb; | |
319 | insnbuf[1] = (s8)n_dspl; | |
320 | add_nops(insnbuf + 2, 3); | |
321 | ||
322 | repl_len = 2; | |
323 | goto done; | |
324 | ||
325 | five_byte_jmp: | |
326 | n_dspl -= 5; | |
327 | ||
328 | insnbuf[0] = 0xe9; | |
329 | *(s32 *)&insnbuf[1] = n_dspl; | |
330 | ||
331 | repl_len = 5; | |
332 | ||
333 | done: | |
334 | ||
335 | DPRINTK("final displ: 0x%08x, JMP 0x%lx", | |
336 | n_dspl, (unsigned long)orig_insn + n_dspl + repl_len); | |
337 | } | |
338 | ||
4fd4b6e5 BP |
339 | static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr) |
340 | { | |
66c117d7 TG |
341 | unsigned long flags; |
342 | ||
69df353f BP |
343 | if (instr[0] != 0x90) |
344 | return; | |
345 | ||
66c117d7 | 346 | local_irq_save(flags); |
4fd4b6e5 | 347 | add_nops(instr + (a->instrlen - a->padlen), a->padlen); |
66c117d7 TG |
348 | sync_core(); |
349 | local_irq_restore(flags); | |
4fd4b6e5 BP |
350 | |
351 | DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ", | |
352 | instr, a->instrlen - a->padlen, a->padlen); | |
353 | } | |
354 | ||
db477a33 BP |
355 | /* |
356 | * Replace instructions with better alternatives for this CPU type. This runs | |
357 | * before SMP is initialized to avoid SMP problems with self modifying code. | |
358 | * This implies that asymmetric systems where APs have less capabilities than | |
359 | * the boot processor are not handled. Tough. Make sure you disable such | |
360 | * features by hand. | |
361 | */ | |
8b5a10fc JB |
362 | void __init_or_module apply_alternatives(struct alt_instr *start, |
363 | struct alt_instr *end) | |
9a0b5817 | 364 | { |
9a0b5817 | 365 | struct alt_instr *a; |
59e97e4d | 366 | u8 *instr, *replacement; |
1b1d9258 | 367 | u8 insnbuf[MAX_PATCH_LEN]; |
9a0b5817 | 368 | |
db477a33 | 369 | DPRINTK("alt table %p -> %p", start, end); |
50973133 FY |
370 | /* |
371 | * The scan order should be from start to end. A later scanned | |
db477a33 | 372 | * alternative code can overwrite previously scanned alternative code. |
50973133 FY |
373 | * Some kernel functions (e.g. memcpy, memset, etc) use this order to |
374 | * patch code. | |
375 | * | |
376 | * So be careful if you want to change the scan order to any other | |
377 | * order. | |
378 | */ | |
9a0b5817 | 379 | for (a = start; a < end; a++) { |
48c7a250 BP |
380 | int insnbuf_sz = 0; |
381 | ||
59e97e4d AL |
382 | instr = (u8 *)&a->instr_offset + a->instr_offset; |
383 | replacement = (u8 *)&a->repl_offset + a->repl_offset; | |
ab144f5e | 384 | BUG_ON(a->instrlen > sizeof(insnbuf)); |
65fc985b | 385 | BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32); |
4fd4b6e5 BP |
386 | if (!boot_cpu_has(a->cpuid)) { |
387 | if (a->padlen > 1) | |
388 | optimize_nops(a, instr); | |
389 | ||
9a0b5817 | 390 | continue; |
4fd4b6e5 | 391 | } |
59e97e4d | 392 | |
dbe4058a | 393 | DPRINTK("feat: %d*32+%d, old: (%p, len: %d), repl: (%p, len: %d), pad: %d", |
db477a33 BP |
394 | a->cpuid >> 5, |
395 | a->cpuid & 0x1f, | |
396 | instr, a->instrlen, | |
dbe4058a | 397 | replacement, a->replacementlen, a->padlen); |
db477a33 | 398 | |
48c7a250 BP |
399 | DUMP_BYTES(instr, a->instrlen, "%p: old_insn: ", instr); |
400 | DUMP_BYTES(replacement, a->replacementlen, "%p: rpl_insn: ", replacement); | |
401 | ||
59e97e4d | 402 | memcpy(insnbuf, replacement, a->replacementlen); |
48c7a250 | 403 | insnbuf_sz = a->replacementlen; |
59e97e4d AL |
404 | |
405 | /* 0xe8 is a relative jump; fix the offset. */ | |
db477a33 BP |
406 | if (*insnbuf == 0xe8 && a->replacementlen == 5) { |
407 | *(s32 *)(insnbuf + 1) += replacement - instr; | |
48c7a250 BP |
408 | DPRINTK("Fix CALL offset: 0x%x, CALL 0x%lx", |
409 | *(s32 *)(insnbuf + 1), | |
410 | (unsigned long)instr + *(s32 *)(insnbuf + 1) + 5); | |
db477a33 | 411 | } |
59e97e4d | 412 | |
48c7a250 BP |
413 | if (a->replacementlen && is_jmp(replacement[0])) |
414 | recompute_jump(a, instr, replacement, insnbuf); | |
415 | ||
416 | if (a->instrlen > a->replacementlen) { | |
4332195c BP |
417 | add_nops(insnbuf + a->replacementlen, |
418 | a->instrlen - a->replacementlen); | |
48c7a250 BP |
419 | insnbuf_sz += a->instrlen - a->replacementlen; |
420 | } | |
421 | DUMP_BYTES(insnbuf, insnbuf_sz, "%p: final_insn: ", instr); | |
59e97e4d | 422 | |
48c7a250 | 423 | text_poke_early(instr, insnbuf, insnbuf_sz); |
9a0b5817 GH |
424 | } |
425 | } | |
426 | ||
8ec4d41f | 427 | #ifdef CONFIG_SMP |
5967ed87 JB |
428 | static void alternatives_smp_lock(const s32 *start, const s32 *end, |
429 | u8 *text, u8 *text_end) | |
9a0b5817 | 430 | { |
5967ed87 | 431 | const s32 *poff; |
9a0b5817 | 432 | |
3945dab4 | 433 | mutex_lock(&text_mutex); |
5967ed87 JB |
434 | for (poff = start; poff < end; poff++) { |
435 | u8 *ptr = (u8 *)poff + *poff; | |
436 | ||
437 | if (!*poff || ptr < text || ptr >= text_end) | |
9a0b5817 | 438 | continue; |
f88f07e0 | 439 | /* turn DS segment override prefix into lock prefix */ |
d9c5841e PA |
440 | if (*ptr == 0x3e) |
441 | text_poke(ptr, ((unsigned char []){0xf0}), 1); | |
4b8073e4 | 442 | } |
3945dab4 | 443 | mutex_unlock(&text_mutex); |
9a0b5817 GH |
444 | } |
445 | ||
5967ed87 JB |
446 | static void alternatives_smp_unlock(const s32 *start, const s32 *end, |
447 | u8 *text, u8 *text_end) | |
9a0b5817 | 448 | { |
5967ed87 | 449 | const s32 *poff; |
9a0b5817 | 450 | |
3945dab4 | 451 | mutex_lock(&text_mutex); |
5967ed87 JB |
452 | for (poff = start; poff < end; poff++) { |
453 | u8 *ptr = (u8 *)poff + *poff; | |
454 | ||
455 | if (!*poff || ptr < text || ptr >= text_end) | |
9a0b5817 | 456 | continue; |
f88f07e0 | 457 | /* turn lock prefix into DS segment override prefix */ |
d9c5841e PA |
458 | if (*ptr == 0xf0) |
459 | text_poke(ptr, ((unsigned char []){0x3E}), 1); | |
4b8073e4 | 460 | } |
3945dab4 | 461 | mutex_unlock(&text_mutex); |
9a0b5817 GH |
462 | } |
463 | ||
464 | struct smp_alt_module { | |
465 | /* what is this ??? */ | |
466 | struct module *mod; | |
467 | char *name; | |
468 | ||
469 | /* ptrs to lock prefixes */ | |
5967ed87 JB |
470 | const s32 *locks; |
471 | const s32 *locks_end; | |
9a0b5817 GH |
472 | |
473 | /* .text segment, needed to avoid patching init code ;) */ | |
474 | u8 *text; | |
475 | u8 *text_end; | |
476 | ||
477 | struct list_head next; | |
478 | }; | |
479 | static LIST_HEAD(smp_alt_modules); | |
2f1dafe5 | 480 | static DEFINE_MUTEX(smp_alt); |
816afe4f | 481 | static bool uniproc_patched = false; /* protected by smp_alt */ |
9a0b5817 | 482 | |
8b5a10fc JB |
483 | void __init_or_module alternatives_smp_module_add(struct module *mod, |
484 | char *name, | |
485 | void *locks, void *locks_end, | |
486 | void *text, void *text_end) | |
9a0b5817 GH |
487 | { |
488 | struct smp_alt_module *smp; | |
9a0b5817 | 489 | |
816afe4f RR |
490 | mutex_lock(&smp_alt); |
491 | if (!uniproc_patched) | |
492 | goto unlock; | |
b7fb4af0 | 493 | |
816afe4f RR |
494 | if (num_possible_cpus() == 1) |
495 | /* Don't bother remembering, we'll never have to undo it. */ | |
496 | goto smp_unlock; | |
9a0b5817 GH |
497 | |
498 | smp = kzalloc(sizeof(*smp), GFP_KERNEL); | |
499 | if (NULL == smp) | |
816afe4f RR |
500 | /* we'll run the (safe but slow) SMP code then ... */ |
501 | goto unlock; | |
9a0b5817 GH |
502 | |
503 | smp->mod = mod; | |
504 | smp->name = name; | |
505 | smp->locks = locks; | |
506 | smp->locks_end = locks_end; | |
507 | smp->text = text; | |
508 | smp->text_end = text_end; | |
db477a33 BP |
509 | DPRINTK("locks %p -> %p, text %p -> %p, name %s\n", |
510 | smp->locks, smp->locks_end, | |
9a0b5817 GH |
511 | smp->text, smp->text_end, smp->name); |
512 | ||
9a0b5817 | 513 | list_add_tail(&smp->next, &smp_alt_modules); |
816afe4f RR |
514 | smp_unlock: |
515 | alternatives_smp_unlock(locks, locks_end, text, text_end); | |
516 | unlock: | |
2f1dafe5 | 517 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
518 | } |
519 | ||
8b5a10fc | 520 | void __init_or_module alternatives_smp_module_del(struct module *mod) |
9a0b5817 GH |
521 | { |
522 | struct smp_alt_module *item; | |
9a0b5817 | 523 | |
2f1dafe5 | 524 | mutex_lock(&smp_alt); |
9a0b5817 GH |
525 | list_for_each_entry(item, &smp_alt_modules, next) { |
526 | if (mod != item->mod) | |
527 | continue; | |
528 | list_del(&item->next); | |
9a0b5817 | 529 | kfree(item); |
816afe4f | 530 | break; |
9a0b5817 | 531 | } |
2f1dafe5 | 532 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
533 | } |
534 | ||
816afe4f | 535 | void alternatives_enable_smp(void) |
9a0b5817 GH |
536 | { |
537 | struct smp_alt_module *mod; | |
9a0b5817 | 538 | |
816afe4f RR |
539 | /* Why bother if there are no other CPUs? */ |
540 | BUG_ON(num_possible_cpus() == 1); | |
9a0b5817 | 541 | |
2f1dafe5 | 542 | mutex_lock(&smp_alt); |
ca74a6f8 | 543 | |
816afe4f | 544 | if (uniproc_patched) { |
c767a54b | 545 | pr_info("switching to SMP code\n"); |
816afe4f | 546 | BUG_ON(num_online_cpus() != 1); |
53756d37 JF |
547 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_UP); |
548 | clear_cpu_cap(&cpu_data(0), X86_FEATURE_UP); | |
9a0b5817 GH |
549 | list_for_each_entry(mod, &smp_alt_modules, next) |
550 | alternatives_smp_lock(mod->locks, mod->locks_end, | |
551 | mod->text, mod->text_end); | |
816afe4f | 552 | uniproc_patched = false; |
9a0b5817 | 553 | } |
2f1dafe5 | 554 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
555 | } |
556 | ||
2cfa1978 MH |
557 | /* Return 1 if the address range is reserved for smp-alternatives */ |
558 | int alternatives_text_reserved(void *start, void *end) | |
559 | { | |
560 | struct smp_alt_module *mod; | |
5967ed87 | 561 | const s32 *poff; |
076dc4a6 MH |
562 | u8 *text_start = start; |
563 | u8 *text_end = end; | |
2cfa1978 MH |
564 | |
565 | list_for_each_entry(mod, &smp_alt_modules, next) { | |
076dc4a6 | 566 | if (mod->text > text_end || mod->text_end < text_start) |
2cfa1978 | 567 | continue; |
5967ed87 JB |
568 | for (poff = mod->locks; poff < mod->locks_end; poff++) { |
569 | const u8 *ptr = (const u8 *)poff + *poff; | |
570 | ||
571 | if (text_start <= ptr && text_end > ptr) | |
2cfa1978 | 572 | return 1; |
5967ed87 | 573 | } |
2cfa1978 MH |
574 | } |
575 | ||
576 | return 0; | |
577 | } | |
48c7a250 | 578 | #endif /* CONFIG_SMP */ |
8ec4d41f | 579 | |
139ec7c4 | 580 | #ifdef CONFIG_PARAVIRT |
8b5a10fc JB |
581 | void __init_or_module apply_paravirt(struct paravirt_patch_site *start, |
582 | struct paravirt_patch_site *end) | |
139ec7c4 | 583 | { |
98de032b | 584 | struct paravirt_patch_site *p; |
ab144f5e | 585 | char insnbuf[MAX_PATCH_LEN]; |
139ec7c4 | 586 | |
959b4fdf JF |
587 | if (noreplace_paravirt) |
588 | return; | |
589 | ||
139ec7c4 RR |
590 | for (p = start; p < end; p++) { |
591 | unsigned int used; | |
592 | ||
ab144f5e | 593 | BUG_ON(p->len > MAX_PATCH_LEN); |
d34fda4a CW |
594 | /* prep the buffer with the original instructions */ |
595 | memcpy(insnbuf, p->instr, p->len); | |
93b1eab3 JF |
596 | used = pv_init_ops.patch(p->instrtype, p->clobbers, insnbuf, |
597 | (unsigned long)p->instr, p->len); | |
7f63c41c | 598 | |
63f70270 JF |
599 | BUG_ON(used > p->len); |
600 | ||
139ec7c4 | 601 | /* Pad the rest with nops */ |
ab144f5e | 602 | add_nops(insnbuf + used, p->len - used); |
e587cadd | 603 | text_poke_early(p->instr, insnbuf, p->len); |
139ec7c4 | 604 | } |
139ec7c4 | 605 | } |
98de032b | 606 | extern struct paravirt_patch_site __start_parainstructions[], |
139ec7c4 RR |
607 | __stop_parainstructions[]; |
608 | #endif /* CONFIG_PARAVIRT */ | |
609 | ||
9a0b5817 GH |
610 | void __init alternative_instructions(void) |
611 | { | |
8f4e956b AK |
612 | /* The patching is not fully atomic, so try to avoid local interruptions |
613 | that might execute the to be patched code. | |
614 | Other CPUs are not running. */ | |
615 | stop_nmi(); | |
123aa76e AK |
616 | |
617 | /* | |
618 | * Don't stop machine check exceptions while patching. | |
619 | * MCEs only happen when something got corrupted and in this | |
620 | * case we must do something about the corruption. | |
621 | * Ignoring it is worse than a unlikely patching race. | |
622 | * Also machine checks tend to be broadcast and if one CPU | |
623 | * goes into machine check the others follow quickly, so we don't | |
624 | * expect a machine check to cause undue problems during to code | |
625 | * patching. | |
626 | */ | |
8f4e956b | 627 | |
9a0b5817 GH |
628 | apply_alternatives(__alt_instructions, __alt_instructions_end); |
629 | ||
8ec4d41f | 630 | #ifdef CONFIG_SMP |
816afe4f RR |
631 | /* Patch to UP if other cpus not imminent. */ |
632 | if (!noreplace_smp && (num_present_cpus() == 1 || setup_max_cpus <= 1)) { | |
633 | uniproc_patched = true; | |
9a0b5817 GH |
634 | alternatives_smp_module_add(NULL, "core kernel", |
635 | __smp_locks, __smp_locks_end, | |
636 | _text, _etext); | |
9a0b5817 | 637 | } |
8f4e956b | 638 | |
816afe4f | 639 | if (!uniproc_patched || num_possible_cpus() == 1) |
f68fd5f4 FW |
640 | free_init_pages("SMP alternatives", |
641 | (unsigned long)__smp_locks, | |
642 | (unsigned long)__smp_locks_end); | |
816afe4f RR |
643 | #endif |
644 | ||
645 | apply_paravirt(__parainstructions, __parainstructions_end); | |
f68fd5f4 | 646 | |
8f4e956b | 647 | restart_nmi(); |
5e907bb0 | 648 | alternatives_patched = 1; |
9a0b5817 | 649 | } |
19d36ccd | 650 | |
e587cadd MD |
651 | /** |
652 | * text_poke_early - Update instructions on a live kernel at boot time | |
653 | * @addr: address to modify | |
654 | * @opcode: source of the copy | |
655 | * @len: length to copy | |
656 | * | |
19d36ccd AK |
657 | * When you use this code to patch more than one byte of an instruction |
658 | * you need to make sure that other CPUs cannot execute this code in parallel. | |
e587cadd MD |
659 | * Also no thread must be currently preempted in the middle of these |
660 | * instructions. And on the local CPU you need to be protected again NMI or MCE | |
661 | * handlers seeing an inconsistent instruction while you patch. | |
19d36ccd | 662 | */ |
fa6f2cc7 | 663 | void *__init_or_module text_poke_early(void *addr, const void *opcode, |
8b5a10fc | 664 | size_t len) |
19d36ccd | 665 | { |
e587cadd MD |
666 | unsigned long flags; |
667 | local_irq_save(flags); | |
19d36ccd | 668 | memcpy(addr, opcode, len); |
e587cadd | 669 | sync_core(); |
5367b688 | 670 | local_irq_restore(flags); |
e587cadd MD |
671 | /* Could also do a CLFLUSH here to speed up CPU recovery; but |
672 | that causes hangs on some VIA CPUs. */ | |
673 | return addr; | |
674 | } | |
675 | ||
676 | /** | |
677 | * text_poke - Update instructions on a live kernel | |
678 | * @addr: address to modify | |
679 | * @opcode: source of the copy | |
680 | * @len: length to copy | |
681 | * | |
682 | * Only atomic text poke/set should be allowed when not doing early patching. | |
683 | * It means the size must be writable atomically and the address must be aligned | |
684 | * in a way that permits an atomic write. It also makes sure we fit on a single | |
685 | * page. | |
78ff7fae MH |
686 | * |
687 | * Note: Must be called under text_mutex. | |
e587cadd | 688 | */ |
9c54b616 | 689 | void *text_poke(void *addr, const void *opcode, size_t len) |
e587cadd | 690 | { |
78ff7fae | 691 | unsigned long flags; |
e587cadd | 692 | char *vaddr; |
b7b66baa MD |
693 | struct page *pages[2]; |
694 | int i; | |
e587cadd | 695 | |
b7b66baa MD |
696 | if (!core_kernel_text((unsigned long)addr)) { |
697 | pages[0] = vmalloc_to_page(addr); | |
698 | pages[1] = vmalloc_to_page(addr + PAGE_SIZE); | |
15a601eb | 699 | } else { |
b7b66baa | 700 | pages[0] = virt_to_page(addr); |
00c6b2d5 | 701 | WARN_ON(!PageReserved(pages[0])); |
b7b66baa | 702 | pages[1] = virt_to_page(addr + PAGE_SIZE); |
e587cadd | 703 | } |
b7b66baa | 704 | BUG_ON(!pages[0]); |
7cf49427 | 705 | local_irq_save(flags); |
78ff7fae MH |
706 | set_fixmap(FIX_TEXT_POKE0, page_to_phys(pages[0])); |
707 | if (pages[1]) | |
708 | set_fixmap(FIX_TEXT_POKE1, page_to_phys(pages[1])); | |
709 | vaddr = (char *)fix_to_virt(FIX_TEXT_POKE0); | |
b7b66baa | 710 | memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len); |
78ff7fae MH |
711 | clear_fixmap(FIX_TEXT_POKE0); |
712 | if (pages[1]) | |
713 | clear_fixmap(FIX_TEXT_POKE1); | |
714 | local_flush_tlb(); | |
19d36ccd | 715 | sync_core(); |
a534b679 AK |
716 | /* Could also do a CLFLUSH here to speed up CPU recovery; but |
717 | that causes hangs on some VIA CPUs. */ | |
b7b66baa MD |
718 | for (i = 0; i < len; i++) |
719 | BUG_ON(((char *)addr)[i] != ((char *)opcode)[i]); | |
7cf49427 | 720 | local_irq_restore(flags); |
e587cadd | 721 | return addr; |
19d36ccd | 722 | } |
3d55cc8a | 723 | |
fd4363ff JK |
724 | static void do_sync_core(void *info) |
725 | { | |
726 | sync_core(); | |
727 | } | |
728 | ||
729 | static bool bp_patching_in_progress; | |
730 | static void *bp_int3_handler, *bp_int3_addr; | |
731 | ||
17f41571 | 732 | int poke_int3_handler(struct pt_regs *regs) |
fd4363ff | 733 | { |
fd4363ff JK |
734 | /* bp_patching_in_progress */ |
735 | smp_rmb(); | |
736 | ||
737 | if (likely(!bp_patching_in_progress)) | |
17f41571 | 738 | return 0; |
fd4363ff | 739 | |
f39b6f0e | 740 | if (user_mode(regs) || regs->ip != (unsigned long)bp_int3_addr) |
17f41571 | 741 | return 0; |
fd4363ff JK |
742 | |
743 | /* set up the specified breakpoint handler */ | |
17f41571 JK |
744 | regs->ip = (unsigned long) bp_int3_handler; |
745 | ||
746 | return 1; | |
fd4363ff | 747 | |
fd4363ff | 748 | } |
17f41571 | 749 | |
fd4363ff JK |
750 | /** |
751 | * text_poke_bp() -- update instructions on live kernel on SMP | |
752 | * @addr: address to patch | |
753 | * @opcode: opcode of new instruction | |
754 | * @len: length to copy | |
755 | * @handler: address to jump to when the temporary breakpoint is hit | |
756 | * | |
757 | * Modify multi-byte instruction by using int3 breakpoint on SMP. | |
ea8596bb MH |
758 | * We completely avoid stop_machine() here, and achieve the |
759 | * synchronization using int3 breakpoint. | |
fd4363ff JK |
760 | * |
761 | * The way it is done: | |
762 | * - add a int3 trap to the address that will be patched | |
763 | * - sync cores | |
764 | * - update all but the first byte of the patched range | |
765 | * - sync cores | |
766 | * - replace the first byte (int3) by the first byte of | |
767 | * replacing opcode | |
768 | * - sync cores | |
769 | * | |
770 | * Note: must be called under text_mutex. | |
771 | */ | |
772 | void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) | |
773 | { | |
774 | unsigned char int3 = 0xcc; | |
775 | ||
776 | bp_int3_handler = handler; | |
777 | bp_int3_addr = (u8 *)addr + sizeof(int3); | |
778 | bp_patching_in_progress = true; | |
779 | /* | |
780 | * Corresponding read barrier in int3 notifier for | |
781 | * making sure the in_progress flags is correctly ordered wrt. | |
782 | * patching | |
783 | */ | |
784 | smp_wmb(); | |
785 | ||
786 | text_poke(addr, &int3, sizeof(int3)); | |
787 | ||
788 | on_each_cpu(do_sync_core, NULL, 1); | |
789 | ||
790 | if (len - sizeof(int3) > 0) { | |
791 | /* patch all but the first byte */ | |
792 | text_poke((char *)addr + sizeof(int3), | |
793 | (const char *) opcode + sizeof(int3), | |
794 | len - sizeof(int3)); | |
795 | /* | |
796 | * According to Intel, this core syncing is very likely | |
797 | * not necessary and we'd be safe even without it. But | |
798 | * better safe than sorry (plus there's not only Intel). | |
799 | */ | |
800 | on_each_cpu(do_sync_core, NULL, 1); | |
801 | } | |
802 | ||
803 | /* patch the first byte */ | |
804 | text_poke(addr, opcode, sizeof(int3)); | |
805 | ||
806 | on_each_cpu(do_sync_core, NULL, 1); | |
807 | ||
808 | bp_patching_in_progress = false; | |
809 | smp_wmb(); | |
810 | ||
811 | return addr; | |
812 | } | |
813 |