Commit | Line | Data |
---|---|---|
c767a54b JP |
1 | #define pr_fmt(fmt) "SMP alternatives: " fmt |
2 | ||
9a0b5817 | 3 | #include <linux/module.h> |
f6a57033 | 4 | #include <linux/sched.h> |
2f1dafe5 | 5 | #include <linux/mutex.h> |
9a0b5817 | 6 | #include <linux/list.h> |
8b5a10fc | 7 | #include <linux/stringify.h> |
19d36ccd AK |
8 | #include <linux/mm.h> |
9 | #include <linux/vmalloc.h> | |
3945dab4 | 10 | #include <linux/memory.h> |
3d55cc8a | 11 | #include <linux/stop_machine.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
fd4363ff | 13 | #include <linux/kdebug.h> |
9a0b5817 GH |
14 | #include <asm/alternative.h> |
15 | #include <asm/sections.h> | |
19d36ccd | 16 | #include <asm/pgtable.h> |
8f4e956b AK |
17 | #include <asm/mce.h> |
18 | #include <asm/nmi.h> | |
e587cadd | 19 | #include <asm/cacheflush.h> |
78ff7fae | 20 | #include <asm/tlbflush.h> |
e587cadd | 21 | #include <asm/io.h> |
78ff7fae | 22 | #include <asm/fixmap.h> |
9a0b5817 | 23 | |
ab144f5e AK |
24 | #define MAX_PATCH_LEN (255-1) |
25 | ||
8b5a10fc | 26 | static int __initdata_or_module debug_alternative; |
b7fb4af0 | 27 | |
d167a518 GH |
28 | static int __init debug_alt(char *str) |
29 | { | |
30 | debug_alternative = 1; | |
31 | return 1; | |
32 | } | |
d167a518 GH |
33 | __setup("debug-alternative", debug_alt); |
34 | ||
09488165 JB |
35 | static int noreplace_smp; |
36 | ||
b7fb4af0 JF |
37 | static int __init setup_noreplace_smp(char *str) |
38 | { | |
39 | noreplace_smp = 1; | |
40 | return 1; | |
41 | } | |
42 | __setup("noreplace-smp", setup_noreplace_smp); | |
43 | ||
959b4fdf | 44 | #ifdef CONFIG_PARAVIRT |
8b5a10fc | 45 | static int __initdata_or_module noreplace_paravirt = 0; |
959b4fdf JF |
46 | |
47 | static int __init setup_noreplace_paravirt(char *str) | |
48 | { | |
49 | noreplace_paravirt = 1; | |
50 | return 1; | |
51 | } | |
52 | __setup("noreplace-paravirt", setup_noreplace_paravirt); | |
53 | #endif | |
b7fb4af0 | 54 | |
c767a54b JP |
55 | #define DPRINTK(fmt, ...) \ |
56 | do { \ | |
57 | if (debug_alternative) \ | |
58 | printk(KERN_DEBUG fmt, ##__VA_ARGS__); \ | |
59 | } while (0) | |
d167a518 | 60 | |
dc326fca PA |
61 | /* |
62 | * Each GENERIC_NOPX is of X bytes, and defined as an array of bytes | |
63 | * that correspond to that nop. Getting from one nop to the next, we | |
64 | * add to the array the offset that is equal to the sum of all sizes of | |
65 | * nops preceding the one we are after. | |
66 | * | |
67 | * Note: The GENERIC_NOP5_ATOMIC is at the end, as it breaks the | |
68 | * nice symmetry of sizes of the previous nops. | |
69 | */ | |
8b5a10fc | 70 | #if defined(GENERIC_NOP1) && !defined(CONFIG_X86_64) |
dc326fca PA |
71 | static const unsigned char intelnops[] = |
72 | { | |
73 | GENERIC_NOP1, | |
74 | GENERIC_NOP2, | |
75 | GENERIC_NOP3, | |
76 | GENERIC_NOP4, | |
77 | GENERIC_NOP5, | |
78 | GENERIC_NOP6, | |
79 | GENERIC_NOP7, | |
80 | GENERIC_NOP8, | |
81 | GENERIC_NOP5_ATOMIC | |
82 | }; | |
83 | static const unsigned char * const intel_nops[ASM_NOP_MAX+2] = | |
84 | { | |
9a0b5817 GH |
85 | NULL, |
86 | intelnops, | |
87 | intelnops + 1, | |
88 | intelnops + 1 + 2, | |
89 | intelnops + 1 + 2 + 3, | |
90 | intelnops + 1 + 2 + 3 + 4, | |
91 | intelnops + 1 + 2 + 3 + 4 + 5, | |
92 | intelnops + 1 + 2 + 3 + 4 + 5 + 6, | |
93 | intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 94 | intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 95 | }; |
d167a518 GH |
96 | #endif |
97 | ||
98 | #ifdef K8_NOP1 | |
dc326fca PA |
99 | static const unsigned char k8nops[] = |
100 | { | |
101 | K8_NOP1, | |
102 | K8_NOP2, | |
103 | K8_NOP3, | |
104 | K8_NOP4, | |
105 | K8_NOP5, | |
106 | K8_NOP6, | |
107 | K8_NOP7, | |
108 | K8_NOP8, | |
109 | K8_NOP5_ATOMIC | |
110 | }; | |
111 | static const unsigned char * const k8_nops[ASM_NOP_MAX+2] = | |
112 | { | |
9a0b5817 GH |
113 | NULL, |
114 | k8nops, | |
115 | k8nops + 1, | |
116 | k8nops + 1 + 2, | |
117 | k8nops + 1 + 2 + 3, | |
118 | k8nops + 1 + 2 + 3 + 4, | |
119 | k8nops + 1 + 2 + 3 + 4 + 5, | |
120 | k8nops + 1 + 2 + 3 + 4 + 5 + 6, | |
121 | k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 122 | k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 123 | }; |
d167a518 GH |
124 | #endif |
125 | ||
8b5a10fc | 126 | #if defined(K7_NOP1) && !defined(CONFIG_X86_64) |
dc326fca PA |
127 | static const unsigned char k7nops[] = |
128 | { | |
129 | K7_NOP1, | |
130 | K7_NOP2, | |
131 | K7_NOP3, | |
132 | K7_NOP4, | |
133 | K7_NOP5, | |
134 | K7_NOP6, | |
135 | K7_NOP7, | |
136 | K7_NOP8, | |
137 | K7_NOP5_ATOMIC | |
138 | }; | |
139 | static const unsigned char * const k7_nops[ASM_NOP_MAX+2] = | |
140 | { | |
9a0b5817 GH |
141 | NULL, |
142 | k7nops, | |
143 | k7nops + 1, | |
144 | k7nops + 1 + 2, | |
145 | k7nops + 1 + 2 + 3, | |
146 | k7nops + 1 + 2 + 3 + 4, | |
147 | k7nops + 1 + 2 + 3 + 4 + 5, | |
148 | k7nops + 1 + 2 + 3 + 4 + 5 + 6, | |
149 | k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 150 | k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
9a0b5817 | 151 | }; |
d167a518 GH |
152 | #endif |
153 | ||
32c464f5 | 154 | #ifdef P6_NOP1 |
cb09cad4 | 155 | static const unsigned char p6nops[] = |
dc326fca PA |
156 | { |
157 | P6_NOP1, | |
158 | P6_NOP2, | |
159 | P6_NOP3, | |
160 | P6_NOP4, | |
161 | P6_NOP5, | |
162 | P6_NOP6, | |
163 | P6_NOP7, | |
164 | P6_NOP8, | |
165 | P6_NOP5_ATOMIC | |
166 | }; | |
167 | static const unsigned char * const p6_nops[ASM_NOP_MAX+2] = | |
168 | { | |
32c464f5 JB |
169 | NULL, |
170 | p6nops, | |
171 | p6nops + 1, | |
172 | p6nops + 1 + 2, | |
173 | p6nops + 1 + 2 + 3, | |
174 | p6nops + 1 + 2 + 3 + 4, | |
175 | p6nops + 1 + 2 + 3 + 4 + 5, | |
176 | p6nops + 1 + 2 + 3 + 4 + 5 + 6, | |
177 | p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7, | |
dc326fca | 178 | p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7 + 8, |
32c464f5 JB |
179 | }; |
180 | #endif | |
181 | ||
dc326fca | 182 | /* Initialize these to a safe default */ |
d167a518 | 183 | #ifdef CONFIG_X86_64 |
dc326fca PA |
184 | const unsigned char * const *ideal_nops = p6_nops; |
185 | #else | |
186 | const unsigned char * const *ideal_nops = intel_nops; | |
187 | #endif | |
d167a518 | 188 | |
dc326fca | 189 | void __init arch_init_ideal_nops(void) |
d167a518 | 190 | { |
dc326fca PA |
191 | switch (boot_cpu_data.x86_vendor) { |
192 | case X86_VENDOR_INTEL: | |
d8d9766c PA |
193 | /* |
194 | * Due to a decoder implementation quirk, some | |
195 | * specific Intel CPUs actually perform better with | |
196 | * the "k8_nops" than with the SDM-recommended NOPs. | |
197 | */ | |
198 | if (boot_cpu_data.x86 == 6 && | |
199 | boot_cpu_data.x86_model >= 0x0f && | |
200 | boot_cpu_data.x86_model != 0x1c && | |
201 | boot_cpu_data.x86_model != 0x26 && | |
202 | boot_cpu_data.x86_model != 0x27 && | |
203 | boot_cpu_data.x86_model < 0x30) { | |
204 | ideal_nops = k8_nops; | |
205 | } else if (boot_cpu_has(X86_FEATURE_NOPL)) { | |
dc326fca PA |
206 | ideal_nops = p6_nops; |
207 | } else { | |
208 | #ifdef CONFIG_X86_64 | |
209 | ideal_nops = k8_nops; | |
210 | #else | |
211 | ideal_nops = intel_nops; | |
212 | #endif | |
213 | } | |
d6250a3f | 214 | break; |
dc326fca PA |
215 | default: |
216 | #ifdef CONFIG_X86_64 | |
217 | ideal_nops = k8_nops; | |
218 | #else | |
219 | if (boot_cpu_has(X86_FEATURE_K8)) | |
220 | ideal_nops = k8_nops; | |
221 | else if (boot_cpu_has(X86_FEATURE_K7)) | |
222 | ideal_nops = k7_nops; | |
223 | else | |
224 | ideal_nops = intel_nops; | |
225 | #endif | |
226 | } | |
9a0b5817 GH |
227 | } |
228 | ||
ab144f5e | 229 | /* Use this to add nops to a buffer, then text_poke the whole buffer. */ |
8b5a10fc | 230 | static void __init_or_module add_nops(void *insns, unsigned int len) |
139ec7c4 | 231 | { |
139ec7c4 RR |
232 | while (len > 0) { |
233 | unsigned int noplen = len; | |
234 | if (noplen > ASM_NOP_MAX) | |
235 | noplen = ASM_NOP_MAX; | |
dc326fca | 236 | memcpy(insns, ideal_nops[noplen], noplen); |
139ec7c4 RR |
237 | insns += noplen; |
238 | len -= noplen; | |
239 | } | |
240 | } | |
241 | ||
d167a518 | 242 | extern struct alt_instr __alt_instructions[], __alt_instructions_end[]; |
5967ed87 | 243 | extern s32 __smp_locks[], __smp_locks_end[]; |
fa6f2cc7 | 244 | void *text_poke_early(void *addr, const void *opcode, size_t len); |
d167a518 | 245 | |
9a0b5817 GH |
246 | /* Replace instructions with better alternatives for this CPU type. |
247 | This runs before SMP is initialized to avoid SMP problems with | |
0d2eb44f | 248 | self modifying code. This implies that asymmetric systems where |
9a0b5817 GH |
249 | APs have less capabilities than the boot processor are not handled. |
250 | Tough. Make sure you disable such features by hand. */ | |
251 | ||
8b5a10fc JB |
252 | void __init_or_module apply_alternatives(struct alt_instr *start, |
253 | struct alt_instr *end) | |
9a0b5817 | 254 | { |
9a0b5817 | 255 | struct alt_instr *a; |
59e97e4d | 256 | u8 *instr, *replacement; |
1b1d9258 | 257 | u8 insnbuf[MAX_PATCH_LEN]; |
9a0b5817 | 258 | |
77bf90ed | 259 | DPRINTK("%s: alt table %p -> %p\n", __func__, start, end); |
50973133 FY |
260 | /* |
261 | * The scan order should be from start to end. A later scanned | |
262 | * alternative code can overwrite a previous scanned alternative code. | |
263 | * Some kernel functions (e.g. memcpy, memset, etc) use this order to | |
264 | * patch code. | |
265 | * | |
266 | * So be careful if you want to change the scan order to any other | |
267 | * order. | |
268 | */ | |
9a0b5817 | 269 | for (a = start; a < end; a++) { |
59e97e4d AL |
270 | instr = (u8 *)&a->instr_offset + a->instr_offset; |
271 | replacement = (u8 *)&a->repl_offset + a->repl_offset; | |
9a0b5817 | 272 | BUG_ON(a->replacementlen > a->instrlen); |
ab144f5e | 273 | BUG_ON(a->instrlen > sizeof(insnbuf)); |
65fc985b | 274 | BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32); |
9a0b5817 GH |
275 | if (!boot_cpu_has(a->cpuid)) |
276 | continue; | |
59e97e4d AL |
277 | |
278 | memcpy(insnbuf, replacement, a->replacementlen); | |
279 | ||
280 | /* 0xe8 is a relative jump; fix the offset. */ | |
281 | if (*insnbuf == 0xe8 && a->replacementlen == 5) | |
282 | *(s32 *)(insnbuf + 1) += replacement - instr; | |
283 | ||
284 | add_nops(insnbuf + a->replacementlen, | |
285 | a->instrlen - a->replacementlen); | |
286 | ||
e587cadd | 287 | text_poke_early(instr, insnbuf, a->instrlen); |
9a0b5817 GH |
288 | } |
289 | } | |
290 | ||
8ec4d41f GH |
291 | #ifdef CONFIG_SMP |
292 | ||
5967ed87 JB |
293 | static void alternatives_smp_lock(const s32 *start, const s32 *end, |
294 | u8 *text, u8 *text_end) | |
9a0b5817 | 295 | { |
5967ed87 | 296 | const s32 *poff; |
9a0b5817 | 297 | |
3945dab4 | 298 | mutex_lock(&text_mutex); |
5967ed87 JB |
299 | for (poff = start; poff < end; poff++) { |
300 | u8 *ptr = (u8 *)poff + *poff; | |
301 | ||
302 | if (!*poff || ptr < text || ptr >= text_end) | |
9a0b5817 | 303 | continue; |
f88f07e0 | 304 | /* turn DS segment override prefix into lock prefix */ |
d9c5841e PA |
305 | if (*ptr == 0x3e) |
306 | text_poke(ptr, ((unsigned char []){0xf0}), 1); | |
4b8073e4 | 307 | } |
3945dab4 | 308 | mutex_unlock(&text_mutex); |
9a0b5817 GH |
309 | } |
310 | ||
5967ed87 JB |
311 | static void alternatives_smp_unlock(const s32 *start, const s32 *end, |
312 | u8 *text, u8 *text_end) | |
9a0b5817 | 313 | { |
5967ed87 | 314 | const s32 *poff; |
9a0b5817 | 315 | |
3945dab4 | 316 | mutex_lock(&text_mutex); |
5967ed87 JB |
317 | for (poff = start; poff < end; poff++) { |
318 | u8 *ptr = (u8 *)poff + *poff; | |
319 | ||
320 | if (!*poff || ptr < text || ptr >= text_end) | |
9a0b5817 | 321 | continue; |
f88f07e0 | 322 | /* turn lock prefix into DS segment override prefix */ |
d9c5841e PA |
323 | if (*ptr == 0xf0) |
324 | text_poke(ptr, ((unsigned char []){0x3E}), 1); | |
4b8073e4 | 325 | } |
3945dab4 | 326 | mutex_unlock(&text_mutex); |
9a0b5817 GH |
327 | } |
328 | ||
329 | struct smp_alt_module { | |
330 | /* what is this ??? */ | |
331 | struct module *mod; | |
332 | char *name; | |
333 | ||
334 | /* ptrs to lock prefixes */ | |
5967ed87 JB |
335 | const s32 *locks; |
336 | const s32 *locks_end; | |
9a0b5817 GH |
337 | |
338 | /* .text segment, needed to avoid patching init code ;) */ | |
339 | u8 *text; | |
340 | u8 *text_end; | |
341 | ||
342 | struct list_head next; | |
343 | }; | |
344 | static LIST_HEAD(smp_alt_modules); | |
2f1dafe5 | 345 | static DEFINE_MUTEX(smp_alt); |
816afe4f | 346 | static bool uniproc_patched = false; /* protected by smp_alt */ |
9a0b5817 | 347 | |
8b5a10fc JB |
348 | void __init_or_module alternatives_smp_module_add(struct module *mod, |
349 | char *name, | |
350 | void *locks, void *locks_end, | |
351 | void *text, void *text_end) | |
9a0b5817 GH |
352 | { |
353 | struct smp_alt_module *smp; | |
9a0b5817 | 354 | |
816afe4f RR |
355 | mutex_lock(&smp_alt); |
356 | if (!uniproc_patched) | |
357 | goto unlock; | |
b7fb4af0 | 358 | |
816afe4f RR |
359 | if (num_possible_cpus() == 1) |
360 | /* Don't bother remembering, we'll never have to undo it. */ | |
361 | goto smp_unlock; | |
9a0b5817 GH |
362 | |
363 | smp = kzalloc(sizeof(*smp), GFP_KERNEL); | |
364 | if (NULL == smp) | |
816afe4f RR |
365 | /* we'll run the (safe but slow) SMP code then ... */ |
366 | goto unlock; | |
9a0b5817 GH |
367 | |
368 | smp->mod = mod; | |
369 | smp->name = name; | |
370 | smp->locks = locks; | |
371 | smp->locks_end = locks_end; | |
372 | smp->text = text; | |
373 | smp->text_end = text_end; | |
374 | DPRINTK("%s: locks %p -> %p, text %p -> %p, name %s\n", | |
77bf90ed | 375 | __func__, smp->locks, smp->locks_end, |
9a0b5817 GH |
376 | smp->text, smp->text_end, smp->name); |
377 | ||
9a0b5817 | 378 | list_add_tail(&smp->next, &smp_alt_modules); |
816afe4f RR |
379 | smp_unlock: |
380 | alternatives_smp_unlock(locks, locks_end, text, text_end); | |
381 | unlock: | |
2f1dafe5 | 382 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
383 | } |
384 | ||
8b5a10fc | 385 | void __init_or_module alternatives_smp_module_del(struct module *mod) |
9a0b5817 GH |
386 | { |
387 | struct smp_alt_module *item; | |
9a0b5817 | 388 | |
2f1dafe5 | 389 | mutex_lock(&smp_alt); |
9a0b5817 GH |
390 | list_for_each_entry(item, &smp_alt_modules, next) { |
391 | if (mod != item->mod) | |
392 | continue; | |
393 | list_del(&item->next); | |
9a0b5817 | 394 | kfree(item); |
816afe4f | 395 | break; |
9a0b5817 | 396 | } |
2f1dafe5 | 397 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
398 | } |
399 | ||
816afe4f | 400 | void alternatives_enable_smp(void) |
9a0b5817 GH |
401 | { |
402 | struct smp_alt_module *mod; | |
9a0b5817 | 403 | |
816afe4f RR |
404 | /* Why bother if there are no other CPUs? */ |
405 | BUG_ON(num_possible_cpus() == 1); | |
9a0b5817 | 406 | |
2f1dafe5 | 407 | mutex_lock(&smp_alt); |
ca74a6f8 | 408 | |
816afe4f | 409 | if (uniproc_patched) { |
c767a54b | 410 | pr_info("switching to SMP code\n"); |
816afe4f | 411 | BUG_ON(num_online_cpus() != 1); |
53756d37 JF |
412 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_UP); |
413 | clear_cpu_cap(&cpu_data(0), X86_FEATURE_UP); | |
9a0b5817 GH |
414 | list_for_each_entry(mod, &smp_alt_modules, next) |
415 | alternatives_smp_lock(mod->locks, mod->locks_end, | |
416 | mod->text, mod->text_end); | |
816afe4f | 417 | uniproc_patched = false; |
9a0b5817 | 418 | } |
2f1dafe5 | 419 | mutex_unlock(&smp_alt); |
9a0b5817 GH |
420 | } |
421 | ||
2cfa1978 MH |
422 | /* Return 1 if the address range is reserved for smp-alternatives */ |
423 | int alternatives_text_reserved(void *start, void *end) | |
424 | { | |
425 | struct smp_alt_module *mod; | |
5967ed87 | 426 | const s32 *poff; |
076dc4a6 MH |
427 | u8 *text_start = start; |
428 | u8 *text_end = end; | |
2cfa1978 MH |
429 | |
430 | list_for_each_entry(mod, &smp_alt_modules, next) { | |
076dc4a6 | 431 | if (mod->text > text_end || mod->text_end < text_start) |
2cfa1978 | 432 | continue; |
5967ed87 JB |
433 | for (poff = mod->locks; poff < mod->locks_end; poff++) { |
434 | const u8 *ptr = (const u8 *)poff + *poff; | |
435 | ||
436 | if (text_start <= ptr && text_end > ptr) | |
2cfa1978 | 437 | return 1; |
5967ed87 | 438 | } |
2cfa1978 MH |
439 | } |
440 | ||
441 | return 0; | |
442 | } | |
8ec4d41f GH |
443 | #endif |
444 | ||
139ec7c4 | 445 | #ifdef CONFIG_PARAVIRT |
8b5a10fc JB |
446 | void __init_or_module apply_paravirt(struct paravirt_patch_site *start, |
447 | struct paravirt_patch_site *end) | |
139ec7c4 | 448 | { |
98de032b | 449 | struct paravirt_patch_site *p; |
ab144f5e | 450 | char insnbuf[MAX_PATCH_LEN]; |
139ec7c4 | 451 | |
959b4fdf JF |
452 | if (noreplace_paravirt) |
453 | return; | |
454 | ||
139ec7c4 RR |
455 | for (p = start; p < end; p++) { |
456 | unsigned int used; | |
457 | ||
ab144f5e | 458 | BUG_ON(p->len > MAX_PATCH_LEN); |
d34fda4a CW |
459 | /* prep the buffer with the original instructions */ |
460 | memcpy(insnbuf, p->instr, p->len); | |
93b1eab3 JF |
461 | used = pv_init_ops.patch(p->instrtype, p->clobbers, insnbuf, |
462 | (unsigned long)p->instr, p->len); | |
7f63c41c | 463 | |
63f70270 JF |
464 | BUG_ON(used > p->len); |
465 | ||
139ec7c4 | 466 | /* Pad the rest with nops */ |
ab144f5e | 467 | add_nops(insnbuf + used, p->len - used); |
e587cadd | 468 | text_poke_early(p->instr, insnbuf, p->len); |
139ec7c4 | 469 | } |
139ec7c4 | 470 | } |
98de032b | 471 | extern struct paravirt_patch_site __start_parainstructions[], |
139ec7c4 RR |
472 | __stop_parainstructions[]; |
473 | #endif /* CONFIG_PARAVIRT */ | |
474 | ||
9a0b5817 GH |
475 | void __init alternative_instructions(void) |
476 | { | |
8f4e956b AK |
477 | /* The patching is not fully atomic, so try to avoid local interruptions |
478 | that might execute the to be patched code. | |
479 | Other CPUs are not running. */ | |
480 | stop_nmi(); | |
123aa76e AK |
481 | |
482 | /* | |
483 | * Don't stop machine check exceptions while patching. | |
484 | * MCEs only happen when something got corrupted and in this | |
485 | * case we must do something about the corruption. | |
486 | * Ignoring it is worse than a unlikely patching race. | |
487 | * Also machine checks tend to be broadcast and if one CPU | |
488 | * goes into machine check the others follow quickly, so we don't | |
489 | * expect a machine check to cause undue problems during to code | |
490 | * patching. | |
491 | */ | |
8f4e956b | 492 | |
9a0b5817 GH |
493 | apply_alternatives(__alt_instructions, __alt_instructions_end); |
494 | ||
8ec4d41f | 495 | #ifdef CONFIG_SMP |
816afe4f RR |
496 | /* Patch to UP if other cpus not imminent. */ |
497 | if (!noreplace_smp && (num_present_cpus() == 1 || setup_max_cpus <= 1)) { | |
498 | uniproc_patched = true; | |
9a0b5817 GH |
499 | alternatives_smp_module_add(NULL, "core kernel", |
500 | __smp_locks, __smp_locks_end, | |
501 | _text, _etext); | |
9a0b5817 | 502 | } |
8f4e956b | 503 | |
816afe4f | 504 | if (!uniproc_patched || num_possible_cpus() == 1) |
f68fd5f4 FW |
505 | free_init_pages("SMP alternatives", |
506 | (unsigned long)__smp_locks, | |
507 | (unsigned long)__smp_locks_end); | |
816afe4f RR |
508 | #endif |
509 | ||
510 | apply_paravirt(__parainstructions, __parainstructions_end); | |
f68fd5f4 | 511 | |
8f4e956b | 512 | restart_nmi(); |
9a0b5817 | 513 | } |
19d36ccd | 514 | |
e587cadd MD |
515 | /** |
516 | * text_poke_early - Update instructions on a live kernel at boot time | |
517 | * @addr: address to modify | |
518 | * @opcode: source of the copy | |
519 | * @len: length to copy | |
520 | * | |
19d36ccd AK |
521 | * When you use this code to patch more than one byte of an instruction |
522 | * you need to make sure that other CPUs cannot execute this code in parallel. | |
e587cadd MD |
523 | * Also no thread must be currently preempted in the middle of these |
524 | * instructions. And on the local CPU you need to be protected again NMI or MCE | |
525 | * handlers seeing an inconsistent instruction while you patch. | |
19d36ccd | 526 | */ |
fa6f2cc7 | 527 | void *__init_or_module text_poke_early(void *addr, const void *opcode, |
8b5a10fc | 528 | size_t len) |
19d36ccd | 529 | { |
e587cadd MD |
530 | unsigned long flags; |
531 | local_irq_save(flags); | |
19d36ccd | 532 | memcpy(addr, opcode, len); |
e587cadd | 533 | sync_core(); |
5367b688 | 534 | local_irq_restore(flags); |
e587cadd MD |
535 | /* Could also do a CLFLUSH here to speed up CPU recovery; but |
536 | that causes hangs on some VIA CPUs. */ | |
537 | return addr; | |
538 | } | |
539 | ||
540 | /** | |
541 | * text_poke - Update instructions on a live kernel | |
542 | * @addr: address to modify | |
543 | * @opcode: source of the copy | |
544 | * @len: length to copy | |
545 | * | |
546 | * Only atomic text poke/set should be allowed when not doing early patching. | |
547 | * It means the size must be writable atomically and the address must be aligned | |
548 | * in a way that permits an atomic write. It also makes sure we fit on a single | |
549 | * page. | |
78ff7fae MH |
550 | * |
551 | * Note: Must be called under text_mutex. | |
e587cadd | 552 | */ |
9c54b616 | 553 | void *text_poke(void *addr, const void *opcode, size_t len) |
e587cadd | 554 | { |
78ff7fae | 555 | unsigned long flags; |
e587cadd | 556 | char *vaddr; |
b7b66baa MD |
557 | struct page *pages[2]; |
558 | int i; | |
e587cadd | 559 | |
b7b66baa MD |
560 | if (!core_kernel_text((unsigned long)addr)) { |
561 | pages[0] = vmalloc_to_page(addr); | |
562 | pages[1] = vmalloc_to_page(addr + PAGE_SIZE); | |
15a601eb | 563 | } else { |
b7b66baa | 564 | pages[0] = virt_to_page(addr); |
00c6b2d5 | 565 | WARN_ON(!PageReserved(pages[0])); |
b7b66baa | 566 | pages[1] = virt_to_page(addr + PAGE_SIZE); |
e587cadd | 567 | } |
b7b66baa | 568 | BUG_ON(!pages[0]); |
7cf49427 | 569 | local_irq_save(flags); |
78ff7fae MH |
570 | set_fixmap(FIX_TEXT_POKE0, page_to_phys(pages[0])); |
571 | if (pages[1]) | |
572 | set_fixmap(FIX_TEXT_POKE1, page_to_phys(pages[1])); | |
573 | vaddr = (char *)fix_to_virt(FIX_TEXT_POKE0); | |
b7b66baa | 574 | memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len); |
78ff7fae MH |
575 | clear_fixmap(FIX_TEXT_POKE0); |
576 | if (pages[1]) | |
577 | clear_fixmap(FIX_TEXT_POKE1); | |
578 | local_flush_tlb(); | |
19d36ccd | 579 | sync_core(); |
a534b679 AK |
580 | /* Could also do a CLFLUSH here to speed up CPU recovery; but |
581 | that causes hangs on some VIA CPUs. */ | |
b7b66baa MD |
582 | for (i = 0; i < len; i++) |
583 | BUG_ON(((char *)addr)[i] != ((char *)opcode)[i]); | |
7cf49427 | 584 | local_irq_restore(flags); |
e587cadd | 585 | return addr; |
19d36ccd | 586 | } |
3d55cc8a | 587 | |
fd4363ff JK |
588 | static void do_sync_core(void *info) |
589 | { | |
590 | sync_core(); | |
591 | } | |
592 | ||
593 | static bool bp_patching_in_progress; | |
594 | static void *bp_int3_handler, *bp_int3_addr; | |
595 | ||
17f41571 | 596 | int poke_int3_handler(struct pt_regs *regs) |
fd4363ff | 597 | { |
fd4363ff JK |
598 | /* bp_patching_in_progress */ |
599 | smp_rmb(); | |
600 | ||
601 | if (likely(!bp_patching_in_progress)) | |
17f41571 | 602 | return 0; |
fd4363ff | 603 | |
17f41571 JK |
604 | if (user_mode_vm(regs) || regs->ip != (unsigned long)bp_int3_addr) |
605 | return 0; | |
fd4363ff JK |
606 | |
607 | /* set up the specified breakpoint handler */ | |
17f41571 JK |
608 | regs->ip = (unsigned long) bp_int3_handler; |
609 | ||
610 | return 1; | |
fd4363ff | 611 | |
fd4363ff | 612 | } |
17f41571 | 613 | |
fd4363ff JK |
614 | /** |
615 | * text_poke_bp() -- update instructions on live kernel on SMP | |
616 | * @addr: address to patch | |
617 | * @opcode: opcode of new instruction | |
618 | * @len: length to copy | |
619 | * @handler: address to jump to when the temporary breakpoint is hit | |
620 | * | |
621 | * Modify multi-byte instruction by using int3 breakpoint on SMP. | |
ea8596bb MH |
622 | * We completely avoid stop_machine() here, and achieve the |
623 | * synchronization using int3 breakpoint. | |
fd4363ff JK |
624 | * |
625 | * The way it is done: | |
626 | * - add a int3 trap to the address that will be patched | |
627 | * - sync cores | |
628 | * - update all but the first byte of the patched range | |
629 | * - sync cores | |
630 | * - replace the first byte (int3) by the first byte of | |
631 | * replacing opcode | |
632 | * - sync cores | |
633 | * | |
634 | * Note: must be called under text_mutex. | |
635 | */ | |
636 | void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) | |
637 | { | |
638 | unsigned char int3 = 0xcc; | |
639 | ||
640 | bp_int3_handler = handler; | |
641 | bp_int3_addr = (u8 *)addr + sizeof(int3); | |
642 | bp_patching_in_progress = true; | |
643 | /* | |
644 | * Corresponding read barrier in int3 notifier for | |
645 | * making sure the in_progress flags is correctly ordered wrt. | |
646 | * patching | |
647 | */ | |
648 | smp_wmb(); | |
649 | ||
650 | text_poke(addr, &int3, sizeof(int3)); | |
651 | ||
652 | on_each_cpu(do_sync_core, NULL, 1); | |
653 | ||
654 | if (len - sizeof(int3) > 0) { | |
655 | /* patch all but the first byte */ | |
656 | text_poke((char *)addr + sizeof(int3), | |
657 | (const char *) opcode + sizeof(int3), | |
658 | len - sizeof(int3)); | |
659 | /* | |
660 | * According to Intel, this core syncing is very likely | |
661 | * not necessary and we'd be safe even without it. But | |
662 | * better safe than sorry (plus there's not only Intel). | |
663 | */ | |
664 | on_each_cpu(do_sync_core, NULL, 1); | |
665 | } | |
666 | ||
667 | /* patch the first byte */ | |
668 | text_poke(addr, opcode, sizeof(int3)); | |
669 | ||
670 | on_each_cpu(do_sync_core, NULL, 1); | |
671 | ||
672 | bp_patching_in_progress = false; | |
673 | smp_wmb(); | |
674 | ||
675 | return addr; | |
676 | } | |
677 |