Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / x86 / kernel / cpu / mcheck / therm_throt.c
CommitLineData
15d5f839 1/*
3222b36f
DZ
2 * Thermal throttle event support code (such as syslog messaging and rate
3 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
cb6f3c15 4 *
3222b36f
DZ
5 * This allows consistent reporting of CPU thermal throttle events.
6 *
7 * Maintains a counter in /sys that keeps track of the number of thermal
8 * events, such that the user knows how bad the thermal problem might be
9 * (since the logging to syslog and mcelog is rate limited).
15d5f839
DZ
10 *
11 * Author: Dmitriy Zavin (dmitriyz@google.com)
12 *
13 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
3222b36f 14 * Inspired by Ross Biro's and Al Borchers' counter code.
15d5f839 15 */
a65c88dd 16#include <linux/interrupt.h>
cb6f3c15
IM
17#include <linux/notifier.h>
18#include <linux/jiffies.h>
895287c0 19#include <linux/kernel.h>
15d5f839 20#include <linux/percpu.h>
3222b36f 21#include <linux/sysdev.h>
895287c0
HS
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/smp.h>
15d5f839 25#include <linux/cpu.h>
cb6f3c15 26
895287c0
HS
27#include <asm/processor.h>
28#include <asm/system.h>
29#include <asm/apic.h>
a65c88dd
HS
30#include <asm/idle.h>
31#include <asm/mce.h>
895287c0 32#include <asm/msr.h>
15d5f839
DZ
33
34/* How long to wait between reporting thermal events */
cb6f3c15 35#define CHECK_INTERVAL (300 * HZ)
15d5f839 36
0199114c
FY
37#define THERMAL_THROTTLING_EVENT 0
38#define POWER_LIMIT_EVENT 1
39
39676840 40/*
0199114c 41 * Current thermal event state:
39676840 42 */
55d435a2 43struct _thermal_state {
0199114c
FY
44 bool new_event;
45 int event;
39676840 46 u64 next_check;
0199114c
FY
47 unsigned long count;
48 unsigned long last_count;
39676840 49};
cb6f3c15 50
55d435a2 51struct thermal_state {
0199114c
FY
52 struct _thermal_state core_throttle;
53 struct _thermal_state core_power_limit;
54 struct _thermal_state package_throttle;
55 struct _thermal_state package_power_limit;
55d435a2
FY
56};
57
39676840
IM
58static DEFINE_PER_CPU(struct thermal_state, thermal_state);
59
60static atomic_t therm_throt_en = ATOMIC_INIT(0);
3222b36f 61
a2202aa2
YW
62static u32 lvtthmr_init __read_mostly;
63
3222b36f 64#ifdef CONFIG_SYSFS
cb6f3c15 65#define define_therm_throt_sysdev_one_ro(_name) \
55d435a2
FY
66 static SYSDEV_ATTR(_name, 0444, \
67 therm_throt_sysdev_show_##_name, \
68 NULL) \
cb6f3c15 69
0199114c 70#define define_therm_throt_sysdev_show_func(event, name) \
39676840 71 \
0199114c 72static ssize_t therm_throt_sysdev_show_##event##_##name( \
39676840
IM
73 struct sys_device *dev, \
74 struct sysdev_attribute *attr, \
75 char *buf) \
cb6f3c15
IM
76{ \
77 unsigned int cpu = dev->id; \
78 ssize_t ret; \
79 \
80 preempt_disable(); /* CPU hotplug */ \
55d435a2 81 if (cpu_online(cpu)) { \
cb6f3c15 82 ret = sprintf(buf, "%lu\n", \
0199114c 83 per_cpu(thermal_state, cpu).event.name); \
55d435a2 84 } else \
cb6f3c15
IM
85 ret = 0; \
86 preempt_enable(); \
87 \
88 return ret; \
3222b36f
DZ
89}
90
0199114c 91define_therm_throt_sysdev_show_func(core_throttle, count);
55d435a2
FY
92define_therm_throt_sysdev_one_ro(core_throttle_count);
93
0199114c
FY
94define_therm_throt_sysdev_show_func(core_power_limit, count);
95define_therm_throt_sysdev_one_ro(core_power_limit_count);
96
97define_therm_throt_sysdev_show_func(package_throttle, count);
55d435a2 98define_therm_throt_sysdev_one_ro(package_throttle_count);
3222b36f 99
0199114c
FY
100define_therm_throt_sysdev_show_func(package_power_limit, count);
101define_therm_throt_sysdev_one_ro(package_power_limit_count);
102
3222b36f 103static struct attribute *thermal_throttle_attrs[] = {
55d435a2 104 &attr_core_throttle_count.attr,
3222b36f
DZ
105 NULL
106};
107
0199114c 108static struct attribute_group thermal_attr_group = {
cb6f3c15
IM
109 .attrs = thermal_throttle_attrs,
110 .name = "thermal_throttle"
3222b36f
DZ
111};
112#endif /* CONFIG_SYSFS */
15d5f839 113
0199114c
FY
114#define CORE_LEVEL 0
115#define PACKAGE_LEVEL 1
116
15d5f839 117/***
3222b36f 118 * therm_throt_process - Process thermal throttling event from interrupt
15d5f839
DZ
119 * @curr: Whether the condition is current or not (boolean), since the
120 * thermal interrupt normally gets called both when the thermal
121 * event begins and once the event has ended.
122 *
3222b36f 123 * This function is called by the thermal interrupt after the
15d5f839
DZ
124 * IRQ has been acknowledged.
125 *
126 * It will take care of rate limiting and printing messages to the syslog.
127 *
128 * Returns: 0 : Event should NOT be further logged, i.e. still in
129 * "timeout" from previous log message.
130 * 1 : Event should be logged further, and a message has been
131 * printed to the syslog.
132 */
0199114c 133static int therm_throt_process(bool new_event, int event, int level)
15d5f839 134{
55d435a2 135 struct _thermal_state *state;
0199114c
FY
136 unsigned int this_cpu = smp_processor_id();
137 bool old_event;
39676840 138 u64 now;
0199114c 139 struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
39676840 140
39676840 141 now = get_jiffies_64();
0199114c
FY
142 if (level == CORE_LEVEL) {
143 if (event == THERMAL_THROTTLING_EVENT)
144 state = &pstate->core_throttle;
145 else if (event == POWER_LIMIT_EVENT)
146 state = &pstate->core_power_limit;
147 else
148 return 0;
149 } else if (level == PACKAGE_LEVEL) {
150 if (event == THERMAL_THROTTLING_EVENT)
151 state = &pstate->package_throttle;
152 else if (event == POWER_LIMIT_EVENT)
153 state = &pstate->package_power_limit;
154 else
155 return 0;
156 } else
157 return 0;
39676840 158
0199114c
FY
159 old_event = state->new_event;
160 state->new_event = new_event;
15d5f839 161
0199114c
FY
162 if (new_event)
163 state->count++;
3222b36f 164
b417c9fd 165 if (time_before64(now, state->next_check) &&
0199114c 166 state->count != state->last_count)
15d5f839
DZ
167 return 0;
168
39676840 169 state->next_check = now + CHECK_INTERVAL;
0199114c 170 state->last_count = state->count;
15d5f839
DZ
171
172 /* if we just entered the thermal event */
0199114c
FY
173 if (new_event) {
174 if (event == THERMAL_THROTTLING_EVENT)
175 printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
176 this_cpu,
177 level == CORE_LEVEL ? "Core" : "Package",
178 state->count);
179 else
180 printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
181 this_cpu,
182 level == CORE_LEVEL ? "Core" : "Package",
183 state->count);
3222b36f 184
15d5f839 185 add_taint(TAINT_MACHINE_CHECK);
4e5c25d4
HD
186 return 1;
187 }
0199114c
FY
188 if (old_event) {
189 if (event == THERMAL_THROTTLING_EVENT)
190 printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
191 this_cpu,
192 level == CORE_LEVEL ? "Core" : "Package");
193 else
194 printk(KERN_INFO "CPU%d: %s power limit normal\n",
195 this_cpu,
196 level == CORE_LEVEL ? "Core" : "Package");
4e5c25d4 197 return 1;
15d5f839
DZ
198 }
199
4e5c25d4 200 return 0;
15d5f839 201}
3222b36f
DZ
202
203#ifdef CONFIG_SYSFS
cb6f3c15 204/* Add/Remove thermal_throttle interface for CPU device: */
6569345a 205static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev)
3222b36f 206{
55d435a2
FY
207 int err;
208 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
209
0199114c 210 err = sysfs_create_group(&sys_dev->kobj, &thermal_attr_group);
55d435a2
FY
211 if (err)
212 return err;
213
0199114c
FY
214 if (cpu_has(c, X86_FEATURE_PLN))
215 err = sysfs_add_file_to_group(&sys_dev->kobj,
216 &attr_core_power_limit_count.attr,
217 thermal_attr_group.name);
55d435a2
FY
218 if (cpu_has(c, X86_FEATURE_PTS))
219 err = sysfs_add_file_to_group(&sys_dev->kobj,
220 &attr_package_throttle_count.attr,
0199114c
FY
221 thermal_attr_group.name);
222 if (cpu_has(c, X86_FEATURE_PLN))
223 err = sysfs_add_file_to_group(&sys_dev->kobj,
224 &attr_package_power_limit_count.attr,
225 thermal_attr_group.name);
55d435a2
FY
226
227 return err;
3222b36f
DZ
228}
229
6569345a 230static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
3222b36f 231{
0199114c 232 sysfs_remove_group(&sys_dev->kobj, &thermal_attr_group);
3222b36f
DZ
233}
234
cb6f3c15 235/* Mutex protecting device creation against CPU hotplug: */
3222b36f
DZ
236static DEFINE_MUTEX(therm_cpu_lock);
237
238/* Get notified when a cpu comes on/off. Be hotplug friendly. */
cb6f3c15
IM
239static __cpuinit int
240thermal_throttle_cpu_callback(struct notifier_block *nfb,
241 unsigned long action,
242 void *hcpu)
3222b36f
DZ
243{
244 unsigned int cpu = (unsigned long)hcpu;
245 struct sys_device *sys_dev;
c7e38a9c 246 int err = 0;
3222b36f
DZ
247
248 sys_dev = get_cpu_sysdev(cpu);
cb6f3c15 249
3222b36f 250 switch (action) {
c7e38a9c
AM
251 case CPU_UP_PREPARE:
252 case CPU_UP_PREPARE_FROZEN:
38ef6d19 253 mutex_lock(&therm_cpu_lock);
6569345a 254 err = thermal_throttle_add_dev(sys_dev);
38ef6d19 255 mutex_unlock(&therm_cpu_lock);
6569345a 256 WARN_ON(err);
3222b36f 257 break;
c7e38a9c
AM
258 case CPU_UP_CANCELED:
259 case CPU_UP_CANCELED_FROZEN:
3222b36f 260 case CPU_DEAD:
8bb78442 261 case CPU_DEAD_FROZEN:
38ef6d19 262 mutex_lock(&therm_cpu_lock);
3222b36f 263 thermal_throttle_remove_dev(sys_dev);
38ef6d19 264 mutex_unlock(&therm_cpu_lock);
3222b36f
DZ
265 break;
266 }
a94247e7 267 return notifier_from_errno(err);
3222b36f
DZ
268}
269
25d1b516 270static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
3222b36f
DZ
271{
272 .notifier_call = thermal_throttle_cpu_callback,
273};
3222b36f
DZ
274
275static __init int thermal_throttle_init_device(void)
276{
277 unsigned int cpu = 0;
6569345a 278 int err;
3222b36f
DZ
279
280 if (!atomic_read(&therm_throt_en))
281 return 0;
282
283 register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
284
285#ifdef CONFIG_HOTPLUG_CPU
286 mutex_lock(&therm_cpu_lock);
287#endif
288 /* connect live CPUs to sysfs */
6569345a
SH
289 for_each_online_cpu(cpu) {
290 err = thermal_throttle_add_dev(get_cpu_sysdev(cpu));
291 WARN_ON(err);
292 }
3222b36f
DZ
293#ifdef CONFIG_HOTPLUG_CPU
294 mutex_unlock(&therm_cpu_lock);
295#endif
296
297 return 0;
298}
3222b36f 299device_initcall(thermal_throttle_init_device);
a65c88dd 300
3222b36f 301#endif /* CONFIG_SYSFS */
a65c88dd 302
0199114c
FY
303/*
304 * Set up the most two significant bit to notify mce log that this thermal
305 * event type.
306 * This is a temp solution. May be changed in the future with mce log
307 * infrasture.
308 */
309#define CORE_THROTTLED (0)
310#define CORE_POWER_LIMIT ((__u64)1 << 62)
311#define PACKAGE_THROTTLED ((__u64)2 << 62)
312#define PACKAGE_POWER_LIMIT ((__u64)3 << 62)
313
a65c88dd 314/* Thermal transition interrupt handler */
8363fc82 315static void intel_thermal_interrupt(void)
a65c88dd
HS
316{
317 __u64 msr_val;
55d435a2 318 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
a65c88dd
HS
319
320 rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
0199114c 321
55d435a2 322 if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
0199114c 323 THERMAL_THROTTLING_EVENT,
55d435a2 324 CORE_LEVEL) != 0)
0199114c
FY
325 mce_log_therm_throt_event(CORE_THROTTLED | msr_val);
326
327 if (cpu_has(c, X86_FEATURE_PLN))
328 if (therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
329 POWER_LIMIT_EVENT,
330 CORE_LEVEL) != 0)
331 mce_log_therm_throt_event(CORE_POWER_LIMIT | msr_val);
55d435a2
FY
332
333 if (cpu_has(c, X86_FEATURE_PTS)) {
334 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
335 if (therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
0199114c 336 THERMAL_THROTTLING_EVENT,
55d435a2 337 PACKAGE_LEVEL) != 0)
0199114c
FY
338 mce_log_therm_throt_event(PACKAGE_THROTTLED | msr_val);
339 if (cpu_has(c, X86_FEATURE_PLN))
340 if (therm_throt_process(msr_val &
341 PACKAGE_THERM_STATUS_POWER_LIMIT,
342 POWER_LIMIT_EVENT,
343 PACKAGE_LEVEL) != 0)
344 mce_log_therm_throt_event(PACKAGE_POWER_LIMIT
345 | msr_val);
55d435a2 346 }
a65c88dd
HS
347}
348
349static void unexpected_thermal_interrupt(void)
350{
351 printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",
352 smp_processor_id());
353 add_taint(TAINT_MACHINE_CHECK);
354}
355
356static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
357
358asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
359{
360 exit_idle();
361 irq_enter();
362 inc_irq_stat(irq_thermal_count);
363 smp_thermal_vector();
364 irq_exit();
365 /* Ack only at the end to avoid potential reentry */
366 ack_APIC_irq();
367}
368
70fe4407
HS
369/* Thermal monitoring depends on APIC, ACPI and clock modulation */
370static int intel_thermal_supported(struct cpuinfo_x86 *c)
371{
372 if (!cpu_has_apic)
373 return 0;
374 if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
375 return 0;
376 return 1;
377}
378
ce6b5d76 379void __init mcheck_intel_therm_init(void)
a2202aa2
YW
380{
381 /*
382 * This function is only called on boot CPU. Save the init thermal
383 * LVT value on BSP and use that value to restore APs' thermal LVT
384 * entry BIOS programmed later
385 */
70fe4407 386 if (intel_thermal_supported(&boot_cpu_data))
a2202aa2
YW
387 lvtthmr_init = apic_read(APIC_LVTTHMR);
388}
389
cffd377e 390void intel_init_thermal(struct cpuinfo_x86 *c)
895287c0
HS
391{
392 unsigned int cpu = smp_processor_id();
393 int tm2 = 0;
394 u32 l, h;
395
70fe4407 396 if (!intel_thermal_supported(c))
895287c0
HS
397 return;
398
399 /*
400 * First check if its enabled already, in which case there might
401 * be some SMM goo which handles it, so we can't even put a handler
402 * since it might be delivered via SMI already:
403 */
404 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
a2202aa2
YW
405
406 /*
407 * The initial value of thermal LVT entries on all APs always reads
408 * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
409 * sequence to them and LVT registers are reset to 0s except for
410 * the mask bits which are set to 1s when APs receive INIT IPI.
411 * Always restore the value that BIOS has programmed on AP based on
412 * BSP's info we saved since BIOS is always setting the same value
413 * for all threads/cores
414 */
415 apic_write(APIC_LVTTHMR, lvtthmr_init);
416
417 h = lvtthmr_init;
418
895287c0
HS
419 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
420 printk(KERN_DEBUG
421 "CPU%d: Thermal monitoring handled by SMI\n", cpu);
422 return;
423 }
424
895287c0
HS
425 /* Check whether a vector already exists */
426 if (h & APIC_VECTOR_MASK) {
427 printk(KERN_DEBUG
428 "CPU%d: Thermal LVT vector (%#x) already installed\n",
429 cpu, (h & APIC_VECTOR_MASK));
430 return;
431 }
432
f3a0867b
BZ
433 /* early Pentium M models use different method for enabling TM2 */
434 if (cpu_has(c, X86_FEATURE_TM2)) {
435 if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
436 rdmsr(MSR_THERM2_CTL, l, h);
437 if (l & MSR_THERM2_CTL_TM_SELECT)
438 tm2 = 1;
439 } else if (l & MSR_IA32_MISC_ENABLE_TM2)
440 tm2 = 1;
441 }
442
895287c0
HS
443 /* We'll mask the thermal vector in the lapic till we're ready: */
444 h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
445 apic_write(APIC_LVTTHMR, h);
446
447 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
0199114c
FY
448 if (cpu_has(c, X86_FEATURE_PLN))
449 wrmsr(MSR_IA32_THERM_INTERRUPT,
450 l | (THERM_INT_LOW_ENABLE
451 | THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
452 else
453 wrmsr(MSR_IA32_THERM_INTERRUPT,
454 l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
895287c0 455
55d435a2
FY
456 if (cpu_has(c, X86_FEATURE_PTS)) {
457 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
0199114c
FY
458 if (cpu_has(c, X86_FEATURE_PLN))
459 wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
460 l | (PACKAGE_THERM_INT_LOW_ENABLE
461 | PACKAGE_THERM_INT_HIGH_ENABLE
462 | PACKAGE_THERM_INT_PLN_ENABLE), h);
463 else
464 wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
465 l | (PACKAGE_THERM_INT_LOW_ENABLE
466 | PACKAGE_THERM_INT_HIGH_ENABLE), h);
55d435a2
FY
467 }
468
8363fc82 469 smp_thermal_vector = intel_thermal_interrupt;
895287c0
HS
470
471 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
472 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
473
474 /* Unmask the thermal vector: */
475 l = apic_read(APIC_LVTTHMR);
476 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
477
2eaad1fd
MT
478 printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
479 tm2 ? "TM2" : "TM1");
895287c0
HS
480
481 /* enable thermal throttle processing */
482 atomic_set(&therm_throt_en, 1);
483}
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