[deliverable/linux.git] / arch / x86 / kernel / cpu / mcheck / therm_throt.c

/*
 * Thermal throttle event support code (such as syslog messaging and rate
 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
 *
 * This allows consistent reporting of CPU thermal throttle events.
 *
 * Maintains a counter in /sys that keeps track of the number of thermal
 * events, such that the user knows how bad the thermal problem might be
 * (since the logging to syslog and mcelog is rate limited).
 *
 * Author: Dmitriy Zavin (dmitriyz@google.com)
 *
 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
 *          Inspired by Ross Biro's and Al Borchers' counter code.
 */
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/percpu.h>
#include <linux/export.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/cpu.h>

#include <asm/processor.h>
#include <asm/apic.h>
#include <asm/idle.h>
#include <asm/mce.h>
#include <asm/msr.h>

/* How long to wait between reporting thermal events */
#define CHECK_INTERVAL		(300 * HZ)

#define THERMAL_THROTTLING_EVENT	0
#define POWER_LIMIT_EVENT		1

/*
 * Current thermal event state:
 */
struct _thermal_state {
	bool			new_event;
	int			event;
	u64			next_check;
	unsigned long		count;
	unsigned long		last_count;
};

struct thermal_state {
	struct _thermal_state core_throttle;
	struct _thermal_state core_power_limit;
	struct _thermal_state package_throttle;
	struct _thermal_state package_power_limit;
	struct _thermal_state core_thresh0;
	struct _thermal_state core_thresh1;
};

/* Callback to handle core threshold interrupts */
int (*platform_thermal_notify)(__u64 msr_val);
EXPORT_SYMBOL(platform_thermal_notify);

static DEFINE_PER_CPU(struct thermal_state, thermal_state);

static atomic_t therm_throt_en	= ATOMIC_INIT(0);

static u32 lvtthmr_init __read_mostly;

#ifdef CONFIG_SYSFS
#define define_therm_throt_device_one_ro(_name)				\
	static DEVICE_ATTR(_name, 0444,					\
			   therm_throt_device_show_##_name,		\
				   NULL)				\

#define define_therm_throt_device_show_func(event, name)		\
									\
static ssize_t therm_throt_device_show_##event##_##name(		\
			struct device *dev,				\
			struct device_attribute *attr,			\
			char *buf)					\
{									\
	unsigned int cpu = dev->id;					\
	ssize_t ret;							\
									\
	preempt_disable();	/* CPU hotplug */			\
	if (cpu_online(cpu)) {						\
		ret = sprintf(buf, "%lu\n",				\
			      per_cpu(thermal_state, cpu).event.name);	\
	} else								\
		ret = 0;						\
	preempt_enable();						\
									\
	return ret;							\
}

define_therm_throt_device_show_func(core_throttle, count);
define_therm_throt_device_one_ro(core_throttle_count);

define_therm_throt_device_show_func(core_power_limit, count);
define_therm_throt_device_one_ro(core_power_limit_count);

define_therm_throt_device_show_func(package_throttle, count);
define_therm_throt_device_one_ro(package_throttle_count);

define_therm_throt_device_show_func(package_power_limit, count);
define_therm_throt_device_one_ro(package_power_limit_count);

static struct attribute *thermal_throttle_attrs[] = {
	&dev_attr_core_throttle_count.attr,
	NULL
};

static struct attribute_group thermal_attr_group = {
	.attrs	= thermal_throttle_attrs,
	.name	= "thermal_throttle"
};
#endif /* CONFIG_SYSFS */

#define CORE_LEVEL	0
#define PACKAGE_LEVEL	1

/***
 * therm_throt_process - Process thermal throttling event from interrupt
 * @curr: Whether the condition is current or not (boolean), since the
 *        thermal interrupt normally gets called both when the thermal
 *        event begins and once the event has ended.
 *
 * This function is called by the thermal interrupt after the
 * IRQ has been acknowledged.
 *
 * It will take care of rate limiting and printing messages to the syslog.
 *
 * Returns: 0 : Event should NOT be further logged, i.e. still in
 *              "timeout" from previous log message.
 *          1 : Event should be logged further, and a message has been
 *              printed to the syslog.
 */
static int therm_throt_process(bool new_event, int event, int level)
{
	struct _thermal_state *state;
	unsigned int this_cpu = smp_processor_id();
	bool old_event;
	u64 now;
	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);

	now = get_jiffies_64();
	if (level == CORE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->core_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->core_power_limit;
		else
			 return 0;
	} else if (level == PACKAGE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->package_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->package_power_limit;
		else
			return 0;
	} else
		return 0;

	old_event = state->new_event;
	state->new_event = new_event;

	if (new_event)
		state->count++;

	if (time_before64(now, state->next_check) &&
			state->count != state->last_count)
		return 0;

	state->next_check = now + CHECK_INTERVAL;
	state->last_count = state->count;

	/* if we just entered the thermal event */
	if (new_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package",
				state->count);
		else
			printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package",
				state->count);
		return 1;
	}
	if (old_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package");
		else
			printk(KERN_INFO "CPU%d: %s power limit normal\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package");
		return 1;
	}

	return 0;
}

static int thresh_event_valid(int event)
{
	struct _thermal_state *state;
	unsigned int this_cpu = smp_processor_id();
	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
	u64 now = get_jiffies_64();

	state = (event == 0) ? &pstate->core_thresh0 : &pstate->core_thresh1;

	if (time_before64(now, state->next_check))
		return 0;

	state->next_check = now + CHECK_INTERVAL;
	return 1;
}

#ifdef CONFIG_SYSFS
/* Add/Remove thermal_throttle interface for CPU device: */
static __cpuinit int thermal_throttle_add_dev(struct device *dev,
				unsigned int cpu)
{
	int err;
	struct cpuinfo_x86 *c = &cpu_data(cpu);

	err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
	if (err)
		return err;

	if (cpu_has(c, X86_FEATURE_PLN))
		err = sysfs_add_file_to_group(&dev->kobj,
					      &dev_attr_core_power_limit_count.attr,
					      thermal_attr_group.name);
	if (cpu_has(c, X86_FEATURE_PTS)) {
		err = sysfs_add_file_to_group(&dev->kobj,
					      &dev_attr_package_throttle_count.attr,
					      thermal_attr_group.name);
		if (cpu_has(c, X86_FEATURE_PLN))
			err = sysfs_add_file_to_group(&dev->kobj,
					&dev_attr_package_power_limit_count.attr,
					thermal_attr_group.name);
	}

	return err;
}

static __cpuinit void thermal_throttle_remove_dev(struct device *dev)
{
	sysfs_remove_group(&dev->kobj, &thermal_attr_group);
}

/* Mutex protecting device creation against CPU hotplug: */
static DEFINE_MUTEX(therm_cpu_lock);

/* Get notified when a cpu comes on/off. Be hotplug friendly. */
static __cpuinit int
thermal_throttle_cpu_callback(struct notifier_block *nfb,
			      unsigned long action,
			      void *hcpu)
{
	unsigned int cpu = (unsigned long)hcpu;
	struct device *dev;
	int err = 0;

	dev = get_cpu_device(cpu);

	switch (action) {
	case CPU_UP_PREPARE:
	case CPU_UP_PREPARE_FROZEN:
		mutex_lock(&therm_cpu_lock);
		err = thermal_throttle_add_dev(dev, cpu);
		mutex_unlock(&therm_cpu_lock);
		WARN_ON(err);
		break;
	case CPU_UP_CANCELED:
	case CPU_UP_CANCELED_FROZEN:
	case CPU_DEAD:
	case CPU_DEAD_FROZEN:
		mutex_lock(&therm_cpu_lock);
		thermal_throttle_remove_dev(dev);
		mutex_unlock(&therm_cpu_lock);
		break;
	}
	return notifier_from_errno(err);
}

static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
{
	.notifier_call = thermal_throttle_cpu_callback,
};

static __init int thermal_throttle_init_device(void)
{
	unsigned int cpu = 0;
	int err;

	if (!atomic_read(&therm_throt_en))
		return 0;

	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);

#ifdef CONFIG_HOTPLUG_CPU
	mutex_lock(&therm_cpu_lock);
#endif
	/* connect live CPUs to sysfs */
	for_each_online_cpu(cpu) {
		err = thermal_throttle_add_dev(get_cpu_device(cpu), cpu);
		WARN_ON(err);
	}
#ifdef CONFIG_HOTPLUG_CPU
	mutex_unlock(&therm_cpu_lock);
#endif

	return 0;
}
device_initcall(thermal_throttle_init_device);

#endif /* CONFIG_SYSFS */

static void notify_thresholds(__u64 msr_val)
{
	/* check whether the interrupt handler is defined;
	 * otherwise simply return
	 */
	if (!platform_thermal_notify)
		return;

	/* lower threshold reached */
	if ((msr_val & THERM_LOG_THRESHOLD0) &&	thresh_event_valid(0))
		platform_thermal_notify(msr_val);
	/* higher threshold reached */
	if ((msr_val & THERM_LOG_THRESHOLD1) && thresh_event_valid(1))
		platform_thermal_notify(msr_val);
}

/* Thermal transition interrupt handler */
static void intel_thermal_interrupt(void)
{
	__u64 msr_val;

	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);

	/* Check for violation of core thermal thresholds*/
	notify_thresholds(msr_val);

	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
				THERMAL_THROTTLING_EVENT,
				CORE_LEVEL) != 0)
		mce_log_therm_throt_event(msr_val);

	if (this_cpu_has(X86_FEATURE_PLN))
		therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					CORE_LEVEL);

	if (this_cpu_has(X86_FEATURE_PTS)) {
		rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
		therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
					THERMAL_THROTTLING_EVENT,
					PACKAGE_LEVEL);
		if (this_cpu_has(X86_FEATURE_PLN))
			therm_throt_process(msr_val &
					PACKAGE_THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					PACKAGE_LEVEL);
	}
}

static void unexpected_thermal_interrupt(void)
{
	printk(KERN_ERR "CPU%d: Unexpected LVT thermal interrupt!\n",
			smp_processor_id());
}

static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;

asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
{
	irq_enter();
	exit_idle();
	inc_irq_stat(irq_thermal_count);
	smp_thermal_vector();
	irq_exit();
	/* Ack only at the end to avoid potential reentry */
	ack_APIC_irq();
}

/* Thermal monitoring depends on APIC, ACPI and clock modulation */
static int intel_thermal_supported(struct cpuinfo_x86 *c)
{
	if (!cpu_has_apic)
		return 0;
	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
		return 0;
	return 1;
}

void __init mcheck_intel_therm_init(void)
{
	/*
	 * This function is only called on boot CPU. Save the init thermal
	 * LVT value on BSP and use that value to restore APs' thermal LVT
	 * entry BIOS programmed later
	 */
	if (intel_thermal_supported(&boot_cpu_data))
		lvtthmr_init = apic_read(APIC_LVTTHMR);
}

void intel_init_thermal(struct cpuinfo_x86 *c)
{
	unsigned int cpu = smp_processor_id();
	int tm2 = 0;
	u32 l, h;

	if (!intel_thermal_supported(c))
		return;

	/*
	 * First check if its enabled already, in which case there might
	 * be some SMM goo which handles it, so we can't even put a handler
	 * since it might be delivered via SMI already:
	 */
	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	h = lvtthmr_init;
	/*
	 * The initial value of thermal LVT entries on all APs always reads
	 * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
	 * sequence to them and LVT registers are reset to 0s except for
	 * the mask bits which are set to 1s when APs receive INIT IPI.
	 * If BIOS takes over the thermal interrupt and sets its interrupt
	 * delivery mode to SMI (not fixed), it restores the value that the
	 * BIOS has programmed on AP based on BSP's info we saved since BIOS
	 * is always setting the same value for all threads/cores.
	 */
	if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
		apic_write(APIC_LVTTHMR, lvtthmr_init);


	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);
		return;
	}

	/* Check whether a vector already exists */
	if (h & APIC_VECTOR_MASK) {
		printk(KERN_DEBUG
		       "CPU%d: Thermal LVT vector (%#x) already installed\n",
		       cpu, (h & APIC_VECTOR_MASK));
		return;
	}

	/* early Pentium M models use different method for enabling TM2 */
	if (cpu_has(c, X86_FEATURE_TM2)) {
		if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
			rdmsr(MSR_THERM2_CTL, l, h);
			if (l & MSR_THERM2_CTL_TM_SELECT)
				tm2 = 1;
		} else if (l & MSR_IA32_MISC_ENABLE_TM2)
			tm2 = 1;
	}

	/* We'll mask the thermal vector in the lapic till we're ready: */
	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
	apic_write(APIC_LVTTHMR, h);

	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
	if (cpu_has(c, X86_FEATURE_PLN))
		wrmsr(MSR_IA32_THERM_INTERRUPT,
		      l | (THERM_INT_LOW_ENABLE
			| THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
	else
		wrmsr(MSR_IA32_THERM_INTERRUPT,
		      l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);

	if (cpu_has(c, X86_FEATURE_PTS)) {
		rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
		if (cpu_has(c, X86_FEATURE_PLN))
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
			      l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE
				| PACKAGE_THERM_INT_PLN_ENABLE), h);
		else
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
			      l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE), h);
	}

	smp_thermal_vector = intel_thermal_interrupt;

	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);

	/* Unmask the thermal vector: */
	l = apic_read(APIC_LVTTHMR);
	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);

	printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
		       tm2 ? "TM2" : "TM1");

	/* enable thermal throttle processing */
	atomic_set(&therm_throt_en, 1);
}
Commit	Line	Data
15d5f839	1	/*
3222b36f DZ	2	* Thermal throttle event support code (such as syslog messaging and rate
3222b36f DZ	3	* limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
cb6f3c15	4	*
3222b36f DZ	5	* This allows consistent reporting of CPU thermal throttle events.
	6	*
	7	* Maintains a counter in /sys that keeps track of the number of thermal
	8	* events, such that the user knows how bad the thermal problem might be
	9	* (since the logging to syslog and mcelog is rate limited).
15d5f839 DZ	10	*
	11	* Author: Dmitriy Zavin (dmitriyz@google.com)
	12	*
	13	* Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
3222b36f	14	* Inspired by Ross Biro's and Al Borchers' counter code.
15d5f839	15	*/
a65c88dd	16	#include <linux/interrupt.h>
cb6f3c15 IM	17	#include <linux/notifier.h>
cb6f3c15 IM	18	#include <linux/jiffies.h>
895287c0	19	#include <linux/kernel.h>
15d5f839	20	#include <linux/percpu.h>
69c60c88	21	#include <linux/export.h>
895287c0 HS	22	#include <linux/types.h>
	23	#include <linux/init.h>
	24	#include <linux/smp.h>
15d5f839	25	#include <linux/cpu.h>
cb6f3c15	26
895287c0	27	#include <asm/processor.h>
895287c0	28	#include <asm/apic.h>
a65c88dd HS	29	#include <asm/idle.h>
a65c88dd HS	30	#include <asm/mce.h>
895287c0	31	#include <asm/msr.h>
15d5f839 DZ	32
15d5f839 DZ	33	/* How long to wait between reporting thermal events */
cb6f3c15	34	#define CHECK_INTERVAL (300 * HZ)
15d5f839	35
0199114c FY	36	#define THERMAL_THROTTLING_EVENT 0
	37	#define POWER_LIMIT_EVENT 1
	38
39676840	39	/*
0199114c	40	* Current thermal event state:
39676840	41	*/
55d435a2	42	struct _thermal_state {
0199114c FY	43	bool new_event;
0199114c FY	44	int event;
39676840	45	u64 next_check;
0199114c FY	46	unsigned long count;
0199114c FY	47	unsigned long last_count;
39676840	48	};
cb6f3c15	49
55d435a2	50	struct thermal_state {
0199114c FY	51	struct _thermal_state core_throttle;
	52	struct _thermal_state core_power_limit;
	53	struct _thermal_state package_throttle;
	54	struct _thermal_state package_power_limit;
9e76a97e D	55	struct _thermal_state core_thresh0;
9e76a97e D	56	struct _thermal_state core_thresh1;
55d435a2 FY	57	};
55d435a2 FY	58
9e76a97e D	59	/* Callback to handle core threshold interrupts */
9e76a97e D	60	int (*platform_thermal_notify)(__u64 msr_val);
f21bbec9	61	EXPORT_SYMBOL(platform_thermal_notify);
9e76a97e	62
39676840 IM	63	static DEFINE_PER_CPU(struct thermal_state, thermal_state);
	64
	65	static atomic_t therm_throt_en = ATOMIC_INIT(0);
3222b36f	66
a2202aa2 YW	67	static u32 lvtthmr_init __read_mostly;
a2202aa2 YW	68
3222b36f	69	#ifdef CONFIG_SYSFS
8a25a2fd KS	70	#define define_therm_throt_device_one_ro(_name) \
	71	static DEVICE_ATTR(_name, 0444, \
	72	therm_throt_device_show_##_name, \
55d435a2	73	NULL) \
cb6f3c15	74
8a25a2fd	75	#define define_therm_throt_device_show_func(event, name) \
39676840	76	\
8a25a2fd KS	77	static ssize_t therm_throt_device_show_##event##_##name( \
	78	struct device *dev, \
	79	struct device_attribute *attr, \
39676840	80	char *buf) \
cb6f3c15 IM	81	{ \
	82	unsigned int cpu = dev->id; \
	83	ssize_t ret; \
	84	\
	85	preempt_disable(); /* CPU hotplug */ \
55d435a2	86	if (cpu_online(cpu)) { \
cb6f3c15	87	ret = sprintf(buf, "%lu\n", \
0199114c	88	per_cpu(thermal_state, cpu).event.name); \
55d435a2	89	} else \
cb6f3c15 IM	90	ret = 0; \
	91	preempt_enable(); \
	92	\
	93	return ret; \
3222b36f DZ	94	}
3222b36f DZ	95
8a25a2fd KS	96	define_therm_throt_device_show_func(core_throttle, count);
8a25a2fd KS	97	define_therm_throt_device_one_ro(core_throttle_count);
55d435a2	98
8a25a2fd KS	99	define_therm_throt_device_show_func(core_power_limit, count);
8a25a2fd KS	100	define_therm_throt_device_one_ro(core_power_limit_count);
0199114c	101
8a25a2fd KS	102	define_therm_throt_device_show_func(package_throttle, count);
8a25a2fd KS	103	define_therm_throt_device_one_ro(package_throttle_count);
3222b36f	104
8a25a2fd KS	105	define_therm_throt_device_show_func(package_power_limit, count);
8a25a2fd KS	106	define_therm_throt_device_one_ro(package_power_limit_count);
0199114c	107
3222b36f	108	static struct attribute *thermal_throttle_attrs[] = {
8a25a2fd	109	&dev_attr_core_throttle_count.attr,
3222b36f DZ	110	NULL
	111	};
	112
0199114c	113	static struct attribute_group thermal_attr_group = {
cb6f3c15 IM	114	.attrs = thermal_throttle_attrs,
cb6f3c15 IM	115	.name = "thermal_throttle"
3222b36f DZ	116	};
3222b36f DZ	117	#endif /* CONFIG_SYSFS */
15d5f839	118
0199114c FY	119	#define CORE_LEVEL 0
	120	#define PACKAGE_LEVEL 1
	121
15d5f839	122	/***
3222b36f	123	* therm_throt_process - Process thermal throttling event from interrupt
15d5f839 DZ	124	* @curr: Whether the condition is current or not (boolean), since the
	125	* thermal interrupt normally gets called both when the thermal
	126	* event begins and once the event has ended.
	127	*
3222b36f	128	* This function is called by the thermal interrupt after the
15d5f839 DZ	129	* IRQ has been acknowledged.
	130	*
	131	* It will take care of rate limiting and printing messages to the syslog.
	132	*
	133	* Returns: 0 : Event should NOT be further logged, i.e. still in
	134	* "timeout" from previous log message.
	135	* 1 : Event should be logged further, and a message has been
	136	* printed to the syslog.
	137	*/
0199114c	138	static int therm_throt_process(bool new_event, int event, int level)
15d5f839	139	{
55d435a2	140	struct _thermal_state *state;
0199114c FY	141	unsigned int this_cpu = smp_processor_id();
0199114c FY	142	bool old_event;
39676840	143	u64 now;
0199114c	144	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
39676840	145
39676840	146	now = get_jiffies_64();
0199114c FY	147	if (level == CORE_LEVEL) {
	148	if (event == THERMAL_THROTTLING_EVENT)
	149	state = &pstate->core_throttle;
	150	else if (event == POWER_LIMIT_EVENT)
	151	state = &pstate->core_power_limit;
	152	else
	153	return 0;
	154	} else if (level == PACKAGE_LEVEL) {
	155	if (event == THERMAL_THROTTLING_EVENT)
	156	state = &pstate->package_throttle;
	157	else if (event == POWER_LIMIT_EVENT)
	158	state = &pstate->package_power_limit;
	159	else
	160	return 0;
	161	} else
	162	return 0;
39676840	163
0199114c FY	164	old_event = state->new_event;
0199114c FY	165	state->new_event = new_event;
15d5f839	166
0199114c FY	167	if (new_event)
0199114c FY	168	state->count++;
3222b36f	169
b417c9fd	170	if (time_before64(now, state->next_check) &&
0199114c	171	state->count != state->last_count)
15d5f839 DZ	172	return 0;
15d5f839 DZ	173
39676840	174	state->next_check = now + CHECK_INTERVAL;
0199114c	175	state->last_count = state->count;
15d5f839 DZ	176
15d5f839 DZ	177	/* if we just entered the thermal event */
0199114c FY	178	if (new_event) {
	179	if (event == THERMAL_THROTTLING_EVENT)
	180	printk(KERN_CRIT "CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
	181	this_cpu,
	182	level == CORE_LEVEL ? "Core" : "Package",
	183	state->count);
	184	else
	185	printk(KERN_CRIT "CPU%d: %s power limit notification (total events = %lu)\n",
	186	this_cpu,
	187	level == CORE_LEVEL ? "Core" : "Package",
	188	state->count);
4e5c25d4 HD	189	return 1;
4e5c25d4 HD	190	}
0199114c FY	191	if (old_event) {
	192	if (event == THERMAL_THROTTLING_EVENT)
	193	printk(KERN_INFO "CPU%d: %s temperature/speed normal\n",
	194	this_cpu,
	195	level == CORE_LEVEL ? "Core" : "Package");
	196	else
	197	printk(KERN_INFO "CPU%d: %s power limit normal\n",
	198	this_cpu,
	199	level == CORE_LEVEL ? "Core" : "Package");
4e5c25d4	200	return 1;
15d5f839 DZ	201	}
15d5f839 DZ	202
4e5c25d4	203	return 0;
15d5f839	204	}
3222b36f	205
9e76a97e D	206	static int thresh_event_valid(int event)
	207	{
	208	struct _thermal_state *state;
	209	unsigned int this_cpu = smp_processor_id();
	210	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
	211	u64 now = get_jiffies_64();
	212
	213	state = (event == 0) ? &pstate->core_thresh0 : &pstate->core_thresh1;
	214
	215	if (time_before64(now, state->next_check))
	216	return 0;
	217
	218	state->next_check = now + CHECK_INTERVAL;
	219	return 1;
	220	}
	221
3222b36f	222	#ifdef CONFIG_SYSFS
cb6f3c15	223	/* Add/Remove thermal_throttle interface for CPU device: */
8a25a2fd	224	static __cpuinit int thermal_throttle_add_dev(struct device *dev,
51e3c1b5	225	unsigned int cpu)
3222b36f	226	{
55d435a2	227	int err;
51e3c1b5	228	struct cpuinfo_x86 *c = &cpu_data(cpu);
55d435a2	229
8a25a2fd	230	err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
55d435a2 FY	231	if (err)
	232	return err;
	233
0199114c	234	if (cpu_has(c, X86_FEATURE_PLN))
8a25a2fd KS	235	err = sysfs_add_file_to_group(&dev->kobj,
8a25a2fd KS	236	&dev_attr_core_power_limit_count.attr,
0199114c	237	thermal_attr_group.name);
b62be8ea	238	if (cpu_has(c, X86_FEATURE_PTS)) {
8a25a2fd KS	239	err = sysfs_add_file_to_group(&dev->kobj,
8a25a2fd KS	240	&dev_attr_package_throttle_count.attr,
0199114c FY	241	thermal_attr_group.name);
0199114c FY	242	if (cpu_has(c, X86_FEATURE_PLN))
8a25a2fd KS	243	err = sysfs_add_file_to_group(&dev->kobj,
8a25a2fd KS	244	&dev_attr_package_power_limit_count.attr,
0199114c	245	thermal_attr_group.name);
b62be8ea	246	}
55d435a2 FY	247
55d435a2 FY	248	return err;
3222b36f DZ	249	}
3222b36f DZ	250
8a25a2fd	251	static __cpuinit void thermal_throttle_remove_dev(struct device *dev)
3222b36f	252	{
8a25a2fd	253	sysfs_remove_group(&dev->kobj, &thermal_attr_group);
3222b36f DZ	254	}
3222b36f DZ	255
cb6f3c15	256	/* Mutex protecting device creation against CPU hotplug: */
3222b36f DZ	257	static DEFINE_MUTEX(therm_cpu_lock);
	258
	259	/* Get notified when a cpu comes on/off. Be hotplug friendly. */
cb6f3c15 IM	260	static __cpuinit int
	261	thermal_throttle_cpu_callback(struct notifier_block *nfb,
	262	unsigned long action,
	263	void *hcpu)
3222b36f DZ	264	{
3222b36f DZ	265	unsigned int cpu = (unsigned long)hcpu;
8a25a2fd	266	struct device *dev;
c7e38a9c	267	int err = 0;
3222b36f	268
8a25a2fd	269	dev = get_cpu_device(cpu);
cb6f3c15	270
3222b36f	271	switch (action) {
c7e38a9c AM	272	case CPU_UP_PREPARE:
c7e38a9c AM	273	case CPU_UP_PREPARE_FROZEN:
38ef6d19	274	mutex_lock(&therm_cpu_lock);
8a25a2fd	275	err = thermal_throttle_add_dev(dev, cpu);
38ef6d19	276	mutex_unlock(&therm_cpu_lock);
6569345a	277	WARN_ON(err);
3222b36f	278	break;
c7e38a9c AM	279	case CPU_UP_CANCELED:
c7e38a9c AM	280	case CPU_UP_CANCELED_FROZEN:
3222b36f	281	case CPU_DEAD:
8bb78442	282	case CPU_DEAD_FROZEN:
38ef6d19	283	mutex_lock(&therm_cpu_lock);
8a25a2fd	284	thermal_throttle_remove_dev(dev);
38ef6d19	285	mutex_unlock(&therm_cpu_lock);
3222b36f DZ	286	break;
3222b36f DZ	287	}
a94247e7	288	return notifier_from_errno(err);
3222b36f DZ	289	}
3222b36f DZ	290
25d1b516	291	static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata =
3222b36f DZ	292	{
	293	.notifier_call = thermal_throttle_cpu_callback,
	294	};
3222b36f DZ	295
	296	static __init int thermal_throttle_init_device(void)
	297	{
	298	unsigned int cpu = 0;
6569345a	299	int err;
3222b36f DZ	300
	301	if (!atomic_read(&therm_throt_en))
	302	return 0;
	303
	304	register_hotcpu_notifier(&thermal_throttle_cpu_notifier);
	305
	306	#ifdef CONFIG_HOTPLUG_CPU
	307	mutex_lock(&therm_cpu_lock);
	308	#endif
	309	/* connect live CPUs to sysfs */
6569345a	310	for_each_online_cpu(cpu) {
8a25a2fd	311	err = thermal_throttle_add_dev(get_cpu_device(cpu), cpu);
6569345a SH	312	WARN_ON(err);
6569345a SH	313	}
3222b36f DZ	314	#ifdef CONFIG_HOTPLUG_CPU
	315	mutex_unlock(&therm_cpu_lock);
	316	#endif
	317
	318	return 0;
	319	}
3222b36f	320	device_initcall(thermal_throttle_init_device);
a65c88dd	321
3222b36f	322	#endif /* CONFIG_SYSFS */
a65c88dd	323
9e76a97e D	324	static void notify_thresholds(__u64 msr_val)
	325	{
	326	/* check whether the interrupt handler is defined;
	327	* otherwise simply return
	328	*/
	329	if (!platform_thermal_notify)
	330	return;
	331
	332	/* lower threshold reached */
	333	if ((msr_val & THERM_LOG_THRESHOLD0) && thresh_event_valid(0))
	334	platform_thermal_notify(msr_val);
	335	/* higher threshold reached */
	336	if ((msr_val & THERM_LOG_THRESHOLD1) && thresh_event_valid(1))
	337	platform_thermal_notify(msr_val);
	338	}
	339
a65c88dd	340	/* Thermal transition interrupt handler */
8363fc82	341	static void intel_thermal_interrupt(void)
a65c88dd HS	342	{
	343	__u64 msr_val;
	344
	345	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
0199114c	346
9e76a97e D	347	/* Check for violation of core thermal thresholds*/
	348	notify_thresholds(msr_val);
	349
55d435a2	350	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
0199114c	351	THERMAL_THROTTLING_EVENT,
55d435a2	352	CORE_LEVEL) != 0)
29e9bf18	353	mce_log_therm_throt_event(msr_val);
0199114c	354
fe504213	355	if (this_cpu_has(X86_FEATURE_PLN))
29e9bf18	356	therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
0199114c	357	POWER_LIMIT_EVENT,
29e9bf18	358	CORE_LEVEL);
55d435a2	359
fe504213	360	if (this_cpu_has(X86_FEATURE_PTS)) {
55d435a2	361	rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
29e9bf18	362	therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
0199114c	363	THERMAL_THROTTLING_EVENT,
29e9bf18	364	PACKAGE_LEVEL);
fe504213	365	if (this_cpu_has(X86_FEATURE_PLN))
29e9bf18	366	therm_throt_process(msr_val &
0199114c FY	367	PACKAGE_THERM_STATUS_POWER_LIMIT,
0199114c FY	368	POWER_LIMIT_EVENT,
29e9bf18	369	PACKAGE_LEVEL);
55d435a2	370	}
a65c88dd HS	371	}
	372
	373	static void unexpected_thermal_interrupt(void)
	374	{
592091c0	375	printk(KERN_ERR "CPU%d: Unexpected LVT thermal interrupt!\n",
a65c88dd	376	smp_processor_id());
a65c88dd HS	377	}
	378
	379	static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;
	380
	381	asmlinkage void smp_thermal_interrupt(struct pt_regs *regs)
	382	{
a65c88dd	383	irq_enter();
98ad1cc1	384	exit_idle();
a65c88dd HS	385	inc_irq_stat(irq_thermal_count);
	386	smp_thermal_vector();
	387	irq_exit();
	388	/* Ack only at the end to avoid potential reentry */
	389	ack_APIC_irq();
	390	}
	391
70fe4407 HS	392	/* Thermal monitoring depends on APIC, ACPI and clock modulation */
	393	static int intel_thermal_supported(struct cpuinfo_x86 *c)
	394	{
	395	if (!cpu_has_apic)
	396	return 0;
	397	if (!cpu_has(c, X86_FEATURE_ACPI) \|\| !cpu_has(c, X86_FEATURE_ACC))
	398	return 0;
	399	return 1;
	400	}
	401
ce6b5d76	402	void __init mcheck_intel_therm_init(void)
a2202aa2 YW	403	{
	404	/*
	405	* This function is only called on boot CPU. Save the init thermal
	406	* LVT value on BSP and use that value to restore APs' thermal LVT
	407	* entry BIOS programmed later
	408	*/
70fe4407	409	if (intel_thermal_supported(&boot_cpu_data))
a2202aa2 YW	410	lvtthmr_init = apic_read(APIC_LVTTHMR);
	411	}
	412
cffd377e	413	void intel_init_thermal(struct cpuinfo_x86 *c)
895287c0 HS	414	{
	415	unsigned int cpu = smp_processor_id();
	416	int tm2 = 0;
	417	u32 l, h;
	418
70fe4407	419	if (!intel_thermal_supported(c))
895287c0 HS	420	return;
	421
	422	/*
	423	* First check if its enabled already, in which case there might
	424	* be some SMM goo which handles it, so we can't even put a handler
	425	* since it might be delivered via SMI already:
	426	*/
	427	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
a2202aa2	428
e503f9e4	429	h = lvtthmr_init;
a2202aa2 YW	430	/*
	431	* The initial value of thermal LVT entries on all APs always reads
	432	* 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
	433	* sequence to them and LVT registers are reset to 0s except for
	434	* the mask bits which are set to 1s when APs receive INIT IPI.
e503f9e4 YS	435	* If BIOS takes over the thermal interrupt and sets its interrupt
	436	* delivery mode to SMI (not fixed), it restores the value that the
	437	* BIOS has programmed on AP based on BSP's info we saved since BIOS
	438	* is always setting the same value for all threads/cores.
a2202aa2	439	*/
e503f9e4 YS	440	if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
e503f9e4 YS	441	apic_write(APIC_LVTTHMR, lvtthmr_init);
a2202aa2	442
a2202aa2	443
895287c0 HS	444	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
	445	printk(KERN_DEBUG
	446	"CPU%d: Thermal monitoring handled by SMI\n", cpu);
	447	return;
	448	}
	449
895287c0 HS	450	/* Check whether a vector already exists */
	451	if (h & APIC_VECTOR_MASK) {
	452	printk(KERN_DEBUG
	453	"CPU%d: Thermal LVT vector (%#x) already installed\n",
	454	cpu, (h & APIC_VECTOR_MASK));
	455	return;
	456	}
	457
f3a0867b BZ	458	/* early Pentium M models use different method for enabling TM2 */
	459	if (cpu_has(c, X86_FEATURE_TM2)) {
	460	if (c->x86 == 6 && (c->x86_model == 9 \|\| c->x86_model == 13)) {
	461	rdmsr(MSR_THERM2_CTL, l, h);
	462	if (l & MSR_THERM2_CTL_TM_SELECT)
	463	tm2 = 1;
	464	} else if (l & MSR_IA32_MISC_ENABLE_TM2)
	465	tm2 = 1;
	466	}
	467
895287c0 HS	468	/* We'll mask the thermal vector in the lapic till we're ready: */
	469	h = THERMAL_APIC_VECTOR \| APIC_DM_FIXED \| APIC_LVT_MASKED;
	470	apic_write(APIC_LVTTHMR, h);
	471
	472	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
0199114c FY	473	if (cpu_has(c, X86_FEATURE_PLN))
	474	wrmsr(MSR_IA32_THERM_INTERRUPT,
	475	l \| (THERM_INT_LOW_ENABLE
	476	\| THERM_INT_HIGH_ENABLE \| THERM_INT_PLN_ENABLE), h);
	477	else
	478	wrmsr(MSR_IA32_THERM_INTERRUPT,
	479	l \| (THERM_INT_LOW_ENABLE \| THERM_INT_HIGH_ENABLE), h);
895287c0	480
55d435a2 FY	481	if (cpu_has(c, X86_FEATURE_PTS)) {
55d435a2 FY	482	rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
0199114c FY	483	if (cpu_has(c, X86_FEATURE_PLN))
	484	wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
	485	l \| (PACKAGE_THERM_INT_LOW_ENABLE
	486	\| PACKAGE_THERM_INT_HIGH_ENABLE
	487	\| PACKAGE_THERM_INT_PLN_ENABLE), h);
	488	else
	489	wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
	490	l \| (PACKAGE_THERM_INT_LOW_ENABLE
	491	\| PACKAGE_THERM_INT_HIGH_ENABLE), h);
55d435a2 FY	492	}
55d435a2 FY	493
8363fc82	494	smp_thermal_vector = intel_thermal_interrupt;
895287c0 HS	495
	496	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	497	wrmsr(MSR_IA32_MISC_ENABLE, l \| MSR_IA32_MISC_ENABLE_TM1, h);
	498
	499	/* Unmask the thermal vector: */
	500	l = apic_read(APIC_LVTTHMR);
	501	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
	502
2eaad1fd MT	503	printk_once(KERN_INFO "CPU0: Thermal monitoring enabled (%s)\n",
2eaad1fd MT	504	tm2 ? "TM2" : "TM1");
895287c0 HS	505
	506	/* enable thermal throttle processing */
	507	atomic_set(&therm_throt_en, 1);
	508	}