x86: identify_cpu_without_cpuid v2
[deliverable/linux.git] / arch / x86 / kernel / cpu / transmeta.c
CommitLineData
1da177e4 1#include <linux/kernel.h>
a62eaf15 2#include <linux/mm.h>
1da177e4
LT
3#include <linux/init.h>
4#include <asm/processor.h>
5#include <asm/msr.h>
6#include "cpu.h"
7
b4af3f7c 8static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
1da177e4
LT
9{
10 unsigned int cap_mask, uk, max, dummy;
11 unsigned int cms_rev1, cms_rev2;
7de6d361 12 unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev;
1da177e4
LT
13 char cpu_info[65];
14
1da177e4
LT
15 display_cacheinfo(c);
16
17 /* Print CMS and CPU revision */
18 max = cpuid_eax(0x80860000);
19 cpu_rev = 0;
f9751827
PC
20 if (max >= 0x80860001) {
21 cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags);
1da177e4
LT
22 if (cpu_rev != 0x02000000) {
23 printk(KERN_INFO "CPU: Processor revision %u.%u.%u.%u, %u MHz\n",
24 (cpu_rev >> 24) & 0xff,
25 (cpu_rev >> 16) & 0xff,
26 (cpu_rev >> 8) & 0xff,
27 cpu_rev & 0xff,
28 cpu_freq);
29 }
30 }
f9751827 31 if (max >= 0x80860002) {
1da177e4
LT
32 cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy);
33 if (cpu_rev == 0x02000000) {
34 printk(KERN_INFO "CPU: Processor revision %08X, %u MHz\n",
35 new_cpu_rev, cpu_freq);
36 }
37 printk(KERN_INFO "CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n",
38 (cms_rev1 >> 24) & 0xff,
39 (cms_rev1 >> 16) & 0xff,
40 (cms_rev1 >> 8) & 0xff,
41 cms_rev1 & 0xff,
42 cms_rev2);
43 }
f9751827 44 if (max >= 0x80860006) {
1da177e4
LT
45 cpuid(0x80860003,
46 (void *)&cpu_info[0],
47 (void *)&cpu_info[4],
48 (void *)&cpu_info[8],
49 (void *)&cpu_info[12]);
50 cpuid(0x80860004,
51 (void *)&cpu_info[16],
52 (void *)&cpu_info[20],
53 (void *)&cpu_info[24],
54 (void *)&cpu_info[28]);
55 cpuid(0x80860005,
56 (void *)&cpu_info[32],
57 (void *)&cpu_info[36],
58 (void *)&cpu_info[40],
59 (void *)&cpu_info[44]);
60 cpuid(0x80860006,
61 (void *)&cpu_info[48],
62 (void *)&cpu_info[52],
63 (void *)&cpu_info[56],
64 (void *)&cpu_info[60]);
65 cpu_info[64] = '\0';
66 printk(KERN_INFO "CPU: %s\n", cpu_info);
67 }
68
69 /* Unhide possibly hidden capability flags */
70 rdmsr(0x80860004, cap_mask, uk);
71 wrmsr(0x80860004, ~0, uk);
72 c->x86_capability[0] = cpuid_edx(0x00000001);
73 wrmsr(0x80860004, cap_mask, uk);
30b82ea0
PA
74
75 /* All Transmeta CPUs have a constant TSC */
10cd5a1e 76 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
f9751827 77
39bbb07d 78#ifdef CONFIG_SYSCTL
f9751827
PC
79 /*
80 * randomize_va_space slows us down enormously;
81 * it probably triggers retranslation of x86->native bytecode
82 */
cdf32eaa 83 randomize_va_space = 0;
39bbb07d 84#endif
1da177e4
LT
85}
86
f9751827 87static void __cpuinit transmeta_identify(struct cpuinfo_x86 *c)
1da177e4
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88{
89 u32 xlvl;
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LT
90
91 /* Transmeta-defined flags: level 0x80860001 */
92 xlvl = cpuid_eax(0x80860000);
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PC
93 if ((xlvl & 0xffff0000) == 0x80860000) {
94 if (xlvl >= 0x80860001)
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LT
95 c->x86_capability[2] = cpuid_edx(0x80860001);
96 }
97}
98
95414930 99static struct cpu_dev transmeta_cpu_dev __cpuinitdata = {
1da177e4
LT
100 .c_vendor = "Transmeta",
101 .c_ident = { "GenuineTMx86", "TransmetaCPU" },
102 .c_init = init_transmeta,
103 .c_identify = transmeta_identify,
10a434fc 104 .c_x86_vendor = X86_VENDOR_TRANSMETA,
1da177e4
LT
105};
106
10a434fc 107cpu_dev_register(transmeta_cpu_dev);
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