[deliverable/linux.git] / arch / x86 / kernel / early-quirks.c

/* Various workarounds for chipset bugs.
   This code runs very early and can't use the regular PCI subsystem
   The entries are keyed to PCI bridges which usually identify chipsets
   uniquely.
   This is only for whole classes of chipsets with specific problems which
   need early invasive action (e.g. before the timers are initialized).
   Most PCI device specific workarounds can be done later and should be
   in standard PCI quirks
   Mainboard specific bugs should be handled by DMI entries.
   CPU specific bugs in setup.c */

#include <linux/pci.h>
#include <linux/acpi.h>
#include <linux/pci_ids.h>
#include <asm/pci-direct.h>
#include <asm/dma.h>
#include <asm/io_apic.h>
#include <asm/apic.h>
#include <asm/iommu.h>
#include <asm/gart.h>

static void __init fix_hypertransport_config(int num, int slot, int func)
{
	u32 htcfg;
	/*
	 * we found a hypertransport bus
	 * make sure that we are broadcasting
	 * interrupts to all cpus on the ht bus
	 * if we're using extended apic ids
	 */
	htcfg = read_pci_config(num, slot, func, 0x68);
	if (htcfg & (1 << 18)) {
		printk(KERN_INFO "Detected use of extended apic ids "
				 "on hypertransport bus\n");
		if ((htcfg & (1 << 17)) == 0) {
			printk(KERN_INFO "Enabling hypertransport extended "
					 "apic interrupt broadcast\n");
			printk(KERN_INFO "Note this is a bios bug, "
					 "please contact your hw vendor\n");
			htcfg |= (1 << 17);
			write_pci_config(num, slot, func, 0x68, htcfg);
		}
	}


}

static void __init via_bugs(int  num, int slot, int func)
{
#ifdef CONFIG_GART_IOMMU
	if ((max_pfn > MAX_DMA32_PFN ||  force_iommu) &&
	    !gart_iommu_aperture_allowed) {
		printk(KERN_INFO
		       "Looks like a VIA chipset. Disabling IOMMU."
		       " Override with iommu=allowed\n");
		gart_iommu_aperture_disabled = 1;
	}
#endif
}

#ifdef CONFIG_ACPI
#ifdef CONFIG_X86_IO_APIC

static int __init nvidia_hpet_check(struct acpi_table_header *header)
{
	return 0;
}
#endif /* CONFIG_X86_IO_APIC */
#endif /* CONFIG_ACPI */

static void __init nvidia_bugs(int num, int slot, int func)
{
#ifdef CONFIG_ACPI
#ifdef CONFIG_X86_IO_APIC
	/*
	 * All timer overrides on Nvidia are
	 * wrong unless HPET is enabled.
	 * Unfortunately that's not true on many Asus boards.
	 * We don't know yet how to detect this automatically, but
	 * at least allow a command line override.
	 */
	if (acpi_use_timer_override)
		return;

	if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
		acpi_skip_timer_override = 1;
		printk(KERN_INFO "Nvidia board "
		       "detected. Ignoring ACPI "
		       "timer override.\n");
		printk(KERN_INFO "If you got timer trouble "
			"try acpi_use_timer_override\n");
	}
#endif
#endif
	/* RED-PEN skip them on mptables too? */

}

#if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
{
	u32 d;
	u8  b;

	b = read_pci_config_byte(num, slot, func, 0xac);
	b &= ~(1<<5);
	write_pci_config_byte(num, slot, func, 0xac, b);

	d = read_pci_config(num, slot, func, 0x70);
	d |= 1<<8;
	write_pci_config(num, slot, func, 0x70, d);

	d = read_pci_config(num, slot, func, 0x8);
	d &= 0xff;
	return d;
}

static void __init ati_bugs(int num, int slot, int func)
{
	u32 d;
	u8  b;

	if (acpi_use_timer_override)
		return;

	d = ati_ixp4x0_rev(num, slot, func);
	if (d  < 0x82)
		acpi_skip_timer_override = 1;
	else {
		/* check for IRQ0 interrupt swap */
		outb(0x72, 0xcd6); b = inb(0xcd7);
		if (!(b & 0x2))
			acpi_skip_timer_override = 1;
	}

	if (acpi_skip_timer_override) {
		printk(KERN_INFO "SB4X0 revision 0x%x\n", d);
		printk(KERN_INFO "Ignoring ACPI timer override.\n");
		printk(KERN_INFO "If you got timer trouble "
		       "try acpi_use_timer_override\n");
	}
}

static u32 __init ati_sbx00_rev(int num, int slot, int func)
{
	u32 d;

	d = read_pci_config(num, slot, func, 0x8);
	d &= 0xff;

	return d;
}

static void __init ati_bugs_contd(int num, int slot, int func)
{
	u32 d, rev;

	rev = ati_sbx00_rev(num, slot, func);
	if (rev >= 0x40)
		acpi_fix_pin2_polarity = 1;

	/*
	 * SB600: revisions 0x11, 0x12, 0x13, 0x14, ...
	 * SB700: revisions 0x39, 0x3a, ...
	 * SB800: revisions 0x40, 0x41, ...
	 */
	if (rev >= 0x39)
		return;

	if (acpi_use_timer_override)
		return;

	/* check for IRQ0 interrupt swap */
	d = read_pci_config(num, slot, func, 0x64);
	if (!(d & (1<<14)))
		acpi_skip_timer_override = 1;

	if (acpi_skip_timer_override) {
		printk(KERN_INFO "SB600 revision 0x%x\n", rev);
		printk(KERN_INFO "Ignoring ACPI timer override.\n");
		printk(KERN_INFO "If you got timer trouble "
		       "try acpi_use_timer_override\n");
	}
}
#else
static void __init ati_bugs(int num, int slot, int func)
{
}

static void __init ati_bugs_contd(int num, int slot, int func)
{
}
#endif

#define QFLAG_APPLY_ONCE 	0x1
#define QFLAG_APPLIED		0x2
#define QFLAG_DONE		(QFLAG_APPLY_ONCE|QFLAG_APPLIED)
struct chipset {
	u32 vendor;
	u32 device;
	u32 class;
	u32 class_mask;
	u32 flags;
	void (*f)(int num, int slot, int func);
};

/*
 * Only works for devices on the root bus. If you add any devices
 * not on bus 0 readd another loop level in early_quirks(). But
 * be careful because at least the Nvidia quirk here relies on
 * only matching on bus 0.
 */
static struct chipset early_qrk[] __initdata = {
	{ PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
	  PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
	{ PCI_VENDOR_ID_VIA, PCI_ANY_ID,
	  PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
	  PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
	{}
};

/**
 * check_dev_quirk - apply early quirks to a given PCI device
 * @num: bus number
 * @slot: slot number
 * @func: PCI function
 *
 * Check the vendor & device ID against the early quirks table.
 *
 * If the device is single function, let early_quirks() know so we don't
 * poke at this device again.
 */
static int __init check_dev_quirk(int num, int slot, int func)
{
	u16 class;
	u16 vendor;
	u16 device;
	u8 type;
	int i;

	class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);

	if (class == 0xffff)
		return -1; /* no class, treat as single function */

	vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);

	device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);

	for (i = 0; early_qrk[i].f != NULL; i++) {
		if (((early_qrk[i].vendor == PCI_ANY_ID) ||
			(early_qrk[i].vendor == vendor)) &&
			((early_qrk[i].device == PCI_ANY_ID) ||
			(early_qrk[i].device == device)) &&
			(!((early_qrk[i].class ^ class) &
			    early_qrk[i].class_mask))) {
				if ((early_qrk[i].flags &
				     QFLAG_DONE) != QFLAG_DONE)
					early_qrk[i].f(num, slot, func);
				early_qrk[i].flags |= QFLAG_APPLIED;
			}
	}

	type = read_pci_config_byte(num, slot, func,
				    PCI_HEADER_TYPE);
	if (!(type & 0x80))
		return -1;

	return 0;
}

void __init early_quirks(void)
{
	int slot, func;

	if (!early_pci_allowed())
		return;

	/* Poor man's PCI discovery */
	/* Only scan the root bus */
	for (slot = 0; slot < 32; slot++)
		for (func = 0; func < 8; func++) {
			/* Only probe function 0 on single fn devices */
			if (check_dev_quirk(0, slot, func))
				break;
		}
}
Commit	Line	Data
dfa4698c AK	1	/* Various workarounds for chipset bugs.
	2	This code runs very early and can't use the regular PCI subsystem
	3	The entries are keyed to PCI bridges which usually identify chipsets
	4	uniquely.
	5	This is only for whole classes of chipsets with specific problems which
	6	need early invasive action (e.g. before the timers are initialized).
	7	Most PCI device specific workarounds can be done later and should be
	8	in standard PCI quirks
	9	Mainboard specific bugs should be handled by DMI entries.
	10	CPU specific bugs in setup.c */
	11
	12	#include <linux/pci.h>
	13	#include <linux/acpi.h>
	14	#include <linux/pci_ids.h>
	15	#include <asm/pci-direct.h>
dfa4698c	16	#include <asm/dma.h>
54ef3400 AK	17	#include <asm/io_apic.h>
54ef3400 AK	18	#include <asm/apic.h>
46a7fa27	19	#include <asm/iommu.h>
1d9b16d1	20	#include <asm/gart.h>
dfa4698c	21
c6b48324 NH	22	static void __init fix_hypertransport_config(int num, int slot, int func)
	23	{
	24	u32 htcfg;
	25	/*
	26	* we found a hypertransport bus
	27	* make sure that we are broadcasting
	28	* interrupts to all cpus on the ht bus
	29	* if we're using extended apic ids
	30	*/
	31	htcfg = read_pci_config(num, slot, func, 0x68);
	32	if (htcfg & (1 << 18)) {
7bcbc78d NH	33	printk(KERN_INFO "Detected use of extended apic ids "
7bcbc78d NH	34	"on hypertransport bus\n");
c6b48324	35	if ((htcfg & (1 << 17)) == 0) {
7bcbc78d NH	36	printk(KERN_INFO "Enabling hypertransport extended "
	37	"apic interrupt broadcast\n");
	38	printk(KERN_INFO "Note this is a bios bug, "
	39	"please contact your hw vendor\n");
c6b48324 NH	40	htcfg \|= (1 << 17);
	41	write_pci_config(num, slot, func, 0x68, htcfg);
	42	}
	43	}
	44
	45
	46	}
	47
	48	static void __init via_bugs(int num, int slot, int func)
dfa4698c	49	{
966396d3	50	#ifdef CONFIG_GART_IOMMU
c987d12f	51	if ((max_pfn > MAX_DMA32_PFN \|\| force_iommu) &&
0440d4c0	52	!gart_iommu_aperture_allowed) {
dfa4698c	53	printk(KERN_INFO
54ef3400 AK	54	"Looks like a VIA chipset. Disabling IOMMU."
54ef3400 AK	55	" Override with iommu=allowed\n");
0440d4c0	56	gart_iommu_aperture_disabled = 1;
dfa4698c AK	57	}
	58	#endif
	59	}
	60
	61	#ifdef CONFIG_ACPI
03d0d20e	62	#ifdef CONFIG_X86_IO_APIC
dfa4698c	63
15a58ed1	64	static int __init nvidia_hpet_check(struct acpi_table_header *header)
dfa4698c	65	{
dfa4698c AK	66	return 0;
dfa4698c AK	67	}
03d0d20e JG	68	#endif /* CONFIG_X86_IO_APIC */
03d0d20e JG	69	#endif /* CONFIG_ACPI */
dfa4698c	70
c6b48324	71	static void __init nvidia_bugs(int num, int slot, int func)
dfa4698c AK	72	{
dfa4698c AK	73	#ifdef CONFIG_ACPI
54ef3400	74	#ifdef CONFIG_X86_IO_APIC
dfa4698c AK	75	/*
	76	* All timer overrides on Nvidia are
	77	* wrong unless HPET is enabled.
fa18f477 AK	78	* Unfortunately that's not true on many Asus boards.
	79	* We don't know yet how to detect this automatically, but
	80	* at least allow a command line override.
dfa4698c	81	*/
fa18f477 AK	82	if (acpi_use_timer_override)
	83	return;
	84
fe699336	85	if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
dfa4698c AK	86	acpi_skip_timer_override = 1;
	87	printk(KERN_INFO "Nvidia board "
	88	"detected. Ignoring ACPI "
	89	"timer override.\n");
fa18f477 AK	90	printk(KERN_INFO "If you got timer trouble "
fa18f477 AK	91	"try acpi_use_timer_override\n");
dfa4698c	92	}
54ef3400	93	#endif
dfa4698c AK	94	#endif
	95	/* RED-PEN skip them on mptables too? */
	96
	97	}
	98
26adcfbf AH	99	#if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
26adcfbf AH	100	static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
33fb0e4e AH	101	{
	102	u32 d;
	103	u8 b;
	104
	105	b = read_pci_config_byte(num, slot, func, 0xac);
	106	b &= ~(1<<5);
	107	write_pci_config_byte(num, slot, func, 0xac, b);
	108
	109	d = read_pci_config(num, slot, func, 0x70);
	110	d \|= 1<<8;
	111	write_pci_config(num, slot, func, 0x70, d);
	112
	113	d = read_pci_config(num, slot, func, 0x8);
	114	d &= 0xff;
	115	return d;
	116	}
	117
	118	static void __init ati_bugs(int num, int slot, int func)
	119	{
33fb0e4e AH	120	u32 d;
	121	u8 b;
	122
	123	if (acpi_use_timer_override)
	124	return;
	125
	126	d = ati_ixp4x0_rev(num, slot, func);
	127	if (d < 0x82)
	128	acpi_skip_timer_override = 1;
	129	else {
	130	/* check for IRQ0 interrupt swap */
	131	outb(0x72, 0xcd6); b = inb(0xcd7);
	132	if (!(b & 0x2))
	133	acpi_skip_timer_override = 1;
	134	}
	135
	136	if (acpi_skip_timer_override) {
	137	printk(KERN_INFO "SB4X0 revision 0x%x\n", d);
	138	printk(KERN_INFO "Ignoring ACPI timer override.\n");
	139	printk(KERN_INFO "If you got timer trouble "
	140	"try acpi_use_timer_override\n");
	141	}
33fb0e4e AH	142	}
33fb0e4e AH	143
26adcfbf AH	144	static u32 __init ati_sbx00_rev(int num, int slot, int func)
26adcfbf AH	145	{
7f74f8f2	146	u32 d;
26adcfbf	147
26adcfbf AH	148	d = read_pci_config(num, slot, func, 0x8);
26adcfbf AH	149	d &= 0xff;
26adcfbf AH	150
	151	return d;
	152	}
	153
	154	static void __init ati_bugs_contd(int num, int slot, int func)
	155	{
	156	u32 d, rev;
	157
26adcfbf	158	rev = ati_sbx00_rev(num, slot, func);
7f74f8f2 AH	159	if (rev >= 0x40)
	160	acpi_fix_pin2_polarity = 1;
	161
1d3e09a3 AH	162	/*
	163	* SB600: revisions 0x11, 0x12, 0x13, 0x14, ...
	164	* SB700: revisions 0x39, 0x3a, ...
	165	* SB800: revisions 0x40, 0x41, ...
	166	*/
	167	if (rev >= 0x39)
26adcfbf AH	168	return;
26adcfbf AH	169
7f74f8f2 AH	170	if (acpi_use_timer_override)
	171	return;
	172
26adcfbf AH	173	/* check for IRQ0 interrupt swap */
	174	d = read_pci_config(num, slot, func, 0x64);
	175	if (!(d & (1<<14)))
	176	acpi_skip_timer_override = 1;
	177
	178	if (acpi_skip_timer_override) {
	179	printk(KERN_INFO "SB600 revision 0x%x\n", rev);
	180	printk(KERN_INFO "Ignoring ACPI timer override.\n");
	181	printk(KERN_INFO "If you got timer trouble "
	182	"try acpi_use_timer_override\n");
	183	}
	184	}
	185	#else
	186	static void __init ati_bugs(int num, int slot, int func)
	187	{
	188	}
	189
	190	static void __init ati_bugs_contd(int num, int slot, int func)
	191	{
	192	}
	193	#endif
	194
c6b48324 NH	195	#define QFLAG_APPLY_ONCE 0x1
	196	#define QFLAG_APPLIED 0x2
	197	#define QFLAG_DONE (QFLAG_APPLY_ONCE\|QFLAG_APPLIED)
dfa4698c	198	struct chipset {
c6b48324 NH	199	u32 vendor;
	200	u32 device;
	201	u32 class;
	202	u32 class_mask;
	203	u32 flags;
	204	void (*f)(int num, int slot, int func);
dfa4698c AK	205	};
dfa4698c AK	206
8659c406 AK	207	/*
	208	* Only works for devices on the root bus. If you add any devices
	209	* not on bus 0 readd another loop level in early_quirks(). But
	210	* be careful because at least the Nvidia quirk here relies on
	211	* only matching on bus 0.
	212	*/
c993c735	213	static struct chipset early_qrk[] __initdata = {
c6b48324 NH	214	{ PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
	215	PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
	216	{ PCI_VENDOR_ID_VIA, PCI_ANY_ID,
	217	PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
c6b48324 NH	218	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
c6b48324 NH	219	PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
33fb0e4e AH	220	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS,
33fb0e4e AH	221	PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
26adcfbf AH	222	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
26adcfbf AH	223	PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
dfa4698c AK	224	{}
	225	};
	226
15650a2f JB	227	/**
	228	* check_dev_quirk - apply early quirks to a given PCI device
	229	* @num: bus number
	230	* @slot: slot number
	231	* @func: PCI function
	232	*
	233	* Check the vendor & device ID against the early quirks table.
	234	*
	235	* If the device is single function, let early_quirks() know so we don't
	236	* poke at this device again.
	237	*/
	238	static int __init check_dev_quirk(int num, int slot, int func)
7bcbc78d NH	239	{
	240	u16 class;
	241	u16 vendor;
	242	u16 device;
	243	u8 type;
	244	int i;
	245
	246	class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
	247
	248	if (class == 0xffff)
15650a2f	249	return -1; /* no class, treat as single function */
7bcbc78d NH	250
	251	vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);
	252
	253	device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
	254
	255	for (i = 0; early_qrk[i].f != NULL; i++) {
	256	if (((early_qrk[i].vendor == PCI_ANY_ID) \|\|
	257	(early_qrk[i].vendor == vendor)) &&
	258	((early_qrk[i].device == PCI_ANY_ID) \|\|
	259	(early_qrk[i].device == device)) &&
	260	(!((early_qrk[i].class ^ class) &
	261	early_qrk[i].class_mask))) {
	262	if ((early_qrk[i].flags &
	263	QFLAG_DONE) != QFLAG_DONE)
	264	early_qrk[i].f(num, slot, func);
	265	early_qrk[i].flags \|= QFLAG_APPLIED;
	266	}
	267	}
	268
	269	type = read_pci_config_byte(num, slot, func,
	270	PCI_HEADER_TYPE);
	271	if (!(type & 0x80))
15650a2f JB	272	return -1;
	273
	274	return 0;
7bcbc78d NH	275	}
7bcbc78d NH	276
dfa4698c AK	277	void __init early_quirks(void)
dfa4698c AK	278	{
8659c406	279	int slot, func;
0637a70a AK	280
	281	if (!early_pci_allowed())
	282	return;
	283
dfa4698c	284	/* Poor man's PCI discovery */
8659c406 AK	285	/* Only scan the root bus */
	286	for (slot = 0; slot < 32; slot++)
	287	for (func = 0; func < 8; func++) {
	288	/* Only probe function 0 on single fn devices */
	289	if (check_dev_quirk(0, slot, func))
	290	break;
	291	}
dfa4698c	292	}