Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Written by: Garry Forsgren, Unisys Corporation | |
3 | * Natalie Protasevich, Unisys Corporation | |
4 | * This file contains the code to configure and interface | |
5 | * with Unisys ES7000 series hardware system manager. | |
6 | * | |
7 | * Copyright (c) 2003 Unisys Corporation. All Rights Reserved. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of version 2 of the GNU General Public License as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it would be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write the Free Software Foundation, Inc., 59 | |
19 | * Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
20 | * | |
21 | * Contact information: Unisys Corporation, Township Line & Union Meeting | |
22 | * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: | |
23 | * | |
24 | * http://www.unisys.com | |
25 | */ | |
26 | ||
2c4ce18c IM |
27 | #include <linux/notifier.h> |
28 | #include <linux/spinlock.h> | |
29 | #include <linux/cpumask.h> | |
30 | #include <linux/threads.h> | |
1da177e4 | 31 | #include <linux/kernel.h> |
2c4ce18c IM |
32 | #include <linux/module.h> |
33 | #include <linux/reboot.h> | |
1da177e4 | 34 | #include <linux/string.h> |
2c4ce18c | 35 | #include <linux/types.h> |
1da177e4 | 36 | #include <linux/errno.h> |
1da177e4 | 37 | #include <linux/acpi.h> |
2c4ce18c IM |
38 | #include <linux/init.h> |
39 | #include <linux/smp.h> | |
40 | ||
1da177e4 | 41 | #include <asm/apicdef.h> |
2c4ce18c IM |
42 | #include <asm/atomic.h> |
43 | #include <asm/fixmap.h> | |
44 | #include <asm/mpspec.h> | |
569712b2 | 45 | #include <asm/setup.h> |
2c4ce18c IM |
46 | #include <asm/apic.h> |
47 | #include <asm/ipi.h> | |
48 | #include <asm/nmi.h> | |
49 | #include <asm/smp.h> | |
50 | #include <asm/io.h> | |
1da177e4 | 51 | |
1625324d YL |
52 | /* |
53 | * ES7000 chipsets | |
54 | */ | |
55 | ||
2c4ce18c IM |
56 | #define NON_UNISYS 0 |
57 | #define ES7000_CLASSIC 1 | |
58 | #define ES7000_ZORRO 2 | |
1625324d | 59 | |
2c4ce18c IM |
60 | #define MIP_REG 1 |
61 | #define MIP_PSAI_REG 4 | |
1625324d | 62 | |
2c4ce18c IM |
63 | #define MIP_BUSY 1 |
64 | #define MIP_SPIN 0xf0000 | |
65 | #define MIP_VALID 0x0100000000000000ULL | |
1625324d | 66 | |
2c4ce18c | 67 | #define MIP_PORT(val) ((val >> 32) & 0xffff) |
1625324d | 68 | |
2c4ce18c | 69 | #define MIP_RD_LO(val) (val & 0xffffffff) |
1625324d YL |
70 | |
71 | struct mip_reg_info { | |
2c4ce18c IM |
72 | unsigned long long mip_info; |
73 | unsigned long long delivery_info; | |
74 | unsigned long long host_reg; | |
75 | unsigned long long mip_reg; | |
1625324d YL |
76 | }; |
77 | ||
78 | struct part_info { | |
2c4ce18c IM |
79 | unsigned char type; |
80 | unsigned char length; | |
81 | unsigned char part_id; | |
82 | unsigned char apic_mode; | |
83 | unsigned long snum; | |
84 | char ptype[16]; | |
85 | char sname[64]; | |
86 | char pname[64]; | |
1625324d YL |
87 | }; |
88 | ||
89 | struct psai { | |
2c4ce18c IM |
90 | unsigned long long entry_type; |
91 | unsigned long long addr; | |
92 | unsigned long long bep_addr; | |
1625324d YL |
93 | }; |
94 | ||
95 | struct es7000_mem_info { | |
2c4ce18c IM |
96 | unsigned char type; |
97 | unsigned char length; | |
98 | unsigned char resv[6]; | |
99 | unsigned long long start; | |
100 | unsigned long long size; | |
1625324d YL |
101 | }; |
102 | ||
103 | struct es7000_oem_table { | |
2c4ce18c IM |
104 | unsigned long long hdr; |
105 | struct mip_reg_info mip; | |
106 | struct part_info pif; | |
107 | struct es7000_mem_info shm; | |
108 | struct psai psai; | |
1625324d YL |
109 | }; |
110 | ||
111 | #ifdef CONFIG_ACPI | |
112 | ||
113 | struct oem_table { | |
2c4ce18c IM |
114 | struct acpi_table_header Header; |
115 | u32 OEMTableAddr; | |
116 | u32 OEMTableSize; | |
1625324d YL |
117 | }; |
118 | ||
1625324d YL |
119 | #endif |
120 | ||
121 | struct mip_reg { | |
2c4ce18c IM |
122 | unsigned long long off_0x00; |
123 | unsigned long long off_0x08; | |
124 | unsigned long long off_0x10; | |
125 | unsigned long long off_0x18; | |
126 | unsigned long long off_0x20; | |
127 | unsigned long long off_0x28; | |
128 | unsigned long long off_0x30; | |
129 | unsigned long long off_0x38; | |
1625324d YL |
130 | }; |
131 | ||
2c4ce18c IM |
132 | #define MIP_SW_APIC 0x1020b |
133 | #define MIP_FUNC(VALUE) (VALUE & 0xff) | |
134 | ||
135 | #define APIC_DFR_VALUE_CLUSTER (APIC_DFR_CLUSTER) | |
136 | #define INT_DELIVERY_MODE_CLUSTER (dest_LowestPrio) | |
137 | #define INT_DEST_MODE_CLUSTER (1) /* logical delivery broadcast to all procs */ | |
138 | ||
139 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | |
140 | ||
1da177e4 LT |
141 | /* |
142 | * ES7000 Globals | |
143 | */ | |
144 | ||
2c4ce18c IM |
145 | static volatile unsigned long *psai = NULL; |
146 | static struct mip_reg *mip_reg; | |
147 | static struct mip_reg *host_reg; | |
148 | static int mip_port; | |
149 | static unsigned long mip_addr, host_addr; | |
1da177e4 | 150 | |
2c4ce18c | 151 | int es7000_plat; |
32c50612 | 152 | |
1da177e4 LT |
153 | /* |
154 | * GSI override for ES7000 platforms. | |
155 | */ | |
156 | ||
2c4ce18c | 157 | static unsigned int base; |
1da177e4 LT |
158 | |
159 | static int | |
160 | es7000_rename_gsi(int ioapic, int gsi) | |
161 | { | |
9338316c NP |
162 | if (es7000_plat == ES7000_ZORRO) |
163 | return gsi; | |
164 | ||
1da177e4 LT |
165 | if (!base) { |
166 | int i; | |
167 | for (i = 0; i < nr_ioapics; i++) | |
168 | base += nr_ioapic_registers[i]; | |
169 | } | |
170 | ||
c7e7964c | 171 | if (!ioapic && (gsi < 16)) |
1da177e4 | 172 | gsi += base; |
2c4ce18c | 173 | |
1da177e4 LT |
174 | return gsi; |
175 | } | |
176 | ||
569712b2 YL |
177 | static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) |
178 | { | |
179 | unsigned long vect = 0, psaival = 0; | |
180 | ||
181 | if (psai == NULL) | |
182 | return -1; | |
183 | ||
184 | vect = ((unsigned long)__pa(eip)/0x1000) << 16; | |
185 | psaival = (0x1000000 | vect | cpu); | |
186 | ||
187 | while (*psai & 0x1000000) | |
188 | ; | |
189 | ||
190 | *psai = psaival; | |
191 | ||
192 | return 0; | |
193 | } | |
54ac14a8 YL |
194 | |
195 | static int __init es7000_update_genapic(void) | |
196 | { | |
c8d46cf0 | 197 | apic->wakeup_cpu = wakeup_secondary_cpu_via_mip; |
54ac14a8 | 198 | |
b5fe363b YL |
199 | /* MPENTIUMIII */ |
200 | if (boot_cpu_data.x86 == 6 && | |
201 | (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) { | |
202 | es7000_update_genapic_to_cluster(); | |
a9659366 | 203 | apic->wait_for_init_deassert = NULL; |
c8d46cf0 | 204 | apic->wakeup_cpu = wakeup_secondary_cpu_via_mip; |
b5fe363b YL |
205 | } |
206 | ||
54ac14a8 YL |
207 | return 0; |
208 | } | |
569712b2 | 209 | |
d3185b37 | 210 | static void __init setup_unisys(void) |
56f1d5d5 NP |
211 | { |
212 | /* | |
213 | * Determine the generation of the ES7000 currently running. | |
214 | * | |
215 | * es7000_plat = 1 if the machine is a 5xx ES7000 box | |
216 | * es7000_plat = 2 if the machine is a x86_64 ES7000 box | |
217 | * | |
218 | */ | |
219 | if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2)) | |
9338316c | 220 | es7000_plat = ES7000_ZORRO; |
56f1d5d5 | 221 | else |
9338316c | 222 | es7000_plat = ES7000_CLASSIC; |
56f1d5d5 | 223 | ioapic_renumber_irq = es7000_rename_gsi; |
54ac14a8 | 224 | |
54ac14a8 | 225 | x86_quirks->update_genapic = es7000_update_genapic; |
56f1d5d5 NP |
226 | } |
227 | ||
1da177e4 | 228 | /* |
d3185b37 | 229 | * Parse the OEM Table: |
1da177e4 | 230 | */ |
d3185b37 | 231 | static int __init parse_unisys_oem (char *oemptr) |
1da177e4 LT |
232 | { |
233 | int i; | |
234 | int success = 0; | |
235 | unsigned char type, size; | |
236 | unsigned long val; | |
237 | char *tp = NULL; | |
238 | struct psai *psaip = NULL; | |
239 | struct mip_reg_info *mi; | |
240 | struct mip_reg *host, *mip; | |
241 | ||
242 | tp = oemptr; | |
243 | ||
244 | tp += 8; | |
245 | ||
56f1d5d5 | 246 | for (i=0; i <= 6; i++) { |
1da177e4 LT |
247 | type = *tp++; |
248 | size = *tp++; | |
249 | tp -= 2; | |
250 | switch (type) { | |
251 | case MIP_REG: | |
252 | mi = (struct mip_reg_info *)tp; | |
253 | val = MIP_RD_LO(mi->host_reg); | |
254 | host_addr = val; | |
255 | host = (struct mip_reg *)val; | |
256 | host_reg = __va(host); | |
257 | val = MIP_RD_LO(mi->mip_reg); | |
258 | mip_port = MIP_PORT(mi->mip_info); | |
259 | mip_addr = val; | |
260 | mip = (struct mip_reg *)val; | |
261 | mip_reg = __va(mip); | |
5171c304 TG |
262 | pr_debug("es7000_mipcfg: host_reg = 0x%lx \n", |
263 | (unsigned long)host_reg); | |
264 | pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n", | |
265 | (unsigned long)mip_reg); | |
1da177e4 LT |
266 | success++; |
267 | break; | |
268 | case MIP_PSAI_REG: | |
269 | psaip = (struct psai *)tp; | |
270 | if (tp != NULL) { | |
271 | if (psaip->addr) | |
272 | psai = __va(psaip->addr); | |
273 | else | |
274 | psai = NULL; | |
275 | success++; | |
276 | } | |
277 | break; | |
278 | default: | |
279 | break; | |
280 | } | |
1da177e4 LT |
281 | tp += size; |
282 | } | |
283 | ||
d3185b37 | 284 | if (success < 2) |
9338316c | 285 | es7000_plat = NON_UNISYS; |
d3185b37 | 286 | else |
56f1d5d5 | 287 | setup_unisys(); |
2c4ce18c | 288 | |
1da177e4 LT |
289 | return es7000_plat; |
290 | } | |
291 | ||
e5428ede | 292 | #ifdef CONFIG_ACPI |
2c4ce18c IM |
293 | |
294 | static unsigned long oem_addrX; | |
295 | static unsigned long oem_size; | |
296 | ||
d3185b37 | 297 | static int __init find_unisys_acpi_oem_table(unsigned long *oem_addr) |
1da177e4 | 298 | { |
ceb6c468 AS |
299 | struct acpi_table_header *header = NULL; |
300 | int i = 0; | |
b825e6cc | 301 | acpi_size tbl_size; |
a73aaedd | 302 | |
b825e6cc | 303 | while (ACPI_SUCCESS(acpi_get_table_with_size("OEM1", i++, &header, &tbl_size))) { |
ceb6c468 AS |
304 | if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) { |
305 | struct oem_table *t = (struct oem_table *)header; | |
a73aaedd YL |
306 | |
307 | oem_addrX = t->OEMTableAddr; | |
308 | oem_size = t->OEMTableSize; | |
b825e6cc | 309 | early_acpi_os_unmap_memory(header, tbl_size); |
a73aaedd YL |
310 | |
311 | *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, | |
312 | oem_size); | |
ceb6c468 | 313 | return 0; |
1da177e4 | 314 | } |
b825e6cc | 315 | early_acpi_os_unmap_memory(header, tbl_size); |
1da177e4 | 316 | } |
1da177e4 LT |
317 | return -1; |
318 | } | |
a73aaedd | 319 | |
d3185b37 | 320 | static void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr) |
a73aaedd | 321 | { |
b825e6cc YL |
322 | if (!oem_addr) |
323 | return; | |
324 | ||
325 | __acpi_unmap_table((char *)oem_addr, oem_size); | |
a73aaedd | 326 | } |
e5428ede | 327 | #endif |
1da177e4 | 328 | |
2c4ce18c | 329 | static void es7000_spin(int n) |
1da177e4 LT |
330 | { |
331 | int i = 0; | |
332 | ||
333 | while (i++ < n) | |
334 | rep_nop(); | |
335 | } | |
336 | ||
337 | static int __init | |
338 | es7000_mip_write(struct mip_reg *mip_reg) | |
339 | { | |
2c4ce18c IM |
340 | int status = 0; |
341 | int spin; | |
1da177e4 LT |
342 | |
343 | spin = MIP_SPIN; | |
2c4ce18c IM |
344 | while ((host_reg->off_0x38 & MIP_VALID) != 0) { |
345 | if (--spin <= 0) { | |
346 | printk("es7000_mip_write: Timeout waiting for Host Valid Flag"); | |
347 | return -1; | |
348 | } | |
1da177e4 LT |
349 | es7000_spin(MIP_SPIN); |
350 | } | |
351 | ||
352 | memcpy(host_reg, mip_reg, sizeof(struct mip_reg)); | |
353 | outb(1, mip_port); | |
354 | ||
355 | spin = MIP_SPIN; | |
356 | ||
2c4ce18c | 357 | while ((mip_reg->off_0x38 & MIP_VALID) == 0) { |
1da177e4 LT |
358 | if (--spin <= 0) { |
359 | printk("es7000_mip_write: Timeout waiting for MIP Valid Flag"); | |
360 | return -1; | |
361 | } | |
362 | es7000_spin(MIP_SPIN); | |
363 | } | |
364 | ||
2c4ce18c IM |
365 | status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48; |
366 | mip_reg->off_0x38 &= ~MIP_VALID; | |
367 | ||
1da177e4 LT |
368 | return status; |
369 | } | |
370 | ||
d3185b37 | 371 | static void __init es7000_enable_apic_mode(void) |
1da177e4 | 372 | { |
b0b20e5a IM |
373 | struct mip_reg es7000_mip_reg; |
374 | int mip_status; | |
375 | ||
376 | if (!es7000_plat) | |
1da177e4 | 377 | return; |
b0b20e5a IM |
378 | |
379 | printk("ES7000: Enabling APIC mode.\n"); | |
380 | memset(&es7000_mip_reg, 0, sizeof(struct mip_reg)); | |
2c4ce18c IM |
381 | es7000_mip_reg.off_0x00 = MIP_SW_APIC; |
382 | es7000_mip_reg.off_0x38 = MIP_VALID; | |
b0b20e5a IM |
383 | |
384 | while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) { | |
385 | printk("es7000_enable_apic_mode: command failed, status = %x\n", | |
386 | mip_status); | |
1da177e4 LT |
387 | } |
388 | } | |
2e096df8 | 389 | |
2e096df8 IM |
390 | static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask) |
391 | { | |
392 | /* Careful. Some cpus do not strictly honor the set of cpus | |
393 | * specified in the interrupt destination when using lowest | |
394 | * priority interrupt delivery mode. | |
395 | * | |
396 | * In particular there was a hyperthreading cpu observed to | |
397 | * deliver interrupts to the wrong hyperthread when only one | |
398 | * hyperthread was specified in the interrupt desitination. | |
399 | */ | |
400 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | |
401 | } | |
402 | ||
403 | ||
404 | static void es7000_wait_for_init_deassert(atomic_t *deassert) | |
405 | { | |
406 | #ifndef CONFIG_ES7000_CLUSTERED_APIC | |
407 | while (!atomic_read(deassert)) | |
408 | cpu_relax(); | |
409 | #endif | |
410 | return; | |
411 | } | |
412 | ||
413 | static unsigned int es7000_get_apic_id(unsigned long x) | |
414 | { | |
415 | return (x >> 24) & 0xFF; | |
416 | } | |
417 | ||
418 | #ifdef CONFIG_ACPI | |
419 | static int es7000_check_dsdt(void) | |
420 | { | |
421 | struct acpi_table_header header; | |
422 | ||
423 | if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) && | |
424 | !strncmp(header.oem_id, "UNISYS", 6)) | |
425 | return 1; | |
426 | return 0; | |
427 | } | |
428 | #endif | |
429 | ||
430 | static void es7000_send_IPI_mask(const struct cpumask *mask, int vector) | |
431 | { | |
43f39890 | 432 | default_send_IPI_mask_sequence_phys(mask, vector); |
2e096df8 IM |
433 | } |
434 | ||
435 | static void es7000_send_IPI_allbutself(int vector) | |
436 | { | |
43f39890 | 437 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); |
2e096df8 IM |
438 | } |
439 | ||
440 | static void es7000_send_IPI_all(int vector) | |
441 | { | |
442 | es7000_send_IPI_mask(cpu_online_mask, vector); | |
443 | } | |
444 | ||
445 | static int es7000_apic_id_registered(void) | |
446 | { | |
447 | return 1; | |
448 | } | |
449 | ||
450 | static const cpumask_t *target_cpus_cluster(void) | |
451 | { | |
452 | return &CPU_MASK_ALL; | |
453 | } | |
454 | ||
455 | static const cpumask_t *es7000_target_cpus(void) | |
456 | { | |
457 | return &cpumask_of_cpu(smp_processor_id()); | |
458 | } | |
459 | ||
460 | static unsigned long | |
461 | es7000_check_apicid_used(physid_mask_t bitmap, int apicid) | |
462 | { | |
463 | return 0; | |
464 | } | |
465 | static unsigned long es7000_check_apicid_present(int bit) | |
466 | { | |
467 | return physid_isset(bit, phys_cpu_present_map); | |
468 | } | |
469 | ||
470 | static unsigned long calculate_ldr(int cpu) | |
471 | { | |
2c4ce18c | 472 | unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu); |
2e096df8 | 473 | |
2c4ce18c | 474 | return SET_APIC_LOGICAL_ID(id); |
2e096df8 IM |
475 | } |
476 | ||
477 | /* | |
478 | * Set up the logical destination ID. | |
479 | * | |
480 | * Intel recommends to set DFR, LdR and TPR before enabling | |
481 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
482 | * document number 292116). So here it goes... | |
483 | */ | |
484 | static void es7000_init_apic_ldr_cluster(void) | |
485 | { | |
486 | unsigned long val; | |
487 | int cpu = smp_processor_id(); | |
488 | ||
489 | apic_write(APIC_DFR, APIC_DFR_VALUE_CLUSTER); | |
490 | val = calculate_ldr(cpu); | |
491 | apic_write(APIC_LDR, val); | |
492 | } | |
493 | ||
494 | static void es7000_init_apic_ldr(void) | |
495 | { | |
496 | unsigned long val; | |
497 | int cpu = smp_processor_id(); | |
498 | ||
499 | apic_write(APIC_DFR, APIC_DFR_VALUE); | |
500 | val = calculate_ldr(cpu); | |
501 | apic_write(APIC_LDR, val); | |
502 | } | |
503 | ||
504 | static void es7000_setup_apic_routing(void) | |
505 | { | |
506 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | |
507 | printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", | |
508 | (apic_version[apic] == 0x14) ? | |
509 | "Physical Cluster" : "Logical Cluster", | |
510 | nr_ioapics, cpus_addr(*es7000_target_cpus())[0]); | |
511 | } | |
512 | ||
513 | static int es7000_apicid_to_node(int logical_apicid) | |
514 | { | |
515 | return 0; | |
516 | } | |
517 | ||
518 | ||
519 | static int es7000_cpu_present_to_apicid(int mps_cpu) | |
520 | { | |
521 | if (!mps_cpu) | |
522 | return boot_cpu_physical_apicid; | |
523 | else if (mps_cpu < nr_cpu_ids) | |
2c4ce18c | 524 | return per_cpu(x86_bios_cpu_apicid, mps_cpu); |
2e096df8 IM |
525 | else |
526 | return BAD_APICID; | |
527 | } | |
528 | ||
529 | static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid) | |
530 | { | |
531 | static int id = 0; | |
532 | physid_mask_t mask; | |
533 | ||
534 | mask = physid_mask_of_physid(id); | |
535 | ++id; | |
536 | ||
537 | return mask; | |
538 | } | |
539 | ||
540 | /* Mapping from cpu number to logical apicid */ | |
541 | static int es7000_cpu_to_logical_apicid(int cpu) | |
542 | { | |
543 | #ifdef CONFIG_SMP | |
544 | if (cpu >= nr_cpu_ids) | |
545 | return BAD_APICID; | |
2f205bc4 | 546 | return cpu_2_logical_apicid[cpu]; |
2e096df8 IM |
547 | #else |
548 | return logical_smp_processor_id(); | |
549 | #endif | |
550 | } | |
551 | ||
552 | static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map) | |
553 | { | |
554 | /* For clustered we don't have a good way to do this yet - hack */ | |
555 | return physids_promote(0xff); | |
556 | } | |
557 | ||
558 | static int es7000_check_phys_apicid_present(int cpu_physical_apicid) | |
559 | { | |
560 | boot_cpu_physical_apicid = read_apic_id(); | |
2c4ce18c | 561 | return 1; |
2e096df8 IM |
562 | } |
563 | ||
564 | static unsigned int | |
565 | es7000_cpu_mask_to_apicid_cluster(const struct cpumask *cpumask) | |
566 | { | |
567 | int cpus_found = 0; | |
568 | int num_bits_set; | |
569 | int apicid; | |
570 | int cpu; | |
571 | ||
572 | num_bits_set = cpumask_weight(cpumask); | |
573 | /* Return id to all */ | |
574 | if (num_bits_set == nr_cpu_ids) | |
575 | return 0xFF; | |
576 | /* | |
577 | * The cpus in the mask must all be on the apic cluster. If are not | |
578 | * on the same apicid cluster return default value of target_cpus(): | |
579 | */ | |
580 | cpu = cpumask_first(cpumask); | |
581 | apicid = es7000_cpu_to_logical_apicid(cpu); | |
582 | ||
583 | while (cpus_found < num_bits_set) { | |
584 | if (cpumask_test_cpu(cpu, cpumask)) { | |
585 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
586 | ||
b9e0d1aa | 587 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
2e096df8 IM |
588 | printk ("%s: Not a valid mask!\n", __func__); |
589 | ||
590 | return 0xFF; | |
591 | } | |
592 | apicid = new_apicid; | |
593 | cpus_found++; | |
594 | } | |
595 | cpu++; | |
596 | } | |
597 | return apicid; | |
598 | } | |
599 | ||
600 | static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask) | |
601 | { | |
602 | int cpus_found = 0; | |
603 | int num_bits_set; | |
604 | int apicid; | |
605 | int cpu; | |
606 | ||
607 | num_bits_set = cpus_weight(*cpumask); | |
608 | /* Return id to all */ | |
609 | if (num_bits_set == nr_cpu_ids) | |
610 | return es7000_cpu_to_logical_apicid(0); | |
611 | /* | |
612 | * The cpus in the mask must all be on the apic cluster. If are not | |
613 | * on the same apicid cluster return default value of target_cpus(): | |
614 | */ | |
615 | cpu = first_cpu(*cpumask); | |
616 | apicid = es7000_cpu_to_logical_apicid(cpu); | |
617 | while (cpus_found < num_bits_set) { | |
618 | if (cpu_isset(cpu, *cpumask)) { | |
619 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
620 | ||
b9e0d1aa | 621 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
2e096df8 IM |
622 | printk ("%s: Not a valid mask!\n", __func__); |
623 | ||
624 | return es7000_cpu_to_logical_apicid(0); | |
625 | } | |
626 | apicid = new_apicid; | |
627 | cpus_found++; | |
628 | } | |
629 | cpu++; | |
630 | } | |
631 | return apicid; | |
632 | } | |
633 | ||
634 | static unsigned int | |
635 | es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask, | |
636 | const struct cpumask *andmask) | |
637 | { | |
638 | int apicid = es7000_cpu_to_logical_apicid(0); | |
639 | cpumask_var_t cpumask; | |
640 | ||
641 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | |
642 | return apicid; | |
643 | ||
644 | cpumask_and(cpumask, inmask, andmask); | |
645 | cpumask_and(cpumask, cpumask, cpu_online_mask); | |
646 | apicid = es7000_cpu_mask_to_apicid(cpumask); | |
647 | ||
648 | free_cpumask_var(cpumask); | |
649 | ||
650 | return apicid; | |
651 | } | |
652 | ||
653 | static int es7000_phys_pkg_id(int cpuid_apic, int index_msb) | |
654 | { | |
655 | return cpuid_apic >> index_msb; | |
656 | } | |
657 | ||
658 | void __init es7000_update_genapic_to_cluster(void) | |
659 | { | |
660 | apic->target_cpus = target_cpus_cluster; | |
661 | apic->irq_delivery_mode = INT_DELIVERY_MODE_CLUSTER; | |
662 | apic->irq_dest_mode = INT_DEST_MODE_CLUSTER; | |
663 | ||
664 | apic->init_apic_ldr = es7000_init_apic_ldr_cluster; | |
665 | ||
666 | apic->cpu_mask_to_apicid = es7000_cpu_mask_to_apicid_cluster; | |
667 | } | |
668 | ||
669 | static int probe_es7000(void) | |
670 | { | |
671 | /* probed later in mptable/ACPI hooks */ | |
672 | return 0; | |
673 | } | |
674 | ||
675 | static __init int | |
676 | es7000_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | |
677 | { | |
678 | if (mpc->oemptr) { | |
679 | struct mpc_oemtable *oem_table = | |
680 | (struct mpc_oemtable *)mpc->oemptr; | |
681 | ||
682 | if (!strncmp(oem, "UNISYS", 6)) | |
683 | return parse_unisys_oem((char *)oem_table); | |
684 | } | |
685 | return 0; | |
686 | } | |
687 | ||
688 | #ifdef CONFIG_ACPI | |
689 | /* Hook from generic ACPI tables.c */ | |
690 | static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |
691 | { | |
692 | unsigned long oem_addr = 0; | |
693 | int check_dsdt; | |
694 | int ret = 0; | |
695 | ||
696 | /* check dsdt at first to avoid clear fix_map for oem_addr */ | |
697 | check_dsdt = es7000_check_dsdt(); | |
698 | ||
699 | if (!find_unisys_acpi_oem_table(&oem_addr)) { | |
d3185b37 | 700 | if (check_dsdt) { |
2e096df8 | 701 | ret = parse_unisys_oem((char *)oem_addr); |
d3185b37 | 702 | } else { |
2e096df8 IM |
703 | setup_unisys(); |
704 | ret = 1; | |
705 | } | |
706 | /* | |
707 | * we need to unmap it | |
708 | */ | |
709 | unmap_unisys_acpi_oem_table(oem_addr); | |
710 | } | |
711 | return ret; | |
712 | } | |
713 | #else | |
714 | static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |
715 | { | |
716 | return 0; | |
717 | } | |
718 | #endif | |
719 | ||
720 | ||
721 | struct genapic apic_es7000 = { | |
722 | ||
723 | .name = "es7000", | |
724 | .probe = probe_es7000, | |
725 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check, | |
726 | .apic_id_registered = es7000_apic_id_registered, | |
727 | ||
728 | .irq_delivery_mode = dest_Fixed, | |
729 | /* phys delivery to target CPUs: */ | |
730 | .irq_dest_mode = 0, | |
731 | ||
732 | .target_cpus = es7000_target_cpus, | |
733 | .disable_esr = 1, | |
734 | .dest_logical = 0, | |
735 | .check_apicid_used = es7000_check_apicid_used, | |
736 | .check_apicid_present = es7000_check_apicid_present, | |
737 | ||
738 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
739 | .init_apic_ldr = es7000_init_apic_ldr, | |
740 | ||
741 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
742 | .setup_apic_routing = es7000_setup_apic_routing, | |
743 | .multi_timer_check = NULL, | |
744 | .apicid_to_node = es7000_apicid_to_node, | |
745 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
746 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
747 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
748 | .setup_portio_remap = NULL, | |
749 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
750 | .enable_apic_mode = es7000_enable_apic_mode, | |
751 | .phys_pkg_id = es7000_phys_pkg_id, | |
752 | .mps_oem_check = es7000_mps_oem_check, | |
753 | ||
754 | .get_apic_id = es7000_get_apic_id, | |
755 | .set_apic_id = NULL, | |
756 | .apic_id_mask = 0xFF << 24, | |
757 | ||
758 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, | |
759 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | |
760 | ||
761 | .send_IPI_mask = es7000_send_IPI_mask, | |
762 | .send_IPI_mask_allbutself = NULL, | |
763 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
764 | .send_IPI_all = es7000_send_IPI_all, | |
6b64ee02 | 765 | .send_IPI_self = default_send_IPI_self, |
2e096df8 IM |
766 | |
767 | .wakeup_cpu = NULL, | |
768 | ||
769 | .trampoline_phys_low = 0x467, | |
770 | .trampoline_phys_high = 0x469, | |
771 | ||
772 | .wait_for_init_deassert = es7000_wait_for_init_deassert, | |
773 | ||
774 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
775 | .smp_callin_clear_local_apic = NULL, | |
776 | .store_NMI_vector = NULL, | |
777 | .inquire_remote_apic = default_inquire_remote_apic, | |
c1eeb2de YL |
778 | |
779 | .read = native_apic_mem_read, | |
780 | .write = native_apic_mem_write, | |
781 | .icr_read = native_apic_icr_read, | |
782 | .icr_write = native_apic_icr_write, | |
783 | .wait_icr_idle = native_apic_wait_icr_idle, | |
784 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
2e096df8 | 785 | }; |