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1da177e4 LT |
1 | /* |
2 | * Copyright 2004 James Cleverdon, IBM. | |
3 | * Subject to the GNU Public License, v.2 | |
4 | * | |
f8d31193 | 5 | * Flat APIC subarch code. |
1da177e4 LT |
6 | * |
7 | * Hacked for x86-64 by James Cleverdon from i386 architecture code by | |
8 | * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and | |
9 | * James Cleverdon. | |
10 | */ | |
f19cccf3 | 11 | #include <linux/errno.h> |
1da177e4 LT |
12 | #include <linux/threads.h> |
13 | #include <linux/cpumask.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/ctype.h> | |
17 | #include <linux/init.h> | |
18 | #include <asm/smp.h> | |
19 | #include <asm/ipi.h> | |
00f1ea69 | 20 | #include <asm/genapic.h> |
1da177e4 | 21 | |
1da177e4 LT |
22 | static cpumask_t flat_target_cpus(void) |
23 | { | |
24 | return cpu_online_map; | |
25 | } | |
26 | ||
c7111c13 EB |
27 | static cpumask_t flat_vector_allocation_domain(int cpu) |
28 | { | |
29 | /* Careful. Some cpus do not strictly honor the set of cpus | |
30 | * specified in the interrupt destination when using lowest | |
31 | * priority interrupt delivery mode. | |
32 | * | |
33 | * In particular there was a hyperthreading cpu observed to | |
34 | * deliver interrupts to the wrong hyperthread when only one | |
35 | * hyperthread was specified in the interrupt desitination. | |
36 | */ | |
37 | cpumask_t domain = { { [0] = APIC_ALL_CPUS, } }; | |
38 | return domain; | |
39 | } | |
40 | ||
1da177e4 LT |
41 | /* |
42 | * Set up the logical destination ID. | |
43 | * | |
44 | * Intel recommends to set DFR, LDR and TPR before enabling | |
45 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
46 | * document number 292116). So here it goes... | |
47 | */ | |
48 | static void flat_init_apic_ldr(void) | |
49 | { | |
50 | unsigned long val; | |
51 | unsigned long num, id; | |
52 | ||
53 | num = smp_processor_id(); | |
54 | id = 1UL << num; | |
eddfb4ed | 55 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
1da177e4 LT |
56 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
57 | val |= SET_APIC_LOGICAL_ID(id); | |
eddfb4ed | 58 | apic_write(APIC_LDR, val); |
1da177e4 LT |
59 | } |
60 | ||
1da177e4 LT |
61 | static void flat_send_IPI_mask(cpumask_t cpumask, int vector) |
62 | { | |
63 | unsigned long mask = cpus_addr(cpumask)[0]; | |
1da177e4 LT |
64 | unsigned long flags; |
65 |