[deliverable/linux.git] / arch / x86 / kernel / irq_64.c

/*
 *	Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
 *
 * This file contains the lowest level x86_64-specific interrupt
 * entry and irq statistics code. All the remaining irq logic is
 * done by the generic kernel/irq/ code and in the
 * x86_64-specific irq controller code. (e.g. i8259.c and
 * io_apic.c.)
 */

#include <linux/kernel_stat.h>
#include <linux/interrupt.h>
#include <linux/seq_file.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <asm/uaccess.h>
#include <asm/io_apic.h>
#include <asm/idle.h>
#include <asm/smp.h>

atomic_t irq_err_count;

/*
 * 'what should we do if we get a hw irq event on an illegal vector'.
 * each architecture has to answer this themselves.
 */
void ack_bad_irq(unsigned int irq)
{
	printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
	/*
	 * Currently unexpected vectors happen only on SMP and APIC.
	 * We _must_ ack these because every local APIC has only N
	 * irq slots per priority level, and a 'hanging, unacked' IRQ
	 * holds up an irq slot - in excessive cases (when multiple
	 * unexpected vectors occur) that might lock up the APIC
	 * completely.
	 * But don't ack when the APIC is disabled. -AK
	 */
	if (!disable_apic)
		ack_APIC_irq();
}

#ifdef CONFIG_DEBUG_STACKOVERFLOW
/*
 * Probabilistic stack overflow check:
 *
 * Only check the stack in process context, because everything else
 * runs on the big interrupt stacks. Checking reliably is too expensive,
 * so we just check from interrupts.
 */
static inline void stack_overflow_check(struct pt_regs *regs)
{
	u64 curbase = (u64)task_stack_page(current);
	static unsigned long warned = -60*HZ;

	if (regs->sp >= curbase && regs->sp <= curbase + THREAD_SIZE &&
	    regs->sp <  curbase + sizeof(struct thread_info) + 128 &&
	    time_after(jiffies, warned + 60*HZ)) {
		printk("do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n",
		       current->comm, curbase, regs->sp);
		show_stack(NULL,NULL);
		warned = jiffies;
	}
}
#endif

/*
 * Generic, controller-independent functions:
 */

int show_interrupts(struct seq_file *p, void *v)
{
	int i = *(loff_t *) v, j;
	struct irqaction * action;
	unsigned long flags;

	if (i == 0) {
		seq_printf(p, "           ");
		for_each_online_cpu(j)
			seq_printf(p, "CPU%-8d",j);
		seq_putc(p, '\n');
	}

	if (i < NR_IRQS) {
		unsigned any_count = 0;

		spin_lock_irqsave(&irq_desc[i].lock, flags);
#ifndef CONFIG_SMP
		any_count = kstat_irqs(i);
#else
		for_each_online_cpu(j)
			any_count |= kstat_cpu(j).irqs[i];
#endif
		action = irq_desc[i].action;
		if (!action && !any_count)
			goto skip;
		seq_printf(p, "%3d: ",i);
#ifndef CONFIG_SMP
		seq_printf(p, "%10u ", kstat_irqs(i));
#else
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
#endif
		seq_printf(p, " %8s", irq_desc[i].chip->name);
		seq_printf(p, "-%-8s", irq_desc[i].name);

		if (action) {
			seq_printf(p, "  %s", action->name);
			while ((action = action->next) != NULL)
				seq_printf(p, ", %s", action->name);
		}
		seq_putc(p, '\n');
skip:
		spin_unlock_irqrestore(&irq_desc[i].lock, flags);
	} else if (i == NR_IRQS) {
		seq_printf(p, "NMI: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->__nmi_count);
		seq_printf(p, "  Non-maskable interrupts\n");
		seq_printf(p, "LOC: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->apic_timer_irqs);
		seq_printf(p, "  Local timer interrupts\n");
#ifdef CONFIG_SMP
		seq_printf(p, "RES: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->irq_resched_count);
		seq_printf(p, "  Rescheduling interrupts\n");
		seq_printf(p, "CAL: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->irq_call_count);
		seq_printf(p, "  function call interrupts\n");
		seq_printf(p, "TLB: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->irq_tlb_count);
		seq_printf(p, "  TLB shootdowns\n");
#endif
		seq_printf(p, "TRM: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->irq_thermal_count);
		seq_printf(p, "  Thermal event interrupts\n");
		seq_printf(p, "THR: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->irq_threshold_count);
		seq_printf(p, "  Threshold APIC interrupts\n");
		seq_printf(p, "SPU: ");
		for_each_online_cpu(j)
			seq_printf(p, "%10u ", cpu_pda(j)->irq_spurious_count);
		seq_printf(p, "  Spurious interrupts\n");
		seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
	}
	return 0;
}

/*
 * do_IRQ handles all normal device IRQ's (the special
 * SMP cross-CPU interrupts have their own specific
 * handlers).
 */
asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
{
	struct pt_regs *old_regs = set_irq_regs(regs);

	/* high bit used in ret_from_ code  */
	unsigned vector = ~regs->orig_ax;
	unsigned irq;

	exit_idle();
	irq_enter();
	irq = __get_cpu_var(vector_irq)[vector];

#ifdef CONFIG_DEBUG_STACKOVERFLOW
	stack_overflow_check(regs);
#endif

	if (likely(irq < NR_IRQS))
		generic_handle_irq(irq);
	else {
		if (!disable_apic)
			ack_APIC_irq();

		if (printk_ratelimit())
			printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
				__func__, smp_processor_id(), vector);
	}

	irq_exit();

	set_irq_regs(old_regs);
	return 1;
}

#ifdef CONFIG_HOTPLUG_CPU
void fixup_irqs(cpumask_t map)
{
	unsigned int irq;
	static int warned;

	for (irq = 0; irq < NR_IRQS; irq++) {
		cpumask_t mask;
		int break_affinity = 0;
		int set_affinity = 1;

		if (irq == 2)
			continue;

		/* interrupt's are disabled at this point */
		spin_lock(&irq_desc[irq].lock);

		if (!irq_has_action(irq) ||
		    cpus_equal(irq_desc[irq].affinity, map)) {
			spin_unlock(&irq_desc[irq].lock);
			continue;
		}

		cpus_and(mask, irq_desc[irq].affinity, map);
		if (cpus_empty(mask)) {
			break_affinity = 1;
			mask = map;
		}

		if (irq_desc[irq].chip->mask)
			irq_desc[irq].chip->mask(irq);

		if (irq_desc[irq].chip->set_affinity)
			irq_desc[irq].chip->set_affinity(irq, mask);
		else if (!(warned++))
			set_affinity = 0;

		if (irq_desc[irq].chip->unmask)
			irq_desc[irq].chip->unmask(irq);

		spin_unlock(&irq_desc[irq].lock);

		if (break_affinity && set_affinity)
			printk("Broke affinity for irq %i\n", irq);
		else if (!set_affinity)
			printk("Cannot set affinity for irq %i\n", irq);
	}

	/* That doesn't seem sufficient.  Give it 1ms. */
	local_irq_enable();
	mdelay(1);
	local_irq_disable();
}
#endif

extern void call_softirq(void);

asmlinkage void do_softirq(void)
{
 	__u32 pending;
 	unsigned long flags;

 	if (in_interrupt())
 		return;

 	local_irq_save(flags);
 	pending = local_softirq_pending();
 	/* Switch to interrupt stack */
 	if (pending) {
		call_softirq();
		WARN_ON_ONCE(softirq_count());
	}
 	local_irq_restore(flags);
}
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
	3	*
	4	* This file contains the lowest level x86_64-specific interrupt
	5	* entry and irq statistics code. All the remaining irq logic is
	6	* done by the generic kernel/irq/ code and in the
	7	* x86_64-specific irq controller code. (e.g. i8259.c and
	8	* io_apic.c.)
	9	*/
	10
	11	#include <linux/kernel_stat.h>
	12	#include <linux/interrupt.h>
	13	#include <linux/seq_file.h>
	14	#include <linux/module.h>
76e4f660	15	#include <linux/delay.h>
1da177e4 LT	16	#include <asm/uaccess.h>
1da177e4 LT	17	#include <asm/io_apic.h>
95833c83	18	#include <asm/idle.h>
2fb12a9b	19	#include <asm/smp.h>
1da177e4 LT	20
1da177e4 LT	21	atomic_t irq_err_count;
1da177e4	22
87ebecf1 TG	23	/*
	24	* 'what should we do if we get a hw irq event on an illegal vector'.
	25	* each architecture has to answer this themselves.
	26	*/
	27	void ack_bad_irq(unsigned int irq)
	28	{
	29	printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
	30	/*
	31	* Currently unexpected vectors happen only on SMP and APIC.
	32	* We _must_ ack these because every local APIC has only N
	33	* irq slots per priority level, and a 'hanging, unacked' IRQ
	34	* holds up an irq slot - in excessive cases (when multiple
	35	* unexpected vectors occur) that might lock up the APIC
	36	* completely.
	37	* But don't ack when the APIC is disabled. -AK
	38	*/
	39	if (!disable_apic)
	40	ack_APIC_irq();
	41	}
	42
4961f10e ES	43	#ifdef CONFIG_DEBUG_STACKOVERFLOW
	44	/*
	45	* Probabilistic stack overflow check:
	46	*
	47	* Only check the stack in process context, because everything else
	48	* runs on the big interrupt stacks. Checking reliably is too expensive,
	49	* so we just check from interrupts.
	50	*/
	51	static inline void stack_overflow_check(struct pt_regs *regs)
	52	{
c9f4f06d	53	u64 curbase = (u64)task_stack_page(current);
4961f10e ES	54	static unsigned long warned = -60*HZ;
4961f10e ES	55
65ea5b03 PA	56	if (regs->sp >= curbase && regs->sp <= curbase + THREAD_SIZE &&
65ea5b03 PA	57	regs->sp < curbase + sizeof(struct thread_info) + 128 &&
4961f10e	58	time_after(jiffies, warned + 60*HZ)) {
65ea5b03 PA	59	printk("do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n",
65ea5b03 PA	60	current->comm, curbase, regs->sp);
4961f10e ES	61	show_stack(NULL,NULL);
	62	warned = jiffies;
	63	}
	64	}
	65	#endif
	66
1da177e4 LT	67	/*
	68	* Generic, controller-independent functions:
	69	*/
	70
	71	int show_interrupts(struct seq_file p, void v)
	72	{
	73	int i = (loff_t ) v, j;
	74	struct irqaction * action;
	75	unsigned long flags;
	76
	77	if (i == 0) {
	78	seq_printf(p, " ");
394e3902	79	for_each_online_cpu(j)
bdbdaa79	80	seq_printf(p, "CPU%-8d",j);
1da177e4 LT	81	seq_putc(p, '\n');
	82	}
	83
	84	if (i < NR_IRQS) {
072f5d82 JB	85	unsigned any_count = 0;
072f5d82 JB	86
1da177e4	87	spin_lock_irqsave(&irq_desc[i].lock, flags);
072f5d82 JB	88	#ifndef CONFIG_SMP
	89	any_count = kstat_irqs(i);
	90	#else
	91	for_each_online_cpu(j)
	92	any_count \|= kstat_cpu(j).irqs[i];
	93	#endif
1da177e4	94	action = irq_desc[i].action;
072f5d82	95	if (!action && !any_count)
1da177e4 LT	96	goto skip;
	97	seq_printf(p, "%3d: ",i);
	98	#ifndef CONFIG_SMP
	99	seq_printf(p, "%10u ", kstat_irqs(i));
	100	#else
394e3902 AM	101	for_each_online_cpu(j)
394e3902 AM	102	seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
1da177e4	103	#endif
f29bd1ba	104	seq_printf(p, " %8s", irq_desc[i].chip->name);
a460e745	105	seq_printf(p, "-%-8s", irq_desc[i].name);
1da177e4	106
072f5d82 JB	107	if (action) {
	108	seq_printf(p, " %s", action->name);
	109	while ((action = action->next) != NULL)
	110	seq_printf(p, ", %s", action->name);
	111	}
1da177e4 LT	112	seq_putc(p, '\n');
	113	skip:
	114	spin_unlock_irqrestore(&irq_desc[i].lock, flags);
	115	} else if (i == NR_IRQS) {
	116	seq_printf(p, "NMI: ");
394e3902 AM	117	for_each_online_cpu(j)
394e3902 AM	118	seq_printf(p, "%10u ", cpu_pda(j)->__nmi_count);
38e760a1	119	seq_printf(p, " Non-maskable interrupts\n");
1da177e4	120	seq_printf(p, "LOC: ");
394e3902 AM	121	for_each_online_cpu(j)
394e3902 AM	122	seq_printf(p, "%10u ", cpu_pda(j)->apic_timer_irqs);
38e760a1 JK	123	seq_printf(p, " Local timer interrupts\n");
	124	#ifdef CONFIG_SMP
	125	seq_printf(p, "RES: ");
	126	for_each_online_cpu(j)
	127	seq_printf(p, "%10u ", cpu_pda(j)->irq_resched_count);
	128	seq_printf(p, " Rescheduling interrupts\n");
	129	seq_printf(p, "CAL: ");
	130	for_each_online_cpu(j)
	131	seq_printf(p, "%10u ", cpu_pda(j)->irq_call_count);
	132	seq_printf(p, " function call interrupts\n");
	133	seq_printf(p, "TLB: ");
	134	for_each_online_cpu(j)
	135	seq_printf(p, "%10u ", cpu_pda(j)->irq_tlb_count);
	136	seq_printf(p, " TLB shootdowns\n");
	137	#endif
	138	seq_printf(p, "TRM: ");
	139	for_each_online_cpu(j)
	140	seq_printf(p, "%10u ", cpu_pda(j)->irq_thermal_count);
	141	seq_printf(p, " Thermal event interrupts\n");
	142	seq_printf(p, "THR: ");
	143	for_each_online_cpu(j)
	144	seq_printf(p, "%10u ", cpu_pda(j)->irq_threshold_count);
	145	seq_printf(p, " Threshold APIC interrupts\n");
	146	seq_printf(p, "SPU: ");
	147	for_each_online_cpu(j)
	148	seq_printf(p, "%10u ", cpu_pda(j)->irq_spurious_count);
	149	seq_printf(p, " Spurious interrupts\n");
1da177e4	150	seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
1da177e4 LT	151	}
	152	return 0;
	153	}
	154
	155	/*
	156	* do_IRQ handles all normal device IRQ's (the special
	157	* SMP cross-CPU interrupts have their own specific
	158	* handlers).
	159	*/
	160	asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
7d12e780 DH	161	{
	162	struct pt_regs *old_regs = set_irq_regs(regs);
	163
19eadf98	164	/* high bit used in ret_from_ code */
65ea5b03	165	unsigned vector = ~regs->orig_ax;
e500f574 EB	166	unsigned irq;
	167
	168	exit_idle();
	169	irq_enter();
550f2299	170	irq = __get_cpu_var(vector_irq)[vector];
1da177e4	171
4961f10e ES	172	#ifdef CONFIG_DEBUG_STACKOVERFLOW
	173	stack_overflow_check(regs);
	174	#endif
d3696cf7 EB	175
	176	if (likely(irq < NR_IRQS))
	177	generic_handle_irq(irq);
2fb12a9b EB	178	else {
	179	if (!disable_apic)
	180	ack_APIC_irq();
	181
	182	if (printk_ratelimit())
	183	printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
	184	__func__, smp_processor_id(), vector);
	185	}
d3696cf7	186
1da177e4 LT	187	irq_exit();
1da177e4 LT	188
7d12e780	189	set_irq_regs(old_regs);
1da177e4 LT	190	return 1;
	191	}
	192
76e4f660 AR	193	#ifdef CONFIG_HOTPLUG_CPU
	194	void fixup_irqs(cpumask_t map)
	195	{
	196	unsigned int irq;
	197	static int warned;
	198
	199	for (irq = 0; irq < NR_IRQS; irq++) {
	200	cpumask_t mask;
48d8d7ee SS	201	int break_affinity = 0;
	202	int set_affinity = 1;
	203
76e4f660 AR	204	if (irq == 2)
	205	continue;
	206
48d8d7ee SS	207	/* interrupt's are disabled at this point */
	208	spin_lock(&irq_desc[irq].lock);
	209
	210	if (!irq_has_action(irq) \|\|
	211	cpus_equal(irq_desc[irq].affinity, map)) {
	212	spin_unlock(&irq_desc[irq].lock);
	213	continue;
	214	}
	215
a53da52f	216	cpus_and(mask, irq_desc[irq].affinity, map);
48d8d7ee SS	217	if (cpus_empty(mask)) {
48d8d7ee SS	218	break_affinity = 1;
76e4f660 AR	219	mask = map;
76e4f660 AR	220	}
48d8d7ee SS	221
	222	if (irq_desc[irq].chip->mask)
	223	irq_desc[irq].chip->mask(irq);
	224
d1bef4ed IM	225	if (irq_desc[irq].chip->set_affinity)
d1bef4ed IM	226	irq_desc[irq].chip->set_affinity(irq, mask);
48d8d7ee SS	227	else if (!(warned++))
	228	set_affinity = 0;
	229
	230	if (irq_desc[irq].chip->unmask)
	231	irq_desc[irq].chip->unmask(irq);
	232
	233	spin_unlock(&irq_desc[irq].lock);
	234
	235	if (break_affinity && set_affinity)
	236	printk("Broke affinity for irq %i\n", irq);
	237	else if (!set_affinity)
76e4f660 AR	238	printk("Cannot set affinity for irq %i\n", irq);
	239	}
	240
	241	/* That doesn't seem sufficient. Give it 1ms. */
	242	local_irq_enable();
	243	mdelay(1);
	244	local_irq_disable();
	245	}
	246	#endif
ed6b676c AK	247
	248	extern void call_softirq(void);
	249
	250	asmlinkage void do_softirq(void)
	251	{
	252	__u32 pending;
	253	unsigned long flags;
	254
	255	if (in_interrupt())
	256	return;
	257
	258	local_irq_save(flags);
	259	pending = local_softirq_pending();
	260	/* Switch to interrupt stack */
2601e64d	261	if (pending) {
ed6b676c	262	call_softirq();
2601e64d IM	263	WARN_ON_ONCE(softirq_count());
2601e64d IM	264	}
ed6b676c AK	265	local_irq_restore(flags);
ed6b676c AK	266	}