Commit | Line | Data |
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3e135d88 PO |
1 | /* |
2 | * Intel CPU Microcode Update Driver for Linux | |
3 | * | |
4 | * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> | |
5 | * 2006 Shaohua Li <shaohua.li@intel.com> | |
6 | * | |
7 | * This driver allows to upgrade microcode on Intel processors | |
8 | * belonging to IA-32 family - PentiumPro, Pentium II, | |
9 | * Pentium III, Xeon, Pentium 4, etc. | |
10 | * | |
11 | * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture | |
12 | * Software Developer's Manual | |
13 | * Order Number 253668 or free download from: | |
14 | * | |
15 | * http://developer.intel.com/design/pentium4/manuals/253668.htm | |
16 | * | |
17 | * For more information, go to http://www.urbanmyth.org/microcode | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or | |
20 | * modify it under the terms of the GNU General Public License | |
21 | * as published by the Free Software Foundation; either version | |
22 | * 2 of the License, or (at your option) any later version. | |
23 | * | |
24 | * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
25 | * Initial release. | |
26 | * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
27 | * Added read() support + cleanups. | |
28 | * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
29 | * Added 'device trimming' support. open(O_WRONLY) zeroes | |
30 | * and frees the saved copy of applied microcode. | |
31 | * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
32 | * Made to use devfs (/dev/cpu/microcode) + cleanups. | |
33 | * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com> | |
34 | * Added misc device support (now uses both devfs and misc). | |
35 | * Added MICROCODE_IOCFREE ioctl to clear memory. | |
36 | * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com> | |
37 | * Messages for error cases (non Intel & no suitable microcode). | |
38 | * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com> | |
39 | * Removed ->release(). Removed exclusive open and status bitmap. | |
40 | * Added microcode_rwsem to serialize read()/write()/ioctl(). | |
41 | * Removed global kernel lock usage. | |
42 | * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com> | |
43 | * Write 0 to 0x8B msr and then cpuid before reading revision, | |
44 | * so that it works even if there were no update done by the | |
45 | * BIOS. Otherwise, reading from 0x8B gives junk (which happened | |
46 | * to be 0 on my machine which is why it worked even when I | |
47 | * disabled update by the BIOS) | |
48 | * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix. | |
49 | * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and | |
50 | * Tigran Aivazian <tigran@veritas.com> | |
51 | * Intel Pentium 4 processor support and bugfixes. | |
52 | * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com> | |
53 | * Bugfix for HT (Hyper-Threading) enabled processors | |
54 | * whereby processor resources are shared by all logical processors | |
55 | * in a single CPU package. | |
56 | * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and | |
57 | * Tigran Aivazian <tigran@veritas.com>, | |
d33dcb9e PO |
58 | * Serialize updates as required on HT processors due to |
59 | * speculative nature of implementation. | |
3e135d88 PO |
60 | * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> |
61 | * Fix the panic when writing zero-length microcode chunk. | |
62 | * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, | |
63 | * Jun Nakajima <jun.nakajima@intel.com> | |
64 | * Support for the microcode updates in the new format. | |
65 | * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> | |
66 | * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl | |
67 | * because we no longer hold a copy of applied microcode | |
68 | * in kernel memory. | |
69 | * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> | |
70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. | |
71 | * Thanks to Stuart Swales for pointing out this bug. | |
72 | */ | |
4bae1967 | 73 | #include <linux/platform_device.h> |
4bae1967 | 74 | #include <linux/miscdevice.h> |
871b72dd | 75 | #include <linux/capability.h> |
3e135d88 | 76 | #include <linux/smp_lock.h> |
4bae1967 IM |
77 | #include <linux/kernel.h> |
78 | #include <linux/module.h> | |
3e135d88 PO |
79 | #include <linux/mutex.h> |
80 | #include <linux/cpu.h> | |
4bae1967 IM |
81 | #include <linux/fs.h> |
82 | #include <linux/mm.h> | |
3e135d88 | 83 | |
3e135d88 | 84 | #include <asm/microcode.h> |
4bae1967 | 85 | #include <asm/processor.h> |
3e135d88 PO |
86 | |
87 | MODULE_DESCRIPTION("Microcode Update Driver"); | |
88 | MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); | |
89 | MODULE_LICENSE("GPL"); | |
90 | ||
4bae1967 | 91 | #define MICROCODE_VERSION "2.00" |
3e135d88 | 92 | |
4bae1967 | 93 | static struct microcode_ops *microcode_ops; |
3e135d88 | 94 | |
871b72dd DA |
95 | /* |
96 | * Synchronization. | |
97 | * | |
98 | * All non cpu-hotplug-callback call sites use: | |
99 | * | |
100 | * - microcode_mutex to synchronize with each other; | |
101 | * - get/put_online_cpus() to synchronize with | |
102 | * the cpu-hotplug-callback call sites. | |
103 | * | |
104 | * We guarantee that only a single cpu is being | |
105 | * updated at any particular moment of time. | |
106 | */ | |
d45de409 | 107 | static DEFINE_MUTEX(microcode_mutex); |
3e135d88 | 108 | |
4bae1967 | 109 | struct ucode_cpu_info ucode_cpu_info[NR_CPUS]; |
8d86f390 | 110 | EXPORT_SYMBOL_GPL(ucode_cpu_info); |
3e135d88 | 111 | |
871b72dd DA |
112 | /* |
113 | * Operations that are run on a target cpu: | |
114 | */ | |
115 | ||
116 | struct cpu_info_ctx { | |
117 | struct cpu_signature *cpu_sig; | |
118 | int err; | |
119 | }; | |
120 | ||
121 | static void collect_cpu_info_local(void *arg) | |
122 | { | |
123 | struct cpu_info_ctx *ctx = arg; | |
124 | ||
125 | ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(), | |
126 | ctx->cpu_sig); | |
127 | } | |
128 | ||
129 | static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig) | |
130 | { | |
131 | struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 }; | |
132 | int ret; | |
133 | ||
134 | ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1); | |
135 | if (!ret) | |
136 | ret = ctx.err; | |
137 | ||
138 | return ret; | |
139 | } | |
140 | ||
141 | static int collect_cpu_info(int cpu) | |
142 | { | |
143 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
144 | int ret; | |
145 | ||
146 | memset(uci, 0, sizeof(*uci)); | |
147 | ||
148 | ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig); | |
149 | if (!ret) | |
150 | uci->valid = 1; | |
151 | ||
152 | return ret; | |
153 | } | |
154 | ||
155 | struct apply_microcode_ctx { | |
156 | int err; | |
157 | }; | |
158 | ||
159 | static void apply_microcode_local(void *arg) | |
160 | { | |
161 | struct apply_microcode_ctx *ctx = arg; | |
162 | ||
163 | ctx->err = microcode_ops->apply_microcode(smp_processor_id()); | |
164 | } | |
165 | ||
166 | static int apply_microcode_on_target(int cpu) | |
167 | { | |
168 | struct apply_microcode_ctx ctx = { .err = 0 }; | |
169 | int ret; | |
170 | ||
171 | ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1); | |
172 | if (!ret) | |
173 | ret = ctx.err; | |
174 | ||
175 | return ret; | |
176 | } | |
177 | ||
3e135d88 | 178 | #ifdef CONFIG_MICROCODE_OLD_INTERFACE |
a0a29b62 | 179 | static int do_microcode_update(const void __user *buf, size_t size) |
3e135d88 | 180 | { |
3e135d88 | 181 | int error = 0; |
3e135d88 | 182 | int cpu; |
6f66cbc6 | 183 | |
a0a29b62 DA |
184 | for_each_online_cpu(cpu) { |
185 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
871b72dd | 186 | enum ucode_state ustate; |
a0a29b62 DA |
187 | |
188 | if (!uci->valid) | |
189 | continue; | |
6f66cbc6 | 190 | |
871b72dd DA |
191 | ustate = microcode_ops->request_microcode_user(cpu, buf, size); |
192 | if (ustate == UCODE_ERROR) { | |
193 | error = -1; | |
194 | break; | |
195 | } else if (ustate == UCODE_OK) | |
196 | apply_microcode_on_target(cpu); | |
3e135d88 | 197 | } |
871b72dd | 198 | |
3e135d88 PO |
199 | return error; |
200 | } | |
201 | ||
d33dcb9e | 202 | static int microcode_open(struct inode *unused1, struct file *unused2) |
3e135d88 PO |
203 | { |
204 | cycle_kernel_lock(); | |
205 | return capable(CAP_SYS_RAWIO) ? 0 : -EPERM; | |
206 | } | |
207 | ||
d33dcb9e PO |
208 | static ssize_t microcode_write(struct file *file, const char __user *buf, |
209 | size_t len, loff_t *ppos) | |
3e135d88 | 210 | { |
871b72dd | 211 | ssize_t ret = -EINVAL; |
3e135d88 | 212 | |
4481374c JB |
213 | if ((len >> PAGE_SHIFT) > totalram_pages) { |
214 | pr_err("microcode: too much data (max %ld pages)\n", totalram_pages); | |
871b72dd | 215 | return ret; |
3e135d88 PO |
216 | } |
217 | ||
218 | get_online_cpus(); | |
219 | mutex_lock(µcode_mutex); | |
220 | ||
871b72dd | 221 | if (do_microcode_update(buf, len) == 0) |
3e135d88 PO |
222 | ret = (ssize_t)len; |
223 | ||
224 | mutex_unlock(µcode_mutex); | |
225 | put_online_cpus(); | |
226 | ||
227 | return ret; | |
228 | } | |
229 | ||
230 | static const struct file_operations microcode_fops = { | |
871b72dd DA |
231 | .owner = THIS_MODULE, |
232 | .write = microcode_write, | |
233 | .open = microcode_open, | |
3e135d88 PO |
234 | }; |
235 | ||
236 | static struct miscdevice microcode_dev = { | |
871b72dd DA |
237 | .minor = MICROCODE_MINOR, |
238 | .name = "microcode", | |
e454cea2 | 239 | .nodename = "cpu/microcode", |
871b72dd | 240 | .fops = µcode_fops, |
3e135d88 PO |
241 | }; |
242 | ||
d33dcb9e | 243 | static int __init microcode_dev_init(void) |
3e135d88 PO |
244 | { |
245 | int error; | |
246 | ||
247 | error = misc_register(µcode_dev); | |
248 | if (error) { | |
871b72dd | 249 | pr_err("microcode: can't misc_register on minor=%d\n", MICROCODE_MINOR); |
3e135d88 PO |
250 | return error; |
251 | } | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
d33dcb9e | 256 | static void microcode_dev_exit(void) |
3e135d88 PO |
257 | { |
258 | misc_deregister(µcode_dev); | |
259 | } | |
260 | ||
261 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | |
262 | #else | |
4bae1967 IM |
263 | #define microcode_dev_init() 0 |
264 | #define microcode_dev_exit() do { } while (0) | |
3e135d88 PO |
265 | #endif |
266 | ||
267 | /* fake device for request_firmware */ | |
4bae1967 | 268 | static struct platform_device *microcode_pdev; |
3e135d88 | 269 | |
871b72dd | 270 | static int reload_for_cpu(int cpu) |
af5c820a | 271 | { |
871b72dd | 272 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
af5c820a RR |
273 | int err = 0; |
274 | ||
275 | mutex_lock(µcode_mutex); | |
276 | if (uci->valid) { | |
871b72dd DA |
277 | enum ucode_state ustate; |
278 | ||
279 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); | |
280 | if (ustate == UCODE_OK) | |
281 | apply_microcode_on_target(cpu); | |
282 | else | |
283 | if (ustate == UCODE_ERROR) | |
284 | err = -EINVAL; | |
af5c820a RR |
285 | } |
286 | mutex_unlock(µcode_mutex); | |
871b72dd | 287 | |
af5c820a RR |
288 | return err; |
289 | } | |
290 | ||
3e135d88 PO |
291 | static ssize_t reload_store(struct sys_device *dev, |
292 | struct sysdev_attribute *attr, | |
871b72dd | 293 | const char *buf, size_t size) |
3e135d88 | 294 | { |
871b72dd | 295 | unsigned long val; |
3e135d88 | 296 | int cpu = dev->id; |
871b72dd DA |
297 | int ret = 0; |
298 | char *end; | |
3e135d88 | 299 | |
871b72dd | 300 | val = simple_strtoul(buf, &end, 0); |
3e135d88 PO |
301 | if (end == buf) |
302 | return -EINVAL; | |
871b72dd | 303 | |
3e135d88 | 304 | if (val == 1) { |
3e135d88 | 305 | get_online_cpus(); |
af5c820a | 306 | if (cpu_online(cpu)) |
871b72dd | 307 | ret = reload_for_cpu(cpu); |
3e135d88 | 308 | put_online_cpus(); |
3e135d88 | 309 | } |
871b72dd DA |
310 | |
311 | if (!ret) | |
312 | ret = size; | |
313 | ||
314 | return ret; | |
3e135d88 PO |
315 | } |
316 | ||
317 | static ssize_t version_show(struct sys_device *dev, | |
318 | struct sysdev_attribute *attr, char *buf) | |
319 | { | |
320 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
321 | ||
d45de409 | 322 | return sprintf(buf, "0x%x\n", uci->cpu_sig.rev); |
3e135d88 PO |
323 | } |
324 | ||
325 | static ssize_t pf_show(struct sys_device *dev, | |
326 | struct sysdev_attribute *attr, char *buf) | |
327 | { | |
328 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
329 | ||
d45de409 | 330 | return sprintf(buf, "0x%x\n", uci->cpu_sig.pf); |
3e135d88 PO |
331 | } |
332 | ||
333 | static SYSDEV_ATTR(reload, 0200, NULL, reload_store); | |
334 | static SYSDEV_ATTR(version, 0400, version_show, NULL); | |
335 | static SYSDEV_ATTR(processor_flags, 0400, pf_show, NULL); | |
336 | ||
337 | static struct attribute *mc_default_attrs[] = { | |
338 | &attr_reload.attr, | |
339 | &attr_version.attr, | |
340 | &attr_processor_flags.attr, | |
341 | NULL | |
342 | }; | |
343 | ||
344 | static struct attribute_group mc_attr_group = { | |
871b72dd DA |
345 | .attrs = mc_default_attrs, |
346 | .name = "microcode", | |
3e135d88 PO |
347 | }; |
348 | ||
871b72dd | 349 | static void microcode_fini_cpu(int cpu) |
d45de409 DA |
350 | { |
351 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
352 | ||
d45de409 DA |
353 | microcode_ops->microcode_fini_cpu(cpu); |
354 | uci->valid = 0; | |
280a9ca5 DA |
355 | } |
356 | ||
871b72dd | 357 | static enum ucode_state microcode_resume_cpu(int cpu) |
d45de409 DA |
358 | { |
359 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
360 | ||
871b72dd DA |
361 | if (!uci->mc) |
362 | return UCODE_NFOUND; | |
363 | ||
364 | pr_debug("microcode: CPU%d updated upon resume\n", cpu); | |
365 | apply_microcode_on_target(cpu); | |
366 | ||
367 | return UCODE_OK; | |
d45de409 DA |
368 | } |
369 | ||
871b72dd | 370 | static enum ucode_state microcode_init_cpu(int cpu) |
d45de409 | 371 | { |
871b72dd | 372 | enum ucode_state ustate; |
d45de409 | 373 | |
871b72dd DA |
374 | if (collect_cpu_info(cpu)) |
375 | return UCODE_ERROR; | |
d45de409 | 376 | |
871b72dd DA |
377 | /* --dimm. Trigger a delayed update? */ |
378 | if (system_state != SYSTEM_RUNNING) | |
379 | return UCODE_NFOUND; | |
d45de409 | 380 | |
871b72dd | 381 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); |
d45de409 | 382 | |
871b72dd DA |
383 | if (ustate == UCODE_OK) { |
384 | pr_debug("microcode: CPU%d updated upon init\n", cpu); | |
385 | apply_microcode_on_target(cpu); | |
d45de409 DA |
386 | } |
387 | ||
871b72dd | 388 | return ustate; |
d45de409 DA |
389 | } |
390 | ||
871b72dd | 391 | static enum ucode_state microcode_update_cpu(int cpu) |
d45de409 | 392 | { |
871b72dd DA |
393 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
394 | enum ucode_state ustate; | |
d45de409 | 395 | |
9f15226e | 396 | if (uci->valid && uci->mc) |
871b72dd DA |
397 | ustate = microcode_resume_cpu(cpu); |
398 | else | |
399 | ustate = microcode_init_cpu(cpu); | |
d45de409 | 400 | |
871b72dd | 401 | return ustate; |
d45de409 DA |
402 | } |
403 | ||
404 | static int mc_sysdev_add(struct sys_device *sys_dev) | |
3e135d88 PO |
405 | { |
406 | int err, cpu = sys_dev->id; | |
3e135d88 PO |
407 | |
408 | if (!cpu_online(cpu)) | |
409 | return 0; | |
410 | ||
411 | pr_debug("microcode: CPU%d added\n", cpu); | |
3e135d88 PO |
412 | |
413 | err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group); | |
414 | if (err) | |
415 | return err; | |
416 | ||
871b72dd DA |
417 | if (microcode_init_cpu(cpu) == UCODE_ERROR) |
418 | err = -EINVAL; | |
af5c820a RR |
419 | |
420 | return err; | |
3e135d88 PO |
421 | } |
422 | ||
3e135d88 PO |
423 | static int mc_sysdev_remove(struct sys_device *sys_dev) |
424 | { | |
425 | int cpu = sys_dev->id; | |
426 | ||
427 | if (!cpu_online(cpu)) | |
428 | return 0; | |
429 | ||
430 | pr_debug("microcode: CPU%d removed\n", cpu); | |
d45de409 | 431 | microcode_fini_cpu(cpu); |
3e135d88 PO |
432 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); |
433 | return 0; | |
434 | } | |
435 | ||
436 | static int mc_sysdev_resume(struct sys_device *dev) | |
437 | { | |
438 | int cpu = dev->id; | |
871b72dd | 439 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
3e135d88 PO |
440 | |
441 | if (!cpu_online(cpu)) | |
442 | return 0; | |
a1c75cc5 | 443 | |
871b72dd DA |
444 | /* |
445 | * All non-bootup cpus are still disabled, | |
446 | * so only CPU 0 will apply ucode here. | |
447 | * | |
448 | * Moreover, there can be no concurrent | |
449 | * updates from any other places at this point. | |
450 | */ | |
451 | WARN_ON(cpu != 0); | |
452 | ||
453 | if (uci->valid && uci->mc) | |
454 | microcode_ops->apply_microcode(cpu); | |
455 | ||
3e135d88 PO |
456 | return 0; |
457 | } | |
458 | ||
459 | static struct sysdev_driver mc_sysdev_driver = { | |
871b72dd DA |
460 | .add = mc_sysdev_add, |
461 | .remove = mc_sysdev_remove, | |
462 | .resume = mc_sysdev_resume, | |
3e135d88 PO |
463 | }; |
464 | ||
465 | static __cpuinit int | |
466 | mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) | |
467 | { | |
468 | unsigned int cpu = (unsigned long)hcpu; | |
469 | struct sys_device *sys_dev; | |
470 | ||
471 | sys_dev = get_cpu_sysdev(cpu); | |
472 | switch (action) { | |
3e135d88 | 473 | case CPU_ONLINE: |
3e135d88 | 474 | case CPU_ONLINE_FROZEN: |
871b72dd | 475 | microcode_update_cpu(cpu); |
d45de409 | 476 | case CPU_DOWN_FAILED: |
3e135d88 | 477 | case CPU_DOWN_FAILED_FROZEN: |
d45de409 | 478 | pr_debug("microcode: CPU%d added\n", cpu); |
3e135d88 | 479 | if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group)) |
871b72dd | 480 | pr_err("microcode: Failed to create group for CPU%d\n", cpu); |
3e135d88 PO |
481 | break; |
482 | case CPU_DOWN_PREPARE: | |
3e135d88 PO |
483 | case CPU_DOWN_PREPARE_FROZEN: |
484 | /* Suspend is in progress, only remove the interface */ | |
485 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); | |
d45de409 DA |
486 | pr_debug("microcode: CPU%d removed\n", cpu); |
487 | break; | |
488 | case CPU_DEAD: | |
489 | case CPU_UP_CANCELED_FROZEN: | |
490 | /* The CPU refused to come up during a system resume */ | |
491 | microcode_fini_cpu(cpu); | |
3e135d88 PO |
492 | break; |
493 | } | |
494 | return NOTIFY_OK; | |
495 | } | |
496 | ||
497 | static struct notifier_block __refdata mc_cpu_notifier = { | |
4bae1967 | 498 | .notifier_call = mc_cpu_callback, |
3e135d88 PO |
499 | }; |
500 | ||
18dbc916 | 501 | static int __init microcode_init(void) |
3e135d88 | 502 | { |
18dbc916 | 503 | struct cpuinfo_x86 *c = &cpu_data(0); |
3e135d88 PO |
504 | int error; |
505 | ||
18dbc916 DA |
506 | if (c->x86_vendor == X86_VENDOR_INTEL) |
507 | microcode_ops = init_intel_microcode(); | |
82b07865 | 508 | else if (c->x86_vendor == X86_VENDOR_AMD) |
18dbc916 | 509 | microcode_ops = init_amd_microcode(); |
8d86f390 | 510 | |
18dbc916 | 511 | if (!microcode_ops) { |
871b72dd | 512 | pr_err("microcode: no support for this CPU vendor\n"); |
18dbc916 DA |
513 | return -ENODEV; |
514 | } | |
3e135d88 | 515 | |
3e135d88 PO |
516 | microcode_pdev = platform_device_register_simple("microcode", -1, |
517 | NULL, 0); | |
518 | if (IS_ERR(microcode_pdev)) { | |
519 | microcode_dev_exit(); | |
520 | return PTR_ERR(microcode_pdev); | |
521 | } | |
522 | ||
d1c84f79 AH |
523 | if (microcode_ops->init) |
524 | microcode_ops->init(µcode_pdev->dev); | |
525 | ||
3e135d88 | 526 | get_online_cpus(); |
871b72dd DA |
527 | mutex_lock(µcode_mutex); |
528 | ||
3e135d88 | 529 | error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); |
871b72dd DA |
530 | |
531 | mutex_unlock(µcode_mutex); | |
3e135d88 | 532 | put_online_cpus(); |
871b72dd | 533 | |
3e135d88 | 534 | if (error) { |
3e135d88 PO |
535 | platform_device_unregister(microcode_pdev); |
536 | return error; | |
537 | } | |
538 | ||
871b72dd DA |
539 | error = microcode_dev_init(); |
540 | if (error) | |
541 | return error; | |
542 | ||
3e135d88 | 543 | register_hotcpu_notifier(&mc_cpu_notifier); |
8d86f390 | 544 | |
871b72dd | 545 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION |
36b75da2 PO |
546 | " <tigran@aivazian.fsnet.co.uk>," |
547 | " Peter Oruba\n"); | |
8d86f390 | 548 | |
3e135d88 PO |
549 | return 0; |
550 | } | |
871b72dd | 551 | module_init(microcode_init); |
3e135d88 | 552 | |
18dbc916 | 553 | static void __exit microcode_exit(void) |
3e135d88 PO |
554 | { |
555 | microcode_dev_exit(); | |
556 | ||
557 | unregister_hotcpu_notifier(&mc_cpu_notifier); | |
558 | ||
559 | get_online_cpus(); | |
871b72dd DA |
560 | mutex_lock(µcode_mutex); |
561 | ||
3e135d88 | 562 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); |
871b72dd DA |
563 | |
564 | mutex_unlock(µcode_mutex); | |
3e135d88 PO |
565 | put_online_cpus(); |
566 | ||
567 | platform_device_unregister(microcode_pdev); | |
3e135d88 | 568 | |
d1c84f79 AH |
569 | if (microcode_ops->fini) |
570 | microcode_ops->fini(); | |
571 | ||
8d86f390 PO |
572 | microcode_ops = NULL; |
573 | ||
871b72dd | 574 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n"); |
8d86f390 | 575 | } |
18dbc916 | 576 | module_exit(microcode_exit); |