Merge branch 'iommu-fixes-2.6.28' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / x86 / kernel / microcode_intel.c
CommitLineData
1da177e4
LT
1/*
2 * Intel CPU Microcode Update Driver for Linux
3 *
69688262 4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9a3110bf 5 * 2006 Shaohua Li <shaohua.li@intel.com>
1da177e4
LT
6 *
7 * This driver allows to upgrade microcode on Intel processors
bc4e0f9a 8 * belonging to IA-32 family - PentiumPro, Pentium II,
1da177e4
LT
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
bc4e0f9a
BC
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
14 *
15 * http://developer.intel.com/design/pentium4/manuals/253668.htm
1da177e4
LT
16 *
17 * For more information, go to http://www.urbanmyth.org/microcode
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
25 * Initial release.
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
f516526f
PO
58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
1da177e4
LT
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
bc4e0f9a 62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
1da177e4
LT
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
bc4e0f9a 67 * because we no longer hold a copy of applied microcode
1da177e4
LT
68 * in kernel memory.
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
72 */
a9415644 73#include <linux/capability.h>
1da177e4
LT
74#include <linux/kernel.h>
75#include <linux/init.h>
76#include <linux/sched.h>
77149367 77#include <linux/smp_lock.h>
5cf6c541 78#include <linux/cpumask.h>
1da177e4
LT
79#include <linux/module.h>
80#include <linux/slab.h>
81#include <linux/vmalloc.h>
82#include <linux/miscdevice.h>
83#include <linux/spinlock.h>
84#include <linux/mm.h>
4e950f6f 85#include <linux/fs.h>
14cc3e2b 86#include <linux/mutex.h>
a30a6a2c
SL
87#include <linux/cpu.h>
88#include <linux/firmware.h>
89#include <linux/platform_device.h>
1da177e4
LT
90
91#include <asm/msr.h>
92#include <asm/uaccess.h>
93#include <asm/processor.h>
9a56a0f8 94#include <asm/microcode.h>
1da177e4 95
3e135d88 96MODULE_DESCRIPTION("Microcode Update Driver");
69688262 97MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
1da177e4
LT
98MODULE_LICENSE("GPL");
99
18dbc916
DA
100struct microcode_header_intel {
101 unsigned int hdrver;
102 unsigned int rev;
103 unsigned int date;
104 unsigned int sig;
105 unsigned int cksum;
106 unsigned int ldrver;
107 unsigned int pf;
108 unsigned int datasize;
109 unsigned int totalsize;
110 unsigned int reserved[3];
111};
112
113struct microcode_intel {
114 struct microcode_header_intel hdr;
115 unsigned int bits[0];
116};
117
118/* microcode format is extended from prescott processors */
119struct extended_signature {
120 unsigned int sig;
121 unsigned int pf;
122 unsigned int cksum;
123};
124
125struct extended_sigtable {
126 unsigned int count;
127 unsigned int cksum;
128 unsigned int reserved[3];
129 struct extended_signature sigs[0];
130};
131
f516526f
PO
132#define DEFAULT_UCODE_DATASIZE (2000)
133#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
134#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
135#define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
136#define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
3e135d88 137#define DWSIZE (sizeof(u32))
1da177e4 138#define get_totalsize(mc) \
d4ee3668
PO
139 (((struct microcode_intel *)mc)->hdr.totalsize ? \
140 ((struct microcode_intel *)mc)->hdr.totalsize : \
141 DEFAULT_UCODE_TOTALSIZE)
142
1da177e4 143#define get_datasize(mc) \
d4ee3668
PO
144 (((struct microcode_intel *)mc)->hdr.datasize ? \
145 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
1da177e4
LT
146
147#define sigmatch(s1, s2, p1, p2) \
148 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
149
150#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
151
152/* serialize access to the physical write to MSR 0x79 */
153static DEFINE_SPINLOCK(microcode_update_lock);
154
d45de409 155static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
1da177e4 156{
92cb7612 157 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
1da177e4
LT
158 unsigned int val[2];
159
d45de409 160 memset(csig, 0, sizeof(*csig));
1da177e4
LT
161
162 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
3e135d88 163 cpu_has(c, X86_FEATURE_IA64)) {
9a3110bf
SL
164 printk(KERN_ERR "microcode: CPU%d not a capable Intel "
165 "processor\n", cpu_num);
d45de409 166 return -1;
9a3110bf 167 }
1da177e4 168
d45de409 169 csig->sig = cpuid_eax(0x00000001);
9a3110bf
SL
170
171 if ((c->x86_model >= 5) || (c->x86 > 6)) {
172 /* get processor flags from MSR 0x17 */
173 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
d45de409 174 csig->pf = 1 << ((val[1] >> 18) & 7);
1da177e4
LT
175 }
176
177 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
245067d1 178 /* see notes above for revision 1.07. Apparent chip bug */
487472bc 179 sync_core();
1da177e4 180 /* get the current revision from MSR 0x8B */
d45de409 181 rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
1da177e4 182 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
d45de409
DA
183 csig->sig, csig->pf, csig->rev);
184
185 return 0;
1da177e4
LT
186}
187
a0a29b62 188static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
1da177e4 189{
a0a29b62
DA
190 return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
191}
1da177e4 192
a0a29b62
DA
193static inline int
194update_match_revision(struct microcode_header_intel *mc_header, int rev)
195{
196 return (mc_header->rev <= rev) ? 0 : 1;
1da177e4
LT
197}
198
8d86f390 199static int microcode_sanity_check(void *mc)
1da177e4 200{
d4ee3668 201 struct microcode_header_intel *mc_header = mc;
9a3110bf
SL
202 struct extended_sigtable *ext_header = NULL;
203 struct extended_signature *ext_sig;
204 unsigned long total_size, data_size, ext_table_size;
205 int sum, orig_sum, ext_sigcount = 0, i;
206
207 total_size = get_totalsize(mc_header);
208 data_size = get_datasize(mc_header);
bd8e39f9 209 if (data_size + MC_HEADER_SIZE > total_size) {
9a3110bf
SL
210 printk(KERN_ERR "microcode: error! "
211 "Bad data size in microcode data file\n");
212 return -EINVAL;
213 }
1da177e4 214
9a3110bf
SL
215 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
216 printk(KERN_ERR "microcode: error! "
217 "Unknown microcode update format\n");
218 return -EINVAL;
219 }
220 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
221 if (ext_table_size) {
222 if ((ext_table_size < EXT_HEADER_SIZE)
223 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
224 printk(KERN_ERR "microcode: error! "
225 "Small exttable size in microcode data file\n");
226 return -EINVAL;
1da177e4 227 }
9a3110bf
SL
228 ext_header = mc + MC_HEADER_SIZE + data_size;
229 if (ext_table_size != exttable_size(ext_header)) {
230 printk(KERN_ERR "microcode: error! "
231 "Bad exttable size in microcode data file\n");
232 return -EFAULT;
1da177e4 233 }
9a3110bf
SL
234 ext_sigcount = ext_header->count;
235 }
1da177e4 236
9a3110bf
SL
237 /* check extended table checksum */
238 if (ext_table_size) {
239 int ext_table_sum = 0;
9a4b9efa 240 int *ext_tablep = (int *)ext_header;
9a3110bf
SL
241
242 i = ext_table_size / DWSIZE;
243 while (i--)
244 ext_table_sum += ext_tablep[i];
245 if (ext_table_sum) {
246 printk(KERN_WARNING "microcode: aborting, "
247 "bad extended signature table checksum\n");
248 return -EINVAL;
1da177e4 249 }
9a3110bf 250 }
1da177e4 251
9a3110bf
SL
252 /* calculate the checksum */
253 orig_sum = 0;
254 i = (MC_HEADER_SIZE + data_size) / DWSIZE;
255 while (i--)
256 orig_sum += ((int *)mc)[i];
257 if (orig_sum) {
258 printk(KERN_ERR "microcode: aborting, bad checksum\n");
259 return -EINVAL;
260 }
261 if (!ext_table_size)
262 return 0;
263 /* check extended signature checksum */
264 for (i = 0; i < ext_sigcount; i++) {
ade1af77
JE
265 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
266 EXT_SIGNATURE_SIZE * i;
9a3110bf
SL
267 sum = orig_sum
268 - (mc_header->sig + mc_header->pf + mc_header->cksum)
269 + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
270 if (sum) {
271 printk(KERN_ERR "microcode: aborting, bad checksum\n");
272 return -EINVAL;
1da177e4 273 }
9a3110bf
SL
274 }
275 return 0;
276}
5cf6c541 277
9a3110bf
SL
278/*
279 * return 0 - no update found
280 * return 1 - found update
9a3110bf 281 */
a0a29b62
DA
282static int
283get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
9a3110bf 284{
d4ee3668 285 struct microcode_header_intel *mc_header = mc;
9a3110bf
SL
286 struct extended_sigtable *ext_header;
287 unsigned long total_size = get_totalsize(mc_header);
288 int ext_sigcount, i;
289 struct extended_signature *ext_sig;
9a3110bf 290
a0a29b62
DA
291 if (!update_match_revision(mc_header, rev))
292 return 0;
293
294 if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
295 return 1;
9a3110bf 296
a0a29b62 297 /* Look for ext. headers: */
9a3110bf
SL
298 if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
299 return 0;
300
ade1af77 301 ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
9a3110bf 302 ext_sigcount = ext_header->count;
ade1af77 303 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
a0a29b62 304
9a3110bf 305 for (i = 0; i < ext_sigcount; i++) {
a0a29b62
DA
306 if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
307 return 1;
9a3110bf
SL
308 ext_sig++;
309 }
310 return 0;
1da177e4
LT
311}
312
8d86f390 313static void apply_microcode(int cpu)
1da177e4
LT
314{
315 unsigned long flags;
316 unsigned int val[2];
9a3110bf 317 int cpu_num = raw_smp_processor_id();
a0a29b62 318 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
18dbc916 319 struct microcode_intel *mc_intel = uci->mc;
1da177e4 320
9a3110bf
SL
321 /* We should bind the task to the CPU */
322 BUG_ON(cpu_num != cpu);
323
18dbc916 324 if (mc_intel == NULL)
1da177e4 325 return;
1da177e4
LT
326
327 /* serialize access to the physical write to MSR 0x79 */
bc4e0f9a 328 spin_lock_irqsave(&microcode_update_lock, flags);
1da177e4
LT
329
330 /* write microcode via MSR 0x79 */
331 wrmsr(MSR_IA32_UCODE_WRITE,
18dbc916
DA
332 (unsigned long) mc_intel->bits,
333 (unsigned long) mc_intel->bits >> 16 >> 16);
1da177e4
LT
334 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
335
245067d1 336 /* see notes above for revision 1.07. Apparent chip bug */
487472bc 337 sync_core();
245067d1 338
1da177e4
LT
339 /* get the current revision from MSR 0x8B */
340 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
341
1da177e4 342 spin_unlock_irqrestore(&microcode_update_lock, flags);
18dbc916 343 if (val[1] != mc_intel->hdr.rev) {
fe176de0 344 printk(KERN_ERR "microcode: CPU%d update from revision "
d45de409 345 "0x%x to 0x%x failed\n", cpu_num, uci->cpu_sig.rev, val[1]);
9a3110bf
SL
346 return;
347 }
fe176de0 348 printk(KERN_INFO "microcode: CPU%d updated from revision "
34a1b9fc 349 "0x%x to 0x%x, date = %04x-%02x-%02x \n",
d45de409 350 cpu_num, uci->cpu_sig.rev, val[1],
18dbc916
DA
351 mc_intel->hdr.date & 0xffff,
352 mc_intel->hdr.date >> 24,
353 (mc_intel->hdr.date >> 16) & 0xff);
d45de409 354 uci->cpu_sig.rev = val[1];
1da177e4
LT
355}
356
a0a29b62
DA
357static int generic_load_microcode(int cpu, void *data, size_t size,
358 int (*get_ucode_data)(void *, const void *, size_t))
9a3110bf 359{
a0a29b62
DA
360 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
361 u8 *ucode_ptr = data, *new_mc = NULL, *mc;
362 int new_rev = uci->cpu_sig.rev;
363 unsigned int leftover = size;
9a3110bf 364
a0a29b62
DA
365 while (leftover) {
366 struct microcode_header_intel mc_header;
367 unsigned int mc_size;
9a3110bf 368
a0a29b62
DA
369 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
370 break;
a30a6a2c 371
a0a29b62
DA
372 mc_size = get_totalsize(&mc_header);
373 if (!mc_size || mc_size > leftover) {
374 printk(KERN_ERR "microcode: error!"
375 "Bad data in microcode data file\n");
376 break;
377 }
a30a6a2c 378
a0a29b62
DA
379 mc = vmalloc(mc_size);
380 if (!mc)
381 break;
382
383 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
384 microcode_sanity_check(mc) < 0) {
385 vfree(mc);
386 break;
387 }
388
389 if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) {
a1c75cc5
IM
390 if (new_mc)
391 vfree(new_mc);
a0a29b62
DA
392 new_rev = mc_header.rev;
393 new_mc = mc;
394 } else
395 vfree(mc);
396
397 ucode_ptr += mc_size;
398 leftover -= mc_size;
a30a6a2c
SL
399 }
400
a0a29b62
DA
401 if (new_mc) {
402 if (!leftover) {
18dbc916
DA
403 if (uci->mc)
404 vfree(uci->mc);
405 uci->mc = (struct microcode_intel *)new_mc;
a0a29b62
DA
406 pr_debug("microcode: CPU%d found a matching microcode update with"
407 " version 0x%x (current=0x%x)\n",
18dbc916 408 cpu, new_rev, uci->cpu_sig.rev);
a0a29b62
DA
409 } else
410 vfree(new_mc);
a30a6a2c 411 }
a0a29b62
DA
412
413 return (int)leftover;
a30a6a2c
SL
414}
415
a0a29b62
DA
416static int get_ucode_fw(void *to, const void *from, size_t n)
417{
418 memcpy(to, from, n);
419 return 0;
420}
a30a6a2c 421
a0a29b62 422static int request_microcode_fw(int cpu, struct device *device)
a30a6a2c
SL
423{
424 char name[30];
92cb7612 425 struct cpuinfo_x86 *c = &cpu_data(cpu);
a30a6a2c 426 const struct firmware *firmware;
a0a29b62 427 int ret;
a30a6a2c
SL
428
429 /* We should bind the task to the CPU */
430 BUG_ON(cpu != raw_smp_processor_id());
3e135d88 431 sprintf(name, "intel-ucode/%02x-%02x-%02x",
a30a6a2c 432 c->x86, c->x86_model, c->x86_mask);
a0a29b62
DA
433 ret = request_firmware(&firmware, name, device);
434 if (ret) {
bc4e0f9a 435 pr_debug("microcode: data file %s load failed\n", name);
a0a29b62 436 return ret;
a30a6a2c 437 }
a0a29b62
DA
438
439 ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size,
440 &get_ucode_fw);
441
a30a6a2c
SL
442 release_firmware(firmware);
443
a0a29b62
DA
444 return ret;
445}
446
447static int get_ucode_user(void *to, const void *from, size_t n)
448{
449 return copy_from_user(to, from, n);
450}
451
452static int request_microcode_user(int cpu, const void __user *buf, size_t size)
453{
454 /* We should bind the task to the CPU */
455 BUG_ON(cpu != raw_smp_processor_id());
456
457 return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user);
a30a6a2c
SL
458}
459
8d86f390 460static void microcode_fini_cpu(int cpu)
a30a6a2c
SL
461{
462 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
463
18dbc916
DA
464 vfree(uci->mc);
465 uci->mc = NULL;
a30a6a2c 466}
8d86f390 467
18dbc916 468struct microcode_ops microcode_intel_ops = {
a0a29b62
DA
469 .request_microcode_user = request_microcode_user,
470 .request_microcode_fw = request_microcode_fw,
8d86f390
PO
471 .collect_cpu_info = collect_cpu_info,
472 .apply_microcode = apply_microcode,
473 .microcode_fini_cpu = microcode_fini_cpu,
474};
475
18dbc916 476struct microcode_ops * __init init_intel_microcode(void)
8d86f390 477{
18dbc916 478 return &microcode_intel_ops;
8d86f390
PO
479}
480
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