Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
11113f84 | 2 | * Intel Multiprocessor Specification 1.1 and 1.4 |
1da177e4 LT |
3 | * compliant MP-table parsing routines. |
4 | * | |
87c6fe26 | 5 | * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk> |
8f47e163 | 6 | * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com> |
85bdddec | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/mm.h> | |
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/delay.h> |
1da177e4 | 13 | #include <linux/bootmem.h> |
1da177e4 LT |
14 | #include <linux/kernel_stat.h> |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/bitops.h> | |
85bdddec AS |
17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | |
103ceffb | 19 | #include <linux/smp.h> |
629e15d2 | 20 | #include <linux/pci.h> |
1da177e4 | 21 | |
1da177e4 LT |
22 | #include <asm/mtrr.h> |
23 | #include <asm/mpspec.h> | |
85bdddec | 24 | #include <asm/pgalloc.h> |
1da177e4 | 25 | #include <asm/io_apic.h> |
85bdddec | 26 | #include <asm/proto.h> |
ce3fe6b2 | 27 | #include <asm/bios_ebda.h> |
2944e16b YL |
28 | #include <asm/e820.h> |
29 | #include <asm/trampoline.h> | |
3c9cb6de | 30 | #include <asm/setup.h> |
4884d8e6 | 31 | #include <asm/smp.h> |
1da177e4 | 32 | |
7b6aa335 | 33 | #include <asm/apic.h> |
1da177e4 LT |
34 | /* |
35 | * Checksum an MP configuration block. | |
36 | */ | |
37 | ||
38 | static int __init mpf_checksum(unsigned char *mp, int len) | |
39 | { | |
40 | int sum = 0; | |
41 | ||
42 | while (len--) | |
43 | sum += *mp++; | |
44 | ||
45 | return sum & 0xFF; | |
46 | } | |
47 | ||
fd6c6661 TG |
48 | int __init default_mpc_apic_id(struct mpc_cpu *m) |
49 | { | |
50 | return m->apicid; | |
51 | } | |
52 | ||
f4f21b71 | 53 | static void __init MP_processor_info(struct mpc_cpu *m) |
c853c676 AS |
54 | { |
55 | int apicid; | |
746f2244 | 56 | char *bootup_cpu = ""; |
c853c676 | 57 | |
c4563826 | 58 | if (!(m->cpuflag & CPU_ENABLED)) { |
7b1292e2 | 59 | disabled_cpus++; |
1da177e4 | 60 | return; |
7b1292e2 | 61 | } |
64898a8b | 62 | |
fd6c6661 | 63 | apicid = x86_init.mpparse.mpc_apic_id(m); |
64898a8b | 64 | |
c4563826 | 65 | if (m->cpuflag & CPU_BOOTPROCESSOR) { |
746f2244 | 66 | bootup_cpu = " (Bootup-CPU)"; |
c4563826 | 67 | boot_cpu_physical_apicid = m->apicid; |
1da177e4 LT |
68 | } |
69 | ||
c4563826 JSR |
70 | printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); |
71 | generic_processor_info(apicid, m->apicver); | |
1da177e4 LT |
72 | } |
73 | ||
85cc35fa | 74 | #ifdef CONFIG_X86_IO_APIC |
00fb8606 | 75 | static void __init MP_bus_info(struct mpc_bus *m) |
1da177e4 LT |
76 | { |
77 | char str[7]; | |
d4c715fa | 78 | memcpy(str, m->bustype, 6); |
1da177e4 LT |
79 | str[6] = 0; |
80 | ||
64898a8b YL |
81 | if (x86_quirks->mpc_oem_bus_info) |
82 | x86_quirks->mpc_oem_bus_info(m, str); | |
83 | else | |
d4c715fa | 84 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str); |
1da177e4 | 85 | |
5e4edbb7 | 86 | #if MAX_MP_BUSSES < 256 |
d4c715fa | 87 | if (m->busid >= MAX_MP_BUSSES) { |
c0ec31ad | 88 | printk(KERN_WARNING "MP table busid value (%d) for bustype %s " |
4ef81297 | 89 | " is too large, max. supported is %d\n", |
d4c715fa | 90 | m->busid, str, MAX_MP_BUSSES - 1); |
c0ec31ad RD |
91 | return; |
92 | } | |
5e4edbb7 | 93 | #endif |
c0ec31ad | 94 | |
f8924e77 | 95 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
d4c715fa | 96 | set_bit(m->busid, mp_bus_not_pci); |
103ceffb | 97 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 98 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; |
f8924e77 AS |
99 | #endif |
100 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | |
52fdb568 TG |
101 | if (x86_init.mpparse.mpc_oem_pci_bus) |
102 | x86_init.mpparse.mpc_oem_pci_bus(m); | |
64898a8b | 103 | |
d4c715fa | 104 | clear_bit(m->busid, mp_bus_not_pci); |
103ceffb | 105 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
d4c715fa | 106 | mp_bus_id_to_type[m->busid] = MP_BUS_PCI; |
4ef81297 | 107 | } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { |
d4c715fa | 108 | mp_bus_id_to_type[m->busid] = MP_BUS_EISA; |
4ef81297 | 109 | } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { |
d4c715fa | 110 | mp_bus_id_to_type[m->busid] = MP_BUS_MCA; |
c0a282c2 | 111 | #endif |
f8924e77 AS |
112 | } else |
113 | printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); | |
1da177e4 | 114 | } |
61048c63 | 115 | |
857033a6 AS |
116 | static int bad_ioapic(unsigned long address) |
117 | { | |
118 | if (nr_ioapics >= MAX_IO_APICS) { | |
119 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
120 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
121 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
122 | } | |
123 | if (!address) { | |
124 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
125 | " found in table, skipping!\n"); | |
126 | return 1; | |
127 | } | |
128 | return 0; | |
129 | } | |
130 | ||
2b85b5fb | 131 | static void __init MP_ioapic_info(struct mpc_ioapic *m) |
1da177e4 | 132 | { |
5df82c7d | 133 | if (!(m->flags & MPC_APIC_USABLE)) |
1da177e4 LT |
134 | return; |
135 | ||
64883ab0 | 136 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", |
5df82c7d | 137 | m->apicid, m->apicver, m->apicaddr); |
857033a6 | 138 | |
5df82c7d | 139 | if (bad_ioapic(m->apicaddr)) |
1da177e4 | 140 | return; |
857033a6 | 141 | |
b5ba7e6d JSR |
142 | mp_ioapics[nr_ioapics].apicaddr = m->apicaddr; |
143 | mp_ioapics[nr_ioapics].apicid = m->apicid; | |
144 | mp_ioapics[nr_ioapics].type = m->type; | |
145 | mp_ioapics[nr_ioapics].apicver = m->apicver; | |
146 | mp_ioapics[nr_ioapics].flags = m->flags; | |
1da177e4 LT |
147 | nr_ioapics++; |
148 | } | |
149 | ||
540d4e72 | 150 | static void print_MP_intsrc_info(struct mpc_intsrc *m) |
1da177e4 | 151 | { |
eeb0d7d1 | 152 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 153 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
e253b396 JSR |
154 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, |
155 | m->srcbusirq, m->dstapic, m->dstirq); | |
2944e16b YL |
156 | } |
157 | ||
c2c21745 | 158 | static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) |
2944e16b | 159 | { |
eeb0d7d1 | 160 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
2944e16b | 161 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
c2c21745 JSR |
162 | mp_irq->irqtype, mp_irq->irqflag & 3, |
163 | (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, | |
164 | mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); | |
2944e16b YL |
165 | } |
166 | ||
540d4e72 | 167 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, |
c2c21745 | 168 | struct mpc_intsrc *mp_irq) |
2944e16b | 169 | { |
c2c21745 JSR |
170 | mp_irq->dstapic = m->dstapic; |
171 | mp_irq->type = m->type; | |
172 | mp_irq->irqtype = m->irqtype; | |
173 | mp_irq->irqflag = m->irqflag; | |
174 | mp_irq->srcbus = m->srcbus; | |
175 | mp_irq->srcbusirq = m->srcbusirq; | |
176 | mp_irq->dstirq = m->dstirq; | |
2944e16b YL |
177 | } |
178 | ||
c2c21745 | 179 | static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, |
540d4e72 | 180 | struct mpc_intsrc *m) |
2944e16b | 181 | { |
c2c21745 JSR |
182 | m->dstapic = mp_irq->dstapic; |
183 | m->type = mp_irq->type; | |
184 | m->irqtype = mp_irq->irqtype; | |
185 | m->irqflag = mp_irq->irqflag; | |
186 | m->srcbus = mp_irq->srcbus; | |
187 | m->srcbusirq = mp_irq->srcbusirq; | |
188 | m->dstirq = mp_irq->dstirq; | |
2944e16b YL |
189 | } |
190 | ||
c2c21745 | 191 | static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, |
540d4e72 | 192 | struct mpc_intsrc *m) |
2944e16b | 193 | { |
c2c21745 | 194 | if (mp_irq->dstapic != m->dstapic) |
2944e16b | 195 | return 1; |
c2c21745 | 196 | if (mp_irq->type != m->type) |
2944e16b | 197 | return 2; |
c2c21745 | 198 | if (mp_irq->irqtype != m->irqtype) |
2944e16b | 199 | return 3; |
c2c21745 | 200 | if (mp_irq->irqflag != m->irqflag) |
2944e16b | 201 | return 4; |
c2c21745 | 202 | if (mp_irq->srcbus != m->srcbus) |
2944e16b | 203 | return 5; |
c2c21745 | 204 | if (mp_irq->srcbusirq != m->srcbusirq) |
2944e16b | 205 | return 6; |
c2c21745 | 206 | if (mp_irq->dstirq != m->dstirq) |
2944e16b YL |
207 | return 7; |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
540d4e72 | 212 | static void __init MP_intsrc_info(struct mpc_intsrc *m) |
2944e16b YL |
213 | { |
214 | int i; | |
215 | ||
216 | print_MP_intsrc_info(m); | |
217 | ||
fcfa146e YL |
218 | for (i = 0; i < mp_irq_entries; i++) { |
219 | if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) | |
220 | return; | |
221 | } | |
2944e16b YL |
222 | |
223 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1da177e4 LT |
224 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
225 | panic("Max # of irq sources exceeded!!\n"); | |
226 | } | |
a6830278 JSR |
227 | #else /* CONFIG_X86_IO_APIC */ |
228 | static inline void __init MP_bus_info(struct mpc_bus *m) {} | |
229 | static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {} | |
230 | static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {} | |
231 | #endif /* CONFIG_X86_IO_APIC */ | |
1da177e4 | 232 | |
61048c63 | 233 | |
8fb2952b | 234 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) |
1da177e4 | 235 | { |
eeb0d7d1 | 236 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 237 | " IRQ %02x, APIC ID %x, APIC LINT %02x\n", |
b5ced7cd JSR |
238 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, |
239 | m->srcbusirq, m->destapic, m->destapiclint); | |
1da177e4 LT |
240 | } |
241 | ||
1da177e4 LT |
242 | /* |
243 | * Read/parse the MPC | |
244 | */ | |
245 | ||
f29521e4 | 246 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) |
1da177e4 | 247 | { |
1da177e4 | 248 | |
6c65da50 | 249 | if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { |
e950bea8 | 250 | printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", |
6c65da50 JSR |
251 | mpc->signature[0], mpc->signature[1], |
252 | mpc->signature[2], mpc->signature[3]); | |
1da177e4 LT |
253 | return 0; |
254 | } | |
6c65da50 | 255 | if (mpf_checksum((unsigned char *)mpc, mpc->length)) { |
e950bea8 | 256 | printk(KERN_ERR "MPTABLE: checksum error!\n"); |
1da177e4 LT |
257 | return 0; |
258 | } | |
6c65da50 | 259 | if (mpc->spec != 0x01 && mpc->spec != 0x04) { |
e950bea8 | 260 | printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", |
6c65da50 | 261 | mpc->spec); |
1da177e4 LT |
262 | return 0; |
263 | } | |
6c65da50 | 264 | if (!mpc->lapic) { |
e950bea8 | 265 | printk(KERN_ERR "MPTABLE: null local APIC address!\n"); |
1da177e4 LT |
266 | return 0; |
267 | } | |
6c65da50 | 268 | memcpy(oem, mpc->oem, 8); |
4ef81297 | 269 | oem[8] = 0; |
11a62a05 | 270 | printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); |
1da177e4 | 271 | |
6c65da50 | 272 | memcpy(str, mpc->productid, 12); |
4ef81297 | 273 | str[12] = 0; |
1da177e4 | 274 | |
11a62a05 | 275 | printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); |
1da177e4 | 276 | |
6c65da50 | 277 | printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic); |
1da177e4 | 278 | |
2944e16b YL |
279 | return 1; |
280 | } | |
281 | ||
a6830278 JSR |
282 | static void skip_entry(unsigned char **ptr, int *count, int size) |
283 | { | |
284 | *ptr += size; | |
285 | *count += size; | |
286 | } | |
287 | ||
5a5737ea JSR |
288 | static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt) |
289 | { | |
290 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n" | |
291 | "type %x\n", *mpt); | |
292 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
293 | 1, mpc, mpc->length, 1); | |
294 | } | |
295 | ||
72302142 TG |
296 | void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { } |
297 | ||
f29521e4 | 298 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
2944e16b YL |
299 | { |
300 | char str[16]; | |
301 | char oem[10]; | |
302 | ||
303 | int count = sizeof(*mpc); | |
304 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
305 | ||
306 | if (!smp_check_mpc(mpc, oem, str)) | |
307 | return 0; | |
308 | ||
309 | #ifdef CONFIG_X86_32 | |
9c764247 | 310 | generic_mps_oem_check(mpc, oem, str); |
2944e16b | 311 | #endif |
e950bea8 | 312 | /* save the local APIC address, it might be non-default */ |
1da177e4 | 313 | if (!acpi_lapic) |
6c65da50 | 314 | mp_lapic_addr = mpc->lapic; |
1da177e4 | 315 | |
888032cd AS |
316 | if (early) |
317 | return 1; | |
318 | ||
72302142 TG |
319 | if (mpc->oemptr) |
320 | x86_init.mpparse.smp_read_mpc_oem(mpc); | |
64898a8b | 321 | |
1da177e4 | 322 | /* |
4ef81297 | 323 | * Now process the configuration blocks. |
1da177e4 | 324 | */ |
f4848472 | 325 | x86_init.mpparse.mpc_record(0); |
64898a8b | 326 | |
6c65da50 | 327 | while (count < mpc->length) { |
4ef81297 AS |
328 | switch (*mpt) { |
329 | case MP_PROCESSOR: | |
a6830278 JSR |
330 | /* ACPI may have already provided this data */ |
331 | if (!acpi_lapic) | |
c58603e8 | 332 | MP_processor_info((struct mpc_cpu *)mpt); |
a6830278 JSR |
333 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); |
334 | break; | |
4ef81297 | 335 | case MP_BUS: |
c58603e8 | 336 | MP_bus_info((struct mpc_bus *)mpt); |
a6830278 JSR |
337 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); |
338 | break; | |
4ef81297 | 339 | case MP_IOAPIC: |
c58603e8 | 340 | MP_ioapic_info((struct mpc_ioapic *)mpt); |
a6830278 JSR |
341 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
342 | break; | |
4ef81297 | 343 | case MP_INTSRC: |
c58603e8 | 344 | MP_intsrc_info((struct mpc_intsrc *)mpt); |
a6830278 JSR |
345 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); |
346 | break; | |
4ef81297 | 347 | case MP_LINTSRC: |
c58603e8 | 348 | MP_lintsrc_info((struct mpc_lintsrc *)mpt); |
a6830278 JSR |
349 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); |
350 | break; | |
4ef81297 | 351 | default: |
711554db | 352 | /* wrong mptable */ |
5a5737ea | 353 | smp_dump_mptable(mpc, mpt); |
6c65da50 | 354 | count = mpc->length; |
711554db | 355 | break; |
1da177e4 | 356 | } |
f4848472 | 357 | x86_init.mpparse.mpc_record(1); |
1da177e4 | 358 | } |
e0da3364 | 359 | |
26f7ef14 YL |
360 | #ifdef CONFIG_X86_BIGSMP |
361 | generic_bigsmp_probe(); | |
e0da3364 YL |
362 | #endif |
363 | ||
72ce0165 IM |
364 | if (apic->setup_apic_routing) |
365 | apic->setup_apic_routing(); | |
366 | ||
1da177e4 | 367 | if (!num_processors) |
e950bea8 | 368 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
1da177e4 LT |
369 | return num_processors; |
370 | } | |
371 | ||
61048c63 AS |
372 | #ifdef CONFIG_X86_IO_APIC |
373 | ||
1da177e4 LT |
374 | static int __init ELCR_trigger(unsigned int irq) |
375 | { | |
376 | unsigned int port; | |
377 | ||
378 | port = 0x4d0 + (irq >> 3); | |
379 | return (inb(port) >> (irq & 7)) & 1; | |
380 | } | |
381 | ||
382 | static void __init construct_default_ioirq_mptable(int mpc_default_type) | |
383 | { | |
540d4e72 | 384 | struct mpc_intsrc intsrc; |
1da177e4 LT |
385 | int i; |
386 | int ELCR_fallback = 0; | |
387 | ||
e253b396 JSR |
388 | intsrc.type = MP_INTSRC; |
389 | intsrc.irqflag = 0; /* conforming */ | |
390 | intsrc.srcbus = 0; | |
b5ba7e6d | 391 | intsrc.dstapic = mp_ioapics[0].apicid; |
1da177e4 | 392 | |
e253b396 | 393 | intsrc.irqtype = mp_INT; |
1da177e4 LT |
394 | |
395 | /* | |
396 | * If true, we have an ISA/PCI system with no IRQ entries | |
397 | * in the MP table. To prevent the PCI interrupts from being set up | |
398 | * incorrectly, we try to use the ELCR. The sanity check to see if | |
399 | * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can | |
400 | * never be level sensitive, so we simply see if the ELCR agrees. | |
401 | * If it does, we assume it's valid. | |
402 | */ | |
403 | if (mpc_default_type == 5) { | |
62441bf1 AS |
404 | printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " |
405 | "falling back to ELCR\n"); | |
1da177e4 | 406 | |
62441bf1 AS |
407 | if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || |
408 | ELCR_trigger(13)) | |
409 | printk(KERN_ERR "ELCR contains invalid data... " | |
410 | "not using ELCR\n"); | |
1da177e4 | 411 | else { |
4ef81297 AS |
412 | printk(KERN_INFO |
413 | "Using ELCR to identify PCI interrupts\n"); | |
1da177e4 LT |
414 | ELCR_fallback = 1; |
415 | } | |
416 | } | |
417 | ||
418 | for (i = 0; i < 16; i++) { | |
419 | switch (mpc_default_type) { | |
420 | case 2: | |
421 | if (i == 0 || i == 13) | |
422 | continue; /* IRQ0 & IRQ13 not connected */ | |
423 | /* fall through */ | |
424 | default: | |
425 | if (i == 2) | |
426 | continue; /* IRQ2 is never connected */ | |
427 | } | |
428 | ||
429 | if (ELCR_fallback) { | |
430 | /* | |
431 | * If the ELCR indicates a level-sensitive interrupt, we | |
432 | * copy that information over to the MP table in the | |
433 | * irqflag field (level sensitive, active high polarity). | |
434 | */ | |
435 | if (ELCR_trigger(i)) | |
e253b396 | 436 | intsrc.irqflag = 13; |
1da177e4 | 437 | else |
e253b396 | 438 | intsrc.irqflag = 0; |
1da177e4 LT |
439 | } |
440 | ||
e253b396 JSR |
441 | intsrc.srcbusirq = i; |
442 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ | |
1da177e4 LT |
443 | MP_intsrc_info(&intsrc); |
444 | } | |
445 | ||
e253b396 JSR |
446 | intsrc.irqtype = mp_ExtINT; |
447 | intsrc.srcbusirq = 0; | |
448 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ | |
1da177e4 LT |
449 | MP_intsrc_info(&intsrc); |
450 | } | |
451 | ||
61048c63 | 452 | |
39e00fe2 | 453 | static void __init construct_ioapic_table(int mpc_default_type) |
1da177e4 | 454 | { |
2b85b5fb | 455 | struct mpc_ioapic ioapic; |
00fb8606 | 456 | struct mpc_bus bus; |
1da177e4 | 457 | |
d4c715fa JSR |
458 | bus.type = MP_BUS; |
459 | bus.busid = 0; | |
1da177e4 | 460 | switch (mpc_default_type) { |
4ef81297 | 461 | default: |
62441bf1 | 462 | printk(KERN_ERR "???\nUnknown standard configuration %d\n", |
4ef81297 AS |
463 | mpc_default_type); |
464 | /* fall through */ | |
465 | case 1: | |
466 | case 5: | |
d4c715fa | 467 | memcpy(bus.bustype, "ISA ", 6); |
4ef81297 AS |
468 | break; |
469 | case 2: | |
470 | case 6: | |
471 | case 3: | |
d4c715fa | 472 | memcpy(bus.bustype, "EISA ", 6); |
4ef81297 AS |
473 | break; |
474 | case 4: | |
475 | case 7: | |
d4c715fa | 476 | memcpy(bus.bustype, "MCA ", 6); |
1da177e4 LT |
477 | } |
478 | MP_bus_info(&bus); | |
479 | if (mpc_default_type > 4) { | |
d4c715fa JSR |
480 | bus.busid = 1; |
481 | memcpy(bus.bustype, "PCI ", 6); | |
1da177e4 LT |
482 | MP_bus_info(&bus); |
483 | } | |
484 | ||
5df82c7d JSR |
485 | ioapic.type = MP_IOAPIC; |
486 | ioapic.apicid = 2; | |
487 | ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
488 | ioapic.flags = MPC_APIC_USABLE; | |
489 | ioapic.apicaddr = 0xFEC00000; | |
1da177e4 LT |
490 | MP_ioapic_info(&ioapic); |
491 | ||
492 | /* | |
493 | * We set up most of the low 16 IO-APIC pins according to MPS rules. | |
494 | */ | |
495 | construct_default_ioirq_mptable(mpc_default_type); | |
85cc35fa TG |
496 | } |
497 | #else | |
39e00fe2 | 498 | static inline void __init construct_ioapic_table(int mpc_default_type) { } |
61048c63 | 499 | #endif |
85cc35fa TG |
500 | |
501 | static inline void __init construct_default_ISA_mptable(int mpc_default_type) | |
502 | { | |
f4f21b71 | 503 | struct mpc_cpu processor; |
8fb2952b | 504 | struct mpc_lintsrc lintsrc; |
85cc35fa TG |
505 | int linttypes[2] = { mp_ExtINT, mp_NMI }; |
506 | int i; | |
507 | ||
508 | /* | |
509 | * local APIC has default address | |
510 | */ | |
511 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
512 | ||
513 | /* | |
514 | * 2 CPUs, numbered 0 & 1. | |
515 | */ | |
c4563826 | 516 | processor.type = MP_PROCESSOR; |
85cc35fa | 517 | /* Either an integrated APIC or a discrete 82489DX. */ |
c4563826 JSR |
518 | processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; |
519 | processor.cpuflag = CPU_ENABLED; | |
520 | processor.cpufeature = (boot_cpu_data.x86 << 8) | | |
85cc35fa | 521 | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; |
c4563826 JSR |
522 | processor.featureflag = boot_cpu_data.x86_capability[0]; |
523 | processor.reserved[0] = 0; | |
524 | processor.reserved[1] = 0; | |
85cc35fa | 525 | for (i = 0; i < 2; i++) { |
c4563826 | 526 | processor.apicid = i; |
85cc35fa TG |
527 | MP_processor_info(&processor); |
528 | } | |
529 | ||
530 | construct_ioapic_table(mpc_default_type); | |
531 | ||
b5ced7cd JSR |
532 | lintsrc.type = MP_LINTSRC; |
533 | lintsrc.irqflag = 0; /* conforming */ | |
534 | lintsrc.srcbusid = 0; | |
535 | lintsrc.srcbusirq = 0; | |
536 | lintsrc.destapic = MP_APIC_ALL; | |
1da177e4 | 537 | for (i = 0; i < 2; i++) { |
b5ced7cd JSR |
538 | lintsrc.irqtype = linttypes[i]; |
539 | lintsrc.destapiclint = i; | |
1da177e4 LT |
540 | MP_lintsrc_info(&lintsrc); |
541 | } | |
542 | } | |
543 | ||
41401db6 | 544 | static struct mpf_intel *mpf_found; |
1da177e4 | 545 | |
8d4dd919 YL |
546 | static unsigned long __init get_mpc_size(unsigned long physptr) |
547 | { | |
548 | struct mpc_table *mpc; | |
549 | unsigned long size; | |
550 | ||
551 | mpc = early_ioremap(physptr, PAGE_SIZE); | |
552 | size = mpc->length; | |
553 | early_iounmap(mpc, PAGE_SIZE); | |
554 | apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size); | |
555 | ||
556 | return size; | |
557 | } | |
558 | ||
0b3ba0c3 JSR |
559 | static int __init check_physptr(struct mpf_intel *mpf, unsigned int early) |
560 | { | |
561 | struct mpc_table *mpc; | |
562 | unsigned long size; | |
563 | ||
564 | size = get_mpc_size(mpf->physptr); | |
565 | mpc = early_ioremap(mpf->physptr, size); | |
566 | /* | |
567 | * Read the physical hardware table. Anything here will | |
568 | * override the defaults. | |
569 | */ | |
570 | if (!smp_read_mpc(mpc, early)) { | |
571 | #ifdef CONFIG_X86_LOCAL_APIC | |
572 | smp_found_config = 0; | |
573 | #endif | |
574 | printk(KERN_ERR "BIOS bug, MP table errors detected!...\n" | |
575 | "... disabling SMP support. (tell your hw vendor)\n"); | |
576 | early_iounmap(mpc, size); | |
577 | return -1; | |
578 | } | |
579 | early_iounmap(mpc, size); | |
580 | ||
581 | if (early) | |
582 | return -1; | |
583 | ||
584 | #ifdef CONFIG_X86_IO_APIC | |
585 | /* | |
586 | * If there are no explicit MP IRQ entries, then we are | |
587 | * broken. We set up most of the low 16 IO-APIC pins to | |
588 | * ISA defaults and hope it will work. | |
589 | */ | |
590 | if (!mp_irq_entries) { | |
591 | struct mpc_bus bus; | |
592 | ||
593 | printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " | |
594 | "using default mptable. (tell your hw vendor)\n"); | |
595 | ||
596 | bus.type = MP_BUS; | |
597 | bus.busid = 0; | |
598 | memcpy(bus.bustype, "ISA ", 6); | |
599 | MP_bus_info(&bus); | |
600 | ||
601 | construct_default_ioirq_mptable(0); | |
602 | } | |
603 | #endif | |
604 | ||
605 | return 0; | |
606 | } | |
607 | ||
1da177e4 LT |
608 | /* |
609 | * Scan the memory blocks for an SMP configuration block. | |
610 | */ | |
3b33553b | 611 | static void __init __get_smp_config(unsigned int early) |
1da177e4 | 612 | { |
41401db6 | 613 | struct mpf_intel *mpf = mpf_found; |
1da177e4 | 614 | |
69b88afa YL |
615 | if (!mpf) |
616 | return; | |
617 | ||
888032cd AS |
618 | if (acpi_lapic && early) |
619 | return; | |
69b88afa | 620 | |
1da177e4 | 621 | /* |
69b88afa YL |
622 | * MPS doesn't support hyperthreading, aka only have |
623 | * thread 0 apic id in MPS table | |
1da177e4 | 624 | */ |
69b88afa | 625 | if (acpi_lapic && acpi_ioapic) |
1da177e4 | 626 | return; |
1da177e4 | 627 | |
69b88afa YL |
628 | if (x86_quirks->mach_get_smp_config) { |
629 | if (x86_quirks->mach_get_smp_config(early)) | |
630 | return; | |
631 | } | |
9adc1386 | 632 | |
4ef81297 | 633 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
1eb1b3b6 | 634 | mpf->specification); |
b3e24164 | 635 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
1eb1b3b6 | 636 | if (mpf->feature2 & (1 << 7)) { |
1da177e4 LT |
637 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
638 | pic_mode = 1; | |
639 | } else { | |
640 | printk(KERN_INFO " Virtual Wire compatibility mode.\n"); | |
641 | pic_mode = 0; | |
642 | } | |
4421b1c8 | 643 | #endif |
1da177e4 LT |
644 | /* |
645 | * Now see if we need to read further. | |
646 | */ | |
1eb1b3b6 | 647 | if (mpf->feature1 != 0) { |
888032cd AS |
648 | if (early) { |
649 | /* | |
650 | * local APIC has default address | |
651 | */ | |
652 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
653 | return; | |
654 | } | |
1da177e4 | 655 | |
4ef81297 | 656 | printk(KERN_INFO "Default MP configuration #%d\n", |
1eb1b3b6 JSR |
657 | mpf->feature1); |
658 | construct_default_ISA_mptable(mpf->feature1); | |
1da177e4 | 659 | |
1eb1b3b6 | 660 | } else if (mpf->physptr) { |
0b3ba0c3 | 661 | if (check_physptr(mpf, early)) |
1da177e4 | 662 | return; |
1da177e4 LT |
663 | } else |
664 | BUG(); | |
665 | ||
888032cd AS |
666 | if (!early) |
667 | printk(KERN_INFO "Processors: %d\n", num_processors); | |
1da177e4 LT |
668 | /* |
669 | * Only use the first configuration found. | |
670 | */ | |
671 | } | |
672 | ||
888032cd AS |
673 | void __init early_get_smp_config(void) |
674 | { | |
675 | __get_smp_config(1); | |
676 | } | |
677 | ||
678 | void __init get_smp_config(void) | |
679 | { | |
680 | __get_smp_config(0); | |
681 | } | |
682 | ||
57592224 | 683 | static void __init smp_reserve_bootmem(struct mpf_intel *mpf) |
a6830278 JSR |
684 | { |
685 | unsigned long size = get_mpc_size(mpf->physptr); | |
686 | #ifdef CONFIG_X86_32 | |
687 | /* | |
688 | * We cannot access to MPC table to compute table size yet, | |
689 | * as only few megabytes from the bottom is mapped now. | |
690 | * PC-9800's MPC table places on the very last of physical | |
691 | * memory; so that simply reserving PAGE_SIZE from mpf->physptr | |
692 | * yields BUG() in reserve_bootmem. | |
693 | * also need to make sure physptr is below than max_low_pfn | |
694 | * we don't need reserve the area above max_low_pfn | |
695 | */ | |
696 | unsigned long end = max_low_pfn * PAGE_SIZE; | |
697 | ||
698 | if (mpf->physptr < end) { | |
699 | if (mpf->physptr + size > end) | |
700 | size = end - mpf->physptr; | |
701 | reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); | |
702 | } | |
703 | #else | |
704 | reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT); | |
705 | #endif | |
706 | } | |
707 | ||
888032cd AS |
708 | static int __init smp_scan_config(unsigned long base, unsigned long length, |
709 | unsigned reserve) | |
1da177e4 | 710 | { |
92fd4b7a | 711 | unsigned int *bp = phys_to_virt(base); |
41401db6 | 712 | struct mpf_intel *mpf; |
1da177e4 | 713 | |
eeb0d7d1 RH |
714 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", |
715 | bp, length); | |
5d47a271 | 716 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
1da177e4 LT |
717 | |
718 | while (length > 0) { | |
41401db6 | 719 | mpf = (struct mpf_intel *)bp; |
1da177e4 | 720 | if ((*bp == SMP_MAGIC_IDENT) && |
1eb1b3b6 | 721 | (mpf->length == 1) && |
4ef81297 | 722 | !mpf_checksum((unsigned char *)bp, 16) && |
1eb1b3b6 JSR |
723 | ((mpf->specification == 1) |
724 | || (mpf->specification == 4))) { | |
bab4b27c | 725 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 726 | smp_found_config = 1; |
bab4b27c | 727 | #endif |
92fd4b7a | 728 | mpf_found = mpf; |
b1f006b6 | 729 | |
ba1511bf JSR |
730 | printk(KERN_INFO "found SMP MP-table at [%p] %llx\n", |
731 | mpf, (u64)virt_to_phys(mpf)); | |
b1f006b6 YL |
732 | |
733 | if (!reserve) | |
734 | return 1; | |
f6243239 | 735 | reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf), |
72a7fe39 | 736 | BOOTMEM_DEFAULT); |
a6830278 JSR |
737 | if (mpf->physptr) |
738 | smp_reserve_bootmem(mpf); | |
1da177e4 | 739 | |
d2dbf343 | 740 | return 1; |
1da177e4 LT |
741 | } |
742 | bp += 4; | |
743 | length -= 16; | |
744 | } | |
745 | return 0; | |
746 | } | |
747 | ||
3b33553b | 748 | static void __init __find_smp_config(unsigned int reserve) |
1da177e4 LT |
749 | { |
750 | unsigned int address; | |
751 | ||
3c9cb6de YL |
752 | if (x86_quirks->mach_find_smp_config) { |
753 | if (x86_quirks->mach_find_smp_config(reserve)) | |
3b33553b IM |
754 | return; |
755 | } | |
1da177e4 LT |
756 | /* |
757 | * FIXME: Linux assumes you have 640K of base ram.. | |
758 | * this continues the error... | |
759 | * | |
760 | * 1) Scan the bottom 1K for a signature | |
761 | * 2) Scan the top 1K of base RAM | |
762 | * 3) Scan the 64K of bios | |
763 | */ | |
888032cd AS |
764 | if (smp_scan_config(0x0, 0x400, reserve) || |
765 | smp_scan_config(639 * 0x400, 0x400, reserve) || | |
766 | smp_scan_config(0xF0000, 0x10000, reserve)) | |
1da177e4 LT |
767 | return; |
768 | /* | |
769 | * If it is an SMP machine we should know now, unless the | |
770 | * configuration is in an EISA/MCA bus machine with an | |
771 | * extended bios data area. | |
772 | * | |
773 | * there is a real-mode segmented pointer pointing to the | |
774 | * 4K EBDA area at 0x40E, calculate and scan it here. | |
775 | * | |
776 | * NOTE! There are Linux loaders that will corrupt the EBDA | |
777 | * area, and as such this kind of SMP config may be less | |
778 | * trustworthy, simply because the SMP table may have been | |
779 | * stomped on during early boot. These loaders are buggy and | |
780 | * should be fixed. | |
781 | * | |
782 | * MP1.4 SPEC states to only scan first 1K of 4K EBDA. | |
783 | */ | |
784 | ||
785 | address = get_bios_ebda(); | |
786 | if (address) | |
888032cd AS |
787 | smp_scan_config(address, 0x400, reserve); |
788 | } | |
789 | ||
790 | void __init early_find_smp_config(void) | |
791 | { | |
792 | __find_smp_config(0); | |
793 | } | |
794 | ||
795 | void __init find_smp_config(void) | |
796 | { | |
797 | __find_smp_config(1); | |
1da177e4 | 798 | } |
2944e16b YL |
799 | |
800 | #ifdef CONFIG_X86_IO_APIC | |
801 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; | |
802 | ||
540d4e72 | 803 | static int __init get_MP_intsrc_index(struct mpc_intsrc *m) |
2944e16b YL |
804 | { |
805 | int i; | |
806 | ||
e253b396 | 807 | if (m->irqtype != mp_INT) |
2944e16b YL |
808 | return 0; |
809 | ||
e253b396 | 810 | if (m->irqflag != 0x0f) |
2944e16b YL |
811 | return 0; |
812 | ||
813 | /* not legacy */ | |
814 | ||
815 | for (i = 0; i < mp_irq_entries; i++) { | |
c2c21745 | 816 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
817 | continue; |
818 | ||
c2c21745 | 819 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
820 | continue; |
821 | ||
c2c21745 | 822 | if (mp_irqs[i].srcbus != m->srcbus) |
2944e16b | 823 | continue; |
c2c21745 | 824 | if (mp_irqs[i].srcbusirq != m->srcbusirq) |
2944e16b YL |
825 | continue; |
826 | if (irq_used[i]) { | |
827 | /* already claimed */ | |
828 | return -2; | |
829 | } | |
830 | irq_used[i] = 1; | |
831 | return i; | |
832 | } | |
833 | ||
834 | /* not found */ | |
835 | return -1; | |
836 | } | |
837 | ||
838 | #define SPARE_SLOT_NUM 20 | |
839 | ||
540d4e72 | 840 | static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; |
a6830278 | 841 | |
57592224 | 842 | static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) |
a6830278 JSR |
843 | { |
844 | int i; | |
845 | ||
846 | apic_printk(APIC_VERBOSE, "OLD "); | |
847 | print_MP_intsrc_info(m); | |
848 | ||
849 | i = get_MP_intsrc_index(m); | |
850 | if (i > 0) { | |
851 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
852 | apic_printk(APIC_VERBOSE, "NEW "); | |
853 | print_mp_irq_info(&mp_irqs[i]); | |
854 | return; | |
855 | } | |
856 | if (!i) { | |
857 | /* legacy, do nothing */ | |
858 | return; | |
859 | } | |
860 | if (*nr_m_spare < SPARE_SLOT_NUM) { | |
861 | /* | |
862 | * not found (-1), or duplicated (-2) are invalid entries, | |
863 | * we need to use the slot later | |
864 | */ | |
865 | m_spare[*nr_m_spare] = m; | |
866 | *nr_m_spare += 1; | |
867 | } | |
868 | } | |
869 | #else /* CONFIG_X86_IO_APIC */ | |
57592224 RM |
870 | static |
871 | inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {} | |
a6830278 JSR |
872 | #endif /* CONFIG_X86_IO_APIC */ |
873 | ||
ee214558 YL |
874 | static int |
875 | check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count) | |
a6830278 | 876 | { |
ee214558 YL |
877 | int ret = 0; |
878 | ||
879 | if (!mpc_new_phys || count <= mpc_new_length) { | |
880 | WARN(1, "update_mptable: No spare slots (length: %x)\n", count); | |
881 | return -1; | |
a6830278 JSR |
882 | } |
883 | ||
ee214558 | 884 | return ret; |
a6830278 | 885 | } |
2944e16b | 886 | |
f29521e4 | 887 | static int __init replace_intsrc_all(struct mpc_table *mpc, |
2944e16b YL |
888 | unsigned long mpc_new_phys, |
889 | unsigned long mpc_new_length) | |
890 | { | |
891 | #ifdef CONFIG_X86_IO_APIC | |
892 | int i; | |
2944e16b | 893 | #endif |
2944e16b | 894 | int count = sizeof(*mpc); |
a6830278 | 895 | int nr_m_spare = 0; |
2944e16b YL |
896 | unsigned char *mpt = ((unsigned char *)mpc) + count; |
897 | ||
6c65da50 JSR |
898 | printk(KERN_INFO "mpc_length %x\n", mpc->length); |
899 | while (count < mpc->length) { | |
2944e16b YL |
900 | switch (*mpt) { |
901 | case MP_PROCESSOR: | |
a6830278 JSR |
902 | skip_entry(&mpt, &count, sizeof(struct mpc_cpu)); |
903 | break; | |
2944e16b | 904 | case MP_BUS: |
a6830278 JSR |
905 | skip_entry(&mpt, &count, sizeof(struct mpc_bus)); |
906 | break; | |
2944e16b | 907 | case MP_IOAPIC: |
a6830278 JSR |
908 | skip_entry(&mpt, &count, sizeof(struct mpc_ioapic)); |
909 | break; | |
2944e16b | 910 | case MP_INTSRC: |
c58603e8 | 911 | check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare); |
a6830278 JSR |
912 | skip_entry(&mpt, &count, sizeof(struct mpc_intsrc)); |
913 | break; | |
2944e16b | 914 | case MP_LINTSRC: |
a6830278 JSR |
915 | skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc)); |
916 | break; | |
2944e16b YL |
917 | default: |
918 | /* wrong mptable */ | |
5a5737ea | 919 | smp_dump_mptable(mpc, mpt); |
2944e16b YL |
920 | goto out; |
921 | } | |
922 | } | |
923 | ||
924 | #ifdef CONFIG_X86_IO_APIC | |
925 | for (i = 0; i < mp_irq_entries; i++) { | |
926 | if (irq_used[i]) | |
927 | continue; | |
928 | ||
c2c21745 | 929 | if (mp_irqs[i].irqtype != mp_INT) |
2944e16b YL |
930 | continue; |
931 | ||
c2c21745 | 932 | if (mp_irqs[i].irqflag != 0x0f) |
2944e16b YL |
933 | continue; |
934 | ||
935 | if (nr_m_spare > 0) { | |
82034d6f | 936 | apic_printk(APIC_VERBOSE, "*NEW* found\n"); |
2944e16b YL |
937 | nr_m_spare--; |
938 | assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); | |
939 | m_spare[nr_m_spare] = NULL; | |
940 | } else { | |
540d4e72 JSR |
941 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
942 | count += sizeof(struct mpc_intsrc); | |
ee214558 | 943 | if (check_slot(mpc_new_phys, mpc_new_length, count) < 0) |
a6830278 | 944 | goto out; |
2944e16b | 945 | assign_to_mpc_intsrc(&mp_irqs[i], m); |
6c65da50 | 946 | mpc->length = count; |
540d4e72 | 947 | mpt += sizeof(struct mpc_intsrc); |
2944e16b YL |
948 | } |
949 | print_mp_irq_info(&mp_irqs[i]); | |
950 | } | |
951 | #endif | |
952 | out: | |
953 | /* update checksum */ | |
6c65da50 JSR |
954 | mpc->checksum = 0; |
955 | mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
956 | |
957 | return 0; | |
958 | } | |
959 | ||
f1bdb523 | 960 | int enable_update_mptable; |
fcfa146e | 961 | |
2944e16b YL |
962 | static int __init update_mptable_setup(char *str) |
963 | { | |
964 | enable_update_mptable = 1; | |
629e15d2 YL |
965 | #ifdef CONFIG_PCI |
966 | pci_routeirq = 1; | |
967 | #endif | |
2944e16b YL |
968 | return 0; |
969 | } | |
970 | early_param("update_mptable", update_mptable_setup); | |
971 | ||
972 | static unsigned long __initdata mpc_new_phys; | |
973 | static unsigned long mpc_new_length __initdata = 4096; | |
974 | ||
975 | /* alloc_mptable or alloc_mptable=4k */ | |
976 | static int __initdata alloc_mptable; | |
977 | static int __init parse_alloc_mptable_opt(char *p) | |
978 | { | |
979 | enable_update_mptable = 1; | |
629e15d2 YL |
980 | #ifdef CONFIG_PCI |
981 | pci_routeirq = 1; | |
982 | #endif | |
2944e16b YL |
983 | alloc_mptable = 1; |
984 | if (!p) | |
985 | return 0; | |
986 | mpc_new_length = memparse(p, &p); | |
987 | return 0; | |
988 | } | |
989 | early_param("alloc_mptable", parse_alloc_mptable_opt); | |
990 | ||
991 | void __init early_reserve_e820_mpc_new(void) | |
992 | { | |
993 | if (enable_update_mptable && alloc_mptable) { | |
994 | u64 startt = 0; | |
995 | #ifdef CONFIG_X86_TRAMPOLINE | |
996 | startt = TRAMPOLINE_BASE; | |
997 | #endif | |
998 | mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); | |
999 | } | |
1000 | } | |
1001 | ||
1002 | static int __init update_mp_table(void) | |
1003 | { | |
1004 | char str[16]; | |
1005 | char oem[10]; | |
41401db6 | 1006 | struct mpf_intel *mpf; |
f29521e4 | 1007 | struct mpc_table *mpc, *mpc_new; |
2944e16b YL |
1008 | |
1009 | if (!enable_update_mptable) | |
1010 | return 0; | |
1011 | ||
1012 | mpf = mpf_found; | |
1013 | if (!mpf) | |
1014 | return 0; | |
1015 | ||
1016 | /* | |
1017 | * Now see if we need to go further. | |
1018 | */ | |
1eb1b3b6 | 1019 | if (mpf->feature1 != 0) |
2944e16b YL |
1020 | return 0; |
1021 | ||
1eb1b3b6 | 1022 | if (!mpf->physptr) |
2944e16b YL |
1023 | return 0; |
1024 | ||
1eb1b3b6 | 1025 | mpc = phys_to_virt(mpf->physptr); |
2944e16b YL |
1026 | |
1027 | if (!smp_check_mpc(mpc, oem, str)) | |
1028 | return 0; | |
1029 | ||
ba1511bf | 1030 | printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf)); |
1eb1b3b6 | 1031 | printk(KERN_INFO "physptr: %x\n", mpf->physptr); |
2944e16b | 1032 | |
6c65da50 | 1033 | if (mpc_new_phys && mpc->length > mpc_new_length) { |
2944e16b YL |
1034 | mpc_new_phys = 0; |
1035 | printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", | |
1036 | mpc_new_length); | |
1037 | } | |
1038 | ||
1039 | if (!mpc_new_phys) { | |
1040 | unsigned char old, new; | |
1041 | /* check if we can change the postion */ | |
6c65da50 JSR |
1042 | mpc->checksum = 0; |
1043 | old = mpf_checksum((unsigned char *)mpc, mpc->length); | |
1044 | mpc->checksum = 0xff; | |
1045 | new = mpf_checksum((unsigned char *)mpc, mpc->length); | |
2944e16b YL |
1046 | if (old == new) { |
1047 | printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); | |
1048 | return 0; | |
1049 | } | |
1050 | printk(KERN_INFO "use in-positon replacing\n"); | |
1051 | } else { | |
1eb1b3b6 | 1052 | mpf->physptr = mpc_new_phys; |
2944e16b | 1053 | mpc_new = phys_to_virt(mpc_new_phys); |
6c65da50 | 1054 | memcpy(mpc_new, mpc, mpc->length); |
2944e16b YL |
1055 | mpc = mpc_new; |
1056 | /* check if we can modify that */ | |
1eb1b3b6 | 1057 | if (mpc_new_phys - mpf->physptr) { |
41401db6 | 1058 | struct mpf_intel *mpf_new; |
2944e16b YL |
1059 | /* steal 16 bytes from [0, 1k) */ |
1060 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); | |
1061 | mpf_new = phys_to_virt(0x400 - 16); | |
1062 | memcpy(mpf_new, mpf, 16); | |
1063 | mpf = mpf_new; | |
1eb1b3b6 | 1064 | mpf->physptr = mpc_new_phys; |
2944e16b | 1065 | } |
1eb1b3b6 JSR |
1066 | mpf->checksum = 0; |
1067 | mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16); | |
1068 | printk(KERN_INFO "physptr new: %x\n", mpf->physptr); | |
2944e16b YL |
1069 | } |
1070 | ||
1071 | /* | |
1072 | * only replace the one with mp_INT and | |
1073 | * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, | |
1074 | * already in mp_irqs , stored by ... and mp_config_acpi_gsi, | |
1075 | * may need pci=routeirq for all coverage | |
1076 | */ | |
1077 | replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); | |
1078 | ||
1079 | return 0; | |
1080 | } | |
1081 | ||
1082 | late_initcall(update_mp_table); |