x86: rename mpc_config_lintsrc to mpc_lintsrc
[deliverable/linux.git] / arch / x86 / kernel / mpparse.c
CommitLineData
1da177e4 1/*
11113f84 2 * Intel Multiprocessor Specification 1.1 and 1.4
1da177e4
LT
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
85bdddec 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
1da177e4
LT
8 */
9
10#include <linux/mm.h>
1da177e4 11#include <linux/init.h>
1da177e4 12#include <linux/delay.h>
1da177e4 13#include <linux/bootmem.h>
1da177e4
LT
14#include <linux/kernel_stat.h>
15#include <linux/mc146818rtc.h>
16#include <linux/bitops.h>
85bdddec
AS
17#include <linux/acpi.h>
18#include <linux/module.h>
103ceffb
JSR
19#include <linux/smp.h>
20#include <linux/acpi.h>
1da177e4 21
1da177e4
LT
22#include <asm/mtrr.h>
23#include <asm/mpspec.h>
85bdddec 24#include <asm/pgalloc.h>
1da177e4 25#include <asm/io_apic.h>
85bdddec 26#include <asm/proto.h>
ce3fe6b2 27#include <asm/bios_ebda.h>
2944e16b
YL
28#include <asm/e820.h>
29#include <asm/trampoline.h>
3c9cb6de 30#include <asm/setup.h>
1da177e4
LT
31
32#include <mach_apic.h>
85bdddec 33#ifdef CONFIG_X86_32
874c4fe3 34#include <mach_apicdef.h>
1da177e4 35#include <mach_mpparse.h>
85bdddec 36#endif
1da177e4 37
1da177e4
LT
38/*
39 * Checksum an MP configuration block.
40 */
41
42static int __init mpf_checksum(unsigned char *mp, int len)
43{
44 int sum = 0;
45
46 while (len--)
47 sum += *mp++;
48
49 return sum & 0xFF;
50}
51
f4f21b71 52static void __init MP_processor_info(struct mpc_cpu *m)
c853c676
AS
53{
54 int apicid;
746f2244 55 char *bootup_cpu = "";
c853c676 56
7b1292e2
GC
57 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
58 disabled_cpus++;
1da177e4 59 return;
7b1292e2 60 }
64898a8b
YL
61
62 if (x86_quirks->mpc_apic_id)
63 apicid = x86_quirks->mpc_apic_id(m);
ab530e1f
YL
64 else
65 apicid = m->mpc_apicid;
64898a8b 66
1da177e4 67 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
746f2244 68 bootup_cpu = " (Bootup-CPU)";
1da177e4 69 boot_cpu_physical_apicid = m->mpc_apicid;
1da177e4
LT
70 }
71
746f2244 72 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
c853c676 73 generic_processor_info(apicid, m->mpc_apicver);
1da177e4
LT
74}
75
85cc35fa 76#ifdef CONFIG_X86_IO_APIC
00fb8606 77static void __init MP_bus_info(struct mpc_bus *m)
1da177e4
LT
78{
79 char str[7];
1da177e4
LT
80 memcpy(str, m->mpc_bustype, 6);
81 str[6] = 0;
82
64898a8b
YL
83 if (x86_quirks->mpc_oem_bus_info)
84 x86_quirks->mpc_oem_bus_info(m, str);
85 else
eeb0d7d1 86 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->mpc_busid, str);
1da177e4 87
5e4edbb7 88#if MAX_MP_BUSSES < 256
c0ec31ad
RD
89 if (m->mpc_busid >= MAX_MP_BUSSES) {
90 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
4ef81297
AS
91 " is too large, max. supported is %d\n",
92 m->mpc_busid, str, MAX_MP_BUSSES - 1);
c0ec31ad
RD
93 return;
94 }
5e4edbb7 95#endif
c0ec31ad 96
f8924e77 97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
103ceffb
JSR
98 set_bit(m->mpc_busid, mp_bus_not_pci);
99#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
f8924e77
AS
100 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
101#endif
102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
64898a8b
YL
103 if (x86_quirks->mpc_oem_pci_bus)
104 x86_quirks->mpc_oem_pci_bus(m);
105
a6333c3c 106 clear_bit(m->mpc_busid, mp_bus_not_pci);
103ceffb 107#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
c0a282c2 108 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
4ef81297 109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
9e0a2de2 110 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
4ef81297 111 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
1da177e4 112 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
c0a282c2 113#endif
f8924e77
AS
114 } else
115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
1da177e4 116}
85cc35fa 117#endif
1da177e4 118
61048c63
AS
119#ifdef CONFIG_X86_IO_APIC
120
857033a6
AS
121static int bad_ioapic(unsigned long address)
122{
123 if (nr_ioapics >= MAX_IO_APICS) {
124 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
125 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
126 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
127 }
128 if (!address) {
129 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
130 " found in table, skipping!\n");
131 return 1;
132 }
133 return 0;
134}
135
2b85b5fb 136static void __init MP_ioapic_info(struct mpc_ioapic *m)
1da177e4
LT
137{
138 if (!(m->mpc_flags & MPC_APIC_USABLE))
139 return;
140
64883ab0 141 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
4ef81297 142 m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
857033a6
AS
143
144 if (bad_ioapic(m->mpc_apicaddr))
1da177e4 145 return;
857033a6 146
ec2cd0a2
AS
147 mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr;
148 mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid;
149 mp_ioapics[nr_ioapics].mp_type = m->mpc_type;
150 mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver;
151 mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags;
1da177e4
LT
152 nr_ioapics++;
153}
154
540d4e72 155static void print_MP_intsrc_info(struct mpc_intsrc *m)
1da177e4 156{
eeb0d7d1 157 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
1da177e4 158 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
4ef81297
AS
159 m->mpc_irqtype, m->mpc_irqflag & 3,
160 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
161 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
2944e16b
YL
162}
163
164static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq)
165{
eeb0d7d1 166 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
2944e16b
YL
167 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
168 mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3,
169 (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus,
170 mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq);
171}
172
540d4e72 173static void __init assign_to_mp_irq(struct mpc_intsrc *m,
2944e16b
YL
174 struct mp_config_intsrc *mp_irq)
175{
176 mp_irq->mp_dstapic = m->mpc_dstapic;
177 mp_irq->mp_type = m->mpc_type;
178 mp_irq->mp_irqtype = m->mpc_irqtype;
179 mp_irq->mp_irqflag = m->mpc_irqflag;
180 mp_irq->mp_srcbus = m->mpc_srcbus;
181 mp_irq->mp_srcbusirq = m->mpc_srcbusirq;
182 mp_irq->mp_dstirq = m->mpc_dstirq;
183}
184
185static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq,
540d4e72 186 struct mpc_intsrc *m)
2944e16b
YL
187{
188 m->mpc_dstapic = mp_irq->mp_dstapic;
189 m->mpc_type = mp_irq->mp_type;
190 m->mpc_irqtype = mp_irq->mp_irqtype;
191 m->mpc_irqflag = mp_irq->mp_irqflag;
192 m->mpc_srcbus = mp_irq->mp_srcbus;
193 m->mpc_srcbusirq = mp_irq->mp_srcbusirq;
194 m->mpc_dstirq = mp_irq->mp_dstirq;
195}
196
fcfa146e 197static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq,
540d4e72 198 struct mpc_intsrc *m)
2944e16b
YL
199{
200 if (mp_irq->mp_dstapic != m->mpc_dstapic)
201 return 1;
202 if (mp_irq->mp_type != m->mpc_type)
203 return 2;
204 if (mp_irq->mp_irqtype != m->mpc_irqtype)
205 return 3;
206 if (mp_irq->mp_irqflag != m->mpc_irqflag)
207 return 4;
208 if (mp_irq->mp_srcbus != m->mpc_srcbus)
209 return 5;
210 if (mp_irq->mp_srcbusirq != m->mpc_srcbusirq)
211 return 6;
212 if (mp_irq->mp_dstirq != m->mpc_dstirq)
213 return 7;
214
215 return 0;
216}
217
540d4e72 218static void __init MP_intsrc_info(struct mpc_intsrc *m)
2944e16b
YL
219{
220 int i;
221
222 print_MP_intsrc_info(m);
223
fcfa146e
YL
224 for (i = 0; i < mp_irq_entries; i++) {
225 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
226 return;
227 }
2944e16b
YL
228
229 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
1da177e4
LT
230 if (++mp_irq_entries == MAX_IRQ_SOURCES)
231 panic("Max # of irq sources exceeded!!\n");
232}
233
61048c63
AS
234#endif
235
8fb2952b 236static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
1da177e4 237{
eeb0d7d1 238 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
1da177e4 239 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
4ef81297
AS
240 m->mpc_irqtype, m->mpc_irqflag & 3,
241 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
242 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
1da177e4
LT
243}
244
1da177e4
LT
245/*
246 * Read/parse the MPC
247 */
248
f29521e4 249static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
1da177e4 250{
1da177e4 251
4ef81297 252 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
e950bea8
AS
253 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
254 mpc->mpc_signature[0], mpc->mpc_signature[1],
255 mpc->mpc_signature[2], mpc->mpc_signature[3]);
1da177e4
LT
256 return 0;
257 }
4ef81297 258 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
e950bea8 259 printk(KERN_ERR "MPTABLE: checksum error!\n");
1da177e4
LT
260 return 0;
261 }
4ef81297 262 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
e950bea8 263 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
4ef81297 264 mpc->mpc_spec);
1da177e4
LT
265 return 0;
266 }
267 if (!mpc->mpc_lapic) {
e950bea8 268 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
1da177e4
LT
269 return 0;
270 }
4ef81297
AS
271 memcpy(oem, mpc->mpc_oem, 8);
272 oem[8] = 0;
11a62a05 273 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
1da177e4 274
4ef81297
AS
275 memcpy(str, mpc->mpc_productid, 12);
276 str[12] = 0;
1da177e4 277
11a62a05 278 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
1da177e4 279
e950bea8 280 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
1da177e4 281
2944e16b
YL
282 return 1;
283}
284
f29521e4 285static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
2944e16b
YL
286{
287 char str[16];
288 char oem[10];
289
290 int count = sizeof(*mpc);
291 unsigned char *mpt = ((unsigned char *)mpc) + count;
292
293 if (!smp_check_mpc(mpc, oem, str))
294 return 0;
295
296#ifdef CONFIG_X86_32
d49c4288
YL
297 /*
298 * need to make sure summit and es7000's mps_oem_check is safe to be
299 * called early via genericarch 's mps_oem_check
300 */
301 if (early) {
302#ifdef CONFIG_X86_NUMAQ
303 numaq_mps_oem_check(mpc, oem, str);
304#endif
305 } else
306 mps_oem_check(mpc, oem, str);
2944e16b 307#endif
e950bea8 308 /* save the local APIC address, it might be non-default */
1da177e4
LT
309 if (!acpi_lapic)
310 mp_lapic_addr = mpc->mpc_lapic;
311
888032cd
AS
312 if (early)
313 return 1;
314
64898a8b
YL
315 if (mpc->mpc_oemptr && x86_quirks->smp_read_mpc_oem) {
316 struct mp_config_oemtable *oem_table = (struct mp_config_oemtable *)(unsigned long)mpc->mpc_oemptr;
317 x86_quirks->smp_read_mpc_oem(oem_table, mpc->mpc_oemsize);
318 }
319
1da177e4 320 /*
4ef81297 321 * Now process the configuration blocks.
1da177e4 322 */
64898a8b
YL
323 if (x86_quirks->mpc_record)
324 *x86_quirks->mpc_record = 0;
325
1da177e4 326 while (count < mpc->mpc_length) {
4ef81297
AS
327 switch (*mpt) {
328 case MP_PROCESSOR:
1da177e4 329 {
f4f21b71 330 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
1da177e4
LT
331 /* ACPI may have already provided this data */
332 if (!acpi_lapic)
333 MP_processor_info(m);
334 mpt += sizeof(*m);
335 count += sizeof(*m);
336 break;
337 }
4ef81297 338 case MP_BUS:
1da177e4 339 {
00fb8606 340 struct mpc_bus *m = (struct mpc_bus *)mpt;
85cc35fa 341#ifdef CONFIG_X86_IO_APIC
1da177e4 342 MP_bus_info(m);
85cc35fa 343#endif
1da177e4
LT
344 mpt += sizeof(*m);
345 count += sizeof(*m);
346 break;
347 }
4ef81297 348 case MP_IOAPIC:
1da177e4 349 {
61048c63 350#ifdef CONFIG_X86_IO_APIC
2b85b5fb 351 struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
1da177e4 352 MP_ioapic_info(m);
61048c63 353#endif
2b85b5fb
JSR
354 mpt += sizeof(struct mpc_ioapic);
355 count += sizeof(struct mpc_ioapic);
1da177e4
LT
356 break;
357 }
4ef81297 358 case MP_INTSRC:
1da177e4 359 {
61048c63 360#ifdef CONFIG_X86_IO_APIC
540d4e72 361 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
1da177e4
LT
362
363 MP_intsrc_info(m);
61048c63 364#endif
540d4e72
JSR
365 mpt += sizeof(struct mpc_intsrc);
366 count += sizeof(struct mpc_intsrc);
1da177e4
LT
367 break;
368 }
4ef81297 369 case MP_LINTSRC:
1da177e4 370 {
8fb2952b
JSR
371 struct mpc_lintsrc *m =
372 (struct mpc_lintsrc *)mpt;
1da177e4 373 MP_lintsrc_info(m);
4ef81297
AS
374 mpt += sizeof(*m);
375 count += sizeof(*m);
1da177e4
LT
376 break;
377 }
4ef81297 378 default:
711554db
YL
379 /* wrong mptable */
380 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
381 printk(KERN_ERR "type %x\n", *mpt);
382 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
383 1, mpc, mpc->mpc_length, 1);
384 count = mpc->mpc_length;
385 break;
1da177e4 386 }
64898a8b
YL
387 if (x86_quirks->mpc_record)
388 (*x86_quirks->mpc_record)++;
1da177e4 389 }
e0da3364
YL
390
391#ifdef CONFIG_X86_GENERICARCH
392 generic_bigsmp_probe();
393#endif
394
6e1cb38a 395#ifdef CONFIG_X86_32
3c43f039 396 setup_apic_routing();
6e1cb38a 397#endif
1da177e4 398 if (!num_processors)
e950bea8 399 printk(KERN_ERR "MPTABLE: no processors registered!\n");
1da177e4
LT
400 return num_processors;
401}
402
61048c63
AS
403#ifdef CONFIG_X86_IO_APIC
404
1da177e4
LT
405static int __init ELCR_trigger(unsigned int irq)
406{
407 unsigned int port;
408
409 port = 0x4d0 + (irq >> 3);
410 return (inb(port) >> (irq & 7)) & 1;
411}
412
413static void __init construct_default_ioirq_mptable(int mpc_default_type)
414{
540d4e72 415 struct mpc_intsrc intsrc;
1da177e4
LT
416 int i;
417 int ELCR_fallback = 0;
418
419 intsrc.mpc_type = MP_INTSRC;
4ef81297 420 intsrc.mpc_irqflag = 0; /* conforming */
1da177e4 421 intsrc.mpc_srcbus = 0;
ec2cd0a2 422 intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
1da177e4
LT
423
424 intsrc.mpc_irqtype = mp_INT;
425
426 /*
427 * If true, we have an ISA/PCI system with no IRQ entries
428 * in the MP table. To prevent the PCI interrupts from being set up
429 * incorrectly, we try to use the ELCR. The sanity check to see if
430 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
431 * never be level sensitive, so we simply see if the ELCR agrees.
432 * If it does, we assume it's valid.
433 */
434 if (mpc_default_type == 5) {
62441bf1
AS
435 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
436 "falling back to ELCR\n");
1da177e4 437
62441bf1
AS
438 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
439 ELCR_trigger(13))
440 printk(KERN_ERR "ELCR contains invalid data... "
441 "not using ELCR\n");
1da177e4 442 else {
4ef81297
AS
443 printk(KERN_INFO
444 "Using ELCR to identify PCI interrupts\n");
1da177e4
LT
445 ELCR_fallback = 1;
446 }
447 }
448
449 for (i = 0; i < 16; i++) {
450 switch (mpc_default_type) {
451 case 2:
452 if (i == 0 || i == 13)
453 continue; /* IRQ0 & IRQ13 not connected */
454 /* fall through */
455 default:
456 if (i == 2)
457 continue; /* IRQ2 is never connected */
458 }
459
460 if (ELCR_fallback) {
461 /*
462 * If the ELCR indicates a level-sensitive interrupt, we
463 * copy that information over to the MP table in the
464 * irqflag field (level sensitive, active high polarity).
465 */
466 if (ELCR_trigger(i))
467 intsrc.mpc_irqflag = 13;
468 else
469 intsrc.mpc_irqflag = 0;
470 }
471
472 intsrc.mpc_srcbusirq = i;
4ef81297 473 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
1da177e4
LT
474 MP_intsrc_info(&intsrc);
475 }
476
477 intsrc.mpc_irqtype = mp_ExtINT;
478 intsrc.mpc_srcbusirq = 0;
4ef81297 479 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
1da177e4
LT
480 MP_intsrc_info(&intsrc);
481}
482
61048c63 483
39e00fe2 484static void __init construct_ioapic_table(int mpc_default_type)
1da177e4 485{
2b85b5fb 486 struct mpc_ioapic ioapic;
00fb8606 487 struct mpc_bus bus;
1da177e4
LT
488
489 bus.mpc_type = MP_BUS;
490 bus.mpc_busid = 0;
491 switch (mpc_default_type) {
4ef81297 492 default:
62441bf1 493 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
4ef81297
AS
494 mpc_default_type);
495 /* fall through */
496 case 1:
497 case 5:
498 memcpy(bus.mpc_bustype, "ISA ", 6);
499 break;
500 case 2:
501 case 6:
502 case 3:
503 memcpy(bus.mpc_bustype, "EISA ", 6);
504 break;
505 case 4:
506 case 7:
507 memcpy(bus.mpc_bustype, "MCA ", 6);
1da177e4
LT
508 }
509 MP_bus_info(&bus);
510 if (mpc_default_type > 4) {
511 bus.mpc_busid = 1;
512 memcpy(bus.mpc_bustype, "PCI ", 6);
513 MP_bus_info(&bus);
514 }
515
516 ioapic.mpc_type = MP_IOAPIC;
517 ioapic.mpc_apicid = 2;
518 ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
519 ioapic.mpc_flags = MPC_APIC_USABLE;
520 ioapic.mpc_apicaddr = 0xFEC00000;
521 MP_ioapic_info(&ioapic);
522
523 /*
524 * We set up most of the low 16 IO-APIC pins according to MPS rules.
525 */
526 construct_default_ioirq_mptable(mpc_default_type);
85cc35fa
TG
527}
528#else
39e00fe2 529static inline void __init construct_ioapic_table(int mpc_default_type) { }
61048c63 530#endif
85cc35fa
TG
531
532static inline void __init construct_default_ISA_mptable(int mpc_default_type)
533{
f4f21b71 534 struct mpc_cpu processor;
8fb2952b 535 struct mpc_lintsrc lintsrc;
85cc35fa
TG
536 int linttypes[2] = { mp_ExtINT, mp_NMI };
537 int i;
538
539 /*
540 * local APIC has default address
541 */
542 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
543
544 /*
545 * 2 CPUs, numbered 0 & 1.
546 */
547 processor.mpc_type = MP_PROCESSOR;
548 /* Either an integrated APIC or a discrete 82489DX. */
549 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
550 processor.mpc_cpuflag = CPU_ENABLED;
551 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
552 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
553 processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
554 processor.mpc_reserved[0] = 0;
555 processor.mpc_reserved[1] = 0;
556 for (i = 0; i < 2; i++) {
557 processor.mpc_apicid = i;
558 MP_processor_info(&processor);
559 }
560
561 construct_ioapic_table(mpc_default_type);
562
1da177e4 563 lintsrc.mpc_type = MP_LINTSRC;
4ef81297 564 lintsrc.mpc_irqflag = 0; /* conforming */
1da177e4
LT
565 lintsrc.mpc_srcbusid = 0;
566 lintsrc.mpc_srcbusirq = 0;
567 lintsrc.mpc_destapic = MP_APIC_ALL;
568 for (i = 0; i < 2; i++) {
569 lintsrc.mpc_irqtype = linttypes[i];
570 lintsrc.mpc_destapiclint = i;
571 MP_lintsrc_info(&lintsrc);
572 }
573}
574
575static struct intel_mp_floating *mpf_found;
576
577/*
578 * Scan the memory blocks for an SMP configuration block.
579 */
3b33553b 580static void __init __get_smp_config(unsigned int early)
1da177e4
LT
581{
582 struct intel_mp_floating *mpf = mpf_found;
583
69b88afa
YL
584 if (!mpf)
585 return;
586
888032cd
AS
587 if (acpi_lapic && early)
588 return;
69b88afa 589
1da177e4 590 /*
69b88afa
YL
591 * MPS doesn't support hyperthreading, aka only have
592 * thread 0 apic id in MPS table
1da177e4 593 */
69b88afa 594 if (acpi_lapic && acpi_ioapic)
1da177e4 595 return;
1da177e4 596
69b88afa
YL
597 if (x86_quirks->mach_get_smp_config) {
598 if (x86_quirks->mach_get_smp_config(early))
599 return;
600 }
9adc1386 601
4ef81297
AS
602 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
603 mpf->mpf_specification);
b3e24164 604#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
4ef81297 605 if (mpf->mpf_feature2 & (1 << 7)) {
1da177e4
LT
606 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
607 pic_mode = 1;
608 } else {
609 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
610 pic_mode = 0;
611 }
4421b1c8 612#endif
1da177e4
LT
613 /*
614 * Now see if we need to read further.
615 */
616 if (mpf->mpf_feature1 != 0) {
888032cd
AS
617 if (early) {
618 /*
619 * local APIC has default address
620 */
621 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
622 return;
623 }
1da177e4 624
4ef81297
AS
625 printk(KERN_INFO "Default MP configuration #%d\n",
626 mpf->mpf_feature1);
1da177e4
LT
627 construct_default_ISA_mptable(mpf->mpf_feature1);
628
629 } else if (mpf->mpf_physptr) {
630
631 /*
632 * Read the physical hardware table. Anything here will
633 * override the defaults.
634 */
888032cd 635 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
bab4b27c 636#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 637 smp_found_config = 0;
bab4b27c 638#endif
4ef81297
AS
639 printk(KERN_ERR
640 "BIOS bug, MP table errors detected!...\n");
4421b1c8
AS
641 printk(KERN_ERR "... disabling SMP support. "
642 "(tell your hw vendor)\n");
1da177e4
LT
643 return;
644 }
61048c63 645
888032cd
AS
646 if (early)
647 return;
61048c63 648#ifdef CONFIG_X86_IO_APIC
1da177e4
LT
649 /*
650 * If there are no explicit MP IRQ entries, then we are
651 * broken. We set up most of the low 16 IO-APIC pins to
652 * ISA defaults and hope it will work.
653 */
654 if (!mp_irq_entries) {
00fb8606 655 struct mpc_bus bus;
1da177e4 656
4421b1c8
AS
657 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
658 "using default mptable. "
659 "(tell your hw vendor)\n");
1da177e4
LT
660
661 bus.mpc_type = MP_BUS;
662 bus.mpc_busid = 0;
663 memcpy(bus.mpc_bustype, "ISA ", 6);
664 MP_bus_info(&bus);
665
666 construct_default_ioirq_mptable(0);
667 }
61048c63 668#endif
1da177e4
LT
669 } else
670 BUG();
671
888032cd
AS
672 if (!early)
673 printk(KERN_INFO "Processors: %d\n", num_processors);
1da177e4
LT
674 /*
675 * Only use the first configuration found.
676 */
677}
678
888032cd
AS
679void __init early_get_smp_config(void)
680{
681 __get_smp_config(1);
682}
683
684void __init get_smp_config(void)
685{
686 __get_smp_config(0);
687}
688
689static int __init smp_scan_config(unsigned long base, unsigned long length,
690 unsigned reserve)
1da177e4 691{
92fd4b7a 692 unsigned int *bp = phys_to_virt(base);
1da177e4
LT
693 struct intel_mp_floating *mpf;
694
eeb0d7d1
RH
695 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
696 bp, length);
5d47a271 697 BUILD_BUG_ON(sizeof(*mpf) != 16);
1da177e4
LT
698
699 while (length > 0) {
700 mpf = (struct intel_mp_floating *)bp;
701 if ((*bp == SMP_MAGIC_IDENT) &&
4ef81297
AS
702 (mpf->mpf_length == 1) &&
703 !mpf_checksum((unsigned char *)bp, 16) &&
704 ((mpf->mpf_specification == 1)
705 || (mpf->mpf_specification == 4))) {
bab4b27c 706#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 707 smp_found_config = 1;
bab4b27c 708#endif
92fd4b7a 709 mpf_found = mpf;
b1f006b6 710
e91a3b43 711 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
4ef81297 712 mpf, virt_to_phys(mpf));
b1f006b6
YL
713
714 if (!reserve)
715 return 1;
d2dbf343 716 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
72a7fe39 717 BOOTMEM_DEFAULT);
1da177e4 718 if (mpf->mpf_physptr) {
d2dbf343
YL
719 unsigned long size = PAGE_SIZE;
720#ifdef CONFIG_X86_32
1da177e4
LT
721 /*
722 * We cannot access to MPC table to compute
723 * table size yet, as only few megabytes from
724 * the bottom is mapped now.
725 * PC-9800's MPC table places on the very last
726 * of physical memory; so that simply reserving
727 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
728 * in reserve_bootmem.
729 */
1da177e4
LT
730 unsigned long end = max_low_pfn * PAGE_SIZE;
731 if (mpf->mpf_physptr + size > end)
732 size = end - mpf->mpf_physptr;
d2dbf343
YL
733#endif
734 reserve_bootmem_generic(mpf->mpf_physptr, size,
72a7fe39 735 BOOTMEM_DEFAULT);
1da177e4
LT
736 }
737
d2dbf343 738 return 1;
1da177e4
LT
739 }
740 bp += 4;
741 length -= 16;
742 }
743 return 0;
744}
745
3b33553b 746static void __init __find_smp_config(unsigned int reserve)
1da177e4
LT
747{
748 unsigned int address;
749
3c9cb6de
YL
750 if (x86_quirks->mach_find_smp_config) {
751 if (x86_quirks->mach_find_smp_config(reserve))
3b33553b
IM
752 return;
753 }
1da177e4
LT
754 /*
755 * FIXME: Linux assumes you have 640K of base ram..
756 * this continues the error...
757 *
758 * 1) Scan the bottom 1K for a signature
759 * 2) Scan the top 1K of base RAM
760 * 3) Scan the 64K of bios
761 */
888032cd
AS
762 if (smp_scan_config(0x0, 0x400, reserve) ||
763 smp_scan_config(639 * 0x400, 0x400, reserve) ||
764 smp_scan_config(0xF0000, 0x10000, reserve))
1da177e4
LT
765 return;
766 /*
767 * If it is an SMP machine we should know now, unless the
768 * configuration is in an EISA/MCA bus machine with an
769 * extended bios data area.
770 *
771 * there is a real-mode segmented pointer pointing to the
772 * 4K EBDA area at 0x40E, calculate and scan it here.
773 *
774 * NOTE! There are Linux loaders that will corrupt the EBDA
775 * area, and as such this kind of SMP config may be less
776 * trustworthy, simply because the SMP table may have been
777 * stomped on during early boot. These loaders are buggy and
778 * should be fixed.
779 *
780 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
781 */
782
783 address = get_bios_ebda();
784 if (address)
888032cd
AS
785 smp_scan_config(address, 0x400, reserve);
786}
787
788void __init early_find_smp_config(void)
789{
790 __find_smp_config(0);
791}
792
793void __init find_smp_config(void)
794{
795 __find_smp_config(1);
1da177e4 796}
2944e16b
YL
797
798#ifdef CONFIG_X86_IO_APIC
799static u8 __initdata irq_used[MAX_IRQ_SOURCES];
800
540d4e72 801static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
2944e16b
YL
802{
803 int i;
804
805 if (m->mpc_irqtype != mp_INT)
806 return 0;
807
808 if (m->mpc_irqflag != 0x0f)
809 return 0;
810
811 /* not legacy */
812
813 for (i = 0; i < mp_irq_entries; i++) {
814 if (mp_irqs[i].mp_irqtype != mp_INT)
815 continue;
816
817 if (mp_irqs[i].mp_irqflag != 0x0f)
818 continue;
819
820 if (mp_irqs[i].mp_srcbus != m->mpc_srcbus)
821 continue;
822 if (mp_irqs[i].mp_srcbusirq != m->mpc_srcbusirq)
823 continue;
824 if (irq_used[i]) {
825 /* already claimed */
826 return -2;
827 }
828 irq_used[i] = 1;
829 return i;
830 }
831
832 /* not found */
833 return -1;
834}
835
836#define SPARE_SLOT_NUM 20
837
540d4e72 838static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
2944e16b
YL
839#endif
840
f29521e4 841static int __init replace_intsrc_all(struct mpc_table *mpc,
2944e16b
YL
842 unsigned long mpc_new_phys,
843 unsigned long mpc_new_length)
844{
845#ifdef CONFIG_X86_IO_APIC
846 int i;
847 int nr_m_spare = 0;
848#endif
849
850 int count = sizeof(*mpc);
851 unsigned char *mpt = ((unsigned char *)mpc) + count;
852
853 printk(KERN_INFO "mpc_length %x\n", mpc->mpc_length);
854 while (count < mpc->mpc_length) {
855 switch (*mpt) {
856 case MP_PROCESSOR:
857 {
f4f21b71 858 struct mpc_cpu *m = (struct mpc_cpu *)mpt;
2944e16b
YL
859 mpt += sizeof(*m);
860 count += sizeof(*m);
861 break;
862 }
863 case MP_BUS:
864 {
00fb8606 865 struct mpc_bus *m = (struct mpc_bus *)mpt;
2944e16b
YL
866 mpt += sizeof(*m);
867 count += sizeof(*m);
868 break;
869 }
870 case MP_IOAPIC:
871 {
2b85b5fb
JSR
872 mpt += sizeof(struct mpc_ioapic);
873 count += sizeof(struct mpc_ioapic);
2944e16b
YL
874 break;
875 }
876 case MP_INTSRC:
877 {
878#ifdef CONFIG_X86_IO_APIC
540d4e72 879 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
2944e16b
YL
880
881 printk(KERN_INFO "OLD ");
882 print_MP_intsrc_info(m);
883 i = get_MP_intsrc_index(m);
884 if (i > 0) {
885 assign_to_mpc_intsrc(&mp_irqs[i], m);
886 printk(KERN_INFO "NEW ");
887 print_mp_irq_info(&mp_irqs[i]);
888 } else if (!i) {
889 /* legacy, do nothing */
890 } else if (nr_m_spare < SPARE_SLOT_NUM) {
891 /*
892 * not found (-1), or duplicated (-2)
893 * are invalid entries,
894 * we need to use the slot later
895 */
896 m_spare[nr_m_spare] = m;
897 nr_m_spare++;
898 }
899#endif
540d4e72
JSR
900 mpt += sizeof(struct mpc_intsrc);
901 count += sizeof(struct mpc_intsrc);
2944e16b
YL
902 break;
903 }
904 case MP_LINTSRC:
905 {
8fb2952b
JSR
906 struct mpc_lintsrc *m =
907 (struct mpc_lintsrc *)mpt;
2944e16b
YL
908 mpt += sizeof(*m);
909 count += sizeof(*m);
910 break;
911 }
912 default:
913 /* wrong mptable */
914 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
915 printk(KERN_ERR "type %x\n", *mpt);
916 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
917 1, mpc, mpc->mpc_length, 1);
918 goto out;
919 }
920 }
921
922#ifdef CONFIG_X86_IO_APIC
923 for (i = 0; i < mp_irq_entries; i++) {
924 if (irq_used[i])
925 continue;
926
927 if (mp_irqs[i].mp_irqtype != mp_INT)
928 continue;
929
930 if (mp_irqs[i].mp_irqflag != 0x0f)
931 continue;
932
933 if (nr_m_spare > 0) {
934 printk(KERN_INFO "*NEW* found ");
935 nr_m_spare--;
936 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
937 m_spare[nr_m_spare] = NULL;
938 } else {
540d4e72
JSR
939 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
940 count += sizeof(struct mpc_intsrc);
2944e16b
YL
941 if (!mpc_new_phys) {
942 printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
943 } else {
944 if (count <= mpc_new_length)
945 printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
946 else {
947 printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
948 goto out;
949 }
950 }
951 assign_to_mpc_intsrc(&mp_irqs[i], m);
952 mpc->mpc_length = count;
540d4e72 953 mpt += sizeof(struct mpc_intsrc);
2944e16b
YL
954 }
955 print_mp_irq_info(&mp_irqs[i]);
956 }
957#endif
958out:
959 /* update checksum */
960 mpc->mpc_checksum = 0;
961 mpc->mpc_checksum -= mpf_checksum((unsigned char *)mpc,
962 mpc->mpc_length);
963
964 return 0;
965}
966
fcfa146e
YL
967static int __initdata enable_update_mptable;
968
2944e16b
YL
969static int __init update_mptable_setup(char *str)
970{
971 enable_update_mptable = 1;
972 return 0;
973}
974early_param("update_mptable", update_mptable_setup);
975
976static unsigned long __initdata mpc_new_phys;
977static unsigned long mpc_new_length __initdata = 4096;
978
979/* alloc_mptable or alloc_mptable=4k */
980static int __initdata alloc_mptable;
981static int __init parse_alloc_mptable_opt(char *p)
982{
983 enable_update_mptable = 1;
984 alloc_mptable = 1;
985 if (!p)
986 return 0;
987 mpc_new_length = memparse(p, &p);
988 return 0;
989}
990early_param("alloc_mptable", parse_alloc_mptable_opt);
991
992void __init early_reserve_e820_mpc_new(void)
993{
994 if (enable_update_mptable && alloc_mptable) {
995 u64 startt = 0;
996#ifdef CONFIG_X86_TRAMPOLINE
997 startt = TRAMPOLINE_BASE;
998#endif
999 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
1000 }
1001}
1002
1003static int __init update_mp_table(void)
1004{
1005 char str[16];
1006 char oem[10];
1007 struct intel_mp_floating *mpf;
f29521e4 1008 struct mpc_table *mpc, *mpc_new;
2944e16b
YL
1009
1010 if (!enable_update_mptable)
1011 return 0;
1012
1013 mpf = mpf_found;
1014 if (!mpf)
1015 return 0;
1016
1017 /*
1018 * Now see if we need to go further.
1019 */
1020 if (mpf->mpf_feature1 != 0)
1021 return 0;
1022
1023 if (!mpf->mpf_physptr)
1024 return 0;
1025
1026 mpc = phys_to_virt(mpf->mpf_physptr);
1027
1028 if (!smp_check_mpc(mpc, oem, str))
1029 return 0;
1030
1031 printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
1032 printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr);
1033
1034 if (mpc_new_phys && mpc->mpc_length > mpc_new_length) {
1035 mpc_new_phys = 0;
1036 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
1037 mpc_new_length);
1038 }
1039
1040 if (!mpc_new_phys) {
1041 unsigned char old, new;
1042 /* check if we can change the postion */
1043 mpc->mpc_checksum = 0;
1044 old = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
1045 mpc->mpc_checksum = 0xff;
1046 new = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
1047 if (old == new) {
1048 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
1049 return 0;
1050 }
1051 printk(KERN_INFO "use in-positon replacing\n");
1052 } else {
1053 mpf->mpf_physptr = mpc_new_phys;
1054 mpc_new = phys_to_virt(mpc_new_phys);
1055 memcpy(mpc_new, mpc, mpc->mpc_length);
1056 mpc = mpc_new;
1057 /* check if we can modify that */
1058 if (mpc_new_phys - mpf->mpf_physptr) {
1059 struct intel_mp_floating *mpf_new;
1060 /* steal 16 bytes from [0, 1k) */
1061 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1062 mpf_new = phys_to_virt(0x400 - 16);
1063 memcpy(mpf_new, mpf, 16);
1064 mpf = mpf_new;
1065 mpf->mpf_physptr = mpc_new_phys;
1066 }
1067 mpf->mpf_checksum = 0;
1068 mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16);
1069 printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr);
1070 }
1071
1072 /*
1073 * only replace the one with mp_INT and
1074 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1075 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1076 * may need pci=routeirq for all coverage
1077 */
1078 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1079
1080 return 0;
1081}
1082
1083late_initcall(update_mp_table);
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