Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
11113f84 | 2 | * Intel Multiprocessor Specification 1.1 and 1.4 |
1da177e4 LT |
3 | * compliant MP-table parsing routines. |
4 | * | |
5 | * (c) 1995 Alan Cox, Building #3 <alan@redhat.com> | |
6 | * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com> | |
85bdddec | 7 | * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de> |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/mm.h> | |
1da177e4 | 11 | #include <linux/init.h> |
1da177e4 | 12 | #include <linux/delay.h> |
1da177e4 | 13 | #include <linux/bootmem.h> |
1da177e4 LT |
14 | #include <linux/kernel_stat.h> |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/bitops.h> | |
85bdddec AS |
17 | #include <linux/acpi.h> |
18 | #include <linux/module.h> | |
103ceffb JSR |
19 | #include <linux/smp.h> |
20 | #include <linux/acpi.h> | |
1da177e4 | 21 | |
1da177e4 LT |
22 | #include <asm/mtrr.h> |
23 | #include <asm/mpspec.h> | |
85bdddec | 24 | #include <asm/pgalloc.h> |
1da177e4 | 25 | #include <asm/io_apic.h> |
85bdddec | 26 | #include <asm/proto.h> |
ce3fe6b2 | 27 | #include <asm/bios_ebda.h> |
2944e16b YL |
28 | #include <asm/e820.h> |
29 | #include <asm/trampoline.h> | |
3c9cb6de | 30 | #include <asm/setup.h> |
1da177e4 LT |
31 | |
32 | #include <mach_apic.h> | |
85bdddec | 33 | #ifdef CONFIG_X86_32 |
874c4fe3 | 34 | #include <mach_apicdef.h> |
1da177e4 | 35 | #include <mach_mpparse.h> |
85bdddec | 36 | #endif |
1da177e4 | 37 | |
1da177e4 LT |
38 | /* |
39 | * Checksum an MP configuration block. | |
40 | */ | |
41 | ||
42 | static int __init mpf_checksum(unsigned char *mp, int len) | |
43 | { | |
44 | int sum = 0; | |
45 | ||
46 | while (len--) | |
47 | sum += *mp++; | |
48 | ||
49 | return sum & 0xFF; | |
50 | } | |
51 | ||
f4f21b71 | 52 | static void __init MP_processor_info(struct mpc_cpu *m) |
c853c676 AS |
53 | { |
54 | int apicid; | |
746f2244 | 55 | char *bootup_cpu = ""; |
c853c676 | 56 | |
c4563826 | 57 | if (!(m->cpuflag & CPU_ENABLED)) { |
7b1292e2 | 58 | disabled_cpus++; |
1da177e4 | 59 | return; |
7b1292e2 | 60 | } |
64898a8b YL |
61 | |
62 | if (x86_quirks->mpc_apic_id) | |
63 | apicid = x86_quirks->mpc_apic_id(m); | |
ab530e1f | 64 | else |
c4563826 | 65 | apicid = m->apicid; |
64898a8b | 66 | |
c4563826 | 67 | if (m->cpuflag & CPU_BOOTPROCESSOR) { |
746f2244 | 68 | bootup_cpu = " (Bootup-CPU)"; |
c4563826 | 69 | boot_cpu_physical_apicid = m->apicid; |
1da177e4 LT |
70 | } |
71 | ||
c4563826 JSR |
72 | printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu); |
73 | generic_processor_info(apicid, m->apicver); | |
1da177e4 LT |
74 | } |
75 | ||
85cc35fa | 76 | #ifdef CONFIG_X86_IO_APIC |
00fb8606 | 77 | static void __init MP_bus_info(struct mpc_bus *m) |
1da177e4 LT |
78 | { |
79 | char str[7]; | |
1da177e4 LT |
80 | memcpy(str, m->mpc_bustype, 6); |
81 | str[6] = 0; | |
82 | ||
64898a8b YL |
83 | if (x86_quirks->mpc_oem_bus_info) |
84 | x86_quirks->mpc_oem_bus_info(m, str); | |
85 | else | |
eeb0d7d1 | 86 | apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->mpc_busid, str); |
1da177e4 | 87 | |
5e4edbb7 | 88 | #if MAX_MP_BUSSES < 256 |
c0ec31ad RD |
89 | if (m->mpc_busid >= MAX_MP_BUSSES) { |
90 | printk(KERN_WARNING "MP table busid value (%d) for bustype %s " | |
4ef81297 AS |
91 | " is too large, max. supported is %d\n", |
92 | m->mpc_busid, str, MAX_MP_BUSSES - 1); | |
c0ec31ad RD |
93 | return; |
94 | } | |
5e4edbb7 | 95 | #endif |
c0ec31ad | 96 | |
f8924e77 | 97 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
103ceffb JSR |
98 | set_bit(m->mpc_busid, mp_bus_not_pci); |
99 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) | |
f8924e77 AS |
100 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA; |
101 | #endif | |
102 | } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { | |
64898a8b YL |
103 | if (x86_quirks->mpc_oem_pci_bus) |
104 | x86_quirks->mpc_oem_pci_bus(m); | |
105 | ||
a6333c3c | 106 | clear_bit(m->mpc_busid, mp_bus_not_pci); |
103ceffb | 107 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
c0a282c2 | 108 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI; |
4ef81297 | 109 | } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { |
9e0a2de2 | 110 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA; |
4ef81297 | 111 | } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) { |
1da177e4 | 112 | mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA; |
c0a282c2 | 113 | #endif |
f8924e77 AS |
114 | } else |
115 | printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); | |
1da177e4 | 116 | } |
85cc35fa | 117 | #endif |
1da177e4 | 118 | |
61048c63 AS |
119 | #ifdef CONFIG_X86_IO_APIC |
120 | ||
857033a6 AS |
121 | static int bad_ioapic(unsigned long address) |
122 | { | |
123 | if (nr_ioapics >= MAX_IO_APICS) { | |
124 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
125 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
126 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
127 | } | |
128 | if (!address) { | |
129 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
130 | " found in table, skipping!\n"); | |
131 | return 1; | |
132 | } | |
133 | return 0; | |
134 | } | |
135 | ||
2b85b5fb | 136 | static void __init MP_ioapic_info(struct mpc_ioapic *m) |
1da177e4 | 137 | { |
5df82c7d | 138 | if (!(m->flags & MPC_APIC_USABLE)) |
1da177e4 LT |
139 | return; |
140 | ||
64883ab0 | 141 | printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n", |
5df82c7d | 142 | m->apicid, m->apicver, m->apicaddr); |
857033a6 | 143 | |
5df82c7d | 144 | if (bad_ioapic(m->apicaddr)) |
1da177e4 | 145 | return; |
857033a6 | 146 | |
5df82c7d JSR |
147 | mp_ioapics[nr_ioapics].mp_apicaddr = m->apicaddr; |
148 | mp_ioapics[nr_ioapics].mp_apicid = m->apicid; | |
149 | mp_ioapics[nr_ioapics].mp_type = m->type; | |
150 | mp_ioapics[nr_ioapics].mp_apicver = m->apicver; | |
151 | mp_ioapics[nr_ioapics].mp_flags = m->flags; | |
1da177e4 LT |
152 | nr_ioapics++; |
153 | } | |
154 | ||
540d4e72 | 155 | static void print_MP_intsrc_info(struct mpc_intsrc *m) |
1da177e4 | 156 | { |
eeb0d7d1 | 157 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 158 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
e253b396 JSR |
159 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus, |
160 | m->srcbusirq, m->dstapic, m->dstirq); | |
2944e16b YL |
161 | } |
162 | ||
163 | static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq) | |
164 | { | |
eeb0d7d1 | 165 | apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," |
2944e16b YL |
166 | " IRQ %02x, APIC ID %x, APIC INT %02x\n", |
167 | mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3, | |
168 | (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus, | |
169 | mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq); | |
170 | } | |
171 | ||
540d4e72 | 172 | static void __init assign_to_mp_irq(struct mpc_intsrc *m, |
2944e16b YL |
173 | struct mp_config_intsrc *mp_irq) |
174 | { | |
e253b396 JSR |
175 | mp_irq->mp_dstapic = m->dstapic; |
176 | mp_irq->mp_type = m->type; | |
177 | mp_irq->mp_irqtype = m->irqtype; | |
178 | mp_irq->mp_irqflag = m->irqflag; | |
179 | mp_irq->mp_srcbus = m->srcbus; | |
180 | mp_irq->mp_srcbusirq = m->srcbusirq; | |
181 | mp_irq->mp_dstirq = m->dstirq; | |
2944e16b YL |
182 | } |
183 | ||
184 | static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq, | |
540d4e72 | 185 | struct mpc_intsrc *m) |
2944e16b | 186 | { |
e253b396 JSR |
187 | m->dstapic = mp_irq->mp_dstapic; |
188 | m->type = mp_irq->mp_type; | |
189 | m->irqtype = mp_irq->mp_irqtype; | |
190 | m->irqflag = mp_irq->mp_irqflag; | |
191 | m->srcbus = mp_irq->mp_srcbus; | |
192 | m->srcbusirq = mp_irq->mp_srcbusirq; | |
193 | m->dstirq = mp_irq->mp_dstirq; | |
2944e16b YL |
194 | } |
195 | ||
fcfa146e | 196 | static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq, |
540d4e72 | 197 | struct mpc_intsrc *m) |
2944e16b | 198 | { |
e253b396 | 199 | if (mp_irq->mp_dstapic != m->dstapic) |
2944e16b | 200 | return 1; |
e253b396 | 201 | if (mp_irq->mp_type != m->type) |
2944e16b | 202 | return 2; |
e253b396 | 203 | if (mp_irq->mp_irqtype != m->irqtype) |
2944e16b | 204 | return 3; |
e253b396 | 205 | if (mp_irq->mp_irqflag != m->irqflag) |
2944e16b | 206 | return 4; |
e253b396 | 207 | if (mp_irq->mp_srcbus != m->srcbus) |
2944e16b | 208 | return 5; |
e253b396 | 209 | if (mp_irq->mp_srcbusirq != m->srcbusirq) |
2944e16b | 210 | return 6; |
e253b396 | 211 | if (mp_irq->mp_dstirq != m->dstirq) |
2944e16b YL |
212 | return 7; |
213 | ||
214 | return 0; | |
215 | } | |
216 | ||
540d4e72 | 217 | static void __init MP_intsrc_info(struct mpc_intsrc *m) |
2944e16b YL |
218 | { |
219 | int i; | |
220 | ||
221 | print_MP_intsrc_info(m); | |
222 | ||
fcfa146e YL |
223 | for (i = 0; i < mp_irq_entries; i++) { |
224 | if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) | |
225 | return; | |
226 | } | |
2944e16b YL |
227 | |
228 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1da177e4 LT |
229 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
230 | panic("Max # of irq sources exceeded!!\n"); | |
231 | } | |
232 | ||
61048c63 AS |
233 | #endif |
234 | ||
8fb2952b | 235 | static void __init MP_lintsrc_info(struct mpc_lintsrc *m) |
1da177e4 | 236 | { |
eeb0d7d1 | 237 | apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x," |
1da177e4 | 238 | " IRQ %02x, APIC ID %x, APIC LINT %02x\n", |
b5ced7cd JSR |
239 | m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid, |
240 | m->srcbusirq, m->destapic, m->destapiclint); | |
1da177e4 LT |
241 | } |
242 | ||
1da177e4 LT |
243 | /* |
244 | * Read/parse the MPC | |
245 | */ | |
246 | ||
f29521e4 | 247 | static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) |
1da177e4 | 248 | { |
1da177e4 | 249 | |
4ef81297 | 250 | if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) { |
e950bea8 AS |
251 | printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", |
252 | mpc->mpc_signature[0], mpc->mpc_signature[1], | |
253 | mpc->mpc_signature[2], mpc->mpc_signature[3]); | |
1da177e4 LT |
254 | return 0; |
255 | } | |
4ef81297 | 256 | if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) { |
e950bea8 | 257 | printk(KERN_ERR "MPTABLE: checksum error!\n"); |
1da177e4 LT |
258 | return 0; |
259 | } | |
4ef81297 | 260 | if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) { |
e950bea8 | 261 | printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n", |
4ef81297 | 262 | mpc->mpc_spec); |
1da177e4 LT |
263 | return 0; |
264 | } | |
265 | if (!mpc->mpc_lapic) { | |
e950bea8 | 266 | printk(KERN_ERR "MPTABLE: null local APIC address!\n"); |
1da177e4 LT |
267 | return 0; |
268 | } | |
4ef81297 AS |
269 | memcpy(oem, mpc->mpc_oem, 8); |
270 | oem[8] = 0; | |
11a62a05 | 271 | printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); |
1da177e4 | 272 | |
4ef81297 AS |
273 | memcpy(str, mpc->mpc_productid, 12); |
274 | str[12] = 0; | |
1da177e4 | 275 | |
11a62a05 | 276 | printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); |
1da177e4 | 277 | |
e950bea8 | 278 | printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic); |
1da177e4 | 279 | |
2944e16b YL |
280 | return 1; |
281 | } | |
282 | ||
f29521e4 | 283 | static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early) |
2944e16b YL |
284 | { |
285 | char str[16]; | |
286 | char oem[10]; | |
287 | ||
288 | int count = sizeof(*mpc); | |
289 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
290 | ||
291 | if (!smp_check_mpc(mpc, oem, str)) | |
292 | return 0; | |
293 | ||
294 | #ifdef CONFIG_X86_32 | |
d49c4288 YL |
295 | /* |
296 | * need to make sure summit and es7000's mps_oem_check is safe to be | |
297 | * called early via genericarch 's mps_oem_check | |
298 | */ | |
299 | if (early) { | |
300 | #ifdef CONFIG_X86_NUMAQ | |
301 | numaq_mps_oem_check(mpc, oem, str); | |
302 | #endif | |
303 | } else | |
304 | mps_oem_check(mpc, oem, str); | |
2944e16b | 305 | #endif |
e950bea8 | 306 | /* save the local APIC address, it might be non-default */ |
1da177e4 LT |
307 | if (!acpi_lapic) |
308 | mp_lapic_addr = mpc->mpc_lapic; | |
309 | ||
888032cd AS |
310 | if (early) |
311 | return 1; | |
312 | ||
64898a8b | 313 | if (mpc->mpc_oemptr && x86_quirks->smp_read_mpc_oem) { |
b0e239ff | 314 | struct mpc_oemtable *oem_table = (void *)(long)mpc->mpc_oemptr; |
64898a8b YL |
315 | x86_quirks->smp_read_mpc_oem(oem_table, mpc->mpc_oemsize); |
316 | } | |
317 | ||
1da177e4 | 318 | /* |
4ef81297 | 319 | * Now process the configuration blocks. |
1da177e4 | 320 | */ |
64898a8b YL |
321 | if (x86_quirks->mpc_record) |
322 | *x86_quirks->mpc_record = 0; | |
323 | ||
1da177e4 | 324 | while (count < mpc->mpc_length) { |
4ef81297 AS |
325 | switch (*mpt) { |
326 | case MP_PROCESSOR: | |
1da177e4 | 327 | { |
f4f21b71 | 328 | struct mpc_cpu *m = (struct mpc_cpu *)mpt; |
1da177e4 LT |
329 | /* ACPI may have already provided this data */ |
330 | if (!acpi_lapic) | |
331 | MP_processor_info(m); | |
332 | mpt += sizeof(*m); | |
333 | count += sizeof(*m); | |
334 | break; | |
335 | } | |
4ef81297 | 336 | case MP_BUS: |
1da177e4 | 337 | { |
00fb8606 | 338 | struct mpc_bus *m = (struct mpc_bus *)mpt; |
85cc35fa | 339 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 | 340 | MP_bus_info(m); |
85cc35fa | 341 | #endif |
1da177e4 LT |
342 | mpt += sizeof(*m); |
343 | count += sizeof(*m); | |
344 | break; | |
345 | } | |
4ef81297 | 346 | case MP_IOAPIC: |
1da177e4 | 347 | { |
61048c63 | 348 | #ifdef CONFIG_X86_IO_APIC |
2b85b5fb | 349 | struct mpc_ioapic *m = (struct mpc_ioapic *)mpt; |
1da177e4 | 350 | MP_ioapic_info(m); |
61048c63 | 351 | #endif |
2b85b5fb JSR |
352 | mpt += sizeof(struct mpc_ioapic); |
353 | count += sizeof(struct mpc_ioapic); | |
1da177e4 LT |
354 | break; |
355 | } | |
4ef81297 | 356 | case MP_INTSRC: |
1da177e4 | 357 | { |
61048c63 | 358 | #ifdef CONFIG_X86_IO_APIC |
540d4e72 | 359 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
1da177e4 LT |
360 | |
361 | MP_intsrc_info(m); | |
61048c63 | 362 | #endif |
540d4e72 JSR |
363 | mpt += sizeof(struct mpc_intsrc); |
364 | count += sizeof(struct mpc_intsrc); | |
1da177e4 LT |
365 | break; |
366 | } | |
4ef81297 | 367 | case MP_LINTSRC: |
1da177e4 | 368 | { |
8fb2952b JSR |
369 | struct mpc_lintsrc *m = |
370 | (struct mpc_lintsrc *)mpt; | |
1da177e4 | 371 | MP_lintsrc_info(m); |
4ef81297 AS |
372 | mpt += sizeof(*m); |
373 | count += sizeof(*m); | |
1da177e4 LT |
374 | break; |
375 | } | |
4ef81297 | 376 | default: |
711554db YL |
377 | /* wrong mptable */ |
378 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); | |
379 | printk(KERN_ERR "type %x\n", *mpt); | |
380 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
381 | 1, mpc, mpc->mpc_length, 1); | |
382 | count = mpc->mpc_length; | |
383 | break; | |
1da177e4 | 384 | } |
64898a8b YL |
385 | if (x86_quirks->mpc_record) |
386 | (*x86_quirks->mpc_record)++; | |
1da177e4 | 387 | } |
e0da3364 YL |
388 | |
389 | #ifdef CONFIG_X86_GENERICARCH | |
390 | generic_bigsmp_probe(); | |
391 | #endif | |
392 | ||
6e1cb38a | 393 | #ifdef CONFIG_X86_32 |
3c43f039 | 394 | setup_apic_routing(); |
6e1cb38a | 395 | #endif |
1da177e4 | 396 | if (!num_processors) |
e950bea8 | 397 | printk(KERN_ERR "MPTABLE: no processors registered!\n"); |
1da177e4 LT |
398 | return num_processors; |
399 | } | |
400 | ||
61048c63 AS |
401 | #ifdef CONFIG_X86_IO_APIC |
402 | ||
1da177e4 LT |
403 | static int __init ELCR_trigger(unsigned int irq) |
404 | { | |
405 | unsigned int port; | |
406 | ||
407 | port = 0x4d0 + (irq >> 3); | |
408 | return (inb(port) >> (irq & 7)) & 1; | |
409 | } | |
410 | ||
411 | static void __init construct_default_ioirq_mptable(int mpc_default_type) | |
412 | { | |
540d4e72 | 413 | struct mpc_intsrc intsrc; |
1da177e4 LT |
414 | int i; |
415 | int ELCR_fallback = 0; | |
416 | ||
e253b396 JSR |
417 | intsrc.type = MP_INTSRC; |
418 | intsrc.irqflag = 0; /* conforming */ | |
419 | intsrc.srcbus = 0; | |
420 | intsrc.dstapic = mp_ioapics[0].mp_apicid; | |
1da177e4 | 421 | |
e253b396 | 422 | intsrc.irqtype = mp_INT; |
1da177e4 LT |
423 | |
424 | /* | |
425 | * If true, we have an ISA/PCI system with no IRQ entries | |
426 | * in the MP table. To prevent the PCI interrupts from being set up | |
427 | * incorrectly, we try to use the ELCR. The sanity check to see if | |
428 | * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can | |
429 | * never be level sensitive, so we simply see if the ELCR agrees. | |
430 | * If it does, we assume it's valid. | |
431 | */ | |
432 | if (mpc_default_type == 5) { | |
62441bf1 AS |
433 | printk(KERN_INFO "ISA/PCI bus type with no IRQ information... " |
434 | "falling back to ELCR\n"); | |
1da177e4 | 435 | |
62441bf1 AS |
436 | if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) || |
437 | ELCR_trigger(13)) | |
438 | printk(KERN_ERR "ELCR contains invalid data... " | |
439 | "not using ELCR\n"); | |
1da177e4 | 440 | else { |
4ef81297 AS |
441 | printk(KERN_INFO |
442 | "Using ELCR to identify PCI interrupts\n"); | |
1da177e4 LT |
443 | ELCR_fallback = 1; |
444 | } | |
445 | } | |
446 | ||
447 | for (i = 0; i < 16; i++) { | |
448 | switch (mpc_default_type) { | |
449 | case 2: | |
450 | if (i == 0 || i == 13) | |
451 | continue; /* IRQ0 & IRQ13 not connected */ | |
452 | /* fall through */ | |
453 | default: | |
454 | if (i == 2) | |
455 | continue; /* IRQ2 is never connected */ | |
456 | } | |
457 | ||
458 | if (ELCR_fallback) { | |
459 | /* | |
460 | * If the ELCR indicates a level-sensitive interrupt, we | |
461 | * copy that information over to the MP table in the | |
462 | * irqflag field (level sensitive, active high polarity). | |
463 | */ | |
464 | if (ELCR_trigger(i)) | |
e253b396 | 465 | intsrc.irqflag = 13; |
1da177e4 | 466 | else |
e253b396 | 467 | intsrc.irqflag = 0; |
1da177e4 LT |
468 | } |
469 | ||
e253b396 JSR |
470 | intsrc.srcbusirq = i; |
471 | intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */ | |
1da177e4 LT |
472 | MP_intsrc_info(&intsrc); |
473 | } | |
474 | ||
e253b396 JSR |
475 | intsrc.irqtype = mp_ExtINT; |
476 | intsrc.srcbusirq = 0; | |
477 | intsrc.dstirq = 0; /* 8259A to INTIN0 */ | |
1da177e4 LT |
478 | MP_intsrc_info(&intsrc); |
479 | } | |
480 | ||
61048c63 | 481 | |
39e00fe2 | 482 | static void __init construct_ioapic_table(int mpc_default_type) |
1da177e4 | 483 | { |
2b85b5fb | 484 | struct mpc_ioapic ioapic; |
00fb8606 | 485 | struct mpc_bus bus; |
1da177e4 LT |
486 | |
487 | bus.mpc_type = MP_BUS; | |
488 | bus.mpc_busid = 0; | |
489 | switch (mpc_default_type) { | |
4ef81297 | 490 | default: |
62441bf1 | 491 | printk(KERN_ERR "???\nUnknown standard configuration %d\n", |
4ef81297 AS |
492 | mpc_default_type); |
493 | /* fall through */ | |
494 | case 1: | |
495 | case 5: | |
496 | memcpy(bus.mpc_bustype, "ISA ", 6); | |
497 | break; | |
498 | case 2: | |
499 | case 6: | |
500 | case 3: | |
501 | memcpy(bus.mpc_bustype, "EISA ", 6); | |
502 | break; | |
503 | case 4: | |
504 | case 7: | |
505 | memcpy(bus.mpc_bustype, "MCA ", 6); | |
1da177e4 LT |
506 | } |
507 | MP_bus_info(&bus); | |
508 | if (mpc_default_type > 4) { | |
509 | bus.mpc_busid = 1; | |
510 | memcpy(bus.mpc_bustype, "PCI ", 6); | |
511 | MP_bus_info(&bus); | |
512 | } | |
513 | ||
5df82c7d JSR |
514 | ioapic.type = MP_IOAPIC; |
515 | ioapic.apicid = 2; | |
516 | ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01; | |
517 | ioapic.flags = MPC_APIC_USABLE; | |
518 | ioapic.apicaddr = 0xFEC00000; | |
1da177e4 LT |
519 | MP_ioapic_info(&ioapic); |
520 | ||
521 | /* | |
522 | * We set up most of the low 16 IO-APIC pins according to MPS rules. | |
523 | */ | |
524 | construct_default_ioirq_mptable(mpc_default_type); | |
85cc35fa TG |
525 | } |
526 | #else | |
39e00fe2 | 527 | static inline void __init construct_ioapic_table(int mpc_default_type) { } |
61048c63 | 528 | #endif |
85cc35fa TG |
529 | |
530 | static inline void __init construct_default_ISA_mptable(int mpc_default_type) | |
531 | { | |
f4f21b71 | 532 | struct mpc_cpu processor; |
8fb2952b | 533 | struct mpc_lintsrc lintsrc; |
85cc35fa TG |
534 | int linttypes[2] = { mp_ExtINT, mp_NMI }; |
535 | int i; | |
536 | ||
537 | /* | |
538 | * local APIC has default address | |
539 | */ | |
540 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
541 | ||
542 | /* | |
543 | * 2 CPUs, numbered 0 & 1. | |
544 | */ | |
c4563826 | 545 | processor.type = MP_PROCESSOR; |
85cc35fa | 546 | /* Either an integrated APIC or a discrete 82489DX. */ |
c4563826 JSR |
547 | processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01; |
548 | processor.cpuflag = CPU_ENABLED; | |
549 | processor.cpufeature = (boot_cpu_data.x86 << 8) | | |
85cc35fa | 550 | (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; |
c4563826 JSR |
551 | processor.featureflag = boot_cpu_data.x86_capability[0]; |
552 | processor.reserved[0] = 0; | |
553 | processor.reserved[1] = 0; | |
85cc35fa | 554 | for (i = 0; i < 2; i++) { |
c4563826 | 555 | processor.apicid = i; |
85cc35fa TG |
556 | MP_processor_info(&processor); |
557 | } | |
558 | ||
559 | construct_ioapic_table(mpc_default_type); | |
560 | ||
b5ced7cd JSR |
561 | lintsrc.type = MP_LINTSRC; |
562 | lintsrc.irqflag = 0; /* conforming */ | |
563 | lintsrc.srcbusid = 0; | |
564 | lintsrc.srcbusirq = 0; | |
565 | lintsrc.destapic = MP_APIC_ALL; | |
1da177e4 | 566 | for (i = 0; i < 2; i++) { |
b5ced7cd JSR |
567 | lintsrc.irqtype = linttypes[i]; |
568 | lintsrc.destapiclint = i; | |
1da177e4 LT |
569 | MP_lintsrc_info(&lintsrc); |
570 | } | |
571 | } | |
572 | ||
573 | static struct intel_mp_floating *mpf_found; | |
574 | ||
575 | /* | |
576 | * Scan the memory blocks for an SMP configuration block. | |
577 | */ | |
3b33553b | 578 | static void __init __get_smp_config(unsigned int early) |
1da177e4 LT |
579 | { |
580 | struct intel_mp_floating *mpf = mpf_found; | |
581 | ||
69b88afa YL |
582 | if (!mpf) |
583 | return; | |
584 | ||
888032cd AS |
585 | if (acpi_lapic && early) |
586 | return; | |
69b88afa | 587 | |
1da177e4 | 588 | /* |
69b88afa YL |
589 | * MPS doesn't support hyperthreading, aka only have |
590 | * thread 0 apic id in MPS table | |
1da177e4 | 591 | */ |
69b88afa | 592 | if (acpi_lapic && acpi_ioapic) |
1da177e4 | 593 | return; |
1da177e4 | 594 | |
69b88afa YL |
595 | if (x86_quirks->mach_get_smp_config) { |
596 | if (x86_quirks->mach_get_smp_config(early)) | |
597 | return; | |
598 | } | |
9adc1386 | 599 | |
4ef81297 AS |
600 | printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", |
601 | mpf->mpf_specification); | |
b3e24164 | 602 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
4ef81297 | 603 | if (mpf->mpf_feature2 & (1 << 7)) { |
1da177e4 LT |
604 | printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); |
605 | pic_mode = 1; | |
606 | } else { | |
607 | printk(KERN_INFO " Virtual Wire compatibility mode.\n"); | |
608 | pic_mode = 0; | |
609 | } | |
4421b1c8 | 610 | #endif |
1da177e4 LT |
611 | /* |
612 | * Now see if we need to read further. | |
613 | */ | |
614 | if (mpf->mpf_feature1 != 0) { | |
888032cd AS |
615 | if (early) { |
616 | /* | |
617 | * local APIC has default address | |
618 | */ | |
619 | mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; | |
620 | return; | |
621 | } | |
1da177e4 | 622 | |
4ef81297 AS |
623 | printk(KERN_INFO "Default MP configuration #%d\n", |
624 | mpf->mpf_feature1); | |
1da177e4 LT |
625 | construct_default_ISA_mptable(mpf->mpf_feature1); |
626 | ||
627 | } else if (mpf->mpf_physptr) { | |
628 | ||
629 | /* | |
630 | * Read the physical hardware table. Anything here will | |
631 | * override the defaults. | |
632 | */ | |
888032cd | 633 | if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) { |
bab4b27c | 634 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 635 | smp_found_config = 0; |
bab4b27c | 636 | #endif |
4ef81297 AS |
637 | printk(KERN_ERR |
638 | "BIOS bug, MP table errors detected!...\n"); | |
4421b1c8 AS |
639 | printk(KERN_ERR "... disabling SMP support. " |
640 | "(tell your hw vendor)\n"); | |
1da177e4 LT |
641 | return; |
642 | } | |
61048c63 | 643 | |
888032cd AS |
644 | if (early) |
645 | return; | |
61048c63 | 646 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
647 | /* |
648 | * If there are no explicit MP IRQ entries, then we are | |
649 | * broken. We set up most of the low 16 IO-APIC pins to | |
650 | * ISA defaults and hope it will work. | |
651 | */ | |
652 | if (!mp_irq_entries) { | |
00fb8606 | 653 | struct mpc_bus bus; |
1da177e4 | 654 | |
4421b1c8 AS |
655 | printk(KERN_ERR "BIOS bug, no explicit IRQ entries, " |
656 | "using default mptable. " | |
657 | "(tell your hw vendor)\n"); | |
1da177e4 LT |
658 | |
659 | bus.mpc_type = MP_BUS; | |
660 | bus.mpc_busid = 0; | |
661 | memcpy(bus.mpc_bustype, "ISA ", 6); | |
662 | MP_bus_info(&bus); | |
663 | ||
664 | construct_default_ioirq_mptable(0); | |
665 | } | |
61048c63 | 666 | #endif |
1da177e4 LT |
667 | } else |
668 | BUG(); | |
669 | ||
888032cd AS |
670 | if (!early) |
671 | printk(KERN_INFO "Processors: %d\n", num_processors); | |
1da177e4 LT |
672 | /* |
673 | * Only use the first configuration found. | |
674 | */ | |
675 | } | |
676 | ||
888032cd AS |
677 | void __init early_get_smp_config(void) |
678 | { | |
679 | __get_smp_config(1); | |
680 | } | |
681 | ||
682 | void __init get_smp_config(void) | |
683 | { | |
684 | __get_smp_config(0); | |
685 | } | |
686 | ||
687 | static int __init smp_scan_config(unsigned long base, unsigned long length, | |
688 | unsigned reserve) | |
1da177e4 | 689 | { |
92fd4b7a | 690 | unsigned int *bp = phys_to_virt(base); |
1da177e4 LT |
691 | struct intel_mp_floating *mpf; |
692 | ||
eeb0d7d1 RH |
693 | apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n", |
694 | bp, length); | |
5d47a271 | 695 | BUILD_BUG_ON(sizeof(*mpf) != 16); |
1da177e4 LT |
696 | |
697 | while (length > 0) { | |
698 | mpf = (struct intel_mp_floating *)bp; | |
699 | if ((*bp == SMP_MAGIC_IDENT) && | |
4ef81297 AS |
700 | (mpf->mpf_length == 1) && |
701 | !mpf_checksum((unsigned char *)bp, 16) && | |
702 | ((mpf->mpf_specification == 1) | |
703 | || (mpf->mpf_specification == 4))) { | |
bab4b27c | 704 | #ifdef CONFIG_X86_LOCAL_APIC |
1da177e4 | 705 | smp_found_config = 1; |
bab4b27c | 706 | #endif |
92fd4b7a | 707 | mpf_found = mpf; |
b1f006b6 | 708 | |
e91a3b43 | 709 | printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n", |
4ef81297 | 710 | mpf, virt_to_phys(mpf)); |
b1f006b6 YL |
711 | |
712 | if (!reserve) | |
713 | return 1; | |
d2dbf343 | 714 | reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE, |
72a7fe39 | 715 | BOOTMEM_DEFAULT); |
1da177e4 | 716 | if (mpf->mpf_physptr) { |
d2dbf343 YL |
717 | unsigned long size = PAGE_SIZE; |
718 | #ifdef CONFIG_X86_32 | |
1da177e4 LT |
719 | /* |
720 | * We cannot access to MPC table to compute | |
721 | * table size yet, as only few megabytes from | |
722 | * the bottom is mapped now. | |
723 | * PC-9800's MPC table places on the very last | |
724 | * of physical memory; so that simply reserving | |
725 | * PAGE_SIZE from mpg->mpf_physptr yields BUG() | |
726 | * in reserve_bootmem. | |
727 | */ | |
1da177e4 LT |
728 | unsigned long end = max_low_pfn * PAGE_SIZE; |
729 | if (mpf->mpf_physptr + size > end) | |
730 | size = end - mpf->mpf_physptr; | |
d2dbf343 YL |
731 | #endif |
732 | reserve_bootmem_generic(mpf->mpf_physptr, size, | |
72a7fe39 | 733 | BOOTMEM_DEFAULT); |
1da177e4 LT |
734 | } |
735 | ||
d2dbf343 | 736 | return 1; |
1da177e4 LT |
737 | } |
738 | bp += 4; | |
739 | length -= 16; | |
740 | } | |
741 | return 0; | |
742 | } | |
743 | ||
3b33553b | 744 | static void __init __find_smp_config(unsigned int reserve) |
1da177e4 LT |
745 | { |
746 | unsigned int address; | |
747 | ||
3c9cb6de YL |
748 | if (x86_quirks->mach_find_smp_config) { |
749 | if (x86_quirks->mach_find_smp_config(reserve)) | |
3b33553b IM |
750 | return; |
751 | } | |
1da177e4 LT |
752 | /* |
753 | * FIXME: Linux assumes you have 640K of base ram.. | |
754 | * this continues the error... | |
755 | * | |
756 | * 1) Scan the bottom 1K for a signature | |
757 | * 2) Scan the top 1K of base RAM | |
758 | * 3) Scan the 64K of bios | |
759 | */ | |
888032cd AS |
760 | if (smp_scan_config(0x0, 0x400, reserve) || |
761 | smp_scan_config(639 * 0x400, 0x400, reserve) || | |
762 | smp_scan_config(0xF0000, 0x10000, reserve)) | |
1da177e4 LT |
763 | return; |
764 | /* | |
765 | * If it is an SMP machine we should know now, unless the | |
766 | * configuration is in an EISA/MCA bus machine with an | |
767 | * extended bios data area. | |
768 | * | |
769 | * there is a real-mode segmented pointer pointing to the | |
770 | * 4K EBDA area at 0x40E, calculate and scan it here. | |
771 | * | |
772 | * NOTE! There are Linux loaders that will corrupt the EBDA | |
773 | * area, and as such this kind of SMP config may be less | |
774 | * trustworthy, simply because the SMP table may have been | |
775 | * stomped on during early boot. These loaders are buggy and | |
776 | * should be fixed. | |
777 | * | |
778 | * MP1.4 SPEC states to only scan first 1K of 4K EBDA. | |
779 | */ | |
780 | ||
781 | address = get_bios_ebda(); | |
782 | if (address) | |
888032cd AS |
783 | smp_scan_config(address, 0x400, reserve); |
784 | } | |
785 | ||
786 | void __init early_find_smp_config(void) | |
787 | { | |
788 | __find_smp_config(0); | |
789 | } | |
790 | ||
791 | void __init find_smp_config(void) | |
792 | { | |
793 | __find_smp_config(1); | |
1da177e4 | 794 | } |
2944e16b YL |
795 | |
796 | #ifdef CONFIG_X86_IO_APIC | |
797 | static u8 __initdata irq_used[MAX_IRQ_SOURCES]; | |
798 | ||
540d4e72 | 799 | static int __init get_MP_intsrc_index(struct mpc_intsrc *m) |
2944e16b YL |
800 | { |
801 | int i; | |
802 | ||
e253b396 | 803 | if (m->irqtype != mp_INT) |
2944e16b YL |
804 | return 0; |
805 | ||
e253b396 | 806 | if (m->irqflag != 0x0f) |
2944e16b YL |
807 | return 0; |
808 | ||
809 | /* not legacy */ | |
810 | ||
811 | for (i = 0; i < mp_irq_entries; i++) { | |
812 | if (mp_irqs[i].mp_irqtype != mp_INT) | |
813 | continue; | |
814 | ||
815 | if (mp_irqs[i].mp_irqflag != 0x0f) | |
816 | continue; | |
817 | ||
e253b396 | 818 | if (mp_irqs[i].mp_srcbus != m->srcbus) |
2944e16b | 819 | continue; |
e253b396 | 820 | if (mp_irqs[i].mp_srcbusirq != m->srcbusirq) |
2944e16b YL |
821 | continue; |
822 | if (irq_used[i]) { | |
823 | /* already claimed */ | |
824 | return -2; | |
825 | } | |
826 | irq_used[i] = 1; | |
827 | return i; | |
828 | } | |
829 | ||
830 | /* not found */ | |
831 | return -1; | |
832 | } | |
833 | ||
834 | #define SPARE_SLOT_NUM 20 | |
835 | ||
540d4e72 | 836 | static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; |
2944e16b YL |
837 | #endif |
838 | ||
f29521e4 | 839 | static int __init replace_intsrc_all(struct mpc_table *mpc, |
2944e16b YL |
840 | unsigned long mpc_new_phys, |
841 | unsigned long mpc_new_length) | |
842 | { | |
843 | #ifdef CONFIG_X86_IO_APIC | |
844 | int i; | |
845 | int nr_m_spare = 0; | |
846 | #endif | |
847 | ||
848 | int count = sizeof(*mpc); | |
849 | unsigned char *mpt = ((unsigned char *)mpc) + count; | |
850 | ||
851 | printk(KERN_INFO "mpc_length %x\n", mpc->mpc_length); | |
852 | while (count < mpc->mpc_length) { | |
853 | switch (*mpt) { | |
854 | case MP_PROCESSOR: | |
855 | { | |
f4f21b71 | 856 | struct mpc_cpu *m = (struct mpc_cpu *)mpt; |
2944e16b YL |
857 | mpt += sizeof(*m); |
858 | count += sizeof(*m); | |
859 | break; | |
860 | } | |
861 | case MP_BUS: | |
862 | { | |
00fb8606 | 863 | struct mpc_bus *m = (struct mpc_bus *)mpt; |
2944e16b YL |
864 | mpt += sizeof(*m); |
865 | count += sizeof(*m); | |
866 | break; | |
867 | } | |
868 | case MP_IOAPIC: | |
869 | { | |
2b85b5fb JSR |
870 | mpt += sizeof(struct mpc_ioapic); |
871 | count += sizeof(struct mpc_ioapic); | |
2944e16b YL |
872 | break; |
873 | } | |
874 | case MP_INTSRC: | |
875 | { | |
876 | #ifdef CONFIG_X86_IO_APIC | |
540d4e72 | 877 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
2944e16b YL |
878 | |
879 | printk(KERN_INFO "OLD "); | |
880 | print_MP_intsrc_info(m); | |
881 | i = get_MP_intsrc_index(m); | |
882 | if (i > 0) { | |
883 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
884 | printk(KERN_INFO "NEW "); | |
885 | print_mp_irq_info(&mp_irqs[i]); | |
886 | } else if (!i) { | |
887 | /* legacy, do nothing */ | |
888 | } else if (nr_m_spare < SPARE_SLOT_NUM) { | |
889 | /* | |
890 | * not found (-1), or duplicated (-2) | |
891 | * are invalid entries, | |
892 | * we need to use the slot later | |
893 | */ | |
894 | m_spare[nr_m_spare] = m; | |
895 | nr_m_spare++; | |
896 | } | |
897 | #endif | |
540d4e72 JSR |
898 | mpt += sizeof(struct mpc_intsrc); |
899 | count += sizeof(struct mpc_intsrc); | |
2944e16b YL |
900 | break; |
901 | } | |
902 | case MP_LINTSRC: | |
903 | { | |
8fb2952b JSR |
904 | struct mpc_lintsrc *m = |
905 | (struct mpc_lintsrc *)mpt; | |
2944e16b YL |
906 | mpt += sizeof(*m); |
907 | count += sizeof(*m); | |
908 | break; | |
909 | } | |
910 | default: | |
911 | /* wrong mptable */ | |
912 | printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); | |
913 | printk(KERN_ERR "type %x\n", *mpt); | |
914 | print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, | |
915 | 1, mpc, mpc->mpc_length, 1); | |
916 | goto out; | |
917 | } | |
918 | } | |
919 | ||
920 | #ifdef CONFIG_X86_IO_APIC | |
921 | for (i = 0; i < mp_irq_entries; i++) { | |
922 | if (irq_used[i]) | |
923 | continue; | |
924 | ||
925 | if (mp_irqs[i].mp_irqtype != mp_INT) | |
926 | continue; | |
927 | ||
928 | if (mp_irqs[i].mp_irqflag != 0x0f) | |
929 | continue; | |
930 | ||
931 | if (nr_m_spare > 0) { | |
932 | printk(KERN_INFO "*NEW* found "); | |
933 | nr_m_spare--; | |
934 | assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); | |
935 | m_spare[nr_m_spare] = NULL; | |
936 | } else { | |
540d4e72 JSR |
937 | struct mpc_intsrc *m = (struct mpc_intsrc *)mpt; |
938 | count += sizeof(struct mpc_intsrc); | |
2944e16b YL |
939 | if (!mpc_new_phys) { |
940 | printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count); | |
941 | } else { | |
942 | if (count <= mpc_new_length) | |
943 | printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count); | |
944 | else { | |
945 | printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length); | |
946 | goto out; | |
947 | } | |
948 | } | |
949 | assign_to_mpc_intsrc(&mp_irqs[i], m); | |
950 | mpc->mpc_length = count; | |
540d4e72 | 951 | mpt += sizeof(struct mpc_intsrc); |
2944e16b YL |
952 | } |
953 | print_mp_irq_info(&mp_irqs[i]); | |
954 | } | |
955 | #endif | |
956 | out: | |
957 | /* update checksum */ | |
958 | mpc->mpc_checksum = 0; | |
959 | mpc->mpc_checksum -= mpf_checksum((unsigned char *)mpc, | |
960 | mpc->mpc_length); | |
961 | ||
962 | return 0; | |
963 | } | |
964 | ||
fcfa146e YL |
965 | static int __initdata enable_update_mptable; |
966 | ||
2944e16b YL |
967 | static int __init update_mptable_setup(char *str) |
968 | { | |
969 | enable_update_mptable = 1; | |
970 | return 0; | |
971 | } | |
972 | early_param("update_mptable", update_mptable_setup); | |
973 | ||
974 | static unsigned long __initdata mpc_new_phys; | |
975 | static unsigned long mpc_new_length __initdata = 4096; | |
976 | ||
977 | /* alloc_mptable or alloc_mptable=4k */ | |
978 | static int __initdata alloc_mptable; | |
979 | static int __init parse_alloc_mptable_opt(char *p) | |
980 | { | |
981 | enable_update_mptable = 1; | |
982 | alloc_mptable = 1; | |
983 | if (!p) | |
984 | return 0; | |
985 | mpc_new_length = memparse(p, &p); | |
986 | return 0; | |
987 | } | |
988 | early_param("alloc_mptable", parse_alloc_mptable_opt); | |
989 | ||
990 | void __init early_reserve_e820_mpc_new(void) | |
991 | { | |
992 | if (enable_update_mptable && alloc_mptable) { | |
993 | u64 startt = 0; | |
994 | #ifdef CONFIG_X86_TRAMPOLINE | |
995 | startt = TRAMPOLINE_BASE; | |
996 | #endif | |
997 | mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); | |
998 | } | |
999 | } | |
1000 | ||
1001 | static int __init update_mp_table(void) | |
1002 | { | |
1003 | char str[16]; | |
1004 | char oem[10]; | |
1005 | struct intel_mp_floating *mpf; | |
f29521e4 | 1006 | struct mpc_table *mpc, *mpc_new; |
2944e16b YL |
1007 | |
1008 | if (!enable_update_mptable) | |
1009 | return 0; | |
1010 | ||
1011 | mpf = mpf_found; | |
1012 | if (!mpf) | |
1013 | return 0; | |
1014 | ||
1015 | /* | |
1016 | * Now see if we need to go further. | |
1017 | */ | |
1018 | if (mpf->mpf_feature1 != 0) | |
1019 | return 0; | |
1020 | ||
1021 | if (!mpf->mpf_physptr) | |
1022 | return 0; | |
1023 | ||
1024 | mpc = phys_to_virt(mpf->mpf_physptr); | |
1025 | ||
1026 | if (!smp_check_mpc(mpc, oem, str)) | |
1027 | return 0; | |
1028 | ||
1029 | printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf)); | |
1030 | printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr); | |
1031 | ||
1032 | if (mpc_new_phys && mpc->mpc_length > mpc_new_length) { | |
1033 | mpc_new_phys = 0; | |
1034 | printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", | |
1035 | mpc_new_length); | |
1036 | } | |
1037 | ||
1038 | if (!mpc_new_phys) { | |
1039 | unsigned char old, new; | |
1040 | /* check if we can change the postion */ | |
1041 | mpc->mpc_checksum = 0; | |
1042 | old = mpf_checksum((unsigned char *)mpc, mpc->mpc_length); | |
1043 | mpc->mpc_checksum = 0xff; | |
1044 | new = mpf_checksum((unsigned char *)mpc, mpc->mpc_length); | |
1045 | if (old == new) { | |
1046 | printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); | |
1047 | return 0; | |
1048 | } | |
1049 | printk(KERN_INFO "use in-positon replacing\n"); | |
1050 | } else { | |
1051 | mpf->mpf_physptr = mpc_new_phys; | |
1052 | mpc_new = phys_to_virt(mpc_new_phys); | |
1053 | memcpy(mpc_new, mpc, mpc->mpc_length); | |
1054 | mpc = mpc_new; | |
1055 | /* check if we can modify that */ | |
1056 | if (mpc_new_phys - mpf->mpf_physptr) { | |
1057 | struct intel_mp_floating *mpf_new; | |
1058 | /* steal 16 bytes from [0, 1k) */ | |
1059 | printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); | |
1060 | mpf_new = phys_to_virt(0x400 - 16); | |
1061 | memcpy(mpf_new, mpf, 16); | |
1062 | mpf = mpf_new; | |
1063 | mpf->mpf_physptr = mpc_new_phys; | |
1064 | } | |
1065 | mpf->mpf_checksum = 0; | |
1066 | mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16); | |
1067 | printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr); | |
1068 | } | |
1069 | ||
1070 | /* | |
1071 | * only replace the one with mp_INT and | |
1072 | * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, | |
1073 | * already in mp_irqs , stored by ... and mp_config_acpi_gsi, | |
1074 | * may need pci=routeirq for all coverage | |
1075 | */ | |
1076 | replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); | |
1077 | ||
1078 | return 0; | |
1079 | } | |
1080 | ||
1081 | late_initcall(update_mp_table); |