Commit | Line | Data |
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d3561b7f RR |
1 | /* Paravirtualization interfaces |
2 | Copyright (C) 2006 Rusty Russell IBM Corporation | |
3 | ||
4 | This program is free software; you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation; either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program; if not, write to the Free Software | |
16 | Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
17 | */ | |
18 | #include <linux/errno.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/efi.h> | |
21 | #include <linux/bcd.h> | |
ce6234b5 | 22 | #include <linux/highmem.h> |
d3561b7f RR |
23 | |
24 | #include <asm/bug.h> | |
25 | #include <asm/paravirt.h> | |
26 | #include <asm/desc.h> | |
27 | #include <asm/setup.h> | |
28 | #include <asm/arch_hooks.h> | |
29 | #include <asm/time.h> | |
30 | #include <asm/irq.h> | |
31 | #include <asm/delay.h> | |
13623d79 RR |
32 | #include <asm/fixmap.h> |
33 | #include <asm/apic.h> | |
da181a8b | 34 | #include <asm/tlbflush.h> |
6cb9a835 | 35 | #include <asm/timer.h> |
d3561b7f RR |
36 | |
37 | /* nop stub */ | |
45876233 | 38 | void _paravirt_nop(void) |
d3561b7f RR |
39 | { |
40 | } | |
41 | ||
42 | static void __init default_banner(void) | |
43 | { | |
44 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", | |
93b1eab3 | 45 | pv_info.name); |
d3561b7f RR |
46 | } |
47 | ||
48 | char *memory_setup(void) | |
49 | { | |
93b1eab3 | 50 | return pv_init_ops.memory_setup(); |
d3561b7f RR |
51 | } |
52 | ||
139ec7c4 | 53 | /* Simple instruction patching code. */ |
93b1eab3 JF |
54 | #define DEF_NATIVE(ops, name, code) \ |
55 | extern const char start_##ops##_##name[], end_##ops##_##name[]; \ | |
56 | asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":") | |
57 | ||
58 | DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); | |
59 | DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); | |
60 | DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf"); | |
61 | DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax"); | |
62 | DEF_NATIVE(pv_cpu_ops, iret, "iret"); | |
63 | DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "sti; sysexit"); | |
64 | DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax"); | |
65 | DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3"); | |
66 | DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax"); | |
67 | DEF_NATIVE(pv_cpu_ops, clts, "clts"); | |
68 | DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc"); | |
69 | ||
70 | /* Undefined instruction for dealing with missing ops pointers. */ | |
71 | static const unsigned char ud2a[] = { 0x0f, 0x0b }; | |
139ec7c4 | 72 | |
ab144f5e AK |
73 | static unsigned native_patch(u8 type, u16 clobbers, void *ibuf, |
74 | unsigned long addr, unsigned len) | |
139ec7c4 | 75 | { |
63f70270 JF |
76 | const unsigned char *start, *end; |
77 | unsigned ret; | |
78 | ||
79 | switch(type) { | |
93b1eab3 JF |
80 | #define SITE(ops, x) \ |
81 | case PARAVIRT_PATCH(ops.x): \ | |
82 | start = start_##ops##_##x; \ | |
83 | end = end_##ops##_##x; \ | |
84 | goto patch_site | |
85 | ||
86 | SITE(pv_irq_ops, irq_disable); | |
87 | SITE(pv_irq_ops, irq_enable); | |
88 | SITE(pv_irq_ops, restore_fl); | |
89 | SITE(pv_irq_ops, save_fl); | |
90 | SITE(pv_cpu_ops, iret); | |
91 | SITE(pv_cpu_ops, irq_enable_sysexit); | |
92 | SITE(pv_mmu_ops, read_cr2); | |
93 | SITE(pv_mmu_ops, read_cr3); | |
94 | SITE(pv_mmu_ops, write_cr3); | |
95 | SITE(pv_cpu_ops, clts); | |
96 | SITE(pv_cpu_ops, read_tsc); | |
63f70270 JF |
97 | #undef SITE |
98 | ||
99 | patch_site: | |
ab144f5e | 100 | ret = paravirt_patch_insns(ibuf, len, start, end); |
63f70270 JF |
101 | break; |
102 | ||
63f70270 | 103 | default: |
ab144f5e | 104 | ret = paravirt_patch_default(type, clobbers, ibuf, addr, len); |
63f70270 JF |
105 | break; |
106 | } | |
107 | ||
108 | return ret; | |
109 | } | |
110 | ||
111 | unsigned paravirt_patch_nop(void) | |
112 | { | |
113 | return 0; | |
114 | } | |
115 | ||
116 | unsigned paravirt_patch_ignore(unsigned len) | |
117 | { | |
118 | return len; | |
119 | } | |
120 | ||
19d36ccd AK |
121 | struct branch { |
122 | unsigned char opcode; | |
123 | u32 delta; | |
124 | } __attribute__((packed)); | |
125 | ||
ab144f5e AK |
126 | unsigned paravirt_patch_call(void *insnbuf, |
127 | const void *target, u16 tgt_clobbers, | |
128 | unsigned long addr, u16 site_clobbers, | |
63f70270 JF |
129 | unsigned len) |
130 | { | |
ab144f5e AK |
131 | struct branch *b = insnbuf; |
132 | unsigned long delta = (unsigned long)target - (addr+5); | |
63f70270 JF |
133 | |
134 | if (tgt_clobbers & ~site_clobbers) | |
135 | return len; /* target would clobber too much for this site */ | |
136 | if (len < 5) | |
137 | return len; /* call too long for patch site */ | |
139ec7c4 | 138 | |
ab144f5e AK |
139 | b->opcode = 0xe8; /* call */ |
140 | b->delta = delta; | |
141 | BUILD_BUG_ON(sizeof(*b) != 5); | |
139ec7c4 | 142 | |
63f70270 JF |
143 | return 5; |
144 | } | |
145 | ||
93b1eab3 | 146 | unsigned paravirt_patch_jmp(void *insnbuf, const void *target, |
ab144f5e | 147 | unsigned long addr, unsigned len) |
63f70270 | 148 | { |
ab144f5e AK |
149 | struct branch *b = insnbuf; |
150 | unsigned long delta = (unsigned long)target - (addr+5); | |
63f70270 JF |
151 | |
152 | if (len < 5) | |
153 | return len; /* call too long for patch site */ | |
154 | ||
ab144f5e AK |
155 | b->opcode = 0xe9; /* jmp */ |
156 | b->delta = delta; | |
63f70270 JF |
157 | |
158 | return 5; | |
159 | } | |
160 | ||
93b1eab3 JF |
161 | /* Neat trick to map patch type back to the call within the |
162 | * corresponding structure. */ | |
163 | static void *get_call_destination(u8 type) | |
164 | { | |
165 | struct paravirt_patch_template tmpl = { | |
166 | .pv_init_ops = pv_init_ops, | |
167 | .pv_misc_ops = pv_misc_ops, | |
168 | .pv_time_ops = pv_time_ops, | |
169 | .pv_cpu_ops = pv_cpu_ops, | |
170 | .pv_irq_ops = pv_irq_ops, | |
171 | .pv_apic_ops = pv_apic_ops, | |
172 | .pv_mmu_ops = pv_mmu_ops, | |
173 | }; | |
174 | return *((void **)&tmpl + type); | |
175 | } | |
176 | ||
ab144f5e AK |
177 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, |
178 | unsigned long addr, unsigned len) | |
63f70270 | 179 | { |
93b1eab3 | 180 | void *opfunc = get_call_destination(type); |
63f70270 JF |
181 | unsigned ret; |
182 | ||
183 | if (opfunc == NULL) | |
184 | /* If there's no function, patch it with a ud2a (BUG) */ | |
93b1eab3 | 185 | ret = paravirt_patch_insns(insnbuf, len, ud2a, ud2a+sizeof(ud2a)); |
63f70270 JF |
186 | else if (opfunc == paravirt_nop) |
187 | /* If the operation is a nop, then nop the callsite */ | |
188 | ret = paravirt_patch_nop(); | |
93b1eab3 JF |
189 | else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) || |
190 | type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit)) | |
63f70270 | 191 | /* If operation requires a jmp, then jmp */ |
93b1eab3 | 192 | ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len); |
63f70270 JF |
193 | else |
194 | /* Otherwise call the function; assume target could | |
195 | clobber any caller-save reg */ | |
ab144f5e AK |
196 | ret = paravirt_patch_call(insnbuf, opfunc, CLBR_ANY, |
197 | addr, clobbers, len); | |
63f70270 JF |
198 | |
199 | return ret; | |
200 | } | |
201 | ||
ab144f5e | 202 | unsigned paravirt_patch_insns(void *insnbuf, unsigned len, |
63f70270 JF |
203 | const char *start, const char *end) |
204 | { | |
205 | unsigned insn_len = end - start; | |
139ec7c4 | 206 | |
63f70270 JF |
207 | if (insn_len > len || start == NULL) |
208 | insn_len = len; | |
209 | else | |
ab144f5e | 210 | memcpy(insnbuf, start, insn_len); |
139ec7c4 | 211 | |
139ec7c4 RR |
212 | return insn_len; |
213 | } | |
214 | ||
d3561b7f RR |
215 | void init_IRQ(void) |
216 | { | |
93b1eab3 | 217 | pv_irq_ops.init_IRQ(); |
d3561b7f RR |
218 | } |
219 | ||
1a1eecd1 | 220 | static void native_flush_tlb(void) |
da181a8b RR |
221 | { |
222 | __native_flush_tlb(); | |
223 | } | |
224 | ||
225 | /* | |
226 | * Global pages have to be flushed a bit differently. Not a real | |
227 | * performance problem because this does not happen often. | |
228 | */ | |
1a1eecd1 | 229 | static void native_flush_tlb_global(void) |
da181a8b RR |
230 | { |
231 | __native_flush_tlb_global(); | |
232 | } | |
233 | ||
63f70270 | 234 | static void native_flush_tlb_single(unsigned long addr) |
da181a8b RR |
235 | { |
236 | __native_flush_tlb_single(addr); | |
237 | } | |
238 | ||
d3561b7f | 239 | /* These are in entry.S */ |
1a1eecd1 AK |
240 | extern void native_iret(void); |
241 | extern void native_irq_enable_sysexit(void); | |
d3561b7f RR |
242 | |
243 | static int __init print_banner(void) | |
244 | { | |
93b1eab3 | 245 | pv_init_ops.banner(); |
d3561b7f RR |
246 | return 0; |
247 | } | |
248 | core_initcall(print_banner); | |
249 | ||
d572929c JF |
250 | static struct resource reserve_ioports = { |
251 | .start = 0, | |
252 | .end = IO_SPACE_LIMIT, | |
253 | .name = "paravirt-ioport", | |
254 | .flags = IORESOURCE_IO | IORESOURCE_BUSY, | |
255 | }; | |
256 | ||
257 | static struct resource reserve_iomem = { | |
258 | .start = 0, | |
259 | .end = -1, | |
260 | .name = "paravirt-iomem", | |
261 | .flags = IORESOURCE_MEM | IORESOURCE_BUSY, | |
262 | }; | |
263 | ||
264 | /* | |
265 | * Reserve the whole legacy IO space to prevent any legacy drivers | |
266 | * from wasting time probing for their hardware. This is a fairly | |
267 | * brute-force approach to disabling all non-virtual drivers. | |
268 | * | |
269 | * Note that this must be called very early to have any effect. | |
270 | */ | |
271 | int paravirt_disable_iospace(void) | |
272 | { | |
273 | int ret; | |
274 | ||
275 | ret = request_resource(&ioport_resource, &reserve_ioports); | |
276 | if (ret == 0) { | |
277 | ret = request_resource(&iomem_resource, &reserve_iomem); | |
278 | if (ret) | |
279 | release_resource(&reserve_ioports); | |
280 | } | |
281 | ||
282 | return ret; | |
283 | } | |
284 | ||
93b1eab3 | 285 | struct pv_info pv_info = { |
d3561b7f RR |
286 | .name = "bare hardware", |
287 | .paravirt_enabled = 0, | |
288 | .kernel_rpl = 0, | |
5311ab62 | 289 | .shared_kernel_pmd = 1, /* Only used when CONFIG_X86_PAE is set */ |
93b1eab3 | 290 | }; |
d3561b7f | 291 | |
93b1eab3 JF |
292 | struct pv_init_ops pv_init_ops = { |
293 | .patch = native_patch, | |
d3561b7f | 294 | .banner = default_banner, |
45876233 | 295 | .arch_setup = paravirt_nop, |
d3561b7f | 296 | .memory_setup = machine_specific_memory_setup, |
93b1eab3 JF |
297 | }; |
298 | ||
299 | struct pv_time_ops pv_time_ops = { | |
300 | .time_init = hpet_time_init, | |
d3561b7f RR |
301 | .get_wallclock = native_get_wallclock, |
302 | .set_wallclock = native_set_wallclock, | |
93b1eab3 JF |
303 | .sched_clock = native_sched_clock, |
304 | .get_cpu_khz = native_calculate_cpu_khz, | |
305 | }; | |
306 | ||
307 | struct pv_irq_ops pv_irq_ops = { | |
d3561b7f | 308 | .init_IRQ = native_init_IRQ, |
93b1eab3 JF |
309 | .save_fl = native_save_fl, |
310 | .restore_fl = native_restore_fl, | |
311 | .irq_disable = native_irq_disable, | |
312 | .irq_enable = native_irq_enable, | |
313 | .safe_halt = native_safe_halt, | |
314 | .halt = native_halt, | |
315 | }; | |
d3561b7f | 316 | |
93b1eab3 | 317 | struct pv_cpu_ops pv_cpu_ops = { |
d3561b7f RR |
318 | .cpuid = native_cpuid, |
319 | .get_debugreg = native_get_debugreg, | |
320 | .set_debugreg = native_set_debugreg, | |
321 | .clts = native_clts, | |
322 | .read_cr0 = native_read_cr0, | |
323 | .write_cr0 = native_write_cr0, | |
d3561b7f RR |
324 | .read_cr4 = native_read_cr4, |
325 | .read_cr4_safe = native_read_cr4_safe, | |
326 | .write_cr4 = native_write_cr4, | |
d3561b7f | 327 | .wbinvd = native_wbinvd, |
90a0a06a RR |
328 | .read_msr = native_read_msr_safe, |
329 | .write_msr = native_write_msr_safe, | |
d3561b7f RR |
330 | .read_tsc = native_read_tsc, |
331 | .read_pmc = native_read_pmc, | |
332 | .load_tr_desc = native_load_tr_desc, | |
333 | .set_ldt = native_set_ldt, | |
334 | .load_gdt = native_load_gdt, | |
335 | .load_idt = native_load_idt, | |
336 | .store_gdt = native_store_gdt, | |
337 | .store_idt = native_store_idt, | |
338 | .store_tr = native_store_tr, | |
339 | .load_tls = native_load_tls, | |
90a0a06a RR |
340 | .write_ldt_entry = write_dt_entry, |
341 | .write_gdt_entry = write_dt_entry, | |
342 | .write_idt_entry = write_dt_entry, | |
d3561b7f RR |
343 | .load_esp0 = native_load_esp0, |
344 | ||
93b1eab3 JF |
345 | .irq_enable_sysexit = native_irq_enable_sysexit, |
346 | .iret = native_iret, | |
347 | ||
d3561b7f RR |
348 | .set_iopl_mask = native_set_iopl_mask, |
349 | .io_delay = native_io_delay, | |
93b1eab3 | 350 | }; |
d3561b7f | 351 | |
93b1eab3 | 352 | struct pv_apic_ops pv_apic_ops = { |
13623d79 RR |
353 | #ifdef CONFIG_X86_LOCAL_APIC |
354 | .apic_write = native_apic_write, | |
355 | .apic_write_atomic = native_apic_write_atomic, | |
356 | .apic_read = native_apic_read, | |
bbab4f3b ZA |
357 | .setup_boot_clock = setup_boot_APIC_clock, |
358 | .setup_secondary_clock = setup_secondary_APIC_clock, | |
0260c196 | 359 | .startup_ipi_hook = paravirt_nop, |
13623d79 | 360 | #endif |
93b1eab3 JF |
361 | }; |
362 | ||
363 | struct pv_misc_ops pv_misc_ops = { | |
45876233 | 364 | .set_lazy_mode = paravirt_nop, |
93b1eab3 | 365 | }; |
13623d79 | 366 | |
93b1eab3 | 367 | struct pv_mmu_ops pv_mmu_ops = { |
b239fb25 JF |
368 | .pagetable_setup_start = native_pagetable_setup_start, |
369 | .pagetable_setup_done = native_pagetable_setup_done, | |
370 | ||
93b1eab3 JF |
371 | .read_cr2 = native_read_cr2, |
372 | .write_cr2 = native_write_cr2, | |
373 | .read_cr3 = native_read_cr3, | |
374 | .write_cr3 = native_write_cr3, | |
375 | ||
da181a8b RR |
376 | .flush_tlb_user = native_flush_tlb, |
377 | .flush_tlb_kernel = native_flush_tlb_global, | |
378 | .flush_tlb_single = native_flush_tlb_single, | |
d4c10477 | 379 | .flush_tlb_others = native_flush_tlb_others, |
da181a8b | 380 | |
45876233 JF |
381 | .alloc_pt = paravirt_nop, |
382 | .alloc_pd = paravirt_nop, | |
383 | .alloc_pd_clone = paravirt_nop, | |
384 | .release_pt = paravirt_nop, | |
385 | .release_pd = paravirt_nop, | |
c119ecce | 386 | |
da181a8b RR |
387 | .set_pte = native_set_pte, |
388 | .set_pte_at = native_set_pte_at, | |
389 | .set_pmd = native_set_pmd, | |
45876233 JF |
390 | .pte_update = paravirt_nop, |
391 | .pte_update_defer = paravirt_nop, | |
3dc494e8 | 392 | |
ce6234b5 JF |
393 | #ifdef CONFIG_HIGHPTE |
394 | .kmap_atomic_pte = kmap_atomic, | |
395 | #endif | |
396 | ||
da181a8b RR |
397 | #ifdef CONFIG_X86_PAE |
398 | .set_pte_atomic = native_set_pte_atomic, | |
399 | .set_pte_present = native_set_pte_present, | |
400 | .set_pud = native_set_pud, | |
401 | .pte_clear = native_pte_clear, | |
402 | .pmd_clear = native_pmd_clear, | |
3dc494e8 JF |
403 | |
404 | .pmd_val = native_pmd_val, | |
405 | .make_pmd = native_make_pmd, | |
da181a8b RR |
406 | #endif |
407 | ||
3dc494e8 JF |
408 | .pte_val = native_pte_val, |
409 | .pgd_val = native_pgd_val, | |
410 | ||
411 | .make_pte = native_make_pte, | |
412 | .make_pgd = native_make_pgd, | |
413 | ||
d6dd61c8 JF |
414 | .dup_mmap = paravirt_nop, |
415 | .exit_mmap = paravirt_nop, | |
416 | .activate_mm = paravirt_nop, | |
d3561b7f | 417 | }; |
0dbe5a11 | 418 | |
93b1eab3 JF |
419 | EXPORT_SYMBOL_GPL(pv_time_ops); |
420 | EXPORT_SYMBOL_GPL(pv_cpu_ops); | |
421 | EXPORT_SYMBOL_GPL(pv_mmu_ops); | |
422 | EXPORT_SYMBOL_GPL(pv_apic_ops); | |
423 | EXPORT_SYMBOL_GPL(pv_info); | |
424 | EXPORT_SYMBOL (pv_irq_ops); |