Commit | Line | Data |
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2f485ef5 GOC |
1 | #include <asm/paravirt.h> |
2 | ||
3 | DEF_NATIVE(pv_irq_ops, irq_disable, "cli"); | |
4 | DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); | |
5 | DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf"); | |
6 | DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax"); | |
7 | DEF_NATIVE(pv_cpu_ops, iret, "iret"); | |
d75cd22f | 8 | DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "sti; sysexit"); |
2f485ef5 GOC |
9 | DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax"); |
10 | DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3"); | |
11 | DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax"); | |
12 | DEF_NATIVE(pv_cpu_ops, clts, "clts"); | |
13 | DEF_NATIVE(pv_cpu_ops, read_tsc, "rdtsc"); | |
14 | ||
15 | unsigned native_patch(u8 type, u16 clobbers, void *ibuf, | |
16 | unsigned long addr, unsigned len) | |
17 | { | |
18 | const unsigned char *start, *end; | |
19 | unsigned ret; | |
20 | ||
21 | #define PATCH_SITE(ops, x) \ | |
22 | case PARAVIRT_PATCH(ops.x): \ | |
23 | start = start_##ops##_##x; \ | |
24 | end = end_##ops##_##x; \ | |
25 | goto patch_site | |
d9336a9b | 26 | switch (type) { |
2f485ef5 GOC |
27 | PATCH_SITE(pv_irq_ops, irq_disable); |
28 | PATCH_SITE(pv_irq_ops, irq_enable); | |
29 | PATCH_SITE(pv_irq_ops, restore_fl); | |
30 | PATCH_SITE(pv_irq_ops, save_fl); | |
31 | PATCH_SITE(pv_cpu_ops, iret); | |
d75cd22f | 32 | PATCH_SITE(pv_cpu_ops, irq_enable_sysexit); |
2f485ef5 GOC |
33 | PATCH_SITE(pv_mmu_ops, read_cr2); |
34 | PATCH_SITE(pv_mmu_ops, read_cr3); | |
35 | PATCH_SITE(pv_mmu_ops, write_cr3); | |
36 | PATCH_SITE(pv_cpu_ops, clts); | |
37 | PATCH_SITE(pv_cpu_ops, read_tsc); | |
38 | ||
39 | patch_site: | |
40 | ret = paravirt_patch_insns(ibuf, len, start, end); | |
41 | break; | |
42 | ||
43 | default: | |
44 | ret = paravirt_patch_default(type, clobbers, ibuf, addr, len); | |
45 | break; | |
46 | } | |
47 | #undef PATCH_SITE | |
48 | return ret; | |
49 | } |