Commit | Line | Data |
---|---|---|
459121c9 | 1 | #include <linux/dma-mapping.h> |
2118d0c5 | 2 | #include <linux/dma-debug.h> |
cb5867a5 | 3 | #include <linux/dmar.h> |
69c60c88 | 4 | #include <linux/export.h> |
116890d5 | 5 | #include <linux/bootmem.h> |
5a0e3ad6 | 6 | #include <linux/gfp.h> |
bca5c096 | 7 | #include <linux/pci.h> |
acde31dc | 8 | #include <linux/kmemleak.h> |
cb5867a5 | 9 | |
116890d5 GC |
10 | #include <asm/proto.h> |
11 | #include <asm/dma.h> | |
46a7fa27 | 12 | #include <asm/iommu.h> |
1d9b16d1 | 13 | #include <asm/gart.h> |
cb5867a5 | 14 | #include <asm/calgary.h> |
b4941a9a | 15 | #include <asm/x86_init.h> |
ee1f284f | 16 | #include <asm/iommu_table.h> |
459121c9 | 17 | |
3b15e581 FY |
18 | static int forbid_dac __read_mostly; |
19 | ||
a3b28ee1 | 20 | struct dma_map_ops *dma_ops = &nommu_dma_ops; |
85c246ee GC |
21 | EXPORT_SYMBOL(dma_ops); |
22 | ||
b4cdc430 | 23 | static int iommu_sac_force __read_mostly; |
8e0c3797 | 24 | |
f9c258de GC |
25 | #ifdef CONFIG_IOMMU_DEBUG |
26 | int panic_on_overflow __read_mostly = 1; | |
27 | int force_iommu __read_mostly = 1; | |
28 | #else | |
29 | int panic_on_overflow __read_mostly = 0; | |
30 | int force_iommu __read_mostly = 0; | |
31 | #endif | |
32 | ||
fae9a0d8 GC |
33 | int iommu_merge __read_mostly = 0; |
34 | ||
35 | int no_iommu __read_mostly; | |
36 | /* Set this to 1 if there is a HW IOMMU in the system */ | |
37 | int iommu_detected __read_mostly = 0; | |
38 | ||
ac0101d3 JR |
39 | /* |
40 | * This variable becomes 1 if iommu=pt is passed on the kernel command line. | |
e3be785f | 41 | * If this variable is 1, IOMMU implementations do no DMA translation for |
ac0101d3 | 42 | * devices and allow every device to access to whole physical memory. This is |
fb637f3c | 43 | * useful if a user wants to use an IOMMU only for KVM device assignment to |
ac0101d3 JR |
44 | * guests and not for driver dma translation. |
45 | */ | |
46 | int iommu_pass_through __read_mostly; | |
aed5d5f4 | 47 | |
ee1f284f KRW |
48 | extern struct iommu_table_entry __iommu_table[], __iommu_table_end[]; |
49 | ||
eb647138 | 50 | /* Dummy device used for NULL arguments (normally ISA). */ |
6c505ce3 | 51 | struct device x86_dma_fallback_dev = { |
1a927133 | 52 | .init_name = "fallback device", |
eb647138 | 53 | .coherent_dma_mask = ISA_DMA_BIT_MASK, |
6c505ce3 | 54 | .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask, |
098cb7f2 | 55 | }; |
6c505ce3 | 56 | EXPORT_SYMBOL(x86_dma_fallback_dev); |
098cb7f2 | 57 | |
2118d0c5 | 58 | /* Number of entries preallocated for DMA-API debugging */ |
73b664ce | 59 | #define PREALLOC_DMA_DEBUG_ENTRIES 65536 |
2118d0c5 | 60 | |
459121c9 GC |
61 | int dma_set_mask(struct device *dev, u64 mask) |
62 | { | |
63 | if (!dev->dma_mask || !dma_supported(dev, mask)) | |
64 | return -EIO; | |
65 | ||
66 | *dev->dma_mask = mask; | |
67 | ||
68 | return 0; | |
69 | } | |
70 | EXPORT_SYMBOL(dma_set_mask); | |
71 | ||
116890d5 GC |
72 | void __init pci_iommu_alloc(void) |
73 | { | |
ee1f284f KRW |
74 | struct iommu_table_entry *p; |
75 | ||
ee1f284f KRW |
76 | sort_iommu_table(__iommu_table, __iommu_table_end); |
77 | check_iommu_entries(__iommu_table, __iommu_table_end); | |
116890d5 | 78 | |
ee1f284f KRW |
79 | for (p = __iommu_table; p < __iommu_table_end; p++) { |
80 | if (p && p->detect && p->detect() > 0) { | |
81 | p->flags |= IOMMU_DETECTED; | |
82 | if (p->early_init) | |
83 | p->early_init(); | |
84 | if (p->flags & IOMMU_FINISH_IF_DETECTED) | |
85 | break; | |
86 | } | |
87 | } | |
116890d5 | 88 | } |
9f6ac577 | 89 | void *dma_generic_alloc_coherent(struct device *dev, size_t size, |
baa676fc AP |
90 | dma_addr_t *dma_addr, gfp_t flag, |
91 | struct dma_attrs *attrs) | |
9f6ac577 FT |
92 | { |
93 | unsigned long dma_mask; | |
c080e26e | 94 | struct page *page; |
0a2b9a6e | 95 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; |
9f6ac577 FT |
96 | dma_addr_t addr; |
97 | ||
98 | dma_mask = dma_alloc_coherent_mask(dev, flag); | |
99 | ||
d92ef66c | 100 | flag &= ~__GFP_ZERO; |
9f6ac577 | 101 | again: |
c080e26e | 102 | page = NULL; |
c091c71a | 103 | /* CMA can be used only in the context which permits sleeping */ |
38f7ea5a | 104 | if (flag & __GFP_WAIT) { |
0a2b9a6e | 105 | page = dma_alloc_from_contiguous(dev, count, get_order(size)); |
38f7ea5a AM |
106 | if (page && page_to_phys(page) + size > dma_mask) { |
107 | dma_release_from_contiguous(dev, page, count); | |
108 | page = NULL; | |
109 | } | |
110 | } | |
c091c71a | 111 | /* fallback */ |
0a2b9a6e MS |
112 | if (!page) |
113 | page = alloc_pages_node(dev_to_node(dev), flag, get_order(size)); | |
9f6ac577 FT |
114 | if (!page) |
115 | return NULL; | |
116 | ||
117 | addr = page_to_phys(page); | |
a4c2baa6 | 118 | if (addr + size > dma_mask) { |
9f6ac577 FT |
119 | __free_pages(page, get_order(size)); |
120 | ||
284901a9 | 121 | if (dma_mask < DMA_BIT_MASK(32) && !(flag & GFP_DMA)) { |
9f6ac577 FT |
122 | flag = (flag & ~GFP_DMA32) | GFP_DMA; |
123 | goto again; | |
124 | } | |
125 | ||
126 | return NULL; | |
127 | } | |
d92ef66c | 128 | memset(page_address(page), 0, size); |
9f6ac577 FT |
129 | *dma_addr = addr; |
130 | return page_address(page); | |
131 | } | |
132 | ||
0a2b9a6e MS |
133 | void dma_generic_free_coherent(struct device *dev, size_t size, void *vaddr, |
134 | dma_addr_t dma_addr, struct dma_attrs *attrs) | |
135 | { | |
136 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; | |
137 | struct page *page = virt_to_page(vaddr); | |
138 | ||
139 | if (!dma_release_from_contiguous(dev, page, count)) | |
140 | free_pages((unsigned long)vaddr, get_order(size)); | |
141 | } | |
142 | ||
fae9a0d8 | 143 | /* |
395cf969 PB |
144 | * See <Documentation/x86/x86_64/boot-options.txt> for the iommu kernel |
145 | * parameter documentation. | |
fae9a0d8 GC |
146 | */ |
147 | static __init int iommu_setup(char *p) | |
148 | { | |
149 | iommu_merge = 1; | |
150 | ||
151 | if (!p) | |
152 | return -EINVAL; | |
153 | ||
154 | while (*p) { | |
155 | if (!strncmp(p, "off", 3)) | |
156 | no_iommu = 1; | |
157 | /* gart_parse_options has more force support */ | |
158 | if (!strncmp(p, "force", 5)) | |
159 | force_iommu = 1; | |
160 | if (!strncmp(p, "noforce", 7)) { | |
161 | iommu_merge = 0; | |
162 | force_iommu = 0; | |
163 | } | |
164 | ||
165 | if (!strncmp(p, "biomerge", 8)) { | |
fae9a0d8 GC |
166 | iommu_merge = 1; |
167 | force_iommu = 1; | |
168 | } | |
169 | if (!strncmp(p, "panic", 5)) | |
170 | panic_on_overflow = 1; | |
171 | if (!strncmp(p, "nopanic", 7)) | |
172 | panic_on_overflow = 0; | |
173 | if (!strncmp(p, "merge", 5)) { | |
174 | iommu_merge = 1; | |
175 | force_iommu = 1; | |
176 | } | |
177 | if (!strncmp(p, "nomerge", 7)) | |
178 | iommu_merge = 0; | |
179 | if (!strncmp(p, "forcesac", 8)) | |
180 | iommu_sac_force = 1; | |
181 | if (!strncmp(p, "allowdac", 8)) | |
182 | forbid_dac = 0; | |
183 | if (!strncmp(p, "nodac", 5)) | |
2ae8bb75 | 184 | forbid_dac = 1; |
fae9a0d8 GC |
185 | if (!strncmp(p, "usedac", 6)) { |
186 | forbid_dac = -1; | |
187 | return 1; | |
188 | } | |
189 | #ifdef CONFIG_SWIOTLB | |
190 | if (!strncmp(p, "soft", 4)) | |
191 | swiotlb = 1; | |
3238c0c4 | 192 | #endif |
80286879 | 193 | if (!strncmp(p, "pt", 2)) |
4ed0d3e6 | 194 | iommu_pass_through = 1; |
fae9a0d8 | 195 | |
fae9a0d8 | 196 | gart_parse_options(p); |
fae9a0d8 GC |
197 | |
198 | #ifdef CONFIG_CALGARY_IOMMU | |
199 | if (!strncmp(p, "calgary", 7)) | |
200 | use_calgary = 1; | |
201 | #endif /* CONFIG_CALGARY_IOMMU */ | |
202 | ||
203 | p += strcspn(p, ","); | |
204 | if (*p == ',') | |
205 | ++p; | |
206 | } | |
207 | return 0; | |
208 | } | |
209 | early_param("iommu", iommu_setup); | |
210 | ||
8e0c3797 GC |
211 | int dma_supported(struct device *dev, u64 mask) |
212 | { | |
160c1d8e | 213 | struct dma_map_ops *ops = get_dma_ops(dev); |
8d8bb39b | 214 | |
8e0c3797 GC |
215 | #ifdef CONFIG_PCI |
216 | if (mask > 0xffffffff && forbid_dac > 0) { | |
fc3a8828 | 217 | dev_info(dev, "PCI: Disallowing DAC for device\n"); |
8e0c3797 GC |
218 | return 0; |
219 | } | |
220 | #endif | |
221 | ||
8d8bb39b FT |
222 | if (ops->dma_supported) |
223 | return ops->dma_supported(dev, mask); | |
8e0c3797 GC |
224 | |
225 | /* Copied from i386. Doesn't make much sense, because it will | |
226 | only work for pci_alloc_coherent. | |
227 | The caller just has to use GFP_DMA in this case. */ | |
2f4f27d4 | 228 | if (mask < DMA_BIT_MASK(24)) |
8e0c3797 GC |
229 | return 0; |
230 | ||
231 | /* Tell the device to use SAC when IOMMU force is on. This | |
232 | allows the driver to use cheaper accesses in some cases. | |
233 | ||
234 | Problem with this is that if we overflow the IOMMU area and | |
235 | return DAC as fallback address the device may not handle it | |
236 | correctly. | |
237 | ||
238 | As a special case some controllers have a 39bit address | |
239 | mode that is as efficient as 32bit (aic79xx). Don't force | |
240 | SAC for these. Assume all masks <= 40 bits are of this | |
241 | type. Normally this doesn't make any difference, but gives | |
242 | more gentle handling of IOMMU overflow. */ | |
50cf156a | 243 | if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) { |
fc3a8828 | 244 | dev_info(dev, "Force SAC with mask %Lx\n", mask); |
8e0c3797 GC |
245 | return 0; |
246 | } | |
247 | ||
248 | return 1; | |
249 | } | |
250 | EXPORT_SYMBOL(dma_supported); | |
251 | ||
cb5867a5 GC |
252 | static int __init pci_iommu_init(void) |
253 | { | |
ee1f284f | 254 | struct iommu_table_entry *p; |
2118d0c5 JR |
255 | dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); |
256 | ||
86f31952 JR |
257 | #ifdef CONFIG_PCI |
258 | dma_debug_add_bus(&pci_bus_type); | |
259 | #endif | |
d07c1be0 FT |
260 | x86_init.iommu.iommu_init(); |
261 | ||
ee1f284f KRW |
262 | for (p = __iommu_table; p < __iommu_table_end; p++) { |
263 | if (p && (p->flags & IOMMU_DETECTED) && p->late_init) | |
264 | p->late_init(); | |
265 | } | |
75f1cdf1 | 266 | |
cb5867a5 GC |
267 | return 0; |
268 | } | |
cb5867a5 | 269 | /* Must execute after PCI subsystem */ |
9a821b23 | 270 | rootfs_initcall(pci_iommu_init); |
3b15e581 FY |
271 | |
272 | #ifdef CONFIG_PCI | |
273 | /* Many VIA bridges seem to corrupt data for DAC. Disable it here */ | |
274 | ||
a18e3690 | 275 | static void via_no_dac(struct pci_dev *dev) |
3b15e581 | 276 | { |
c484b241 | 277 | if (forbid_dac == 0) { |
13bf7576 | 278 | dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n"); |
3b15e581 FY |
279 | forbid_dac = 1; |
280 | } | |
281 | } | |
c484b241 YL |
282 | DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, |
283 | PCI_CLASS_BRIDGE_PCI, 8, via_no_dac); | |
3b15e581 | 284 | #endif |