x86: make only GART code include gart.h
[deliverable/linux.git] / arch / x86 / kernel / pci-nommu.c
CommitLineData
1da177e4
LT
1/* Fallback functions when the main IOMMU code is not compiled in. This
2 code is roughly equivalent to i386. */
3#include <linux/mm.h>
4#include <linux/init.h>
5#include <linux/pci.h>
6#include <linux/string.h>
8fa3d6fc 7#include <linux/dma-mapping.h>
b922f53b 8#include <linux/scatterlist.h>
8fa3d6fc 9
46a7fa27 10#include <asm/iommu.h>
1da177e4 11#include <asm/processor.h>
17a941d8 12#include <asm/dma.h>
1da177e4 13
17a941d8
MBY
14static int
15check_addr(char *name, struct device *hwdev, dma_addr_t bus, size_t size)
1da177e4 16{
f9c258de 17 if (hwdev && bus + size > *hwdev->dma_mask) {
8fa3d6fc 18 if (*hwdev->dma_mask >= DMA_32BIT_MASK)
f0fdabf8 19 printk(KERN_ERR
8fa3d6fc
AM
20 "nommu_%s: overflow %Lx+%zu of device mask %Lx\n",
21 name, (long long)bus, size,
22 (long long)*hwdev->dma_mask);
17a941d8 23 return 0;
1da177e4 24 }
17a941d8
MBY
25 return 1;
26}
1da177e4 27
17a941d8 28static dma_addr_t
2be62149 29nommu_map_single(struct device *hwdev, phys_addr_t paddr, size_t size,
17a941d8
MBY
30 int direction)
31{
2be62149 32 dma_addr_t bus = paddr;
5b3e5b72 33 WARN_ON(size == 0);
17a941d8
MBY
34 if (!check_addr("map_single", hwdev, bus, size))
35 return bad_dma_address;
e4dcdd6b 36 flush_write_buffers();
17a941d8 37 return bus;
1da177e4 38}
1da177e4 39
1da177e4 40
17a941d8
MBY
41/* Map a set of buffers described by scatterlist in streaming
42 * mode for DMA. This is the scatter-gather version of the
43 * above pci_map_single interface. Here the scatter gather list
44 * elements are each tagged with the appropriate dma address
45 * and length. They are obtained via sg_dma_{address,length}(SG).
46 *
47 * NOTE: An implementation may be able to use a smaller number of
48 * DMA address/length pairs than there are SG table elements.
49 * (for example via virtual mapping capabilities)
50 * The routine returns the number of addr/length pairs actually
51 * used, at most nents.
52 *
53 * Device ownership issues as mentioned above for pci_map_single are
54 * the same here.
55 */
1048fa52 56static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,
17a941d8 57 int nents, int direction)
1da177e4 58{
b922f53b 59 struct scatterlist *s;
17a941d8 60 int i;
1da177e4 61
5b3e5b72
GC
62 WARN_ON(nents == 0 || sg[0].length == 0);
63
b922f53b 64 for_each_sg(sg, s, nents, i) {
58b053e4 65 BUG_ON(!sg_page(s));
30db2cbf 66 s->dma_address = sg_phys(s);
17a941d8
MBY
67 if (!check_addr("map_sg", hwdev, s->dma_address, s->length))
68 return 0;
69 s->dma_length = s->length;
70 }
e4dcdd6b 71 flush_write_buffers();
17a941d8
MBY
72 return nents;
73}
1da177e4 74
9f9ab46d
GC
75/* Make sure we keep the same behaviour */
76static int nommu_mapping_error(dma_addr_t dma_addr)
77{
78#ifdef CONFIG_X86_32
79 return 0;
80#else
81 return (dma_addr == bad_dma_address);
82#endif
83}
84
85
e6584504 86const struct dma_mapping_ops nommu_dma_ops = {
17a941d8 87 .map_single = nommu_map_single,
17a941d8 88 .map_sg = nommu_map_sg,
9f9ab46d 89 .mapping_error = nommu_mapping_error,
17a941d8
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90 .is_phys = 1,
91};
1da177e4 92
17a941d8
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93void __init no_iommu_init(void)
94{
95 if (dma_ops)
96 return;
a166222c
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97
98 force_iommu = 0; /* no HW IOMMU */
17a941d8 99 dma_ops = &nommu_dma_ops;
17a941d8 100}
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