[deliverable/linux.git] / arch / x86 / kernel / setup64.c

/* 
 * X86-64 specific CPU setup.
 * Copyright (C) 1995  Linus Torvalds
 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
 * See setup.c for older changelog.
 */ 
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/bootmem.h>
#include <linux/bitops.h>
#include <linux/module.h>
#include <asm/pda.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/desc.h>
#include <asm/atomic.h>
#include <asm/mmu_context.h>
#include <asm/smp.h>
#include <asm/i387.h>
#include <asm/percpu.h>
#include <asm/proto.h>
#include <asm/sections.h>
#include <asm/setup.h>

struct boot_params __initdata boot_params;

cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;

struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
EXPORT_SYMBOL(_cpu_pda);
struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;

struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };

char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));

unsigned long __supported_pte_mask __read_mostly = ~0UL;
static int do_not_nx __cpuinitdata = 0;

/* noexec=on|off
Control non executable mappings for 64bit processes.

on	Enable(default)
off	Disable
*/ 
static int __init nonx_setup(char *str)
{
	if (!str)
		return -EINVAL;
	if (!strncmp(str, "on", 2)) {
                __supported_pte_mask |= _PAGE_NX; 
 		do_not_nx = 0; 
	} else if (!strncmp(str, "off", 3)) {
		do_not_nx = 1;
		__supported_pte_mask &= ~_PAGE_NX;
        }
	return 0;
} 
early_param("noexec", nonx_setup);

int force_personality32 = 0; 

/* noexec32=on|off
Control non executable heap for 32bit processes.
To control the stack too use noexec=off

on	PROT_READ does not imply PROT_EXEC for 32bit processes
off	PROT_READ implies PROT_EXEC (default)
*/
static int __init nonx32_setup(char *str)
{
	if (!strcmp(str, "on"))
		force_personality32 &= ~READ_IMPLIES_EXEC;
	else if (!strcmp(str, "off"))
		force_personality32 |= READ_IMPLIES_EXEC;
	return 1;
}
__setup("noexec32=", nonx32_setup);

/*
 * Great future plan:
 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
 * Always point %gs to its beginning
 */
void __init setup_per_cpu_areas(void)
{ 
	int i;
	unsigned long size;

#ifdef CONFIG_HOTPLUG_CPU
	prefill_possible_map();
#endif

	/* Copy section for each CPU (we discard the original) */
	size = PERCPU_ENOUGH_ROOM;

	printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
	for_each_cpu_mask (i, cpu_possible_map) {
		char *ptr;

		if (!NODE_DATA(cpu_to_node(i))) {
			printk("cpu with no node %d, num_online_nodes %d\n",
			       i, num_online_nodes());
			ptr = alloc_bootmem_pages(size);
		} else { 
			ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
		}
		if (!ptr)
			panic("Cannot allocate cpu data for CPU %d\n", i);
		cpu_pda(i)->data_offset = ptr - __per_cpu_start;
		memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
	}
} 

void pda_init(int cpu)
{ 
	struct x8664_pda *pda = cpu_pda(cpu);

	/* Setup up data that may be needed in __get_free_pages early */
	asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0)); 
	/* Memory clobbers used to order PDA accessed */
	mb();
	wrmsrl(MSR_GS_BASE, pda);
	mb();

	pda->cpunumber = cpu; 
	pda->irqcount = -1;
	pda->kernelstack = 
		(unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE; 
	pda->active_mm = &init_mm;
	pda->mmu_state = 0;

	if (cpu == 0) {
		/* others are initialized in smpboot.c */
		pda->pcurrent = &init_task;
		pda->irqstackptr = boot_cpu_stack; 
	} else {
		pda->irqstackptr = (char *)
			__get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
		if (!pda->irqstackptr)
			panic("cannot allocate irqstack for cpu %d", cpu); 
	}


	pda->irqstackptr += IRQSTACKSIZE-64;
} 

char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
__attribute__((section(".bss.page_aligned")));

extern asmlinkage void ignore_sysret(void);

/* May not be marked __init: used by software suspend */
void syscall_init(void)
{
	/* 
	 * LSTAR and STAR live in a bit strange symbiosis.
	 * They both write to the same internal register. STAR allows to set CS/DS
	 * but only a 32bit target. LSTAR sets the 64bit rip. 	 
	 */ 
	wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32); 
	wrmsrl(MSR_LSTAR, system_call); 
	wrmsrl(MSR_CSTAR, ignore_sysret);

#ifdef CONFIG_IA32_EMULATION   		
	syscall32_cpu_init ();
#endif

	/* Flags to clear on syscall */
	wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000); 
}

void __cpuinit check_efer(void)
{
	unsigned long efer;

	rdmsrl(MSR_EFER, efer); 
        if (!(efer & EFER_NX) || do_not_nx) { 
                __supported_pte_mask &= ~_PAGE_NX; 
        }       
}

unsigned long kernel_eflags;

/*
 * Copies of the original ist values from the tss are only accessed during
 * debugging, no special alignment required.
 */
DEFINE_PER_CPU(struct orig_ist, orig_ist);

/*
 * cpu_init() initializes state that is per-CPU. Some data is already
 * initialized (naturally) in the bootstrap process, such as the GDT
 * and IDT. We reload them nevertheless, this function acts as a
 * 'CPU state barrier', nothing should get across.
 * A lot of state is already set up in PDA init.
 */
void __cpuinit cpu_init (void)
{
	int cpu = stack_smp_processor_id();
	struct tss_struct *t = &per_cpu(init_tss, cpu);
	struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
	unsigned long v; 
	char *estacks = NULL; 
	struct task_struct *me;
	int i;

	/* CPU 0 is initialised in head64.c */
	if (cpu != 0) {
		pda_init(cpu);
	} else 
		estacks = boot_exception_stacks; 

	me = current;

	if (cpu_test_and_set(cpu, cpu_initialized))
		panic("CPU#%d already initialized!\n", cpu);

	printk("Initializing CPU#%d\n", cpu);

	clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);

	/*
	 * Initialize the per-CPU GDT with the boot GDT,
	 * and set up the GDT descriptor:
	 */
	if (cpu)
 		memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);

	cpu_gdt_descr[cpu].size = GDT_SIZE;
	load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
	load_idt((const struct desc_ptr *)&idt_descr);

	memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
	syscall_init();

	wrmsrl(MSR_FS_BASE, 0);
	wrmsrl(MSR_KERNEL_GS_BASE, 0);
	barrier(); 

	check_efer();

	/*
	 * set up and load the per-CPU TSS
	 */
	for (v = 0; v < N_EXCEPTION_STACKS; v++) {
		static const unsigned int order[N_EXCEPTION_STACKS] = {
			[0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
			[DEBUG_STACK - 1] = DEBUG_STACK_ORDER
		};
		if (cpu) {
			estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
			if (!estacks)
				panic("Cannot allocate exception stack %ld %d\n",
				      v, cpu); 
		}
		estacks += PAGE_SIZE << order[v];
		orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks;
	}

	t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
	/*
	 * <= is required because the CPU will access up to
	 * 8 bits beyond the end of the IO permission bitmap.
	 */
	for (i = 0; i <= IO_BITMAP_LONGS; i++)
		t->io_bitmap[i] = ~0UL;

	atomic_inc(&init_mm.mm_count);
	me->active_mm = &init_mm;
	if (me->mm)
		BUG();
	enter_lazy_tlb(&init_mm, me);

	set_tss_desc(cpu, t);
	load_TR_desc();
	load_LDT(&init_mm.context);

	/*
	 * Clear all 6 debug registers:
	 */

	set_debugreg(0UL, 0);
	set_debugreg(0UL, 1);
	set_debugreg(0UL, 2);
	set_debugreg(0UL, 3);
	set_debugreg(0UL, 6);
	set_debugreg(0UL, 7);

	fpu_init(); 

	raw_local_save_flags(kernel_eflags);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* X86-64 specific CPU setup.
	3	* Copyright (C) 1995 Linus Torvalds
	4	* Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
	5	* See setup.c for older changelog.
1da177e4	6	*/
1da177e4 LT	7	#include <linux/init.h>
	8	#include <linux/kernel.h>
	9	#include <linux/sched.h>
	10	#include <linux/string.h>
	11	#include <linux/bootmem.h>
	12	#include <linux/bitops.h>
a940199f	13	#include <linux/module.h>
1da177e4 LT	14	#include <asm/pda.h>
	15	#include <asm/pgtable.h>
	16	#include <asm/processor.h>
	17	#include <asm/desc.h>
	18	#include <asm/atomic.h>
	19	#include <asm/mmu_context.h>
	20	#include <asm/smp.h>
	21	#include <asm/i387.h>
	22	#include <asm/percpu.h>
1da177e4	23	#include <asm/proto.h>
a940199f	24	#include <asm/sections.h>
30c82645	25	#include <asm/setup.h>
1da177e4	26
30c82645	27	struct boot_params __initdata boot_params;
1da177e4	28
e6982c67	29	cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
1da177e4	30
365ba917	31	struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
2ee60e17	32	EXPORT_SYMBOL(_cpu_pda);
365ba917	33	struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
1da177e4	34
e57113bc	35	struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
1da177e4 LT	36
	37	char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
	38
6c231b7b	39	unsigned long __supported_pte_mask __read_mostly = ~0UL;
142a64a6	40	static int do_not_nx __cpuinitdata = 0;
1da177e4 LT	41
	42	/* noexec=on\|off
	43	Control non executable mappings for 64bit processes.
	44
	45	on Enable(default)
	46	off Disable
	47	*/
2c8c0e6b	48	static int __init nonx_setup(char *str)
1da177e4	49	{
2c8c0e6b AK	50	if (!str)
2c8c0e6b AK	51	return -EINVAL;
1da177e4 LT	52	if (!strncmp(str, "on", 2)) {
	53	__supported_pte_mask \|= _PAGE_NX;
	54	do_not_nx = 0;
	55	} else if (!strncmp(str, "off", 3)) {
	56	do_not_nx = 1;
	57	__supported_pte_mask &= ~_PAGE_NX;
	58	}
2c8c0e6b	59	return 0;
1da177e4	60	}
2c8c0e6b	61	early_param("noexec", nonx_setup);
1da177e4	62
7682968b	63	int force_personality32 = 0;
1da177e4 LT	64
	65	/* noexec32=on\|off
	66	Control non executable heap for 32bit processes.
	67	To control the stack too use noexec=off
	68
	69	on PROT_READ does not imply PROT_EXEC for 32bit processes
	70	off PROT_READ implies PROT_EXEC (default)
	71	*/
	72	static int __init nonx32_setup(char *str)
	73	{
	74	if (!strcmp(str, "on"))
	75	force_personality32 &= ~READ_IMPLIES_EXEC;
	76	else if (!strcmp(str, "off"))
	77	force_personality32 \|= READ_IMPLIES_EXEC;
9b41046c	78	return 1;
1da177e4 LT	79	}
	80	__setup("noexec32=", nonx32_setup);
	81
	82	/*
	83	* Great future plan:
	84	* Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
	85	* Always point %gs to its beginning
	86	*/
	87	void __init setup_per_cpu_areas(void)
	88	{
	89	int i;
	90	unsigned long size;
	91
421c7ce6 AK	92	#ifdef CONFIG_HOTPLUG_CPU
	93	prefill_possible_map();
	94	#endif
	95
1da177e4	96	/* Copy section for each CPU (we discard the original) */
ba4d40bb	97	size = PERCPU_ENOUGH_ROOM;
1da177e4	98
ba4d40bb	99	printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
e99b861a	100	for_each_cpu_mask (i, cpu_possible_map) {
a940199f	101	char *ptr;
1da177e4 LT	102
	103	if (!NODE_DATA(cpu_to_node(i))) {
	104	printk("cpu with no node %d, num_online_nodes %d\n",
	105	i, num_online_nodes());
b6e3590f	106	ptr = alloc_bootmem_pages(size);
1da177e4	107	} else {
b6e3590f	108	ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
1da177e4 LT	109	}
	110	if (!ptr)
	111	panic("Cannot allocate cpu data for CPU %d\n", i);
df79efde	112	cpu_pda(i)->data_offset = ptr - __per_cpu_start;
1da177e4 LT	113	memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
	114	}
	115	}
	116
	117	void pda_init(int cpu)
	118	{
df79efde	119	struct x8664_pda *pda = cpu_pda(cpu);
1da177e4 LT	120
	121	/* Setup up data that may be needed in __get_free_pages early */
	122	asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
53ee11ae AK	123	/* Memory clobbers used to order PDA accessed */
53ee11ae AK	124	mb();
df79efde	125	wrmsrl(MSR_GS_BASE, pda);
53ee11ae	126	mb();
1da177e4	127
1da177e4 LT	128	pda->cpunumber = cpu;
	129	pda->irqcount = -1;
	130	pda->kernelstack =
	131	(unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
	132	pda->active_mm = &init_mm;
	133	pda->mmu_state = 0;
	134
	135	if (cpu == 0) {
	136	/* others are initialized in smpboot.c */
	137	pda->pcurrent = &init_task;
	138	pda->irqstackptr = boot_cpu_stack;
	139	} else {
	140	pda->irqstackptr = (char *)
	141	__get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
	142	if (!pda->irqstackptr)
	143	panic("cannot allocate irqstack for cpu %d", cpu);
	144	}
	145
1da177e4 LT	146
	147	pda->irqstackptr += IRQSTACKSIZE-64;
	148	}
	149
ab26a20b	150	char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
1da177e4 LT	151	__attribute__((section(".bss.page_aligned")));
1da177e4 LT	152
75154f40 AK	153	extern asmlinkage void ignore_sysret(void);
75154f40 AK	154
1da177e4 LT	155	/* May not be marked __init: used by software suspend */
	156	void syscall_init(void)
	157	{
	158	/*
	159	* LSTAR and STAR live in a bit strange symbiosis.
	160	* They both write to the same internal register. STAR allows to set CS/DS
	161	* but only a 32bit target. LSTAR sets the 64bit rip.
	162	*/
	163	wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 \| ((u64)__KERNEL_CS)<<32);
	164	wrmsrl(MSR_LSTAR, system_call);
75154f40	165	wrmsrl(MSR_CSTAR, ignore_sysret);
1da177e4 LT	166
	167	#ifdef CONFIG_IA32_EMULATION
	168	syscall32_cpu_init ();
	169	#endif
	170
	171	/* Flags to clear on syscall */
	172	wrmsrl(MSR_SYSCALL_MASK, EF_TF\|EF_DF\|EF_IE\|0x3000);
	173	}
	174
e6982c67	175	void __cpuinit check_efer(void)
1da177e4 LT	176	{
	177	unsigned long efer;
	178
	179	rdmsrl(MSR_EFER, efer);
	180	if (!(efer & EFER_NX) \|\| do_not_nx) {
	181	__supported_pte_mask &= ~_PAGE_NX;
	182	}
	183	}
	184
658fdbef AK	185	unsigned long kernel_eflags;
658fdbef AK	186
77788878 HS	187	/*
	188	* Copies of the original ist values from the tss are only accessed during
	189	* debugging, no special alignment required.
	190	*/
	191	DEFINE_PER_CPU(struct orig_ist, orig_ist);
	192
1da177e4 LT	193	/*
	194	* cpu_init() initializes state that is per-CPU. Some data is already
	195	* initialized (naturally) in the bootstrap process, such as the GDT
	196	* and IDT. We reload them nevertheless, this function acts as a
	197	* 'CPU state barrier', nothing should get across.
	198	* A lot of state is already set up in PDA init.
	199	*/
e6982c67	200	void __cpuinit cpu_init (void)
1da177e4	201	{
1da177e4	202	int cpu = stack_smp_processor_id();
1da177e4	203	struct tss_struct *t = &per_cpu(init_tss, cpu);
01ebb77b	204	struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
1da177e4 LT	205	unsigned long v;
	206	char *estacks = NULL;
	207	struct task_struct *me;
	208	int i;
	209
	210	/* CPU 0 is initialised in head64.c */
	211	if (cpu != 0) {
	212	pda_init(cpu);
	213	} else
	214	estacks = boot_exception_stacks;
	215
	216	me = current;
	217
	218	if (cpu_test_and_set(cpu, cpu_initialized))
	219	panic("CPU#%d already initialized!\n", cpu);
	220
	221	printk("Initializing CPU#%d\n", cpu);
	222
a940199f	223	clear_in_cr4(X86_CR4_VME\|X86_CR4_PVI\|X86_CR4_TSD\|X86_CR4_DE);
1da177e4 LT	224
	225	/*
	226	* Initialize the per-CPU GDT with the boot GDT,
	227	* and set up the GDT descriptor:
	228	*/
c11efdf9 RT	229	if (cpu)
c11efdf9 RT	230	memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
1da177e4 LT	231
1da177e4 LT	232	cpu_gdt_descr[cpu].size = GDT_SIZE;
9d1c6e7c GOC	233	load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
9d1c6e7c GOC	234	load_idt((const struct desc_ptr *)&idt_descr);
1da177e4	235
c11efdf9	236	memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
1da177e4 LT	237	syscall_init();
	238
	239	wrmsrl(MSR_FS_BASE, 0);
	240	wrmsrl(MSR_KERNEL_GS_BASE, 0);
	241	barrier();
	242
	243	check_efer();
	244
	245	/*
	246	* set up and load the per-CPU TSS
	247	*/
	248	for (v = 0; v < N_EXCEPTION_STACKS; v++) {
f5741644 KO	249	static const unsigned int order[N_EXCEPTION_STACKS] = {
	250	[0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
	251	[DEBUG_STACK - 1] = DEBUG_STACK_ORDER
	252	};
1da177e4	253	if (cpu) {
b556b35e	254	estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
1da177e4 LT	255	if (!estacks)
	256	panic("Cannot allocate exception stack %ld %d\n",
	257	v, cpu);
	258	}
f5741644	259	estacks += PAGE_SIZE << order[v];
01ebb77b	260	orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks;
1da177e4 LT	261	}
	262
	263	t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
	264	/*
	265	* <= is required because the CPU will access up to
	266	* 8 bits beyond the end of the IO permission bitmap.
	267	*/
	268	for (i = 0; i <= IO_BITMAP_LONGS; i++)
	269	t->io_bitmap[i] = ~0UL;
	270
	271	atomic_inc(&init_mm.mm_count);
	272	me->active_mm = &init_mm;
	273	if (me->mm)
	274	BUG();
	275	enter_lazy_tlb(&init_mm, me);
	276
	277	set_tss_desc(cpu, t);
	278	load_TR_desc();
	279	load_LDT(&init_mm.context);
	280
	281	/*
	282	* Clear all 6 debug registers:
	283	*/
	284
2b514e74 JB	285	set_debugreg(0UL, 0);
	286	set_debugreg(0UL, 1);
	287	set_debugreg(0UL, 2);
	288	set_debugreg(0UL, 3);
	289	set_debugreg(0UL, 6);
	290	set_debugreg(0UL, 7);
1da177e4 LT	291
1da177e4 LT	292	fpu_init();
658fdbef AK	293
658fdbef AK	294	raw_local_save_flags(kernel_eflags);
1da177e4	295	}