Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1995 Linus Torvalds |
1da177e4 LT |
3 | */ |
4 | ||
5 | /* | |
6 | * This file handles the architecture-dependent parts of initialization | |
7 | */ | |
8 | ||
9 | #include <linux/errno.h> | |
10 | #include <linux/sched.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/stddef.h> | |
14 | #include <linux/unistd.h> | |
15 | #include <linux/ptrace.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/user.h> | |
894673ee | 18 | #include <linux/screen_info.h> |
1da177e4 LT |
19 | #include <linux/ioport.h> |
20 | #include <linux/delay.h> | |
1da177e4 LT |
21 | #include <linux/init.h> |
22 | #include <linux/initrd.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/bootmem.h> | |
25 | #include <linux/module.h> | |
26 | #include <asm/processor.h> | |
27 | #include <linux/console.h> | |
28 | #include <linux/seq_file.h> | |
aac04b32 | 29 | #include <linux/crash_dump.h> |
1da177e4 LT |
30 | #include <linux/root_dev.h> |
31 | #include <linux/pci.h> | |
eee206c3 | 32 | #include <asm/pci-direct.h> |
5b83683f | 33 | #include <linux/efi.h> |
1da177e4 LT |
34 | #include <linux/acpi.h> |
35 | #include <linux/kallsyms.h> | |
36 | #include <linux/edd.h> | |
138fe4e0 | 37 | #include <linux/iscsi_ibft.h> |
bbfceef4 | 38 | #include <linux/mmzone.h> |
5f5609df | 39 | #include <linux/kexec.h> |
95235ca2 | 40 | #include <linux/cpufreq.h> |
e9928674 | 41 | #include <linux/dmi.h> |
17a941d8 | 42 | #include <linux/dma-mapping.h> |
681558fd | 43 | #include <linux/ctype.h> |
eee206c3 | 44 | #include <linux/sort.h> |
746ef0cd | 45 | #include <linux/uaccess.h> |
f212ec4b | 46 | #include <linux/init_ohci1394_dma.h> |
790c73f6 | 47 | #include <linux/kvm_para.h> |
bbfceef4 | 48 | |
1da177e4 LT |
49 | #include <asm/mtrr.h> |
50 | #include <asm/uaccess.h> | |
51 | #include <asm/system.h> | |
e4026440 | 52 | #include <asm/vsyscall.h> |
1da177e4 LT |
53 | #include <asm/io.h> |
54 | #include <asm/smp.h> | |
55 | #include <asm/msr.h> | |
56 | #include <asm/desc.h> | |
57 | #include <video/edid.h> | |
58 | #include <asm/e820.h> | |
2944e16b | 59 | #include <asm/mpspec.h> |
1da177e4 | 60 | #include <asm/dma.h> |
aaf23042 | 61 | #include <asm/gart.h> |
1da177e4 LT |
62 | #include <asm/mpspec.h> |
63 | #include <asm/mmu_context.h> | |
1da177e4 LT |
64 | #include <asm/proto.h> |
65 | #include <asm/setup.h> | |
1da177e4 | 66 | #include <asm/numa.h> |
2bc0414e | 67 | #include <asm/sections.h> |
f2d3efed | 68 | #include <asm/dmi.h> |
00bf4098 | 69 | #include <asm/cacheflush.h> |
af7a78e9 | 70 | #include <asm/mce.h> |
eee3af4a | 71 | #include <asm/ds.h> |
df3825c5 | 72 | #include <asm/topology.h> |
e44b7b75 | 73 | #include <asm/trampoline.h> |
8d4a4300 | 74 | #include <asm/pat.h> |
d1097635 | 75 | #include <asm/mmconfig.h> |
1da177e4 | 76 | |
dd46e3ca | 77 | #include <mach_apic.h> |
746ef0cd GOC |
78 | #ifdef CONFIG_PARAVIRT |
79 | #include <asm/paravirt.h> | |
80 | #else | |
81 | #define ARCH_SETUP | |
82 | #endif | |
83 | ||
1da177e4 LT |
84 | /* |
85 | * Machine setup.. | |
86 | */ | |
87 | ||
6c231b7b | 88 | struct cpuinfo_x86 boot_cpu_data __read_mostly; |
2ee60e17 | 89 | EXPORT_SYMBOL(boot_cpu_data); |
1da177e4 | 90 | |
7d851c8d AK |
91 | __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; |
92 | ||
1da177e4 LT |
93 | unsigned long mmu_cr4_features; |
94 | ||
1da177e4 LT |
95 | /* Boot loader ID as an integer, for the benefit of proc_dointvec */ |
96 | int bootloader_type; | |
97 | ||
98 | unsigned long saved_video_mode; | |
99 | ||
04e1ba85 | 100 | /* |
f2d3efed AK |
101 | * Early DMI memory |
102 | */ | |
103 | int dmi_alloc_index; | |
104 | char dmi_alloc_data[DMI_MAX_DATA]; | |
105 | ||
1da177e4 LT |
106 | /* |
107 | * Setup options | |
108 | */ | |
1da177e4 | 109 | struct screen_info screen_info; |
2ee60e17 | 110 | EXPORT_SYMBOL(screen_info); |
1da177e4 LT |
111 | struct sys_desc_table_struct { |
112 | unsigned short length; | |
113 | unsigned char table[0]; | |
114 | }; | |
115 | ||
116 | struct edid_info edid_info; | |
ba70710e | 117 | EXPORT_SYMBOL_GPL(edid_info); |
1da177e4 LT |
118 | |
119 | extern int root_mountflags; | |
1da177e4 | 120 | |
e0b32d76 | 121 | static char __initdata command_line[COMMAND_LINE_SIZE]; |
1da177e4 | 122 | |
a2b4bd9c | 123 | static struct resource standard_io_resources[] = { |
1da177e4 LT |
124 | { .name = "dma1", .start = 0x00, .end = 0x1f, |
125 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
126 | { .name = "pic1", .start = 0x20, .end = 0x21, | |
127 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
128 | { .name = "timer0", .start = 0x40, .end = 0x43, | |
129 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
130 | { .name = "timer1", .start = 0x50, .end = 0x53, | |
131 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
9096bd7a HW |
132 | { .name = "keyboard", .start = 0x60, .end = 0x60, |
133 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
134 | { .name = "keyboard", .start = 0x64, .end = 0x64, | |
1da177e4 LT |
135 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, |
136 | { .name = "dma page reg", .start = 0x80, .end = 0x8f, | |
137 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
138 | { .name = "pic2", .start = 0xa0, .end = 0xa1, | |
139 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
140 | { .name = "dma2", .start = 0xc0, .end = 0xdf, | |
141 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
142 | { .name = "fpu", .start = 0xf0, .end = 0xff, | |
143 | .flags = IORESOURCE_BUSY | IORESOURCE_IO } | |
144 | }; | |
145 | ||
1da177e4 LT |
146 | #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM) |
147 | ||
c9cce83d | 148 | static struct resource data_resource = { |
1da177e4 LT |
149 | .name = "Kernel data", |
150 | .start = 0, | |
151 | .end = 0, | |
152 | .flags = IORESOURCE_RAM, | |
153 | }; | |
c9cce83d | 154 | static struct resource code_resource = { |
1da177e4 LT |
155 | .name = "Kernel code", |
156 | .start = 0, | |
157 | .end = 0, | |
158 | .flags = IORESOURCE_RAM, | |
159 | }; | |
c9cce83d | 160 | static struct resource bss_resource = { |
00bf4098 BW |
161 | .name = "Kernel bss", |
162 | .start = 0, | |
163 | .end = 0, | |
164 | .flags = IORESOURCE_RAM, | |
165 | }; | |
1da177e4 | 166 | |
dcd32b6a | 167 | static void __init early_cpu_init(void); |
8c61b900 TG |
168 | static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c); |
169 | ||
2c8c0e6b AK |
170 | #ifdef CONFIG_PROC_VMCORE |
171 | /* elfcorehdr= specifies the location of elf core header | |
172 | * stored by the crashed kernel. This option will be passed | |
173 | * by kexec loader to the capture kernel. | |
174 | */ | |
175 | static int __init setup_elfcorehdr(char *arg) | |
681558fd | 176 | { |
2c8c0e6b AK |
177 | char *end; |
178 | if (!arg) | |
179 | return -EINVAL; | |
180 | elfcorehdr_addr = memparse(arg, &end); | |
181 | return end > arg ? 0 : -EINVAL; | |
681558fd | 182 | } |
2c8c0e6b | 183 | early_param("elfcorehdr", setup_elfcorehdr); |
e2c03888 AK |
184 | #endif |
185 | ||
2b97690f | 186 | #ifndef CONFIG_NUMA |
bbfceef4 MT |
187 | static void __init |
188 | contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn) | |
1da177e4 | 189 | { |
bbfceef4 MT |
190 | unsigned long bootmap_size, bootmap; |
191 | ||
bbfceef4 | 192 | bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT; |
24a5da73 YL |
193 | bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size, |
194 | PAGE_SIZE); | |
bbfceef4 | 195 | if (bootmap == -1L) |
04e1ba85 | 196 | panic("Cannot find bootmem map of size %ld\n", bootmap_size); |
bbfceef4 | 197 | bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn); |
5cb248ab MG |
198 | e820_register_active_regions(0, start_pfn, end_pfn); |
199 | free_bootmem_with_active_regions(0, end_pfn); | |
1a27fc0a | 200 | early_res_to_bootmem(0, end_pfn<<PAGE_SHIFT); |
72a7fe39 | 201 | reserve_bootmem(bootmap, bootmap_size, BOOTMEM_DEFAULT); |
04e1ba85 | 202 | } |
1da177e4 LT |
203 | #endif |
204 | ||
1da177e4 LT |
205 | #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) |
206 | struct edd edd; | |
207 | #ifdef CONFIG_EDD_MODULE | |
208 | EXPORT_SYMBOL(edd); | |
209 | #endif | |
210 | /** | |
211 | * copy_edd() - Copy the BIOS EDD information | |
212 | * from boot_params into a safe place. | |
213 | * | |
214 | */ | |
215 | static inline void copy_edd(void) | |
216 | { | |
30c82645 PA |
217 | memcpy(edd.mbr_signature, boot_params.edd_mbr_sig_buffer, |
218 | sizeof(edd.mbr_signature)); | |
219 | memcpy(edd.edd_info, boot_params.eddbuf, sizeof(edd.edd_info)); | |
220 | edd.mbr_signature_nr = boot_params.edd_mbr_sig_buf_entries; | |
221 | edd.edd_info_nr = boot_params.eddbuf_entries; | |
1da177e4 LT |
222 | } |
223 | #else | |
224 | static inline void copy_edd(void) | |
225 | { | |
226 | } | |
227 | #endif | |
228 | ||
a939098a GC |
229 | /* Overridden in paravirt.c if CONFIG_PARAVIRT */ |
230 | void __attribute__((weak)) __init memory_setup(void) | |
231 | { | |
232 | machine_specific_memory_setup(); | |
233 | } | |
234 | ||
235 | /* Current gdt points %fs at the "master" per-cpu area: after this, | |
236 | * it's on the real one. */ | |
237 | void switch_to_new_gdt(void) | |
238 | { | |
239 | struct desc_ptr gdt_descr; | |
240 | ||
241 | gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id()); | |
242 | gdt_descr.size = GDT_SIZE - 1; | |
243 | load_gdt(&gdt_descr); | |
244 | } | |
245 | ||
f212ec4b BK |
246 | /* |
247 | * setup_arch - architecture-specific boot-time initializations | |
248 | * | |
249 | * Note: On x86_64, fixmaps are ready for use even before this is called. | |
250 | */ | |
1da177e4 LT |
251 | void __init setup_arch(char **cmdline_p) |
252 | { | |
04e1ba85 TG |
253 | unsigned i; |
254 | ||
adf48856 | 255 | printk(KERN_INFO "Command line: %s\n", boot_command_line); |
43c85c9c | 256 | |
30c82645 PA |
257 | ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev); |
258 | screen_info = boot_params.screen_info; | |
259 | edid_info = boot_params.edid_info; | |
260 | saved_video_mode = boot_params.hdr.vid_mode; | |
261 | bootloader_type = boot_params.hdr.type_of_loader; | |
1da177e4 LT |
262 | |
263 | #ifdef CONFIG_BLK_DEV_RAM | |
30c82645 PA |
264 | rd_image_start = boot_params.hdr.ram_size & RAMDISK_IMAGE_START_MASK; |
265 | rd_prompt = ((boot_params.hdr.ram_size & RAMDISK_PROMPT_FLAG) != 0); | |
266 | rd_doload = ((boot_params.hdr.ram_size & RAMDISK_LOAD_FLAG) != 0); | |
1da177e4 | 267 | #endif |
5b83683f HY |
268 | #ifdef CONFIG_EFI |
269 | if (!strncmp((char *)&boot_params.efi_info.efi_loader_signature, | |
ecacf09f | 270 | "EL64", 4)) { |
5b83683f | 271 | efi_enabled = 1; |
ecacf09f HY |
272 | efi_reserve_early(); |
273 | } | |
5b83683f | 274 | #endif |
746ef0cd GOC |
275 | |
276 | ARCH_SETUP | |
277 | ||
064d25f1 | 278 | setup_memory_map(); |
1da177e4 LT |
279 | copy_edd(); |
280 | ||
30c82645 | 281 | if (!boot_params.hdr.root_flags) |
1da177e4 LT |
282 | root_mountflags &= ~MS_RDONLY; |
283 | init_mm.start_code = (unsigned long) &_text; | |
284 | init_mm.end_code = (unsigned long) &_etext; | |
285 | init_mm.end_data = (unsigned long) &_edata; | |
286 | init_mm.brk = (unsigned long) &_end; | |
287 | ||
e3ebadd9 LT |
288 | code_resource.start = virt_to_phys(&_text); |
289 | code_resource.end = virt_to_phys(&_etext)-1; | |
290 | data_resource.start = virt_to_phys(&_etext); | |
291 | data_resource.end = virt_to_phys(&_edata)-1; | |
00bf4098 BW |
292 | bss_resource.start = virt_to_phys(&__bss_start); |
293 | bss_resource.end = virt_to_phys(&__bss_stop)-1; | |
1da177e4 | 294 | |
dcd32b6a | 295 | early_cpu_init(); |
1da177e4 LT |
296 | early_identify_cpu(&boot_cpu_data); |
297 | ||
adf48856 | 298 | strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); |
2c8c0e6b AK |
299 | *cmdline_p = command_line; |
300 | ||
8b664aa6 HY |
301 | parse_setup_data(); |
302 | ||
2c8c0e6b AK |
303 | parse_early_param(); |
304 | ||
3c999f14 YL |
305 | if (acpi_mps_check()) { |
306 | disable_apic = 1; | |
307 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); | |
308 | } | |
309 | ||
f212ec4b BK |
310 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT |
311 | if (init_ohci1394_dma_early) | |
312 | init_ohci1394_dma_on_all_controllers(); | |
313 | #endif | |
314 | ||
2c8c0e6b | 315 | finish_e820_parsing(); |
9ca33eb6 | 316 | |
3def3d6d YL |
317 | /* after parse_early_param, so could debug it */ |
318 | insert_resource(&iomem_resource, &code_resource); | |
319 | insert_resource(&iomem_resource, &data_resource); | |
320 | insert_resource(&iomem_resource, &bss_resource); | |
321 | ||
aaf23042 YL |
322 | early_gart_iommu_check(); |
323 | ||
5cb248ab | 324 | e820_register_active_regions(0, 0, -1UL); |
1da177e4 LT |
325 | /* |
326 | * partially used pages are not usable - thus | |
327 | * we are rounding upwards: | |
328 | */ | |
329 | end_pfn = e820_end_of_ram(); | |
2944e16b YL |
330 | |
331 | /* pre allocte 4k for mptable mpc */ | |
332 | early_reserve_e820_mpc_new(); | |
99fc8d42 JB |
333 | /* update e820 for memory not covered by WB MTRRs */ |
334 | mtrr_bp_init(); | |
335 | if (mtrr_trim_uncached_memory(end_pfn)) { | |
db3660c1 | 336 | remove_all_active_ranges(); |
99fc8d42 JB |
337 | e820_register_active_regions(0, 0, -1UL); |
338 | end_pfn = e820_end_of_ram(); | |
339 | } | |
340 | ||
caff0710 | 341 | num_physpages = end_pfn; |
1da177e4 LT |
342 | |
343 | check_efer(); | |
344 | ||
c8c034ce | 345 | max_pfn_mapped = init_memory_mapping(0, (end_pfn << PAGE_SHIFT)); |
5b83683f HY |
346 | if (efi_enabled) |
347 | efi_init(); | |
1da177e4 | 348 | |
2785c8d0 | 349 | vsmp_init(); |
2785c8d0 | 350 | |
f2d3efed AK |
351 | dmi_scan_machine(); |
352 | ||
b02aae9c RH |
353 | io_delay_init(); |
354 | ||
790c73f6 GOC |
355 | #ifdef CONFIG_KVM_CLOCK |
356 | kvmclock_init(); | |
357 | #endif | |
358 | ||
888ba6c6 | 359 | #ifdef CONFIG_ACPI |
1da177e4 LT |
360 | /* |
361 | * Initialize the ACPI boot-time table parser (gets the RSDP and SDT). | |
362 | * Call this early for SRAT node setup. | |
363 | */ | |
364 | acpi_boot_table_init(); | |
365 | #endif | |
366 | ||
caff0710 JB |
367 | /* How many end-of-memory variables you have, grandma! */ |
368 | max_low_pfn = end_pfn; | |
369 | max_pfn = end_pfn; | |
370 | high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1; | |
371 | ||
5cb248ab MG |
372 | /* Remove active ranges so rediscovery with NUMA-awareness happens */ |
373 | remove_all_active_ranges(); | |
374 | ||
1da177e4 LT |
375 | #ifdef CONFIG_ACPI_NUMA |
376 | /* | |
377 | * Parse SRAT to discover nodes. | |
378 | */ | |
379 | acpi_numa_init(); | |
380 | #endif | |
381 | ||
2b97690f | 382 | #ifdef CONFIG_NUMA |
04e1ba85 | 383 | numa_initmem_init(0, end_pfn); |
1da177e4 | 384 | #else |
bbfceef4 | 385 | contig_initmem_init(0, end_pfn); |
1da177e4 LT |
386 | #endif |
387 | ||
752bea4a YL |
388 | dma32_reserve_bootmem(); |
389 | ||
673d5b43 | 390 | #ifdef CONFIG_ACPI_SLEEP |
1da177e4 | 391 | /* |
04e1ba85 | 392 | * Reserve low memory region for sleep support. |
1da177e4 | 393 | */ |
04e1ba85 TG |
394 | acpi_reserve_bootmem(); |
395 | #endif | |
5b83683f | 396 | |
136ef671 | 397 | #ifdef CONFIG_X86_MPPARSE |
04e1ba85 TG |
398 | /* |
399 | * Find and reserve possible boot-time SMP configuration: | |
400 | */ | |
1da177e4 | 401 | find_smp_config(); |
136ef671 | 402 | #endif |
1da177e4 | 403 | #ifdef CONFIG_BLK_DEV_INITRD |
30c82645 PA |
404 | if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) { |
405 | unsigned long ramdisk_image = boot_params.hdr.ramdisk_image; | |
406 | unsigned long ramdisk_size = boot_params.hdr.ramdisk_size; | |
407 | unsigned long ramdisk_end = ramdisk_image + ramdisk_size; | |
408 | unsigned long end_of_mem = end_pfn << PAGE_SHIFT; | |
409 | ||
410 | if (ramdisk_end <= end_of_mem) { | |
2b8106a0 YL |
411 | /* |
412 | * don't need to reserve again, already reserved early | |
413 | * in x86_64_start_kernel, and early_res_to_bootmem | |
414 | * convert that to reserved in bootmem | |
415 | */ | |
30c82645 PA |
416 | initrd_start = ramdisk_image + PAGE_OFFSET; |
417 | initrd_end = initrd_start+ramdisk_size; | |
418 | } else { | |
75175278 | 419 | free_bootmem(ramdisk_image, ramdisk_size); |
1da177e4 | 420 | printk(KERN_ERR "initrd extends beyond end of memory " |
30c82645 PA |
421 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", |
422 | ramdisk_end, end_of_mem); | |
1da177e4 LT |
423 | initrd_start = 0; |
424 | } | |
425 | } | |
426 | #endif | |
5c3391f9 | 427 | reserve_crashkernel(); |
138fe4e0 KR |
428 | |
429 | reserve_ibft_region(); | |
430 | ||
1da177e4 | 431 | paging_init(); |
e4026440 | 432 | map_vsyscall(); |
1da177e4 | 433 | |
dfa4698c | 434 | early_quirks(); |
1da177e4 | 435 | |
888ba6c6 | 436 | #ifdef CONFIG_ACPI |
1da177e4 LT |
437 | /* |
438 | * Read APIC and some other early information from ACPI tables. | |
439 | */ | |
440 | acpi_boot_init(); | |
441 | #endif | |
442 | ||
05b3cbd8 RT |
443 | init_cpu_to_node(); |
444 | ||
136ef671 | 445 | #ifdef CONFIG_X86_MPPARSE |
1da177e4 LT |
446 | /* |
447 | * get boot-time SMP configuration: | |
448 | */ | |
449 | if (smp_found_config) | |
450 | get_smp_config(); | |
136ef671 | 451 | #endif |
1da177e4 | 452 | init_apic_mappings(); |
3e35a0e5 | 453 | ioapic_init_mappings(); |
1da177e4 | 454 | |
0cf1bfd2 MT |
455 | kvm_guest_init(); |
456 | ||
1da177e4 | 457 | /* |
fc986db4 | 458 | * We trust e820 completely. No explicit ROM probing in memory. |
04e1ba85 | 459 | */ |
3def3d6d | 460 | e820_reserve_resources(); |
bf62f398 | 461 | e820_mark_nosave_regions(end_pfn); |
1da177e4 | 462 | |
1da177e4 | 463 | /* request I/O space for devices used on all i[345]86 PCs */ |
9d0ef4fd | 464 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++) |
1da177e4 | 465 | request_resource(&ioport_resource, &standard_io_resources[i]); |
1da177e4 | 466 | |
a1e97782 | 467 | e820_setup_gap(); |
1da177e4 | 468 | |
1da177e4 LT |
469 | #ifdef CONFIG_VT |
470 | #if defined(CONFIG_VGA_CONSOLE) | |
5b83683f HY |
471 | if (!efi_enabled || (efi_mem_type(0xa0000) != EFI_CONVENTIONAL_MEMORY)) |
472 | conswitchp = &vga_con; | |
1da177e4 LT |
473 | #elif defined(CONFIG_DUMMY_CONSOLE) |
474 | conswitchp = &dummy_con; | |
475 | #endif | |
476 | #endif | |
5f0b2976 YL |
477 | |
478 | /* do this before identify_cpu for boot cpu */ | |
479 | check_enable_amd_mmconf_dmi(); | |
1da177e4 LT |
480 | } |
481 | ||
dcd32b6a YL |
482 | struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; |
483 | ||
484 | static void __cpuinit default_init(struct cpuinfo_x86 *c) | |
485 | { | |
486 | display_cacheinfo(c); | |
487 | } | |
488 | ||
489 | static struct cpu_dev __cpuinitdata default_cpu = { | |
490 | .c_init = default_init, | |
491 | .c_vendor = "Unknown", | |
492 | }; | |
493 | static struct cpu_dev *this_cpu __cpuinitdata = &default_cpu; | |
494 | ||
4d285878 | 495 | int __cpuinit get_model_name(struct cpuinfo_x86 *c) |
1da177e4 LT |
496 | { |
497 | unsigned int *v; | |
498 | ||
ebfcaa96 | 499 | if (c->extended_cpuid_level < 0x80000004) |
1da177e4 LT |
500 | return 0; |
501 | ||
502 | v = (unsigned int *) c->x86_model_id; | |
503 | cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); | |
504 | cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); | |
505 | cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); | |
506 | c->x86_model_id[48] = 0; | |
507 | return 1; | |
508 | } | |
509 | ||
510 | ||
4d285878 | 511 | void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) |
1da177e4 LT |
512 | { |
513 | unsigned int n, dummy, eax, ebx, ecx, edx; | |
514 | ||
ebfcaa96 | 515 | n = c->extended_cpuid_level; |
1da177e4 LT |
516 | |
517 | if (n >= 0x80000005) { | |
518 | cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); | |
04e1ba85 TG |
519 | printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), " |
520 | "D cache %dK (%d bytes/line)\n", | |
521 | edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); | |
522 | c->x86_cache_size = (ecx>>24) + (edx>>24); | |
1da177e4 LT |
523 | /* On K8 L1 TLB is inclusive, so don't count it */ |
524 | c->x86_tlbsize = 0; | |
525 | } | |
526 | ||
527 | if (n >= 0x80000006) { | |
528 | cpuid(0x80000006, &dummy, &ebx, &ecx, &edx); | |
529 | ecx = cpuid_ecx(0x80000006); | |
530 | c->x86_cache_size = ecx >> 16; | |
531 | c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff); | |
532 | ||
533 | printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n", | |
534 | c->x86_cache_size, ecx & 0xFF); | |
535 | } | |
1da177e4 | 536 | if (n >= 0x80000008) { |
04e1ba85 | 537 | cpuid(0x80000008, &eax, &dummy, &dummy, &dummy); |
1da177e4 LT |
538 | c->x86_virt_bits = (eax >> 8) & 0xff; |
539 | c->x86_phys_bits = eax & 0xff; | |
540 | } | |
541 | } | |
542 | ||
1a53905a | 543 | void __cpuinit detect_ht(struct cpuinfo_x86 *c) |
1da177e4 LT |
544 | { |
545 | #ifdef CONFIG_SMP | |
04e1ba85 TG |
546 | u32 eax, ebx, ecx, edx; |
547 | int index_msb, core_bits; | |
94605eff SS |
548 | |
549 | cpuid(1, &eax, &ebx, &ecx, &edx); | |
550 | ||
94605eff | 551 | |
e42f9437 | 552 | if (!cpu_has(c, X86_FEATURE_HT)) |
1da177e4 | 553 | return; |
04e1ba85 | 554 | if (cpu_has(c, X86_FEATURE_CMP_LEGACY)) |
e42f9437 | 555 | goto out; |
1da177e4 | 556 | |
1da177e4 | 557 | smp_num_siblings = (ebx & 0xff0000) >> 16; |
94605eff | 558 | |
1da177e4 LT |
559 | if (smp_num_siblings == 1) { |
560 | printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); | |
04e1ba85 | 561 | } else if (smp_num_siblings > 1) { |
94605eff | 562 | |
1da177e4 | 563 | if (smp_num_siblings > NR_CPUS) { |
04e1ba85 TG |
564 | printk(KERN_WARNING "CPU: Unsupported number of " |
565 | "siblings %d", smp_num_siblings); | |
1da177e4 LT |
566 | smp_num_siblings = 1; |
567 | return; | |
568 | } | |
94605eff SS |
569 | |
570 | index_msb = get_count_order(smp_num_siblings); | |
f3fa8ebc | 571 | c->phys_proc_id = phys_pkg_id(index_msb); |
3dd9d514 | 572 | |
94605eff | 573 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
3dd9d514 | 574 | |
04e1ba85 | 575 | index_msb = get_count_order(smp_num_siblings); |
94605eff SS |
576 | |
577 | core_bits = get_count_order(c->x86_max_cores); | |
3dd9d514 | 578 | |
f3fa8ebc | 579 | c->cpu_core_id = phys_pkg_id(index_msb) & |
94605eff | 580 | ((1 << core_bits) - 1); |
1da177e4 | 581 | } |
e42f9437 RS |
582 | out: |
583 | if ((c->x86_max_cores * smp_num_siblings) > 1) { | |
04e1ba85 TG |
584 | printk(KERN_INFO "CPU: Physical Processor ID: %d\n", |
585 | c->phys_proc_id); | |
586 | printk(KERN_INFO "CPU: Processor Core ID: %d\n", | |
587 | c->cpu_core_id); | |
e42f9437 RS |
588 | } |
589 | ||
1da177e4 LT |
590 | #endif |
591 | } | |
592 | ||
672289e9 | 593 | static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) |
1da177e4 | 594 | { |
1da177e4 | 595 | char *v = c->x86_vendor_id; |
dcd32b6a YL |
596 | int i; |
597 | static int printed; | |
598 | ||
599 | for (i = 0; i < X86_VENDOR_NUM; i++) { | |
600 | if (cpu_devs[i]) { | |
601 | if (!strcmp(v, cpu_devs[i]->c_ident[0]) || | |
602 | (cpu_devs[i]->c_ident[1] && | |
603 | !strcmp(v, cpu_devs[i]->c_ident[1]))) { | |
604 | c->x86_vendor = i; | |
605 | this_cpu = cpu_devs[i]; | |
606 | return; | |
607 | } | |
608 | } | |
0080e667 | 609 | } |
dcd32b6a YL |
610 | if (!printed) { |
611 | printed++; | |
612 | printk(KERN_ERR "CPU: Vendor unknown, using generic init.\n"); | |
613 | printk(KERN_ERR "CPU: Your system may be unstable.\n"); | |
36b2a8d5 | 614 | } |
dcd32b6a | 615 | c->x86_vendor = X86_VENDOR_UNKNOWN; |
0e03eb86 DJ |
616 | } |
617 | ||
c49c412a | 618 | static void __init early_cpu_support_print(void) |
0e03eb86 | 619 | { |
c49c412a YL |
620 | int i,j; |
621 | struct cpu_dev *cpu_devx; | |
622 | ||
623 | printk("KERNEL supported cpus:\n"); | |
624 | for (i = 0; i < X86_VENDOR_NUM; i++) { | |
625 | cpu_devx = cpu_devs[i]; | |
626 | if (!cpu_devx) | |
627 | continue; | |
628 | for (j = 0; j < 2; j++) { | |
629 | if (!cpu_devx->c_ident[j]) | |
630 | continue; | |
631 | printk(" %s %s\n", cpu_devx->c_vendor, | |
632 | cpu_devx->c_ident[j]); | |
633 | } | |
0e03eb86 | 634 | } |
0e03eb86 DJ |
635 | } |
636 | ||
dcd32b6a | 637 | static void __init early_cpu_init(void) |
1da177e4 | 638 | { |
dcd32b6a | 639 | struct cpu_vendor_dev *cvdev; |
1da177e4 | 640 | |
dcd32b6a YL |
641 | for (cvdev = __x86cpuvendor_start ; |
642 | cvdev < __x86cpuvendor_end ; | |
643 | cvdev++) | |
644 | cpu_devs[cvdev->vendor] = cvdev->cpu_dev; | |
c49c412a | 645 | early_cpu_support_print(); |
1da177e4 LT |
646 | } |
647 | ||
1da177e4 LT |
648 | /* Do some early cpuid on the boot CPU to get some parameter that are |
649 | needed before check_bugs. Everything advanced is in identify_cpu | |
650 | below. */ | |
8c61b900 | 651 | static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) |
1da177e4 | 652 | { |
a860b63c | 653 | u32 tfms, xlvl; |
1da177e4 LT |
654 | |
655 | c->loops_per_jiffy = loops_per_jiffy; | |
656 | c->x86_cache_size = -1; | |
657 | c->x86_vendor = X86_VENDOR_UNKNOWN; | |
658 | c->x86_model = c->x86_mask = 0; /* So far unknown... */ | |
659 | c->x86_vendor_id[0] = '\0'; /* Unset */ | |
660 | c->x86_model_id[0] = '\0'; /* Unset */ | |
661 | c->x86_clflush_size = 64; | |
662 | c->x86_cache_alignment = c->x86_clflush_size; | |
94605eff | 663 | c->x86_max_cores = 1; |
a860b63c | 664 | c->x86_coreid_bits = 0; |
ebfcaa96 | 665 | c->extended_cpuid_level = 0; |
1da177e4 LT |
666 | memset(&c->x86_capability, 0, sizeof c->x86_capability); |
667 | ||
668 | /* Get vendor name */ | |
669 | cpuid(0x00000000, (unsigned int *)&c->cpuid_level, | |
670 | (unsigned int *)&c->x86_vendor_id[0], | |
671 | (unsigned int *)&c->x86_vendor_id[8], | |
672 | (unsigned int *)&c->x86_vendor_id[4]); | |
04e1ba85 | 673 | |
1da177e4 LT |
674 | get_cpu_vendor(c); |
675 | ||
676 | /* Initialize the standard set of capabilities */ | |
677 | /* Note that the vendor-specific code below might override */ | |
678 | ||
679 | /* Intel-defined flags: level 0x00000001 */ | |
680 | if (c->cpuid_level >= 0x00000001) { | |
681 | __u32 misc; | |
682 | cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4], | |
683 | &c->x86_capability[0]); | |
684 | c->x86 = (tfms >> 8) & 0xf; | |
685 | c->x86_model = (tfms >> 4) & 0xf; | |
686 | c->x86_mask = tfms & 0xf; | |
f5f786d0 | 687 | if (c->x86 == 0xf) |
1da177e4 | 688 | c->x86 += (tfms >> 20) & 0xff; |
f5f786d0 | 689 | if (c->x86 >= 0x6) |
1da177e4 | 690 | c->x86_model += ((tfms >> 16) & 0xF) << 4; |
9716951e | 691 | if (test_cpu_cap(c, X86_FEATURE_CLFLSH)) |
1da177e4 | 692 | c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
1da177e4 LT |
693 | } else { |
694 | /* Have CPUID level 0 only - unheard of */ | |
695 | c->x86 = 4; | |
696 | } | |
a158608b | 697 | |
01aaea1a | 698 | c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xff; |
a158608b | 699 | #ifdef CONFIG_SMP |
01aaea1a | 700 | c->phys_proc_id = c->initial_apicid; |
a158608b | 701 | #endif |
1da177e4 LT |
702 | /* AMD-defined flags: level 0x80000001 */ |
703 | xlvl = cpuid_eax(0x80000000); | |
ebfcaa96 | 704 | c->extended_cpuid_level = xlvl; |
1da177e4 LT |
705 | if ((xlvl & 0xffff0000) == 0x80000000) { |
706 | if (xlvl >= 0x80000001) { | |
707 | c->x86_capability[1] = cpuid_edx(0x80000001); | |
5b7abc6f | 708 | c->x86_capability[6] = cpuid_ecx(0x80000001); |
1da177e4 LT |
709 | } |
710 | if (xlvl >= 0x80000004) | |
711 | get_model_name(c); /* Default name */ | |
712 | } | |
713 | ||
714 | /* Transmeta-defined flags: level 0x80860001 */ | |
715 | xlvl = cpuid_eax(0x80860000); | |
716 | if ((xlvl & 0xffff0000) == 0x80860000) { | |
717 | /* Don't set x86_cpuid_level here for now to not confuse. */ | |
718 | if (xlvl >= 0x80860001) | |
719 | c->x86_capability[2] = cpuid_edx(0x80860001); | |
720 | } | |
721 | ||
9566e91d AH |
722 | c->extended_cpuid_level = cpuid_eax(0x80000000); |
723 | if (c->extended_cpuid_level >= 0x80000007) | |
724 | c->x86_power = cpuid_edx(0x80000007); | |
725 | ||
dcd32b6a YL |
726 | if (c->x86_vendor != X86_VENDOR_UNKNOWN && |
727 | cpu_devs[c->x86_vendor]->c_early_init) | |
728 | cpu_devs[c->x86_vendor]->c_early_init(c); | |
a860b63c | 729 | |
8d4a4300 | 730 | validate_pat_support(c); |
3c999f14 YL |
731 | |
732 | /* early_param could clear that, but recall get it set again */ | |
733 | if (disable_apic) | |
734 | clear_cpu_cap(c, X86_FEATURE_APIC); | |
a860b63c YL |
735 | } |
736 | ||
737 | /* | |
738 | * This does the hard work of actually picking apart the CPU stuff... | |
739 | */ | |
740 | void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |
741 | { | |
742 | int i; | |
743 | ||
744 | early_identify_cpu(c); | |
745 | ||
1d67953f VP |
746 | init_scattered_cpuid_features(c); |
747 | ||
1e9f28fa SS |
748 | c->apicid = phys_pkg_id(0); |
749 | ||
1da177e4 LT |
750 | /* |
751 | * Vendor-specific initialization. In this section we | |
752 | * canonicalize the feature flags, meaning if there are | |
753 | * features a certain CPU supports which CPUID doesn't | |
754 | * tell us, CPUID claiming incorrect flags, or other bugs, | |
755 | * we handle them here. | |
756 | * | |
757 | * At the end of this section, c->x86_capability better | |
758 | * indicate the features this CPU genuinely supports! | |
759 | */ | |
dcd32b6a YL |
760 | if (this_cpu->c_init) |
761 | this_cpu->c_init(c); | |
1da177e4 | 762 | |
04e1ba85 | 763 | detect_ht(c); |
1da177e4 LT |
764 | |
765 | /* | |
766 | * On SMP, boot_cpu_data holds the common feature set between | |
767 | * all CPUs; so make sure that we indicate which features are | |
768 | * common between the CPUs. The first time this routine gets | |
769 | * executed, c == &boot_cpu_data. | |
770 | */ | |
771 | if (c != &boot_cpu_data) { | |
772 | /* AND the already accumulated flags with these */ | |
04e1ba85 | 773 | for (i = 0; i < NCAPINTS; i++) |
1da177e4 LT |
774 | boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; |
775 | } | |
776 | ||
7d851c8d AK |
777 | /* Clear all flags overriden by options */ |
778 | for (i = 0; i < NCAPINTS; i++) | |
12c247a6 | 779 | c->x86_capability[i] &= ~cleared_cpu_caps[i]; |
7d851c8d | 780 | |
1da177e4 LT |
781 | #ifdef CONFIG_X86_MCE |
782 | mcheck_init(c); | |
783 | #endif | |
74ff305b HS |
784 | select_idle_routine(c); |
785 | ||
1da177e4 | 786 | #ifdef CONFIG_NUMA |
3019e8eb | 787 | numa_add_cpu(smp_processor_id()); |
1da177e4 | 788 | #endif |
2b16a235 | 789 | |
1da177e4 | 790 | } |
1da177e4 | 791 | |
7a636af6 GOC |
792 | void __cpuinit identify_boot_cpu(void) |
793 | { | |
794 | identify_cpu(&boot_cpu_data); | |
795 | } | |
796 | ||
797 | void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c) | |
798 | { | |
799 | BUG_ON(c == &boot_cpu_data); | |
800 | identify_cpu(c); | |
801 | mtrr_ap_init(); | |
802 | } | |
803 | ||
191679fd AK |
804 | static __init int setup_noclflush(char *arg) |
805 | { | |
806 | setup_clear_cpu_cap(X86_FEATURE_CLFLSH); | |
807 | return 1; | |
808 | } | |
809 | __setup("noclflush", setup_noclflush); | |
810 | ||
e6982c67 | 811 | void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) |
1da177e4 LT |
812 | { |
813 | if (c->x86_model_id[0]) | |
d8ff0bbf | 814 | printk(KERN_CONT "%s", c->x86_model_id); |
1da177e4 | 815 | |
04e1ba85 TG |
816 | if (c->x86_mask || c->cpuid_level >= 0) |
817 | printk(KERN_CONT " stepping %02x\n", c->x86_mask); | |
1da177e4 | 818 | else |
04e1ba85 | 819 | printk(KERN_CONT "\n"); |
1da177e4 LT |
820 | } |
821 | ||
ac72e788 AK |
822 | static __init int setup_disablecpuid(char *arg) |
823 | { | |
824 | int bit; | |
825 | if (get_option(&arg, &bit) && bit < NCAPINTS*32) | |
826 | setup_clear_cpu_cap(bit); | |
827 | else | |
828 | return 0; | |
829 | return 1; | |
830 | } | |
831 | __setup("clearcpuid=", setup_disablecpuid); |