Merge git://git.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-hrt
[deliverable/linux.git] / arch / x86 / kernel / summit_32.c
CommitLineData
1da177e4 1/*
835c34a1 2 * IBM Summit-Specific Code
1da177e4
LT
3 *
4 * Written By: Matthew Dobson, IBM Corporation
5 *
6 * Copyright (c) 2003 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <colpatch@us.ibm.com>
26 *
27 */
28
29#include <linux/mm.h>
30#include <linux/init.h>
31#include <asm/io.h>
32#include <asm/mach-summit/mach_mpparse.h>
33
34static struct rio_table_hdr *rio_table_hdr __initdata;
35static struct scal_detail *scal_devs[MAX_NUMNODES] __initdata;
36static struct rio_detail *rio_devs[MAX_NUMNODES*4] __initdata;
37
037cab07
AS
38static int mp_bus_id_to_node[MAX_MP_BUSSES] __initdata;
39
1da177e4
LT
40static int __init setup_pci_node_map_for_wpeg(int wpeg_num, int last_bus)
41{
42 int twister = 0, node = 0;
43 int i, bus, num_buses;
44
60e11746
PC
45 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
46 if (rio_devs[i]->node_id == rio_devs[wpeg_num]->owner_id) {
1da177e4
LT
47 twister = rio_devs[i]->owner_id;
48 break;
49 }
50 }
60e11746 51 if (i == rio_table_hdr->num_rio_dev) {
77bf90ed 52 printk(KERN_ERR "%s: Couldn't find owner Cyclone for Winnipeg!\n", __func__);
1da177e4
LT
53 return last_bus;
54 }
55
60e11746
PC
56 for (i = 0; i < rio_table_hdr->num_scal_dev; i++) {
57 if (scal_devs[i]->node_id == twister) {
1da177e4
LT
58 node = scal_devs[i]->node_id;
59 break;
60 }
61 }
60e11746 62 if (i == rio_table_hdr->num_scal_dev) {
77bf90ed 63 printk(KERN_ERR "%s: Couldn't find owner Twister for Cyclone!\n", __func__);
1da177e4
LT
64 return last_bus;
65 }
66
60e11746 67 switch (rio_devs[wpeg_num]->type) {
1da177e4 68 case CompatWPEG:
60e11746
PC
69 /*
70 * The Compatibility Winnipeg controls the 2 legacy buses,
1da177e4
LT
71 * the 66MHz PCI bus [2 slots] and the 2 "extra" buses in case
72 * a PCI-PCI bridge card is used in either slot: total 5 buses.
73 */
74 num_buses = 5;
75 break;
76 case AltWPEG:
60e11746
PC
77 /*
78 * The Alternate Winnipeg controls the 2 133MHz buses [1 slot
1da177e4
LT
79 * each], their 2 "extra" buses, the 100MHz bus [2 slots] and
80 * the "extra" buses for each of those slots: total 7 buses.
81 */
82 num_buses = 7;
83 break;
84 case LookOutAWPEG:
85 case LookOutBWPEG:
60e11746
PC
86 /*
87 * A Lookout Winnipeg controls 3 100MHz buses [2 slots each]
1da177e4
LT
88 * & the "extra" buses for each of those slots: total 9 buses.
89 */
90 num_buses = 9;
91 break;
92 default:
77bf90ed 93 printk(KERN_INFO "%s: Unsupported Winnipeg type!\n", __func__);
1da177e4
LT
94 return last_bus;
95 }
96
60e11746 97 for (bus = last_bus; bus < last_bus + num_buses; bus++)
1da177e4
LT
98 mp_bus_id_to_node[bus] = node;
99 return bus;
100}
101
102static int __init build_detail_arrays(void)
103{
104 unsigned long ptr;
105 int i, scal_detail_size, rio_detail_size;
106
60e11746 107 if (rio_table_hdr->num_scal_dev > MAX_NUMNODES) {
77bf90ed 108 printk(KERN_WARNING "%s: MAX_NUMNODES too low! Defined as %d, but system has %d nodes.\n", __func__, MAX_NUMNODES, rio_table_hdr->num_scal_dev);
1da177e4
LT
109 return 0;
110 }
111
60e11746 112 switch (rio_table_hdr->version) {
1da177e4 113 default:
77bf90ed 114 printk(KERN_WARNING "%s: Invalid Rio Grande Table Version: %d\n", __func__, rio_table_hdr->version);
1da177e4
LT
115 return 0;
116 case 2:
117 scal_detail_size = 11;
118 rio_detail_size = 13;
119 break;
120 case 3:
121 scal_detail_size = 12;
122 rio_detail_size = 15;
123 break;
124 }
125
126 ptr = (unsigned long)rio_table_hdr + 3;
60e11746 127 for (i = 0; i < rio_table_hdr->num_scal_dev; i++, ptr += scal_detail_size)
1da177e4
LT
128 scal_devs[i] = (struct scal_detail *)ptr;
129
60e11746 130 for (i = 0; i < rio_table_hdr->num_rio_dev; i++, ptr += rio_detail_size)
1da177e4
LT
131 rio_devs[i] = (struct rio_detail *)ptr;
132
133 return 1;
134}
135
136void __init setup_summit(void)
137{
138 unsigned long ptr;
139 unsigned short offset;
140 int i, next_wpeg, next_bus = 0;
141
142 /* The pointer to the EBDA is stored in the word @ phys 0x40E(40:0E) */
143 ptr = *(unsigned short *)phys_to_virt(0x40Eul);
144 ptr = (unsigned long)phys_to_virt(ptr << 4);
145
146 rio_table_hdr = NULL;
147 offset = 0x180;
60e11746 148 while (offset) {
1da177e4 149 /* The block id is stored in the 2nd word */
60e11746 150 if (*((unsigned short *)(ptr + offset + 2)) == 0x4752) {
1da177e4
LT
151 /* set the pointer past the offset & block id */
152 rio_table_hdr = (struct rio_table_hdr *)(ptr + offset + 4);
153 break;
154 }
155 /* The next offset is stored in the 1st word. 0 means no more */
156 offset = *((unsigned short *)(ptr + offset));
157 }
60e11746 158 if (!rio_table_hdr) {
77bf90ed 159 printk(KERN_ERR "%s: Unable to locate Rio Grande Table in EBDA - bailing!\n", __func__);
1da177e4
LT
160 return;
161 }
162
163 if (!build_detail_arrays())
164 return;
165
166 /* The first Winnipeg we're looking for has an index of 0 */
167 next_wpeg = 0;
168 do {
60e11746
PC
169 for (i = 0; i < rio_table_hdr->num_rio_dev; i++) {
170 if (is_WPEG(rio_devs[i]) && rio_devs[i]->WP_index == next_wpeg) {
1da177e4
LT
171 /* It's the Winnipeg we're looking for! */
172 next_bus = setup_pci_node_map_for_wpeg(i, next_bus);
173 next_wpeg++;
174 break;
175 }
176 }
177 /*
178 * If we go through all Rio devices and don't find one with
179 * the next index, it means we've found all the Winnipegs,
180 * and thus all the PCI buses.
181 */
182 if (i == rio_table_hdr->num_rio_dev)
183 next_wpeg = 0;
184 } while (next_wpeg != 0);
185}
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