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1da177e4 LT |
1 | /* |
2 | * linux/arch/i386/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | |
5 | * | |
6 | * This file contains the PC-specific time handling details: | |
7 | * reading the RTC at bootup, etc.. | |
8 | * 1994-07-02 Alan Modra | |
9 | * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | |
10 | * 1995-03-26 Markus Kuhn | |
11 | * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887 | |
12 | * precision CMOS clock update | |
13 | * 1996-05-03 Ingo Molnar | |
14 | * fixed time warps in do_[slow|fast]_gettimeoffset() | |
15 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | |
16 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | |
17 | * 1998-09-05 (Various) | |
18 | * More robust do_fast_gettimeoffset() algorithm implemented | |
19 | * (works with APM, Cyrix 6x86MX and Centaur C6), | |
20 | * monotonic gettimeofday() with fast_get_timeoffset(), | |
21 | * drift-proof precision TSC calibration on boot | |
22 | * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D. | |
23 | * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>; | |
24 | * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>). | |
25 | * 1998-12-16 Andrea Arcangeli | |
26 | * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy | |
27 | * because was not accounting lost_ticks. | |
28 | * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli | |
29 | * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to | |
30 | * serialize accesses to xtime/lost_ticks). | |
31 | */ | |
32 | ||
33 | #include <linux/errno.h> | |
34 | #include <linux/sched.h> | |
35 | #include <linux/kernel.h> | |
36 | #include <linux/param.h> | |
37 | #include <linux/string.h> | |
38 | #include <linux/mm.h> | |
39 | #include <linux/interrupt.h> | |
40 | #include <linux/time.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/init.h> | |
43 | #include <linux/smp.h> | |
44 | #include <linux/module.h> | |
45 | #include <linux/sysdev.h> | |
46 | #include <linux/bcd.h> | |
47 | #include <linux/efi.h> | |
48 | #include <linux/mca.h> | |
49 | ||
50 | #include <asm/io.h> | |
51 | #include <asm/smp.h> | |
52 | #include <asm/irq.h> | |
53 | #include <asm/msr.h> | |
54 | #include <asm/delay.h> | |
55 | #include <asm/mpspec.h> | |
56 | #include <asm/uaccess.h> | |
57 | #include <asm/processor.h> | |
58 | #include <asm/timer.h> | |
d3561b7f | 59 | #include <asm/time.h> |
1da177e4 LT |
60 | |
61 | #include "mach_time.h" | |
62 | ||
63 | #include <linux/timex.h> | |
1da177e4 LT |
64 | |
65 | #include <asm/hpet.h> | |
66 | ||
67 | #include <asm/arch_hooks.h> | |
68 | ||
69 | #include "io_ports.h" | |
70 | ||
306e440d IM |
71 | #include <asm/i8259.h> |
72 | ||
1da177e4 LT |
73 | #include "do_timer.h" |
74 | ||
a3a255e7 | 75 | unsigned int cpu_khz; /* Detected as we calibrate the TSC */ |
129f6946 | 76 | EXPORT_SYMBOL(cpu_khz); |
1da177e4 | 77 | |
1da177e4 | 78 | DEFINE_SPINLOCK(rtc_lock); |
129f6946 | 79 | EXPORT_SYMBOL(rtc_lock); |
1da177e4 | 80 | |
1da177e4 LT |
81 | /* |
82 | * This is a special lock that is owned by the CPU and holds the index | |
83 | * register we are working with. It is required for NMI access to the | |
84 | * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details. | |
85 | */ | |
86 | volatile unsigned long cmos_lock = 0; | |
87 | EXPORT_SYMBOL(cmos_lock); | |
88 | ||
89 | /* Routines for accessing the CMOS RAM/RTC. */ | |
90 | unsigned char rtc_cmos_read(unsigned char addr) | |
91 | { | |
92 | unsigned char val; | |
93 | lock_cmos_prefix(addr); | |
94 | outb_p(addr, RTC_PORT(0)); | |
95 | val = inb_p(RTC_PORT(1)); | |
96 | lock_cmos_suffix(addr); | |
97 | return val; | |
98 | } | |
99 | EXPORT_SYMBOL(rtc_cmos_read); | |
100 | ||
101 | void rtc_cmos_write(unsigned char val, unsigned char addr) | |
102 | { | |
103 | lock_cmos_prefix(addr); | |
104 | outb_p(addr, RTC_PORT(0)); | |
105 | outb_p(val, RTC_PORT(1)); | |
106 | lock_cmos_suffix(addr); | |
107 | } | |
108 | EXPORT_SYMBOL(rtc_cmos_write); | |
109 | ||
1da177e4 LT |
110 | static int set_rtc_mmss(unsigned long nowtime) |
111 | { | |
112 | int retval; | |
6f84fa2f | 113 | unsigned long flags; |
1da177e4 LT |
114 | |
115 | /* gets recalled with irq locally disabled */ | |
6f84fa2f | 116 | /* XXX - does irqsave resolve this? -johnstul */ |
117 | spin_lock_irqsave(&rtc_lock, flags); | |
d3561b7f | 118 | retval = set_wallclock(nowtime); |
6f84fa2f | 119 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
120 | |
121 | return retval; | |
122 | } | |
123 | ||
124 | ||
125 | int timer_ack; | |
126 | ||
1da177e4 LT |
127 | unsigned long profile_pc(struct pt_regs *regs) |
128 | { | |
129 | unsigned long pc = instruction_pointer(regs); | |
130 | ||
0cb91a22 | 131 | #ifdef CONFIG_SMP |
7b355202 ZA |
132 | if (!v8086_mode(regs) && SEGMENT_IS_KERNEL_CODE(regs->xcs) && |
133 | in_lock_functions(pc)) { | |
0cb91a22 | 134 | #ifdef CONFIG_FRAME_POINTER |
1da177e4 | 135 | return *(unsigned long *)(regs->ebp + 4); |
0cb91a22 | 136 | #else |
7b355202 ZA |
137 | unsigned long *sp = (unsigned long *)®s->esp; |
138 | ||
0cb91a22 AK |
139 | /* Return address is either directly at stack pointer |
140 | or above a saved eflags. Eflags has bits 22-31 zero, | |
141 | kernel addresses don't. */ | |
142 | if (sp[0] >> 22) | |
143 | return sp[0]; | |
144 | if (sp[1] >> 22) | |
145 | return sp[1]; | |
146 | #endif | |
147 | } | |
148 | #endif | |
1da177e4 LT |
149 | return pc; |
150 | } | |
151 | EXPORT_SYMBOL(profile_pc); | |
1da177e4 LT |
152 | |
153 | /* | |
6f84fa2f | 154 | * This is the same as the above, except we _also_ save the current |
155 | * Time Stamp Counter value at the time of the timer interrupt, so that | |
156 | * we later on can estimate the time of day more exactly. | |
1da177e4 | 157 | */ |
7d12e780 | 158 | irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 LT |
159 | { |
160 | #ifdef CONFIG_X86_IO_APIC | |
161 | if (timer_ack) { | |
162 | /* | |
163 | * Subtle, when I/O APICs are used we have to ack timer IRQ | |
164 | * manually to reset the IRR bit for do_slow_gettimeoffset(). | |
165 | * This will also deassert NMI lines for the watchdog if run | |
166 | * on an 82489DX-based system. | |
167 | */ | |
168 | spin_lock(&i8259A_lock); | |
169 | outb(0x0c, PIC_MASTER_OCW3); | |
170 | /* Ack the IRQ; AEOI will end it automatically. */ | |
171 | inb(PIC_MASTER_POLL); | |
172 | spin_unlock(&i8259A_lock); | |
173 | } | |
174 | #endif | |
175 | ||
7d12e780 | 176 | do_timer_interrupt_hook(); |
1da177e4 | 177 | |
1da177e4 LT |
178 | if (MCA_bus) { |
179 | /* The PS/2 uses level-triggered interrupts. You can't | |
180 | turn them off, nor would you want to (any attempt to | |
181 | enable edge-triggered interrupts usually gets intercepted by a | |
182 | special hardware circuit). Hence we have to acknowledge | |
183 | the timer interrupt. Through some incredibly stupid | |
184 | design idea, the reset for IRQ 0 is done by setting the | |
185 | high bit of the PPI port B (0x61). Note that some PS/2s, | |
186 | notably the 55SX, work fine if this is removed. */ | |
187 | ||
86d91bab JG |
188 | u8 irq_v = inb_p( 0x61 ); /* read the current state */ |
189 | outb_p( irq_v|0x80, 0x61 ); /* reset the IRQ */ | |
1da177e4 | 190 | } |
1da177e4 | 191 | |
1da177e4 LT |
192 | return IRQ_HANDLED; |
193 | } | |
194 | ||
195 | /* not static: needed by APM */ | |
c1d370e1 | 196 | unsigned long read_persistent_clock(void) |
1da177e4 LT |
197 | { |
198 | unsigned long retval; | |
7ba1c6c8 | 199 | unsigned long flags; |
1da177e4 | 200 | |
7ba1c6c8 | 201 | spin_lock_irqsave(&rtc_lock, flags); |
1da177e4 | 202 | |
d3561b7f | 203 | retval = get_wallclock(); |
1da177e4 | 204 | |
7ba1c6c8 | 205 | spin_unlock_irqrestore(&rtc_lock, flags); |
1da177e4 LT |
206 | |
207 | return retval; | |
208 | } | |
129f6946 | 209 | |
82644459 | 210 | int update_persistent_clock(struct timespec now) |
1da177e4 | 211 | { |
82644459 | 212 | return set_rtc_mmss(now.tv_sec); |
1da177e4 LT |
213 | } |
214 | ||
1e4c85f9 | 215 | extern void (*late_time_init)(void); |
1da177e4 | 216 | /* Duplicate of time_init() below, with hpet_enable part added */ |
e30fab3a | 217 | void __init hpet_time_init(void) |
1da177e4 | 218 | { |
e9e2cdb4 TG |
219 | if (!hpet_enable()) |
220 | setup_pit_timer(); | |
e30fab3a | 221 | time_init_hook(); |
1da177e4 | 222 | } |
1da177e4 | 223 | |
e30fab3a ZA |
224 | /* |
225 | * This is called directly from init code; we must delay timer setup in the | |
226 | * HPET case as we can't make the decision to turn on HPET this early in the | |
227 | * boot process. | |
228 | * | |
229 | * The chosen time_init function will usually be hpet_time_init, above, but | |
230 | * in the case of virtual hardware, an alternative function may be substituted. | |
231 | */ | |
1da177e4 LT |
232 | void __init time_init(void) |
233 | { | |
6bb74df4 | 234 | tsc_init(); |
e30fab3a | 235 | late_time_init = choose_time_init(); |
1da177e4 | 236 | } |