Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
c767a54b JP |
12 | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
14 | ||
56dd9470 | 15 | #include <linux/context_tracking.h> |
b5964405 IM |
16 | #include <linux/interrupt.h> |
17 | #include <linux/kallsyms.h> | |
18 | #include <linux/spinlock.h> | |
b5964405 IM |
19 | #include <linux/kprobes.h> |
20 | #include <linux/uaccess.h> | |
b5964405 | 21 | #include <linux/kdebug.h> |
f503b5ae | 22 | #include <linux/kgdb.h> |
1da177e4 | 23 | #include <linux/kernel.h> |
b5964405 IM |
24 | #include <linux/module.h> |
25 | #include <linux/ptrace.h> | |
b02ef20a | 26 | #include <linux/uprobes.h> |
1da177e4 | 27 | #include <linux/string.h> |
b5964405 | 28 | #include <linux/delay.h> |
1da177e4 | 29 | #include <linux/errno.h> |
b5964405 IM |
30 | #include <linux/kexec.h> |
31 | #include <linux/sched.h> | |
1da177e4 | 32 | #include <linux/timer.h> |
1da177e4 | 33 | #include <linux/init.h> |
91768d6c | 34 | #include <linux/bug.h> |
b5964405 IM |
35 | #include <linux/nmi.h> |
36 | #include <linux/mm.h> | |
c1d518c8 AH |
37 | #include <linux/smp.h> |
38 | #include <linux/io.h> | |
1da177e4 LT |
39 | |
40 | #ifdef CONFIG_EISA | |
41 | #include <linux/ioport.h> | |
42 | #include <linux/eisa.h> | |
43 | #endif | |
44 | ||
c0d12172 DJ |
45 | #if defined(CONFIG_EDAC) |
46 | #include <linux/edac.h> | |
47 | #endif | |
48 | ||
f8561296 | 49 | #include <asm/kmemcheck.h> |
b5964405 | 50 | #include <asm/stacktrace.h> |
1da177e4 | 51 | #include <asm/processor.h> |
1da177e4 | 52 | #include <asm/debugreg.h> |
60063497 | 53 | #include <linux/atomic.h> |
08d636b6 | 54 | #include <asm/ftrace.h> |
c1d518c8 | 55 | #include <asm/traps.h> |
1da177e4 LT |
56 | #include <asm/desc.h> |
57 | #include <asm/i387.h> | |
1361b83a | 58 | #include <asm/fpu-internal.h> |
9e55e44e | 59 | #include <asm/mce.h> |
4eefbe79 | 60 | #include <asm/fixmap.h> |
1164dd00 | 61 | #include <asm/mach_traps.h> |
17f41571 | 62 | #include <asm/alternative.h> |
fe3d197f | 63 | #include <asm/mpx.h> |
c1d518c8 | 64 | |
081f75bb | 65 | #ifdef CONFIG_X86_64 |
428cf902 | 66 | #include <asm/x86_init.h> |
081f75bb AH |
67 | #include <asm/pgalloc.h> |
68 | #include <asm/proto.h> | |
4df05f36 KC |
69 | |
70 | /* No need to be aligned, but done to keep all IDTs defined the same way. */ | |
71 | gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss; | |
081f75bb | 72 | #else |
c1d518c8 | 73 | #include <asm/processor-flags.h> |
8e6dafd6 | 74 | #include <asm/setup.h> |
1da177e4 | 75 | |
1da177e4 | 76 | asmlinkage int system_call(void); |
081f75bb | 77 | #endif |
1da177e4 | 78 | |
4df05f36 KC |
79 | /* Must be page-aligned because the real IDT is used in a fixmap. */ |
80 | gate_desc idt_table[NR_VECTORS] __page_aligned_bss; | |
81 | ||
b77b881f YL |
82 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
83 | EXPORT_SYMBOL_GPL(used_vectors); | |
84 | ||
762db434 AH |
85 | static inline void conditional_sti(struct pt_regs *regs) |
86 | { | |
87 | if (regs->flags & X86_EFLAGS_IF) | |
88 | local_irq_enable(); | |
89 | } | |
90 | ||
3d2a71a5 AH |
91 | static inline void preempt_conditional_sti(struct pt_regs *regs) |
92 | { | |
bdb43806 | 93 | preempt_count_inc(); |
3d2a71a5 AH |
94 | if (regs->flags & X86_EFLAGS_IF) |
95 | local_irq_enable(); | |
96 | } | |
97 | ||
be716615 TG |
98 | static inline void conditional_cli(struct pt_regs *regs) |
99 | { | |
100 | if (regs->flags & X86_EFLAGS_IF) | |
101 | local_irq_disable(); | |
102 | } | |
103 | ||
3d2a71a5 AH |
104 | static inline void preempt_conditional_cli(struct pt_regs *regs) |
105 | { | |
106 | if (regs->flags & X86_EFLAGS_IF) | |
107 | local_irq_disable(); | |
bdb43806 | 108 | preempt_count_dec(); |
3d2a71a5 AH |
109 | } |
110 | ||
9326638c | 111 | static nokprobe_inline int |
c416ddf5 FW |
112 | do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str, |
113 | struct pt_regs *regs, long error_code) | |
1da177e4 | 114 | { |
081f75bb | 115 | #ifdef CONFIG_X86_32 |
6b6891f9 | 116 | if (regs->flags & X86_VM_MASK) { |
3c1326f8 | 117 | /* |
c416ddf5 | 118 | * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86. |
3c1326f8 AH |
119 | * On nmi (interrupt 2), do_trap should not be called. |
120 | */ | |
c416ddf5 FW |
121 | if (trapnr < X86_TRAP_UD) { |
122 | if (!handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
123 | error_code, trapnr)) | |
124 | return 0; | |
125 | } | |
126 | return -1; | |
1da177e4 | 127 | } |
081f75bb | 128 | #endif |
c416ddf5 FW |
129 | if (!user_mode(regs)) { |
130 | if (!fixup_exception(regs)) { | |
131 | tsk->thread.error_code = error_code; | |
132 | tsk->thread.trap_nr = trapnr; | |
133 | die(str, regs, error_code); | |
134 | } | |
135 | return 0; | |
136 | } | |
1da177e4 | 137 | |
c416ddf5 FW |
138 | return -1; |
139 | } | |
1da177e4 | 140 | |
1c326c4d ON |
141 | static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr, |
142 | siginfo_t *info) | |
958d3d72 ON |
143 | { |
144 | unsigned long siaddr; | |
145 | int sicode; | |
146 | ||
147 | switch (trapnr) { | |
1c326c4d ON |
148 | default: |
149 | return SEND_SIG_PRIV; | |
150 | ||
958d3d72 ON |
151 | case X86_TRAP_DE: |
152 | sicode = FPE_INTDIV; | |
b02ef20a | 153 | siaddr = uprobe_get_trap_addr(regs); |
958d3d72 ON |
154 | break; |
155 | case X86_TRAP_UD: | |
156 | sicode = ILL_ILLOPN; | |
b02ef20a | 157 | siaddr = uprobe_get_trap_addr(regs); |
958d3d72 ON |
158 | break; |
159 | case X86_TRAP_AC: | |
160 | sicode = BUS_ADRALN; | |
161 | siaddr = 0; | |
162 | break; | |
163 | } | |
164 | ||
165 | info->si_signo = signr; | |
166 | info->si_errno = 0; | |
167 | info->si_code = sicode; | |
168 | info->si_addr = (void __user *)siaddr; | |
1c326c4d | 169 | return info; |
958d3d72 ON |
170 | } |
171 | ||
9326638c | 172 | static void |
c416ddf5 FW |
173 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, |
174 | long error_code, siginfo_t *info) | |
175 | { | |
176 | struct task_struct *tsk = current; | |
177 | ||
178 | ||
179 | if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code)) | |
180 | return; | |
b5964405 | 181 | /* |
51e7dc70 | 182 | * We want error_code and trap_nr set for userspace faults and |
b5964405 IM |
183 | * kernelspace faults which result in die(), but not |
184 | * kernelspace faults which are fixed up. die() gives the | |
185 | * process no chance to handle the signal and notice the | |
186 | * kernel fault information, so that won't result in polluting | |
187 | * the information about previously queued, but not yet | |
188 | * delivered, faults. See also do_general_protection below. | |
189 | */ | |
190 | tsk->thread.error_code = error_code; | |
51e7dc70 | 191 | tsk->thread.trap_nr = trapnr; |
d1895183 | 192 | |
081f75bb AH |
193 | #ifdef CONFIG_X86_64 |
194 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && | |
195 | printk_ratelimit()) { | |
c767a54b JP |
196 | pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx", |
197 | tsk->comm, tsk->pid, str, | |
198 | regs->ip, regs->sp, error_code); | |
081f75bb | 199 | print_vma_addr(" in ", regs->ip); |
c767a54b | 200 | pr_cont("\n"); |
081f75bb AH |
201 | } |
202 | #endif | |
203 | ||
38cad57b | 204 | force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk); |
1da177e4 | 205 | } |
9326638c | 206 | NOKPROBE_SYMBOL(do_trap); |
1da177e4 | 207 | |
dff0796e | 208 | static void do_error_trap(struct pt_regs *regs, long error_code, char *str, |
1c326c4d | 209 | unsigned long trapnr, int signr) |
dff0796e ON |
210 | { |
211 | enum ctx_state prev_state = exception_enter(); | |
1c326c4d | 212 | siginfo_t info; |
dff0796e ON |
213 | |
214 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) != | |
215 | NOTIFY_STOP) { | |
216 | conditional_sti(regs); | |
1c326c4d ON |
217 | do_trap(trapnr, signr, str, regs, error_code, |
218 | fill_trap_info(regs, signr, trapnr, &info)); | |
dff0796e ON |
219 | } |
220 | ||
221 | exception_exit(prev_state); | |
222 | } | |
223 | ||
b5964405 | 224 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 225 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 | 226 | { \ |
1c326c4d | 227 | do_error_trap(regs, error_code, str, trapnr, signr); \ |
1da177e4 LT |
228 | } |
229 | ||
0eb14833 ON |
230 | DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error) |
231 | DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow) | |
0eb14833 ON |
232 | DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op) |
233 | DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun) | |
234 | DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) | |
235 | DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) | |
081f75bb | 236 | #ifdef CONFIG_X86_32 |
0eb14833 | 237 | DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) |
081f75bb | 238 | #endif |
0eb14833 | 239 | DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check) |
1da177e4 | 240 | |
081f75bb AH |
241 | #ifdef CONFIG_X86_64 |
242 | /* Runs on IST stack */ | |
243 | dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code) | |
244 | { | |
6c1e0256 FW |
245 | enum ctx_state prev_state; |
246 | ||
247 | prev_state = exception_enter(); | |
081f75bb | 248 | if (notify_die(DIE_TRAP, "stack segment", regs, error_code, |
6ba3c97a FW |
249 | X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) { |
250 | preempt_conditional_sti(regs); | |
251 | do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL); | |
252 | preempt_conditional_cli(regs); | |
253 | } | |
6c1e0256 | 254 | exception_exit(prev_state); |
081f75bb AH |
255 | } |
256 | ||
257 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) | |
258 | { | |
259 | static const char str[] = "double fault"; | |
260 | struct task_struct *tsk = current; | |
261 | ||
6c1e0256 | 262 | exception_enter(); |
081f75bb | 263 | /* Return not checked because double check cannot be ignored */ |
c9408265 | 264 | notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); |
081f75bb AH |
265 | |
266 | tsk->thread.error_code = error_code; | |
51e7dc70 | 267 | tsk->thread.trap_nr = X86_TRAP_DF; |
081f75bb | 268 | |
4d067d8e BP |
269 | #ifdef CONFIG_DOUBLEFAULT |
270 | df_debug(regs, error_code); | |
271 | #endif | |
bd8b96df IM |
272 | /* |
273 | * This is always a kernel trap and never fixable (and thus must | |
274 | * never return). | |
275 | */ | |
081f75bb AH |
276 | for (;;) |
277 | die(str, regs, error_code); | |
278 | } | |
279 | #endif | |
280 | ||
fe3d197f DH |
281 | dotraplinkage void do_bounds(struct pt_regs *regs, long error_code) |
282 | { | |
283 | struct task_struct *tsk = current; | |
284 | struct xsave_struct *xsave_buf; | |
285 | enum ctx_state prev_state; | |
286 | struct bndcsr *bndcsr; | |
287 | siginfo_t *info; | |
288 | ||
289 | prev_state = exception_enter(); | |
290 | if (notify_die(DIE_TRAP, "bounds", regs, error_code, | |
291 | X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP) | |
292 | goto exit; | |
293 | conditional_sti(regs); | |
294 | ||
295 | if (!user_mode(regs)) | |
296 | die("bounds", regs, error_code); | |
297 | ||
298 | if (!cpu_feature_enabled(X86_FEATURE_MPX)) { | |
299 | /* The exception is not from Intel MPX */ | |
300 | goto exit_trap; | |
301 | } | |
302 | ||
303 | /* | |
304 | * We need to look at BNDSTATUS to resolve this exception. | |
305 | * It is not directly accessible, though, so we need to | |
306 | * do an xsave and then pull it out of the xsave buffer. | |
307 | */ | |
308 | fpu_save_init(&tsk->thread.fpu); | |
309 | xsave_buf = &(tsk->thread.fpu.state->xsave); | |
310 | bndcsr = get_xsave_addr(xsave_buf, XSTATE_BNDCSR); | |
311 | if (!bndcsr) | |
312 | goto exit_trap; | |
313 | ||
314 | /* | |
315 | * The error code field of the BNDSTATUS register communicates status | |
316 | * information of a bound range exception #BR or operation involving | |
317 | * bound directory. | |
318 | */ | |
319 | switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) { | |
320 | case 2: /* Bound directory has invalid entry. */ | |
321 | if (mpx_handle_bd_fault(xsave_buf)) | |
322 | goto exit_trap; | |
323 | break; /* Success, it was handled */ | |
324 | case 1: /* Bound violation. */ | |
325 | info = mpx_generate_siginfo(regs, xsave_buf); | |
326 | if (PTR_ERR(info)) { | |
327 | /* | |
328 | * We failed to decode the MPX instruction. Act as if | |
329 | * the exception was not caused by MPX. | |
330 | */ | |
331 | goto exit_trap; | |
332 | } | |
333 | /* | |
334 | * Success, we decoded the instruction and retrieved | |
335 | * an 'info' containing the address being accessed | |
336 | * which caused the exception. This information | |
337 | * allows and application to possibly handle the | |
338 | * #BR exception itself. | |
339 | */ | |
340 | do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info); | |
341 | kfree(info); | |
342 | break; | |
343 | case 0: /* No exception caused by Intel MPX operations. */ | |
344 | goto exit_trap; | |
345 | default: | |
346 | die("bounds", regs, error_code); | |
347 | } | |
348 | ||
349 | exit: | |
350 | exception_exit(prev_state); | |
351 | return; | |
352 | exit_trap: | |
353 | /* | |
354 | * This path out is for all the cases where we could not | |
355 | * handle the exception in some way (like allocating a | |
356 | * table or telling userspace about it. We will also end | |
357 | * up here if the kernel has MPX turned off at compile | |
358 | * time.. | |
359 | */ | |
360 | do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL); | |
361 | exception_exit(prev_state); | |
362 | } | |
363 | ||
9326638c | 364 | dotraplinkage void |
13485ab5 | 365 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 366 | { |
13485ab5 | 367 | struct task_struct *tsk; |
6c1e0256 | 368 | enum ctx_state prev_state; |
b5964405 | 369 | |
6c1e0256 | 370 | prev_state = exception_enter(); |
c6df0d71 AH |
371 | conditional_sti(regs); |
372 | ||
081f75bb | 373 | #ifdef CONFIG_X86_32 |
ef3f6288 FW |
374 | if (regs->flags & X86_VM_MASK) { |
375 | local_irq_enable(); | |
376 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
6ba3c97a | 377 | goto exit; |
ef3f6288 | 378 | } |
081f75bb | 379 | #endif |
1da177e4 | 380 | |
13485ab5 | 381 | tsk = current; |
ef3f6288 FW |
382 | if (!user_mode(regs)) { |
383 | if (fixup_exception(regs)) | |
6ba3c97a | 384 | goto exit; |
ef3f6288 FW |
385 | |
386 | tsk->thread.error_code = error_code; | |
387 | tsk->thread.trap_nr = X86_TRAP_GP; | |
6ba3c97a FW |
388 | if (notify_die(DIE_GPF, "general protection fault", regs, error_code, |
389 | X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP) | |
ef3f6288 | 390 | die("general protection fault", regs, error_code); |
6ba3c97a | 391 | goto exit; |
ef3f6288 | 392 | } |
1da177e4 | 393 | |
13485ab5 | 394 | tsk->thread.error_code = error_code; |
51e7dc70 | 395 | tsk->thread.trap_nr = X86_TRAP_GP; |
b5964405 | 396 | |
13485ab5 AH |
397 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
398 | printk_ratelimit()) { | |
c767a54b | 399 | pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx", |
13485ab5 AH |
400 | tsk->comm, task_pid_nr(tsk), |
401 | regs->ip, regs->sp, error_code); | |
03252919 | 402 | print_vma_addr(" in ", regs->ip); |
c767a54b | 403 | pr_cont("\n"); |
03252919 | 404 | } |
abd4f750 | 405 | |
38cad57b | 406 | force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk); |
6ba3c97a | 407 | exit: |
6c1e0256 | 408 | exception_exit(prev_state); |
1da177e4 | 409 | } |
9326638c | 410 | NOKPROBE_SYMBOL(do_general_protection); |
1da177e4 | 411 | |
c1d518c8 | 412 | /* May run on IST stack. */ |
9326638c | 413 | dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 414 | { |
6c1e0256 FW |
415 | enum ctx_state prev_state; |
416 | ||
08d636b6 | 417 | #ifdef CONFIG_DYNAMIC_FTRACE |
a192cd04 SR |
418 | /* |
419 | * ftrace must be first, everything else may cause a recursive crash. | |
420 | * See note by declaration of modifying_ftrace_code in ftrace.c | |
421 | */ | |
422 | if (unlikely(atomic_read(&modifying_ftrace_code)) && | |
423 | ftrace_int3_handler(regs)) | |
08d636b6 SR |
424 | return; |
425 | #endif | |
17f41571 JK |
426 | if (poke_int3_handler(regs)) |
427 | return; | |
428 | ||
4cdf77a8 | 429 | prev_state = exception_enter(); |
f503b5ae | 430 | #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP |
c9408265 KC |
431 | if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
432 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 433 | goto exit; |
f503b5ae | 434 | #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ |
cc3a1bf5 | 435 | |
6f6343f5 MH |
436 | #ifdef CONFIG_KPROBES |
437 | if (kprobe_int3_handler(regs)) | |
4cdf77a8 | 438 | goto exit; |
6f6343f5 MH |
439 | #endif |
440 | ||
c9408265 KC |
441 | if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
442 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 443 | goto exit; |
b5964405 | 444 | |
42181186 SR |
445 | /* |
446 | * Let others (NMI) know that the debug stack is in use | |
447 | * as we may switch to the interrupt stack. | |
448 | */ | |
449 | debug_stack_usage_inc(); | |
4915a35e | 450 | preempt_conditional_sti(regs); |
c9408265 | 451 | do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); |
4915a35e | 452 | preempt_conditional_cli(regs); |
42181186 | 453 | debug_stack_usage_dec(); |
6ba3c97a | 454 | exit: |
6c1e0256 | 455 | exception_exit(prev_state); |
1da177e4 | 456 | } |
9326638c | 457 | NOKPROBE_SYMBOL(do_int3); |
1da177e4 | 458 | |
081f75bb | 459 | #ifdef CONFIG_X86_64 |
bd8b96df IM |
460 | /* |
461 | * Help handler running on IST stack to switch back to user stack | |
462 | * for scheduling or signal handling. The actual stack switch is done in | |
463 | * entry.S | |
464 | */ | |
ec000109 | 465 | asmlinkage __visible struct pt_regs *sync_regs(struct pt_regs *eregs) |
081f75bb AH |
466 | { |
467 | struct pt_regs *regs = eregs; | |
468 | /* Did already sync */ | |
469 | if (eregs == (struct pt_regs *)eregs->sp) | |
470 | ; | |
471 | /* Exception from user space */ | |
472 | else if (user_mode(eregs)) | |
473 | regs = task_pt_regs(current); | |
bd8b96df IM |
474 | /* |
475 | * Exception from kernel and interrupts are enabled. Move to | |
476 | * kernel process stack. | |
477 | */ | |
081f75bb AH |
478 | else if (eregs->flags & X86_EFLAGS_IF) |
479 | regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs)); | |
480 | if (eregs != regs) | |
481 | *regs = *eregs; | |
482 | return regs; | |
483 | } | |
9326638c | 484 | NOKPROBE_SYMBOL(sync_regs); |
081f75bb AH |
485 | #endif |
486 | ||
1da177e4 LT |
487 | /* |
488 | * Our handling of the processor debug registers is non-trivial. | |
489 | * We do not clear them on entry and exit from the kernel. Therefore | |
490 | * it is possible to get a watchpoint trap here from inside the kernel. | |
491 | * However, the code in ./ptrace.c has ensured that the user can | |
492 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
493 | * watchpoint trap can only occur in code which is reading/writing | |
494 | * from user space. Such code must not hold kernel locks (since it | |
495 | * can equally take a page fault), therefore it is safe to call | |
496 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 497 | * |
1da177e4 LT |
498 | * Code in ./signal.c ensures that the debug control register |
499 | * is restored before we deliver any signal, and therefore that | |
500 | * user code runs with the correct debug control register even though | |
501 | * we clear it here. | |
502 | * | |
503 | * Being careful here means that we don't have to be as careful in a | |
504 | * lot of more complicated places (task switching can be a bit lazy | |
505 | * about restoring all the debug state, and ptrace doesn't have to | |
506 | * find every occurrence of the TF bit that could be saved away even | |
507 | * by user code) | |
c1d518c8 AH |
508 | * |
509 | * May run on IST stack. | |
1da177e4 | 510 | */ |
9326638c | 511 | dotraplinkage void do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 512 | { |
1da177e4 | 513 | struct task_struct *tsk = current; |
6c1e0256 | 514 | enum ctx_state prev_state; |
a1e80faf | 515 | int user_icebp = 0; |
08d68323 | 516 | unsigned long dr6; |
da654b74 | 517 | int si_code; |
1da177e4 | 518 | |
4cdf77a8 MH |
519 | prev_state = exception_enter(); |
520 | ||
08d68323 | 521 | get_debugreg(dr6, 6); |
1da177e4 | 522 | |
40f9249a P |
523 | /* Filter out all the reserved bits which are preset to 1 */ |
524 | dr6 &= ~DR6_RESERVED; | |
525 | ||
a1e80faf FW |
526 | /* |
527 | * If dr6 has no reason to give us about the origin of this trap, | |
528 | * then it's very likely the result of an icebp/int01 trap. | |
529 | * User wants a sigtrap for that. | |
530 | */ | |
531 | if (!dr6 && user_mode(regs)) | |
532 | user_icebp = 1; | |
533 | ||
f8561296 | 534 | /* Catch kmemcheck conditions first of all! */ |
eadb8a09 | 535 | if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) |
6ba3c97a | 536 | goto exit; |
f8561296 | 537 | |
08d68323 P |
538 | /* DR6 may or may not be cleared by the CPU */ |
539 | set_debugreg(0, 6); | |
10faa81e | 540 | |
ea8e61b7 PZ |
541 | /* |
542 | * The processor cleared BTF, so don't mark that we need it set. | |
543 | */ | |
544 | clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); | |
545 | ||
08d68323 P |
546 | /* Store the virtualized DR6 value */ |
547 | tsk->thread.debugreg6 = dr6; | |
548 | ||
6f6343f5 MH |
549 | #ifdef CONFIG_KPROBES |
550 | if (kprobe_debug_handler(regs)) | |
551 | goto exit; | |
552 | #endif | |
553 | ||
5a802e15 | 554 | if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code, |
62edab90 | 555 | SIGTRAP) == NOTIFY_STOP) |
6ba3c97a | 556 | goto exit; |
3d2a71a5 | 557 | |
42181186 SR |
558 | /* |
559 | * Let others (NMI) know that the debug stack is in use | |
560 | * as we may switch to the interrupt stack. | |
561 | */ | |
562 | debug_stack_usage_inc(); | |
563 | ||
1da177e4 | 564 | /* It's safe to allow irq's after DR6 has been saved */ |
3d2a71a5 | 565 | preempt_conditional_sti(regs); |
1da177e4 | 566 | |
08d68323 | 567 | if (regs->flags & X86_VM_MASK) { |
c9408265 KC |
568 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, |
569 | X86_TRAP_DB); | |
6554287b | 570 | preempt_conditional_cli(regs); |
42181186 | 571 | debug_stack_usage_dec(); |
6ba3c97a | 572 | goto exit; |
1da177e4 LT |
573 | } |
574 | ||
1da177e4 | 575 | /* |
08d68323 P |
576 | * Single-stepping through system calls: ignore any exceptions in |
577 | * kernel space, but re-enable TF when returning to user mode. | |
578 | * | |
579 | * We already checked v86 mode above, so we can check for kernel mode | |
580 | * by just checking the CPL of CS. | |
1da177e4 | 581 | */ |
08d68323 P |
582 | if ((dr6 & DR_STEP) && !user_mode(regs)) { |
583 | tsk->thread.debugreg6 &= ~DR_STEP; | |
584 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
585 | regs->flags &= ~X86_EFLAGS_TF; | |
1da177e4 | 586 | } |
08d68323 | 587 | si_code = get_si_code(tsk->thread.debugreg6); |
a1e80faf | 588 | if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) |
08d68323 | 589 | send_sigtrap(tsk, regs, error_code, si_code); |
3d2a71a5 | 590 | preempt_conditional_cli(regs); |
42181186 | 591 | debug_stack_usage_dec(); |
1da177e4 | 592 | |
6ba3c97a | 593 | exit: |
6c1e0256 | 594 | exception_exit(prev_state); |
1da177e4 | 595 | } |
9326638c | 596 | NOKPROBE_SYMBOL(do_debug); |
1da177e4 LT |
597 | |
598 | /* | |
599 | * Note that we play around with the 'TS' bit in an attempt to get | |
600 | * the correct behaviour even in the presence of the asynchronous | |
601 | * IRQ13 behaviour | |
602 | */ | |
5e1b05be | 603 | static void math_error(struct pt_regs *regs, int error_code, int trapnr) |
1da177e4 | 604 | { |
e2e75c91 | 605 | struct task_struct *task = current; |
1da177e4 | 606 | siginfo_t info; |
9b6dba9e | 607 | unsigned short err; |
c9408265 KC |
608 | char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : |
609 | "simd exception"; | |
e2e75c91 BG |
610 | |
611 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | |
612 | return; | |
613 | conditional_sti(regs); | |
614 | ||
615 | if (!user_mode_vm(regs)) | |
616 | { | |
617 | if (!fixup_exception(regs)) { | |
618 | task->thread.error_code = error_code; | |
51e7dc70 | 619 | task->thread.trap_nr = trapnr; |
e2e75c91 BG |
620 | die(str, regs, error_code); |
621 | } | |
622 | return; | |
623 | } | |
1da177e4 LT |
624 | |
625 | /* | |
626 | * Save the info for the exception handler and clear the error. | |
627 | */ | |
1da177e4 | 628 | save_init_fpu(task); |
51e7dc70 | 629 | task->thread.trap_nr = trapnr; |
9b6dba9e | 630 | task->thread.error_code = error_code; |
1da177e4 LT |
631 | info.si_signo = SIGFPE; |
632 | info.si_errno = 0; | |
b02ef20a | 633 | info.si_addr = (void __user *)uprobe_get_trap_addr(regs); |
c9408265 | 634 | if (trapnr == X86_TRAP_MF) { |
9b6dba9e BG |
635 | unsigned short cwd, swd; |
636 | /* | |
637 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
638 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
639 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
640 | * fault bit. We should only be taking one exception at a time, | |
641 | * so if this combination doesn't produce any single exception, | |
642 | * then we have a bad program that isn't synchronizing its FPU usage | |
643 | * and it will suffer the consequences since we won't be able to | |
644 | * fully reproduce the context of the exception | |
645 | */ | |
646 | cwd = get_fpu_cwd(task); | |
647 | swd = get_fpu_swd(task); | |
adf77bac | 648 | |
9b6dba9e BG |
649 | err = swd & ~cwd; |
650 | } else { | |
651 | /* | |
652 | * The SIMD FPU exceptions are handled a little differently, as there | |
653 | * is only a single status/control register. Thus, to determine which | |
654 | * unmasked exception was caught we must mask the exception mask bits | |
655 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
656 | */ | |
657 | unsigned short mxcsr = get_fpu_mxcsr(task); | |
658 | err = ~(mxcsr >> 7) & mxcsr; | |
659 | } | |
adf77bac PA |
660 | |
661 | if (err & 0x001) { /* Invalid op */ | |
b5964405 IM |
662 | /* |
663 | * swd & 0x240 == 0x040: Stack Underflow | |
664 | * swd & 0x240 == 0x240: Stack Overflow | |
665 | * User must clear the SF bit (0x40) if set | |
666 | */ | |
667 | info.si_code = FPE_FLTINV; | |
adf77bac | 668 | } else if (err & 0x004) { /* Divide by Zero */ |
b5964405 | 669 | info.si_code = FPE_FLTDIV; |
adf77bac | 670 | } else if (err & 0x008) { /* Overflow */ |
b5964405 | 671 | info.si_code = FPE_FLTOVF; |
adf77bac PA |
672 | } else if (err & 0x012) { /* Denormal, Underflow */ |
673 | info.si_code = FPE_FLTUND; | |
674 | } else if (err & 0x020) { /* Precision */ | |
b5964405 | 675 | info.si_code = FPE_FLTRES; |
adf77bac | 676 | } else { |
bd8b96df | 677 | /* |
c9408265 KC |
678 | * If we're using IRQ 13, or supposedly even some trap |
679 | * X86_TRAP_MF implementations, it's possible | |
680 | * we get a spurious trap, which is not an error. | |
bd8b96df | 681 | */ |
c9408265 | 682 | return; |
1da177e4 LT |
683 | } |
684 | force_sig_info(SIGFPE, &info, task); | |
685 | } | |
686 | ||
e407d620 | 687 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 688 | { |
6c1e0256 FW |
689 | enum ctx_state prev_state; |
690 | ||
691 | prev_state = exception_enter(); | |
c9408265 | 692 | math_error(regs, error_code, X86_TRAP_MF); |
6c1e0256 | 693 | exception_exit(prev_state); |
1da177e4 LT |
694 | } |
695 | ||
e407d620 AH |
696 | dotraplinkage void |
697 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 698 | { |
6c1e0256 FW |
699 | enum ctx_state prev_state; |
700 | ||
701 | prev_state = exception_enter(); | |
c9408265 | 702 | math_error(regs, error_code, X86_TRAP_XF); |
6c1e0256 | 703 | exception_exit(prev_state); |
1da177e4 LT |
704 | } |
705 | ||
e407d620 AH |
706 | dotraplinkage void |
707 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 708 | { |
cf81978d | 709 | conditional_sti(regs); |
1da177e4 LT |
710 | #if 0 |
711 | /* No need to warn about this any longer. */ | |
c767a54b | 712 | pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); |
1da177e4 LT |
713 | #endif |
714 | } | |
715 | ||
2605fc21 | 716 | asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void) |
1da177e4 | 717 | { |
1da177e4 | 718 | } |
4efc0670 | 719 | |
2605fc21 | 720 | asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void) |
081f75bb AH |
721 | { |
722 | } | |
723 | ||
1da177e4 | 724 | /* |
b5964405 | 725 | * 'math_state_restore()' saves the current math information in the |
1da177e4 LT |
726 | * old math state array, and gets the new ones from the current task |
727 | * | |
728 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
729 | * Don't touch unless you *really* know how it works. | |
730 | * | |
be98c2cd LT |
731 | * Must be called with kernel preemption disabled (eg with local |
732 | * local interrupts as in the case of do_device_not_available). | |
1da177e4 | 733 | */ |
be98c2cd | 734 | void math_state_restore(void) |
1da177e4 | 735 | { |
f94edacf | 736 | struct task_struct *tsk = current; |
1da177e4 | 737 | |
aa283f49 SS |
738 | if (!tsk_used_math(tsk)) { |
739 | local_irq_enable(); | |
740 | /* | |
741 | * does a slab alloc which can sleep | |
742 | */ | |
743 | if (init_fpu(tsk)) { | |
744 | /* | |
745 | * ran out of memory! | |
746 | */ | |
747 | do_group_exit(SIGKILL); | |
748 | return; | |
749 | } | |
750 | local_irq_disable(); | |
751 | } | |
752 | ||
f94edacf | 753 | __thread_fpu_begin(tsk); |
304bceda | 754 | |
80ab6f1e LT |
755 | /* |
756 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | |
757 | */ | |
758 | if (unlikely(restore_fpu_checking(tsk))) { | |
304bceda | 759 | drop_init_fpu(tsk); |
38cad57b | 760 | force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk); |
80ab6f1e LT |
761 | return; |
762 | } | |
b3b0870e | 763 | |
c375f15a | 764 | tsk->thread.fpu_counter++; |
1da177e4 | 765 | } |
5992b6da | 766 | EXPORT_SYMBOL_GPL(math_state_restore); |
1da177e4 | 767 | |
9326638c | 768 | dotraplinkage void |
aa78bcfa | 769 | do_device_not_available(struct pt_regs *regs, long error_code) |
7643e9b9 | 770 | { |
6c1e0256 FW |
771 | enum ctx_state prev_state; |
772 | ||
773 | prev_state = exception_enter(); | |
5d2bd700 | 774 | BUG_ON(use_eager_fpu()); |
304bceda | 775 | |
a334fe43 | 776 | #ifdef CONFIG_MATH_EMULATION |
7643e9b9 | 777 | if (read_cr0() & X86_CR0_EM) { |
d315760f TH |
778 | struct math_emu_info info = { }; |
779 | ||
7643e9b9 | 780 | conditional_sti(regs); |
d315760f | 781 | |
aa78bcfa | 782 | info.regs = regs; |
d315760f | 783 | math_emulate(&info); |
6c1e0256 | 784 | exception_exit(prev_state); |
a334fe43 | 785 | return; |
7643e9b9 | 786 | } |
a334fe43 BG |
787 | #endif |
788 | math_state_restore(); /* interrupts still off */ | |
789 | #ifdef CONFIG_X86_32 | |
790 | conditional_sti(regs); | |
081f75bb | 791 | #endif |
6c1e0256 | 792 | exception_exit(prev_state); |
7643e9b9 | 793 | } |
9326638c | 794 | NOKPROBE_SYMBOL(do_device_not_available); |
7643e9b9 | 795 | |
081f75bb | 796 | #ifdef CONFIG_X86_32 |
e407d620 | 797 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
798 | { |
799 | siginfo_t info; | |
6c1e0256 | 800 | enum ctx_state prev_state; |
6ba3c97a | 801 | |
6c1e0256 | 802 | prev_state = exception_enter(); |
f8e0870f AH |
803 | local_irq_enable(); |
804 | ||
805 | info.si_signo = SIGILL; | |
806 | info.si_errno = 0; | |
807 | info.si_code = ILL_BADSTK; | |
fc6fcdfb | 808 | info.si_addr = NULL; |
c9408265 | 809 | if (notify_die(DIE_TRAP, "iret exception", regs, error_code, |
6ba3c97a FW |
810 | X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) { |
811 | do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, | |
812 | &info); | |
813 | } | |
6c1e0256 | 814 | exception_exit(prev_state); |
f8e0870f | 815 | } |
081f75bb | 816 | #endif |
f8e0870f | 817 | |
29c84391 JK |
818 | /* Set of traps needed for early debugging. */ |
819 | void __init early_trap_init(void) | |
820 | { | |
c9408265 | 821 | set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); |
29c84391 | 822 | /* int3 can be called from all */ |
c9408265 | 823 | set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); |
8170e6be | 824 | #ifdef CONFIG_X86_32 |
25c74b10 | 825 | set_intr_gate(X86_TRAP_PF, page_fault); |
8170e6be | 826 | #endif |
29c84391 JK |
827 | load_idt(&idt_descr); |
828 | } | |
829 | ||
8170e6be PA |
830 | void __init early_trap_pf_init(void) |
831 | { | |
832 | #ifdef CONFIG_X86_64 | |
25c74b10 | 833 | set_intr_gate(X86_TRAP_PF, page_fault); |
8170e6be PA |
834 | #endif |
835 | } | |
836 | ||
1da177e4 LT |
837 | void __init trap_init(void) |
838 | { | |
dbeb2be2 RR |
839 | int i; |
840 | ||
1da177e4 | 841 | #ifdef CONFIG_EISA |
927222b1 | 842 | void __iomem *p = early_ioremap(0x0FFFD9, 4); |
b5964405 IM |
843 | |
844 | if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) | |
1da177e4 | 845 | EISA_bus = 1; |
927222b1 | 846 | early_iounmap(p, 4); |
1da177e4 LT |
847 | #endif |
848 | ||
25c74b10 | 849 | set_intr_gate(X86_TRAP_DE, divide_error); |
c9408265 | 850 | set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK); |
699d2937 | 851 | /* int4 can be called from all */ |
c9408265 | 852 | set_system_intr_gate(X86_TRAP_OF, &overflow); |
25c74b10 SA |
853 | set_intr_gate(X86_TRAP_BR, bounds); |
854 | set_intr_gate(X86_TRAP_UD, invalid_op); | |
855 | set_intr_gate(X86_TRAP_NM, device_not_available); | |
081f75bb | 856 | #ifdef CONFIG_X86_32 |
c9408265 | 857 | set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS); |
081f75bb | 858 | #else |
c9408265 | 859 | set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK); |
081f75bb | 860 | #endif |
25c74b10 SA |
861 | set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun); |
862 | set_intr_gate(X86_TRAP_TS, invalid_TSS); | |
863 | set_intr_gate(X86_TRAP_NP, segment_not_present); | |
c9408265 | 864 | set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK); |
25c74b10 SA |
865 | set_intr_gate(X86_TRAP_GP, general_protection); |
866 | set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug); | |
867 | set_intr_gate(X86_TRAP_MF, coprocessor_error); | |
868 | set_intr_gate(X86_TRAP_AC, alignment_check); | |
1da177e4 | 869 | #ifdef CONFIG_X86_MCE |
c9408265 | 870 | set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK); |
1da177e4 | 871 | #endif |
25c74b10 | 872 | set_intr_gate(X86_TRAP_XF, simd_coprocessor_error); |
1da177e4 | 873 | |
bb3f0b59 YL |
874 | /* Reserve all the builtin and the syscall vector: */ |
875 | for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) | |
876 | set_bit(i, used_vectors); | |
877 | ||
081f75bb AH |
878 | #ifdef CONFIG_IA32_EMULATION |
879 | set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall); | |
bb3f0b59 | 880 | set_bit(IA32_SYSCALL_VECTOR, used_vectors); |
081f75bb AH |
881 | #endif |
882 | ||
883 | #ifdef CONFIG_X86_32 | |
699d2937 | 884 | set_system_trap_gate(SYSCALL_VECTOR, &system_call); |
dbeb2be2 | 885 | set_bit(SYSCALL_VECTOR, used_vectors); |
081f75bb | 886 | #endif |
bb3f0b59 | 887 | |
4eefbe79 KC |
888 | /* |
889 | * Set the IDT descriptor to a fixed read-only location, so that the | |
890 | * "sidt" instruction will not leak the location of the kernel, and | |
891 | * to defend the IDT against arbitrary memory write vulnerabilities. | |
892 | * It will be reloaded in cpu_init() */ | |
893 | __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO); | |
894 | idt_descr.address = fix_to_virt(FIX_RO_IDT); | |
895 | ||
1da177e4 | 896 | /* |
b5964405 | 897 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
898 | */ |
899 | cpu_init(); | |
900 | ||
428cf902 | 901 | x86_init.irqs.trap_init(); |
228bdaa9 SR |
902 | |
903 | #ifdef CONFIG_X86_64 | |
629f4f9d | 904 | memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16); |
c9408265 KC |
905 | set_nmi_gate(X86_TRAP_DB, &debug); |
906 | set_nmi_gate(X86_TRAP_BP, &int3); | |
228bdaa9 | 907 | #endif |
1da177e4 | 908 | } |