Commit | Line | Data |
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7ce0bcfd ZA |
1 | /* |
2 | * VMI specific paravirt-ops implementation | |
3 | * | |
4 | * Copyright (C) 2005, VMware, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
14 | * NON INFRINGEMENT. See the GNU General Public License for more | |
15 | * details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | * | |
21 | * Send feedback to zach@vmware.com | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
7ce0bcfd ZA |
26 | #include <linux/cpu.h> |
27 | #include <linux/bootmem.h> | |
28 | #include <linux/mm.h> | |
eeef9c68 | 29 | #include <linux/highmem.h> |
fa0aa866 | 30 | #include <linux/sched.h> |
7ce0bcfd ZA |
31 | #include <asm/vmi.h> |
32 | #include <asm/io.h> | |
33 | #include <asm/fixmap.h> | |
34 | #include <asm/apicdef.h> | |
35 | #include <asm/apic.h> | |
36 | #include <asm/processor.h> | |
37 | #include <asm/timer.h> | |
bbab4f3b | 38 | #include <asm/vmi_time.h> |
8f485612 | 39 | #include <asm/kmap_types.h> |
31343d8a | 40 | #include <asm/setup.h> |
7ce0bcfd ZA |
41 | |
42 | /* Convenient for calling VMI functions indirectly in the ROM */ | |
43 | typedef u32 __attribute__((regparm(1))) (VROMFUNC)(void); | |
44 | typedef u64 __attribute__((regparm(2))) (VROMLONGFUNC)(int); | |
45 | ||
46 | #define call_vrom_func(rom,func) \ | |
47 | (((VROMFUNC *)(rom->func))()) | |
48 | ||
49 | #define call_vrom_long_func(rom,func,arg) \ | |
50 | (((VROMLONGFUNC *)(rom->func)) (arg)) | |
51 | ||
52 | static struct vrom_header *vmi_rom; | |
7ce0bcfd ZA |
53 | static int disable_pge; |
54 | static int disable_pse; | |
55 | static int disable_sep; | |
56 | static int disable_tsc; | |
57 | static int disable_mtrr; | |
7507ba34 | 58 | static int disable_noidle; |
772205f6 | 59 | static int disable_vmi_timer; |
7ce0bcfd ZA |
60 | |
61 | /* Cached VMI operations */ | |
30a1528d | 62 | static struct { |
7ce0bcfd ZA |
63 | void (*cpuid)(void /* non-c */); |
64 | void (*_set_ldt)(u32 selector); | |
65 | void (*set_tr)(u32 selector); | |
8d947344 | 66 | void (*write_idt_entry)(struct desc_struct *, int, u32, u32); |
014b15be | 67 | void (*write_gdt_entry)(struct desc_struct *, int, u32, u32); |
75b8bb3e | 68 | void (*write_ldt_entry)(struct desc_struct *, int, u32, u32); |
faca6227 | 69 | void (*set_kernel_stack)(u32 selector, u32 sp0); |
7ce0bcfd ZA |
70 | void (*allocate_page)(u32, u32, u32, u32, u32); |
71 | void (*release_page)(u32, u32); | |
72 | void (*set_pte)(pte_t, pte_t *, unsigned); | |
73 | void (*update_pte)(pte_t *, unsigned); | |
eeef9c68 ZA |
74 | void (*set_linear_mapping)(int, void *, u32, u32); |
75 | void (*_flush_tlb)(int); | |
7ce0bcfd | 76 | void (*set_initial_ap_state)(int, int); |
bbab4f3b | 77 | void (*halt)(void); |
49f19710 | 78 | void (*set_lazy_mode)(int mode); |
7ce0bcfd ZA |
79 | } vmi_ops; |
80 | ||
e0bb8643 ZA |
81 | /* Cached VMI operations */ |
82 | struct vmi_timer_ops vmi_timer_ops; | |
83 | ||
7ce0bcfd ZA |
84 | /* |
85 | * VMI patching routines. | |
86 | */ | |
87 | #define MNEM_CALL 0xe8 | |
88 | #define MNEM_JMP 0xe9 | |
89 | #define MNEM_RET 0xc3 | |
90 | ||
7ce0bcfd ZA |
91 | #define IRQ_PATCH_INT_MASK 0 |
92 | #define IRQ_PATCH_DISABLE 5 | |
93 | ||
ab144f5e | 94 | static inline void patch_offset(void *insnbuf, |
65ea5b03 | 95 | unsigned long ip, unsigned long dest) |
7ce0bcfd | 96 | { |
65ea5b03 | 97 | *(unsigned long *)(insnbuf+1) = dest-ip-5; |
7ce0bcfd ZA |
98 | } |
99 | ||
ab144f5e | 100 | static unsigned patch_internal(int call, unsigned len, void *insnbuf, |
65ea5b03 | 101 | unsigned long ip) |
7ce0bcfd ZA |
102 | { |
103 | u64 reloc; | |
104 | struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc; | |
105 | reloc = call_vrom_long_func(vmi_rom, get_reloc, call); | |
106 | switch(rel->type) { | |
107 | case VMI_RELOCATION_CALL_REL: | |
108 | BUG_ON(len < 5); | |
ab144f5e | 109 | *(char *)insnbuf = MNEM_CALL; |
65ea5b03 | 110 | patch_offset(insnbuf, ip, (unsigned long)rel->eip); |
7ce0bcfd ZA |
111 | return 5; |
112 | ||
113 | case VMI_RELOCATION_JUMP_REL: | |
114 | BUG_ON(len < 5); | |
ab144f5e | 115 | *(char *)insnbuf = MNEM_JMP; |
65ea5b03 | 116 | patch_offset(insnbuf, ip, (unsigned long)rel->eip); |
7ce0bcfd ZA |
117 | return 5; |
118 | ||
119 | case VMI_RELOCATION_NOP: | |
120 | /* obliterate the whole thing */ | |
121 | return 0; | |
122 | ||
123 | case VMI_RELOCATION_NONE: | |
124 | /* leave native code in place */ | |
125 | break; | |
126 | ||
127 | default: | |
128 | BUG(); | |
129 | } | |
130 | return len; | |
131 | } | |
132 | ||
133 | /* | |
134 | * Apply patch if appropriate, return length of new instruction | |
135 | * sequence. The callee does nop padding for us. | |
136 | */ | |
ab144f5e | 137 | static unsigned vmi_patch(u8 type, u16 clobbers, void *insns, |
65ea5b03 | 138 | unsigned long ip, unsigned len) |
7ce0bcfd ZA |
139 | { |
140 | switch (type) { | |
93b1eab3 | 141 | case PARAVIRT_PATCH(pv_irq_ops.irq_disable): |
ab144f5e | 142 | return patch_internal(VMI_CALL_DisableInterrupts, len, |
65ea5b03 | 143 | insns, ip); |
93b1eab3 | 144 | case PARAVIRT_PATCH(pv_irq_ops.irq_enable): |
ab144f5e | 145 | return patch_internal(VMI_CALL_EnableInterrupts, len, |
65ea5b03 | 146 | insns, ip); |
93b1eab3 | 147 | case PARAVIRT_PATCH(pv_irq_ops.restore_fl): |
ab144f5e | 148 | return patch_internal(VMI_CALL_SetInterruptMask, len, |
65ea5b03 | 149 | insns, ip); |
93b1eab3 | 150 | case PARAVIRT_PATCH(pv_irq_ops.save_fl): |
ab144f5e | 151 | return patch_internal(VMI_CALL_GetInterruptMask, len, |
65ea5b03 | 152 | insns, ip); |
93b1eab3 | 153 | case PARAVIRT_PATCH(pv_cpu_ops.iret): |
65ea5b03 | 154 | return patch_internal(VMI_CALL_IRET, len, insns, ip); |
d75cd22f | 155 | case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit): |
65ea5b03 | 156 | return patch_internal(VMI_CALL_SYSEXIT, len, insns, ip); |
7ce0bcfd ZA |
157 | default: |
158 | break; | |
159 | } | |
160 | return len; | |
161 | } | |
162 | ||
163 | /* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */ | |
65ea5b03 PA |
164 | static void vmi_cpuid(unsigned int *ax, unsigned int *bx, |
165 | unsigned int *cx, unsigned int *dx) | |
7ce0bcfd ZA |
166 | { |
167 | int override = 0; | |
65ea5b03 | 168 | if (*ax == 1) |
7ce0bcfd ZA |
169 | override = 1; |
170 | asm volatile ("call *%6" | |
65ea5b03 PA |
171 | : "=a" (*ax), |
172 | "=b" (*bx), | |
173 | "=c" (*cx), | |
174 | "=d" (*dx) | |
175 | : "0" (*ax), "2" (*cx), "r" (vmi_ops.cpuid)); | |
7ce0bcfd ZA |
176 | if (override) { |
177 | if (disable_pse) | |
65ea5b03 | 178 | *dx &= ~X86_FEATURE_PSE; |
7ce0bcfd | 179 | if (disable_pge) |
65ea5b03 | 180 | *dx &= ~X86_FEATURE_PGE; |
7ce0bcfd | 181 | if (disable_sep) |
65ea5b03 | 182 | *dx &= ~X86_FEATURE_SEP; |
7ce0bcfd | 183 | if (disable_tsc) |
65ea5b03 | 184 | *dx &= ~X86_FEATURE_TSC; |
7ce0bcfd | 185 | if (disable_mtrr) |
65ea5b03 | 186 | *dx &= ~X86_FEATURE_MTRR; |
7ce0bcfd ZA |
187 | } |
188 | } | |
189 | ||
190 | static inline void vmi_maybe_load_tls(struct desc_struct *gdt, int nr, struct desc_struct *new) | |
191 | { | |
192 | if (gdt[nr].a != new->a || gdt[nr].b != new->b) | |
014b15be | 193 | write_gdt_entry(gdt, nr, new, 0); |
7ce0bcfd ZA |
194 | } |
195 | ||
196 | static void vmi_load_tls(struct thread_struct *t, unsigned int cpu) | |
197 | { | |
198 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
199 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0]); | |
200 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1]); | |
201 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2]); | |
202 | } | |
203 | ||
204 | static void vmi_set_ldt(const void *addr, unsigned entries) | |
205 | { | |
206 | unsigned cpu = smp_processor_id(); | |
014b15be | 207 | struct desc_struct desc; |
7ce0bcfd | 208 | |
014b15be | 209 | pack_descriptor(&desc, (unsigned long)addr, |
7ce0bcfd | 210 | entries * sizeof(struct desc_struct) - 1, |
014b15be GOC |
211 | DESC_LDT, 0); |
212 | write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, &desc, DESC_LDT); | |
7ce0bcfd ZA |
213 | vmi_ops._set_ldt(entries ? GDT_ENTRY_LDT*sizeof(struct desc_struct) : 0); |
214 | } | |
215 | ||
216 | static void vmi_set_tr(void) | |
217 | { | |
218 | vmi_ops.set_tr(GDT_ENTRY_TSS*sizeof(struct desc_struct)); | |
219 | } | |
220 | ||
8d947344 GOC |
221 | static void vmi_write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) |
222 | { | |
223 | u32 *idt_entry = (u32 *)g; | |
262d5ee2 | 224 | vmi_ops.write_idt_entry(dt, entry, idt_entry[0], idt_entry[1]); |
8d947344 GOC |
225 | } |
226 | ||
014b15be GOC |
227 | static void vmi_write_gdt_entry(struct desc_struct *dt, int entry, |
228 | const void *desc, int type) | |
229 | { | |
230 | u32 *gdt_entry = (u32 *)desc; | |
262d5ee2 | 231 | vmi_ops.write_gdt_entry(dt, entry, gdt_entry[0], gdt_entry[1]); |
014b15be GOC |
232 | } |
233 | ||
75b8bb3e GOC |
234 | static void vmi_write_ldt_entry(struct desc_struct *dt, int entry, |
235 | const void *desc) | |
236 | { | |
237 | u32 *ldt_entry = (u32 *)desc; | |
de59985e | 238 | vmi_ops.write_ldt_entry(dt, entry, ldt_entry[0], ldt_entry[1]); |
75b8bb3e GOC |
239 | } |
240 | ||
faca6227 | 241 | static void vmi_load_sp0(struct tss_struct *tss, |
7ce0bcfd ZA |
242 | struct thread_struct *thread) |
243 | { | |
faca6227 | 244 | tss->x86_tss.sp0 = thread->sp0; |
7ce0bcfd ZA |
245 | |
246 | /* This can only happen when SEP is enabled, no need to test "SEP"arately */ | |
a75c54f9 RR |
247 | if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) { |
248 | tss->x86_tss.ss1 = thread->sysenter_cs; | |
7ce0bcfd ZA |
249 | wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); |
250 | } | |
faca6227 | 251 | vmi_ops.set_kernel_stack(__KERNEL_DS, tss->x86_tss.sp0); |
7ce0bcfd ZA |
252 | } |
253 | ||
254 | static void vmi_flush_tlb_user(void) | |
255 | { | |
eeef9c68 | 256 | vmi_ops._flush_tlb(VMI_FLUSH_TLB); |
7ce0bcfd ZA |
257 | } |
258 | ||
259 | static void vmi_flush_tlb_kernel(void) | |
260 | { | |
eeef9c68 | 261 | vmi_ops._flush_tlb(VMI_FLUSH_TLB | VMI_FLUSH_GLOBAL); |
7ce0bcfd ZA |
262 | } |
263 | ||
264 | /* Stub to do nothing at all; used for delays and unimplemented calls */ | |
265 | static void vmi_nop(void) | |
266 | { | |
267 | } | |
268 | ||
eeef9c68 ZA |
269 | #ifdef CONFIG_HIGHPTE |
270 | static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type) | |
9a1c13e9 | 271 | { |
eeef9c68 ZA |
272 | void *va = kmap_atomic(page, type); |
273 | ||
9a1c13e9 ZA |
274 | /* |
275 | * Internally, the VMI ROM must map virtual addresses to physical | |
276 | * addresses for processing MMU updates. By the time MMU updates | |
277 | * are issued, this information is typically already lost. | |
278 | * Fortunately, the VMI provides a cache of mapping slots for active | |
279 | * page tables. | |
280 | * | |
281 | * We use slot zero for the linear mapping of physical memory, and | |
282 | * in HIGHPTE kernels, slot 1 and 2 for KM_PTE0 and KM_PTE1. | |
283 | * | |
284 | * args: SLOT VA COUNT PFN | |
285 | */ | |
286 | BUG_ON(type != KM_PTE0 && type != KM_PTE1); | |
eeef9c68 ZA |
287 | vmi_ops.set_linear_mapping((type - KM_PTE0)+1, va, 1, page_to_pfn(page)); |
288 | ||
289 | return va; | |
9a1c13e9 | 290 | } |
eeef9c68 | 291 | #endif |
9a1c13e9 | 292 | |
f8639939 | 293 | static void vmi_allocate_pte(struct mm_struct *mm, unsigned long pfn) |
7ce0bcfd | 294 | { |
7ce0bcfd ZA |
295 | vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0); |
296 | } | |
297 | ||
f8639939 | 298 | static void vmi_allocate_pmd(struct mm_struct *mm, unsigned long pfn) |
7ce0bcfd ZA |
299 | { |
300 | /* | |
301 | * This call comes in very early, before mem_map is setup. | |
302 | * It is called only for swapper_pg_dir, which already has | |
303 | * data on it. | |
304 | */ | |
7ce0bcfd ZA |
305 | vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0); |
306 | } | |
307 | ||
f8639939 | 308 | static void vmi_allocate_pmd_clone(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count) |
7ce0bcfd | 309 | { |
7ce0bcfd ZA |
310 | vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count); |
311 | } | |
312 | ||
f8639939 | 313 | static void vmi_release_pte(unsigned long pfn) |
7ce0bcfd ZA |
314 | { |
315 | vmi_ops.release_page(pfn, VMI_PAGE_L1); | |
7ce0bcfd ZA |
316 | } |
317 | ||
f8639939 | 318 | static void vmi_release_pmd(unsigned long pfn) |
7ce0bcfd ZA |
319 | { |
320 | vmi_ops.release_page(pfn, VMI_PAGE_L2); | |
7ce0bcfd ZA |
321 | } |
322 | ||
323 | /* | |
324 | * Helper macros for MMU update flags. We can defer updates until a flush | |
325 | * or page invalidation only if the update is to the current address space | |
326 | * (otherwise, there is no flush). We must check against init_mm, since | |
327 | * this could be a kernel update, which usually passes init_mm, although | |
328 | * sometimes this check can be skipped if we know the particular function | |
329 | * is only called on user mode PTEs. We could change the kernel to pass | |
330 | * current->active_mm here, but in particular, I was unsure if changing | |
331 | * mm/highmem.c to do this would still be correct on other architectures. | |
332 | */ | |
333 | #define is_current_as(mm, mustbeuser) ((mm) == current->active_mm || \ | |
334 | (!mustbeuser && (mm) == &init_mm)) | |
335 | #define vmi_flags_addr(mm, addr, level, user) \ | |
336 | ((level) | (is_current_as(mm, user) ? \ | |
337 | (VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0)) | |
338 | #define vmi_flags_addr_defer(mm, addr, level, user) \ | |
339 | ((level) | (is_current_as(mm, user) ? \ | |
340 | (VMI_PAGE_DEFER | VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0)) | |
341 | ||
3dc494e8 | 342 | static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
7ce0bcfd | 343 | { |
7ce0bcfd ZA |
344 | vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); |
345 | } | |
346 | ||
3dc494e8 | 347 | static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
7ce0bcfd | 348 | { |
7ce0bcfd ZA |
349 | vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0)); |
350 | } | |
351 | ||
352 | static void vmi_set_pte(pte_t *ptep, pte_t pte) | |
353 | { | |
354 | /* XXX because of set_pmd_pte, this can be called on PT or PD layers */ | |
7ce0bcfd ZA |
355 | vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT); |
356 | } | |
357 | ||
3dc494e8 | 358 | static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) |
7ce0bcfd | 359 | { |
7ce0bcfd ZA |
360 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); |
361 | } | |
362 | ||
363 | static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
364 | { | |
365 | #ifdef CONFIG_X86_PAE | |
e3328701 | 366 | const pte_t pte = { .pte = pmdval.pmd }; |
7ce0bcfd ZA |
367 | #else |
368 | const pte_t pte = { pmdval.pud.pgd.pgd }; | |
7ce0bcfd ZA |
369 | #endif |
370 | vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD); | |
371 | } | |
372 | ||
373 | #ifdef CONFIG_X86_PAE | |
374 | ||
375 | static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval) | |
376 | { | |
377 | /* | |
378 | * XXX This is called from set_pmd_pte, but at both PT | |
379 | * and PD layers so the VMI_PAGE_PT flag is wrong. But | |
380 | * it is only called for large page mapping changes, | |
381 | * the Xen backend, doesn't support large pages, and the | |
382 | * ESX backend doesn't depend on the flag. | |
383 | */ | |
384 | set_64bit((unsigned long long *)ptep,pte_val(pteval)); | |
385 | vmi_ops.update_pte(ptep, VMI_PAGE_PT); | |
386 | } | |
387 | ||
388 | static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) | |
389 | { | |
7ce0bcfd ZA |
390 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1)); |
391 | } | |
392 | ||
393 | static void vmi_set_pud(pud_t *pudp, pud_t pudval) | |
394 | { | |
395 | /* Um, eww */ | |
e3328701 | 396 | const pte_t pte = { .pte = pudval.pgd.pgd }; |
7ce0bcfd ZA |
397 | vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP); |
398 | } | |
399 | ||
400 | static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
401 | { | |
e3328701 | 402 | const pte_t pte = { .pte = 0 }; |
7ce0bcfd ZA |
403 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); |
404 | } | |
405 | ||
8eb68fae | 406 | static void vmi_pmd_clear(pmd_t *pmd) |
7ce0bcfd | 407 | { |
e3328701 | 408 | const pte_t pte = { .pte = 0 }; |
7ce0bcfd ZA |
409 | vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD); |
410 | } | |
411 | #endif | |
412 | ||
413 | #ifdef CONFIG_SMP | |
c6b36e9a | 414 | static void __devinit |
7ce0bcfd ZA |
415 | vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip, |
416 | unsigned long start_esp) | |
417 | { | |
c6b36e9a ZA |
418 | struct vmi_ap_state ap; |
419 | ||
7ce0bcfd ZA |
420 | /* Default everything to zero. This is fine for most GPRs. */ |
421 | memset(&ap, 0, sizeof(struct vmi_ap_state)); | |
422 | ||
423 | ap.gdtr_limit = GDT_SIZE - 1; | |
424 | ap.gdtr_base = (unsigned long) get_cpu_gdt_table(phys_apicid); | |
425 | ||
426 | ap.idtr_limit = IDT_ENTRIES * 8 - 1; | |
427 | ap.idtr_base = (unsigned long) idt_table; | |
428 | ||
429 | ap.ldtr = 0; | |
430 | ||
431 | ap.cs = __KERNEL_CS; | |
432 | ap.eip = (unsigned long) start_eip; | |
433 | ap.ss = __KERNEL_DS; | |
434 | ap.esp = (unsigned long) start_esp; | |
435 | ||
436 | ap.ds = __USER_DS; | |
437 | ap.es = __USER_DS; | |
7c3576d2 | 438 | ap.fs = __KERNEL_PERCPU; |
7ce0bcfd ZA |
439 | ap.gs = 0; |
440 | ||
441 | ap.eflags = 0; | |
442 | ||
7ce0bcfd ZA |
443 | #ifdef CONFIG_X86_PAE |
444 | /* efer should match BSP efer. */ | |
445 | if (cpu_has_nx) { | |
446 | unsigned l, h; | |
447 | rdmsr(MSR_EFER, l, h); | |
448 | ap.efer = (unsigned long long) h << 32 | l; | |
449 | } | |
450 | #endif | |
451 | ||
452 | ap.cr3 = __pa(swapper_pg_dir); | |
453 | /* Protected mode, paging, AM, WP, NE, MP. */ | |
454 | ap.cr0 = 0x80050023; | |
455 | ap.cr4 = mmu_cr4_features; | |
c6b36e9a | 456 | vmi_ops.set_initial_ap_state((u32)&ap, phys_apicid); |
7ce0bcfd ZA |
457 | } |
458 | #endif | |
459 | ||
8965c1c0 | 460 | static void vmi_enter_lazy_cpu(void) |
49f19710 | 461 | { |
8965c1c0 JF |
462 | paravirt_enter_lazy_cpu(); |
463 | vmi_ops.set_lazy_mode(2); | |
464 | } | |
49f19710 | 465 | |
8965c1c0 JF |
466 | static void vmi_enter_lazy_mmu(void) |
467 | { | |
468 | paravirt_enter_lazy_mmu(); | |
469 | vmi_ops.set_lazy_mode(1); | |
470 | } | |
49f19710 | 471 | |
8965c1c0 JF |
472 | static void vmi_leave_lazy(void) |
473 | { | |
474 | paravirt_leave_lazy(paravirt_get_lazy_mode()); | |
475 | vmi_ops.set_lazy_mode(0); | |
49f19710 ZA |
476 | } |
477 | ||
7ce0bcfd ZA |
478 | static inline int __init check_vmi_rom(struct vrom_header *rom) |
479 | { | |
480 | struct pci_header *pci; | |
481 | struct pnp_header *pnp; | |
482 | const char *manufacturer = "UNKNOWN"; | |
483 | const char *product = "UNKNOWN"; | |
484 | const char *license = "unspecified"; | |
485 | ||
486 | if (rom->rom_signature != 0xaa55) | |
487 | return 0; | |
488 | if (rom->vrom_signature != VMI_SIGNATURE) | |
489 | return 0; | |
490 | if (rom->api_version_maj != VMI_API_REV_MAJOR || | |
491 | rom->api_version_min+1 < VMI_API_REV_MINOR+1) { | |
492 | printk(KERN_WARNING "VMI: Found mismatched rom version %d.%d\n", | |
493 | rom->api_version_maj, | |
494 | rom->api_version_min); | |
495 | return 0; | |
496 | } | |
497 | ||
498 | /* | |
499 | * Relying on the VMI_SIGNATURE field is not 100% safe, so check | |
500 | * the PCI header and device type to make sure this is really a | |
501 | * VMI device. | |
502 | */ | |
503 | if (!rom->pci_header_offs) { | |
504 | printk(KERN_WARNING "VMI: ROM does not contain PCI header.\n"); | |
505 | return 0; | |
506 | } | |
507 | ||
508 | pci = (struct pci_header *)((char *)rom+rom->pci_header_offs); | |
509 | if (pci->vendorID != PCI_VENDOR_ID_VMWARE || | |
510 | pci->deviceID != PCI_DEVICE_ID_VMWARE_VMI) { | |
511 | /* Allow it to run... anyways, but warn */ | |
512 | printk(KERN_WARNING "VMI: ROM from unknown manufacturer\n"); | |
513 | } | |
514 | ||
515 | if (rom->pnp_header_offs) { | |
516 | pnp = (struct pnp_header *)((char *)rom+rom->pnp_header_offs); | |
517 | if (pnp->manufacturer_offset) | |
518 | manufacturer = (const char *)rom+pnp->manufacturer_offset; | |
519 | if (pnp->product_offset) | |
520 | product = (const char *)rom+pnp->product_offset; | |
521 | } | |
522 | ||
523 | if (rom->license_offs) | |
524 | license = (char *)rom+rom->license_offs; | |
525 | ||
526 | printk(KERN_INFO "VMI: Found %s %s, API version %d.%d, ROM version %d.%d\n", | |
527 | manufacturer, product, | |
528 | rom->api_version_maj, rom->api_version_min, | |
529 | pci->rom_version_maj, pci->rom_version_min); | |
530 | ||
302cf930 AK |
531 | /* Don't allow BSD/MIT here for now because we don't want to end up |
532 | with any binary only shim layers */ | |
533 | if (strcmp(license, "GPL") && strcmp(license, "GPL v2")) { | |
534 | printk(KERN_WARNING "VMI: Non GPL license `%s' found for ROM. Not used.\n", | |
535 | license); | |
536 | return 0; | |
537 | } | |
538 | ||
7ce0bcfd ZA |
539 | return 1; |
540 | } | |
541 | ||
542 | /* | |
543 | * Probe for the VMI option ROM | |
544 | */ | |
545 | static inline int __init probe_vmi_rom(void) | |
546 | { | |
547 | unsigned long base; | |
548 | ||
549 | /* VMI ROM is in option ROM area, check signature */ | |
550 | for (base = 0xC0000; base < 0xE0000; base += 2048) { | |
551 | struct vrom_header *romstart; | |
552 | romstart = (struct vrom_header *)isa_bus_to_virt(base); | |
553 | if (check_vmi_rom(romstart)) { | |
554 | vmi_rom = romstart; | |
555 | return 1; | |
556 | } | |
557 | } | |
558 | return 0; | |
559 | } | |
560 | ||
561 | /* | |
562 | * VMI setup common to all processors | |
563 | */ | |
564 | void vmi_bringup(void) | |
565 | { | |
566 | /* We must establish the lowmem mapping for MMU ops to work */ | |
772205f6 | 567 | if (vmi_ops.set_linear_mapping) |
31343d8a | 568 | vmi_ops.set_linear_mapping(0, (void *)__PAGE_OFFSET, MAXMEM_PFN, 0); |
7ce0bcfd ZA |
569 | } |
570 | ||
571 | /* | |
772205f6 | 572 | * Return a pointer to a VMI function or NULL if unimplemented |
7ce0bcfd ZA |
573 | */ |
574 | static void *vmi_get_function(int vmicall) | |
575 | { | |
576 | u64 reloc; | |
577 | const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc; | |
578 | reloc = call_vrom_long_func(vmi_rom, get_reloc, vmicall); | |
579 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); | |
580 | if (rel->type == VMI_RELOCATION_CALL_REL) | |
581 | return (void *)rel->eip; | |
582 | else | |
772205f6 | 583 | return NULL; |
7ce0bcfd ZA |
584 | } |
585 | ||
586 | /* | |
587 | * Helper macro for making the VMI paravirt-ops fill code readable. | |
772205f6 ZA |
588 | * For unimplemented operations, fall back to default, unless nop |
589 | * is returned by the ROM. | |
7ce0bcfd ZA |
590 | */ |
591 | #define para_fill(opname, vmicall) \ | |
592 | do { \ | |
593 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ | |
594 | VMI_CALL_##vmicall); \ | |
0492c371 | 595 | if (rel->type == VMI_RELOCATION_CALL_REL) \ |
93b1eab3 | 596 | opname = (void *)rel->eip; \ |
0492c371 | 597 | else if (rel->type == VMI_RELOCATION_NOP) \ |
93b1eab3 | 598 | opname = (void *)vmi_nop; \ |
0492c371 ZA |
599 | else if (rel->type != VMI_RELOCATION_NONE) \ |
600 | printk(KERN_WARNING "VMI: Unknown relocation " \ | |
601 | "type %d for " #vmicall"\n",\ | |
602 | rel->type); \ | |
772205f6 ZA |
603 | } while (0) |
604 | ||
605 | /* | |
606 | * Helper macro for making the VMI paravirt-ops fill code readable. | |
607 | * For cached operations which do not match the VMI ROM ABI and must | |
608 | * go through a tranlation stub. Ignore NOPs, since it is not clear | |
609 | * a NOP * VMI function corresponds to a NOP paravirt-op when the | |
610 | * functions are not in 1-1 correspondence. | |
611 | */ | |
612 | #define para_wrap(opname, wrapper, cache, vmicall) \ | |
613 | do { \ | |
614 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ | |
615 | VMI_CALL_##vmicall); \ | |
616 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); \ | |
617 | if (rel->type == VMI_RELOCATION_CALL_REL) { \ | |
93b1eab3 | 618 | opname = wrapper; \ |
772205f6 | 619 | vmi_ops.cache = (void *)rel->eip; \ |
7ce0bcfd ZA |
620 | } \ |
621 | } while (0) | |
622 | ||
623 | /* | |
624 | * Activate the VMI interface and switch into paravirtualized mode | |
625 | */ | |
626 | static inline int __init activate_vmi(void) | |
627 | { | |
628 | short kernel_cs; | |
629 | u64 reloc; | |
630 | const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc; | |
631 | ||
632 | if (call_vrom_func(vmi_rom, vmi_init) != 0) { | |
633 | printk(KERN_ERR "VMI ROM failed to initialize!"); | |
634 | return 0; | |
635 | } | |
636 | savesegment(cs, kernel_cs); | |
637 | ||
93b1eab3 JF |
638 | pv_info.paravirt_enabled = 1; |
639 | pv_info.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK; | |
640 | pv_info.name = "vmi"; | |
7ce0bcfd | 641 | |
93b1eab3 | 642 | pv_init_ops.patch = vmi_patch; |
7ce0bcfd ZA |
643 | |
644 | /* | |
645 | * Many of these operations are ABI compatible with VMI. | |
646 | * This means we can fill in the paravirt-ops with direct | |
647 | * pointers into the VMI ROM. If the calling convention for | |
648 | * these operations changes, this code needs to be updated. | |
649 | * | |
650 | * Exceptions | |
651 | * CPUID paravirt-op uses pointers, not the native ISA | |
652 | * halt has no VMI equivalent; all VMI halts are "safe" | |
653 | * no MSR support yet - just trap and emulate. VMI uses the | |
654 | * same ABI as the native ISA, but Linux wants exceptions | |
655 | * from bogus MSR read / write handled | |
656 | * rdpmc is not yet used in Linux | |
657 | */ | |
658 | ||
772205f6 | 659 | /* CPUID is special, so very special it gets wrapped like a present */ |
93b1eab3 JF |
660 | para_wrap(pv_cpu_ops.cpuid, vmi_cpuid, cpuid, CPUID); |
661 | ||
662 | para_fill(pv_cpu_ops.clts, CLTS); | |
663 | para_fill(pv_cpu_ops.get_debugreg, GetDR); | |
664 | para_fill(pv_cpu_ops.set_debugreg, SetDR); | |
665 | para_fill(pv_cpu_ops.read_cr0, GetCR0); | |
666 | para_fill(pv_mmu_ops.read_cr2, GetCR2); | |
667 | para_fill(pv_mmu_ops.read_cr3, GetCR3); | |
668 | para_fill(pv_cpu_ops.read_cr4, GetCR4); | |
669 | para_fill(pv_cpu_ops.write_cr0, SetCR0); | |
670 | para_fill(pv_mmu_ops.write_cr2, SetCR2); | |
671 | para_fill(pv_mmu_ops.write_cr3, SetCR3); | |
672 | para_fill(pv_cpu_ops.write_cr4, SetCR4); | |
673 | para_fill(pv_irq_ops.save_fl, GetInterruptMask); | |
674 | para_fill(pv_irq_ops.restore_fl, SetInterruptMask); | |
675 | para_fill(pv_irq_ops.irq_disable, DisableInterrupts); | |
676 | para_fill(pv_irq_ops.irq_enable, EnableInterrupts); | |
677 | ||
678 | para_fill(pv_cpu_ops.wbinvd, WBINVD); | |
679 | para_fill(pv_cpu_ops.read_tsc, RDTSC); | |
772205f6 ZA |
680 | |
681 | /* The following we emulate with trap and emulate for now */ | |
7ce0bcfd ZA |
682 | /* paravirt_ops.read_msr = vmi_rdmsr */ |
683 | /* paravirt_ops.write_msr = vmi_wrmsr */ | |
7ce0bcfd ZA |
684 | /* paravirt_ops.rdpmc = vmi_rdpmc */ |
685 | ||
772205f6 | 686 | /* TR interface doesn't pass TR value, wrap */ |
93b1eab3 | 687 | para_wrap(pv_cpu_ops.load_tr_desc, vmi_set_tr, set_tr, SetTR); |
7ce0bcfd ZA |
688 | |
689 | /* LDT is special, too */ | |
93b1eab3 JF |
690 | para_wrap(pv_cpu_ops.set_ldt, vmi_set_ldt, _set_ldt, SetLDT); |
691 | ||
692 | para_fill(pv_cpu_ops.load_gdt, SetGDT); | |
693 | para_fill(pv_cpu_ops.load_idt, SetIDT); | |
694 | para_fill(pv_cpu_ops.store_gdt, GetGDT); | |
695 | para_fill(pv_cpu_ops.store_idt, GetIDT); | |
696 | para_fill(pv_cpu_ops.store_tr, GetTR); | |
697 | pv_cpu_ops.load_tls = vmi_load_tls; | |
75b8bb3e GOC |
698 | para_wrap(pv_cpu_ops.write_ldt_entry, vmi_write_ldt_entry, |
699 | write_ldt_entry, WriteLDTEntry); | |
014b15be GOC |
700 | para_wrap(pv_cpu_ops.write_gdt_entry, vmi_write_gdt_entry, |
701 | write_gdt_entry, WriteGDTEntry); | |
8d947344 GOC |
702 | para_wrap(pv_cpu_ops.write_idt_entry, vmi_write_idt_entry, |
703 | write_idt_entry, WriteIDTEntry); | |
faca6227 | 704 | para_wrap(pv_cpu_ops.load_sp0, vmi_load_sp0, set_kernel_stack, UpdateKernelStack); |
93b1eab3 JF |
705 | para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask); |
706 | para_fill(pv_cpu_ops.io_delay, IODelay); | |
8965c1c0 JF |
707 | |
708 | para_wrap(pv_cpu_ops.lazy_mode.enter, vmi_enter_lazy_cpu, | |
709 | set_lazy_mode, SetLazyMode); | |
710 | para_wrap(pv_cpu_ops.lazy_mode.leave, vmi_leave_lazy, | |
711 | set_lazy_mode, SetLazyMode); | |
712 | ||
713 | para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu, | |
714 | set_lazy_mode, SetLazyMode); | |
715 | para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy, | |
716 | set_lazy_mode, SetLazyMode); | |
7ce0bcfd | 717 | |
772205f6 | 718 | /* user and kernel flush are just handled with different flags to FlushTLB */ |
93b1eab3 JF |
719 | para_wrap(pv_mmu_ops.flush_tlb_user, vmi_flush_tlb_user, _flush_tlb, FlushTLB); |
720 | para_wrap(pv_mmu_ops.flush_tlb_kernel, vmi_flush_tlb_kernel, _flush_tlb, FlushTLB); | |
721 | para_fill(pv_mmu_ops.flush_tlb_single, InvalPage); | |
7ce0bcfd ZA |
722 | |
723 | /* | |
724 | * Until a standard flag format can be agreed on, we need to | |
725 | * implement these as wrappers in Linux. Get the VMI ROM | |
726 | * function pointers for the two backend calls. | |
727 | */ | |
728 | #ifdef CONFIG_X86_PAE | |
729 | vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxELong); | |
730 | vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxELong); | |
731 | #else | |
732 | vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxE); | |
733 | vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxE); | |
734 | #endif | |
7ce0bcfd | 735 | |
772205f6 | 736 | if (vmi_ops.set_pte) { |
93b1eab3 JF |
737 | pv_mmu_ops.set_pte = vmi_set_pte; |
738 | pv_mmu_ops.set_pte_at = vmi_set_pte_at; | |
739 | pv_mmu_ops.set_pmd = vmi_set_pmd; | |
7ce0bcfd | 740 | #ifdef CONFIG_X86_PAE |
93b1eab3 JF |
741 | pv_mmu_ops.set_pte_atomic = vmi_set_pte_atomic; |
742 | pv_mmu_ops.set_pte_present = vmi_set_pte_present; | |
743 | pv_mmu_ops.set_pud = vmi_set_pud; | |
744 | pv_mmu_ops.pte_clear = vmi_pte_clear; | |
745 | pv_mmu_ops.pmd_clear = vmi_pmd_clear; | |
7ce0bcfd | 746 | #endif |
772205f6 ZA |
747 | } |
748 | ||
749 | if (vmi_ops.update_pte) { | |
93b1eab3 JF |
750 | pv_mmu_ops.pte_update = vmi_update_pte; |
751 | pv_mmu_ops.pte_update_defer = vmi_update_pte_defer; | |
772205f6 ZA |
752 | } |
753 | ||
754 | vmi_ops.allocate_page = vmi_get_function(VMI_CALL_AllocatePage); | |
755 | if (vmi_ops.allocate_page) { | |
6944a9c8 JF |
756 | pv_mmu_ops.alloc_pte = vmi_allocate_pte; |
757 | pv_mmu_ops.alloc_pmd = vmi_allocate_pmd; | |
758 | pv_mmu_ops.alloc_pmd_clone = vmi_allocate_pmd_clone; | |
772205f6 ZA |
759 | } |
760 | ||
761 | vmi_ops.release_page = vmi_get_function(VMI_CALL_ReleasePage); | |
762 | if (vmi_ops.release_page) { | |
6944a9c8 JF |
763 | pv_mmu_ops.release_pte = vmi_release_pte; |
764 | pv_mmu_ops.release_pmd = vmi_release_pmd; | |
772205f6 | 765 | } |
eeef9c68 ZA |
766 | |
767 | /* Set linear is needed in all cases */ | |
768 | vmi_ops.set_linear_mapping = vmi_get_function(VMI_CALL_SetLinearMapping); | |
769 | #ifdef CONFIG_HIGHPTE | |
770 | if (vmi_ops.set_linear_mapping) | |
93b1eab3 | 771 | pv_mmu_ops.kmap_atomic_pte = vmi_kmap_atomic_pte; |
a27fe809 | 772 | #endif |
772205f6 | 773 | |
7ce0bcfd ZA |
774 | /* |
775 | * These MUST always be patched. Don't support indirect jumps | |
776 | * through these operations, as the VMI interface may use either | |
777 | * a jump or a call to get to these operations, depending on | |
778 | * the backend. They are performance critical anyway, so requiring | |
779 | * a patch is not a big problem. | |
780 | */ | |
d75cd22f | 781 | pv_cpu_ops.irq_enable_sysexit = (void *)0xfeedbab0; |
93b1eab3 | 782 | pv_cpu_ops.iret = (void *)0xbadbab0; |
7ce0bcfd ZA |
783 | |
784 | #ifdef CONFIG_SMP | |
93b1eab3 | 785 | para_wrap(pv_apic_ops.startup_ipi_hook, vmi_startup_ipi_hook, set_initial_ap_state, SetInitialAPState); |
7ce0bcfd ZA |
786 | #endif |
787 | ||
788 | #ifdef CONFIG_X86_LOCAL_APIC | |
9a8f0e6b SS |
789 | para_fill(apic_ops->read, APICRead); |
790 | para_fill(apic_ops->write, APICWrite); | |
7ce0bcfd ZA |
791 | #endif |
792 | ||
bbab4f3b ZA |
793 | /* |
794 | * Check for VMI timer functionality by probing for a cycle frequency method | |
795 | */ | |
796 | reloc = call_vrom_long_func(vmi_rom, get_reloc, VMI_CALL_GetCycleFrequency); | |
772205f6 | 797 | if (!disable_vmi_timer && rel->type != VMI_RELOCATION_NONE) { |
bbab4f3b ZA |
798 | vmi_timer_ops.get_cycle_frequency = (void *)rel->eip; |
799 | vmi_timer_ops.get_cycle_counter = | |
800 | vmi_get_function(VMI_CALL_GetCycleCounter); | |
801 | vmi_timer_ops.get_wallclock = | |
802 | vmi_get_function(VMI_CALL_GetWallclockTime); | |
803 | vmi_timer_ops.wallclock_updated = | |
804 | vmi_get_function(VMI_CALL_WallclockUpdated); | |
805 | vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm); | |
806 | vmi_timer_ops.cancel_alarm = | |
807 | vmi_get_function(VMI_CALL_CancelAlarm); | |
93b1eab3 JF |
808 | pv_time_ops.time_init = vmi_time_init; |
809 | pv_time_ops.get_wallclock = vmi_get_wallclock; | |
810 | pv_time_ops.set_wallclock = vmi_set_wallclock; | |
bbab4f3b | 811 | #ifdef CONFIG_X86_LOCAL_APIC |
93b1eab3 JF |
812 | pv_apic_ops.setup_boot_clock = vmi_time_bsp_init; |
813 | pv_apic_ops.setup_secondary_clock = vmi_time_ap_init; | |
bbab4f3b | 814 | #endif |
93b1eab3 | 815 | pv_time_ops.sched_clock = vmi_sched_clock; |
e93ef949 | 816 | pv_time_ops.get_tsc_khz = vmi_tsc_khz; |
772205f6 ZA |
817 | |
818 | /* We have true wallclock functions; disable CMOS clock sync */ | |
819 | no_sync_cmos_clock = 1; | |
820 | } else { | |
821 | disable_noidle = 1; | |
822 | disable_vmi_timer = 1; | |
bbab4f3b | 823 | } |
772205f6 | 824 | |
93b1eab3 | 825 | para_fill(pv_irq_ops.safe_halt, Halt); |
bbab4f3b | 826 | |
7ce0bcfd ZA |
827 | /* |
828 | * Alternative instruction rewriting doesn't happen soon enough | |
829 | * to convert VMI_IRET to a call instead of a jump; so we have | |
830 | * to do this before IRQs get reenabled. Fortunately, it is | |
831 | * idempotent. | |
832 | */ | |
441d40dc | 833 | apply_paravirt(__parainstructions, __parainstructions_end); |
7ce0bcfd ZA |
834 | |
835 | vmi_bringup(); | |
836 | ||
837 | return 1; | |
838 | } | |
839 | ||
840 | #undef para_fill | |
841 | ||
842 | void __init vmi_init(void) | |
843 | { | |
7ce0bcfd ZA |
844 | if (!vmi_rom) |
845 | probe_vmi_rom(); | |
846 | else | |
847 | check_vmi_rom(vmi_rom); | |
848 | ||
849 | /* In case probing for or validating the ROM failed, basil */ | |
850 | if (!vmi_rom) | |
851 | return; | |
852 | ||
853 | reserve_top_address(-vmi_rom->virtual_top); | |
854 | ||
7507ba34 | 855 | #ifdef CONFIG_X86_IO_APIC |
772205f6 | 856 | /* This is virtual hardware; timer routing is wired correctly */ |
7ce0bcfd ZA |
857 | no_timer_check = 1; |
858 | #endif | |
ae8d04e2 ZA |
859 | } |
860 | ||
861 | void vmi_activate(void) | |
862 | { | |
863 | unsigned long flags; | |
864 | ||
865 | if (!vmi_rom) | |
866 | return; | |
867 | ||
868 | local_irq_save(flags); | |
869 | activate_vmi(); | |
7ce0bcfd ZA |
870 | local_irq_restore(flags & X86_EFLAGS_IF); |
871 | } | |
872 | ||
873 | static int __init parse_vmi(char *arg) | |
874 | { | |
875 | if (!arg) | |
876 | return -EINVAL; | |
877 | ||
eda08b1b | 878 | if (!strcmp(arg, "disable_pge")) { |
53756d37 | 879 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE); |
7ce0bcfd ZA |
880 | disable_pge = 1; |
881 | } else if (!strcmp(arg, "disable_pse")) { | |
53756d37 | 882 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PSE); |
7ce0bcfd ZA |
883 | disable_pse = 1; |
884 | } else if (!strcmp(arg, "disable_sep")) { | |
53756d37 | 885 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_SEP); |
7ce0bcfd ZA |
886 | disable_sep = 1; |
887 | } else if (!strcmp(arg, "disable_tsc")) { | |
53756d37 | 888 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC); |
7ce0bcfd ZA |
889 | disable_tsc = 1; |
890 | } else if (!strcmp(arg, "disable_mtrr")) { | |
53756d37 | 891 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_MTRR); |
7ce0bcfd | 892 | disable_mtrr = 1; |
772205f6 ZA |
893 | } else if (!strcmp(arg, "disable_timer")) { |
894 | disable_vmi_timer = 1; | |
895 | disable_noidle = 1; | |
7507ba34 ZA |
896 | } else if (!strcmp(arg, "disable_noidle")) |
897 | disable_noidle = 1; | |
7ce0bcfd ZA |
898 | return 0; |
899 | } | |
900 | ||
901 | early_param("vmi", parse_vmi); |