Commit | Line | Data |
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17ce265d SR |
1 | /* |
2 | * ld script for the x86 kernel | |
3 | * | |
4 | * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> | |
5 | * | |
91fd7fe8 IM |
6 | * Modernisation, unification and other changes and fixes: |
7 | * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> | |
17ce265d SR |
8 | * |
9 | * | |
10 | * Don't define absolute symbols until and unless you know that symbol | |
11 | * value is should remain constant even if kernel image is relocated | |
12 | * at run time. Absolute symbols are not relocated. If symbol value should | |
13 | * change if kernel is relocated, make the symbol section relative and | |
14 | * put it inside the section definition. | |
15 | */ | |
16 | ||
17 | #ifdef CONFIG_X86_32 | |
18 | #define LOAD_OFFSET __PAGE_OFFSET | |
19 | #else | |
20 | #define LOAD_OFFSET __START_KERNEL_map | |
21 | #endif | |
22 | ||
23 | #include <asm-generic/vmlinux.lds.h> | |
24 | #include <asm/asm-offsets.h> | |
25 | #include <asm/thread_info.h> | |
26 | #include <asm/page_types.h> | |
27 | #include <asm/cache.h> | |
28 | #include <asm/boot.h> | |
29 | ||
30 | #undef i386 /* in case the preprocessor is a 32bit one */ | |
31 | ||
32 | OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT) | |
33 | ||
34 | #ifdef CONFIG_X86_32 | |
35 | OUTPUT_ARCH(i386) | |
36 | ENTRY(phys_startup_32) | |
6b35eb9d | 37 | jiffies = jiffies_64; |
17ce265d SR |
38 | #else |
39 | OUTPUT_ARCH(i386:x86-64) | |
40 | ENTRY(phys_startup_64) | |
6b35eb9d | 41 | jiffies_64 = jiffies; |
17ce265d SR |
42 | #endif |
43 | ||
74e08179 | 44 | #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA) |
d6cc1c3a SS |
45 | /* |
46 | * On 64-bit, align RODATA to 2MB so that even with CONFIG_DEBUG_RODATA | |
47 | * we retain large page mappings for boundaries spanning kernel text, rodata | |
48 | * and data sections. | |
49 | * | |
50 | * However, kernel identity mappings will have different RWX permissions | |
51 | * to the pages mapping to text and to the pages padding (which are freed) the | |
52 | * text section. Hence kernel identity mappings will be broken to smaller | |
53 | * pages. For 64-bit, kernel text and kernel identity mappings are different, | |
54 | * so we can enable protection checks that come with CONFIG_DEBUG_RODATA, | |
55 | * as well as retain 2MB large page mappings for kernel text. | |
56 | */ | |
74e08179 SS |
57 | #define X64_ALIGN_DEBUG_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); |
58 | ||
59 | #define X64_ALIGN_DEBUG_RODATA_END \ | |
60 | . = ALIGN(HPAGE_SIZE); \ | |
61 | __end_rodata_hpage_align = .; | |
62 | ||
63 | #else | |
64 | ||
65 | #define X64_ALIGN_DEBUG_RODATA_BEGIN | |
66 | #define X64_ALIGN_DEBUG_RODATA_END | |
67 | ||
68 | #endif | |
69 | ||
afb8095a SR |
70 | PHDRS { |
71 | text PT_LOAD FLAGS(5); /* R_E */ | |
5bd5a452 | 72 | data PT_LOAD FLAGS(6); /* RW_ */ |
afb8095a | 73 | #ifdef CONFIG_X86_64 |
8d0cc631 | 74 | user PT_LOAD FLAGS(5); /* R_E */ |
afb8095a | 75 | #ifdef CONFIG_SMP |
8d0cc631 | 76 | percpu PT_LOAD FLAGS(6); /* RW_ */ |
afb8095a | 77 | #endif |
c62e4320 | 78 | init PT_LOAD FLAGS(7); /* RWE */ |
afb8095a SR |
79 | #endif |
80 | note PT_NOTE FLAGS(0); /* ___ */ | |
81 | } | |
17ce265d | 82 | |
444e0ae4 SR |
83 | SECTIONS |
84 | { | |
85 | #ifdef CONFIG_X86_32 | |
86 | . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; | |
87 | phys_startup_32 = startup_32 - LOAD_OFFSET; | |
88 | #else | |
89 | . = __START_KERNEL; | |
90 | phys_startup_64 = startup_64 - LOAD_OFFSET; | |
91 | #endif | |
92 | ||
dfc20895 | 93 | /* Text and read-only data */ |
dfc20895 | 94 | .text : AT(ADDR(.text) - LOAD_OFFSET) { |
4ae59b91 TA |
95 | _text = .; |
96 | /* bootstrapping code */ | |
97 | HEAD_TEXT | |
dfc20895 | 98 | #ifdef CONFIG_X86_32 |
dfc20895 | 99 | . = ALIGN(PAGE_SIZE); |
819d6762 | 100 | *(.text..page_aligned) |
dfc20895 SR |
101 | #endif |
102 | . = ALIGN(8); | |
103 | _stext = .; | |
104 | TEXT_TEXT | |
105 | SCHED_TEXT | |
106 | LOCK_TEXT | |
107 | KPROBES_TEXT | |
108 | IRQENTRY_TEXT | |
109 | *(.fixup) | |
110 | *(.gnu.warning) | |
111 | /* End of text section */ | |
112 | _etext = .; | |
113 | } :text = 0x9090 | |
114 | ||
115 | NOTES :text :note | |
116 | ||
123f3e1d | 117 | EXCEPTION_TABLE(16) :text = 0x9090 |
448bc3ab | 118 | |
5bd5a452 MC |
119 | #if defined(CONFIG_DEBUG_RODATA) |
120 | /* .text should occupy whole number of pages */ | |
121 | . = ALIGN(PAGE_SIZE); | |
122 | #endif | |
74e08179 | 123 | X64_ALIGN_DEBUG_RODATA_BEGIN |
c62e4320 | 124 | RO_DATA(PAGE_SIZE) |
74e08179 | 125 | X64_ALIGN_DEBUG_RODATA_END |
448bc3ab | 126 | |
1f6397ba | 127 | /* Data */ |
1f6397ba | 128 | .data : AT(ADDR(.data) - LOAD_OFFSET) { |
1260866a CM |
129 | /* Start of data section */ |
130 | _sdata = .; | |
c62e4320 JB |
131 | |
132 | /* init_task */ | |
133 | INIT_TASK_DATA(THREAD_SIZE) | |
1f6397ba SR |
134 | |
135 | #ifdef CONFIG_X86_32 | |
c62e4320 JB |
136 | /* 32 bit has nosave before _edata */ |
137 | NOSAVE_DATA | |
1f6397ba SR |
138 | #endif |
139 | ||
c62e4320 | 140 | PAGE_ALIGNED_DATA(PAGE_SIZE) |
1f6397ba | 141 | |
350f8f56 | 142 | CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) |
1f6397ba | 143 | |
c62e4320 JB |
144 | DATA_DATA |
145 | CONSTRUCTORS | |
146 | ||
147 | /* rarely changed data like cpu maps */ | |
350f8f56 | 148 | READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) |
1f6397ba | 149 | |
1f6397ba SR |
150 | /* End of data section */ |
151 | _edata = .; | |
c62e4320 | 152 | } :data |
1f6397ba | 153 | |
ff6f87e1 SR |
154 | #ifdef CONFIG_X86_64 |
155 | ||
156 | #define VSYSCALL_ADDR (-10*1024*1024) | |
ff6f87e1 | 157 | |
d223246e | 158 | #define VLOAD_OFFSET (VSYSCALL_ADDR - __vsyscall_0 + LOAD_OFFSET) |
ff6f87e1 SR |
159 | #define VLOAD(x) (ADDR(x) - VLOAD_OFFSET) |
160 | ||
d223246e | 161 | #define VVIRT_OFFSET (VSYSCALL_ADDR - __vsyscall_0) |
ff6f87e1 SR |
162 | #define VVIRT(x) (ADDR(x) - VVIRT_OFFSET) |
163 | ||
d223246e AK |
164 | . = ALIGN(4096); |
165 | __vsyscall_0 = .; | |
166 | ||
ff6f87e1 | 167 | . = VSYSCALL_ADDR; |
d223246e | 168 | .vsyscall_0 : AT(VLOAD(.vsyscall_0)) { |
ff6f87e1 SR |
169 | *(.vsyscall_0) |
170 | } :user | |
171 | ||
350f8f56 | 172 | . = ALIGN(L1_CACHE_BYTES); |
ff6f87e1 SR |
173 | .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) { |
174 | *(.vsyscall_fn) | |
175 | } | |
176 | ||
350f8f56 | 177 | . = ALIGN(L1_CACHE_BYTES); |
ff6f87e1 SR |
178 | .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) { |
179 | *(.vsyscall_gtod_data) | |
180 | } | |
181 | ||
182 | vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data); | |
183 | .vsyscall_clock : AT(VLOAD(.vsyscall_clock)) { | |
184 | *(.vsyscall_clock) | |
185 | } | |
186 | vsyscall_clock = VVIRT(.vsyscall_clock); | |
187 | ||
188 | ||
189 | .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) { | |
190 | *(.vsyscall_1) | |
191 | } | |
192 | .vsyscall_2 ADDR(.vsyscall_0) + 2048: AT(VLOAD(.vsyscall_2)) { | |
193 | *(.vsyscall_2) | |
194 | } | |
195 | ||
196 | .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) { | |
197 | *(.vgetcpu_mode) | |
198 | } | |
199 | vgetcpu_mode = VVIRT(.vgetcpu_mode); | |
200 | ||
350f8f56 | 201 | . = ALIGN(L1_CACHE_BYTES); |
ff6f87e1 SR |
202 | .jiffies : AT(VLOAD(.jiffies)) { |
203 | *(.jiffies) | |
204 | } | |
205 | jiffies = VVIRT(.jiffies); | |
206 | ||
207 | .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) { | |
208 | *(.vsyscall_3) | |
209 | } | |
210 | ||
d223246e | 211 | . = __vsyscall_0 + PAGE_SIZE; |
ff6f87e1 SR |
212 | |
213 | #undef VSYSCALL_ADDR | |
ff6f87e1 SR |
214 | #undef VLOAD_OFFSET |
215 | #undef VLOAD | |
216 | #undef VVIRT_OFFSET | |
217 | #undef VVIRT | |
218 | ||
219 | #endif /* CONFIG_X86_64 */ | |
dfc20895 | 220 | |
c62e4320 JB |
221 | /* Init code and data - will be freed after init */ |
222 | . = ALIGN(PAGE_SIZE); | |
223 | .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { | |
224 | __init_begin = .; /* paired with __init_end */ | |
e58bdaa8 | 225 | } |
e58bdaa8 | 226 | |
c62e4320 | 227 | #if defined(CONFIG_X86_64) && defined(CONFIG_SMP) |
e58bdaa8 | 228 | /* |
c62e4320 JB |
229 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the |
230 | * output PHDR, so the next output section - .init.text - should | |
231 | * start another segment - init. | |
e58bdaa8 | 232 | */ |
c62e4320 JB |
233 | PERCPU_VADDR(0, :percpu) |
234 | #endif | |
e58bdaa8 | 235 | |
123f3e1d | 236 | INIT_TEXT_SECTION(PAGE_SIZE) |
c62e4320 JB |
237 | #ifdef CONFIG_X86_64 |
238 | :init | |
239 | #endif | |
e58bdaa8 | 240 | |
123f3e1d | 241 | INIT_DATA_SECTION(16) |
e58bdaa8 SR |
242 | |
243 | .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { | |
244 | __x86_cpu_dev_start = .; | |
245 | *(.x86_cpu_dev.init) | |
246 | __x86_cpu_dev_end = .; | |
247 | } | |
248 | ||
6f44d033 KRW |
249 | /* |
250 | * start address and size of operations which during runtime | |
251 | * can be patched with virtualization friendly instructions or | |
252 | * baremetal native ones. Think page table operations. | |
253 | * Details in paravirt_types.h | |
254 | */ | |
ae618362 SR |
255 | . = ALIGN(8); |
256 | .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { | |
257 | __parainstructions = .; | |
258 | *(.parainstructions) | |
259 | __parainstructions_end = .; | |
260 | } | |
261 | ||
6f44d033 KRW |
262 | /* |
263 | * struct alt_inst entries. From the header (alternative.h): | |
264 | * "Alternative instructions for different CPU types or capabilities" | |
265 | * Think locking instructions on spinlocks. | |
266 | */ | |
ae618362 SR |
267 | . = ALIGN(8); |
268 | .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { | |
269 | __alt_instructions = .; | |
270 | *(.altinstructions) | |
271 | __alt_instructions_end = .; | |
272 | } | |
273 | ||
6f44d033 KRW |
274 | /* |
275 | * And here are the replacement instructions. The linker sticks | |
276 | * them as binary blobs. The .altinstructions has enough data to | |
277 | * get the address and the length of them to patch the kernel safely. | |
278 | */ | |
ae618362 SR |
279 | .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { |
280 | *(.altinstr_replacement) | |
281 | } | |
282 | ||
6f44d033 KRW |
283 | /* |
284 | * struct iommu_table_entry entries are injected in this section. | |
285 | * It is an array of IOMMUs which during run time gets sorted depending | |
286 | * on its dependency order. After rootfs_initcall is complete | |
287 | * this section can be safely removed. | |
288 | */ | |
0444ad93 KRW |
289 | .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) { |
290 | __iommu_table = .; | |
291 | *(.iommu_table) | |
0444ad93 KRW |
292 | __iommu_table_end = .; |
293 | } | |
7ac41ccf | 294 | . = ALIGN(8); |
bf6a5741 SR |
295 | /* |
296 | * .exit.text is discard at runtime, not link time, to deal with | |
297 | * references from .altinstructions and .eh_frame | |
298 | */ | |
299 | .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { | |
300 | EXIT_TEXT | |
301 | } | |
302 | ||
303 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { | |
304 | EXIT_DATA | |
305 | } | |
306 | ||
c62e4320 | 307 | #if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) |
fe8e0c25 | 308 | PERCPU(THREAD_SIZE) |
9d16e783 SR |
309 | #endif |
310 | ||
311 | . = ALIGN(PAGE_SIZE); | |
fd073194 | 312 | |
9d16e783 | 313 | /* freed after init ends here */ |
fd073194 IM |
314 | .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { |
315 | __init_end = .; | |
316 | } | |
9d16e783 | 317 | |
c62e4320 JB |
318 | /* |
319 | * smp_locks might be freed after init | |
320 | * start/end must be page aligned | |
321 | */ | |
322 | . = ALIGN(PAGE_SIZE); | |
323 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { | |
324 | __smp_locks = .; | |
325 | *(.smp_locks) | |
c62e4320 | 326 | . = ALIGN(PAGE_SIZE); |
596b711e | 327 | __smp_locks_end = .; |
c62e4320 JB |
328 | } |
329 | ||
9d16e783 SR |
330 | #ifdef CONFIG_X86_64 |
331 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | |
c62e4320 JB |
332 | NOSAVE_DATA |
333 | } | |
9d16e783 SR |
334 | #endif |
335 | ||
091e52c3 SR |
336 | /* BSS */ |
337 | . = ALIGN(PAGE_SIZE); | |
338 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { | |
339 | __bss_start = .; | |
7c74df07 | 340 | *(.bss..page_aligned) |
091e52c3 | 341 | *(.bss) |
5bd5a452 | 342 | . = ALIGN(PAGE_SIZE); |
091e52c3 SR |
343 | __bss_stop = .; |
344 | } | |
9d16e783 | 345 | |
091e52c3 SR |
346 | . = ALIGN(PAGE_SIZE); |
347 | .brk : AT(ADDR(.brk) - LOAD_OFFSET) { | |
348 | __brk_base = .; | |
349 | . += 64 * 1024; /* 64k alignment slop space */ | |
350 | *(.brk_reservation) /* areas brk users have reserved */ | |
351 | __brk_limit = .; | |
352 | } | |
353 | ||
873b5271 | 354 | _end = .; |
091e52c3 | 355 | |
444e0ae4 SR |
356 | STABS_DEBUG |
357 | DWARF_DEBUG | |
023bf6f1 TH |
358 | |
359 | /* Sections to be discarded */ | |
360 | DISCARDS | |
361 | /DISCARD/ : { *(.eh_frame) } | |
444e0ae4 SR |
362 | } |
363 | ||
17ce265d SR |
364 | |
365 | #ifdef CONFIG_X86_32 | |
a5912f6b IM |
366 | /* |
367 | * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: | |
368 | */ | |
d2ba8b21 PA |
369 | . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), |
370 | "kernel image bigger than KERNEL_IMAGE_SIZE"); | |
17ce265d SR |
371 | #else |
372 | /* | |
373 | * Per-cpu symbols which need to be offset from __per_cpu_load | |
374 | * for the boot processor. | |
375 | */ | |
dd17c8f7 | 376 | #define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load |
17ce265d SR |
377 | INIT_PER_CPU(gdt_page); |
378 | INIT_PER_CPU(irq_stack_union); | |
379 | ||
380 | /* | |
381 | * Build-time check on the image size: | |
382 | */ | |
d2ba8b21 PA |
383 | . = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), |
384 | "kernel image bigger than KERNEL_IMAGE_SIZE"); | |
17ce265d SR |
385 | |
386 | #ifdef CONFIG_SMP | |
dd17c8f7 | 387 | . = ASSERT((irq_stack_union == 0), |
d2ba8b21 | 388 | "irq_stack_union is not at start of per-cpu area"); |
17ce265d SR |
389 | #endif |
390 | ||
391 | #endif /* CONFIG_X86_32 */ | |
392 | ||
393 | #ifdef CONFIG_KEXEC | |
394 | #include <asm/kexec.h> | |
395 | ||
d2ba8b21 PA |
396 | . = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, |
397 | "kexec control code size is too big"); | |
17ce265d SR |
398 | #endif |
399 |