Commit | Line | Data |
---|---|---|
13a9cd42 TG |
1 | /* ld script to make x86-64 Linux kernel |
2 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>; | |
3 | */ | |
4 | ||
5 | #define LOAD_OFFSET __START_KERNEL_map | |
6 | ||
7 | #include <asm-generic/vmlinux.lds.h> | |
1a51e3a0 | 8 | #include <asm/asm-offsets.h> |
0341c14d | 9 | #include <asm/page_types.h> |
13a9cd42 TG |
10 | |
11 | #undef i386 /* in case the preprocessor is a 32bit one */ | |
12 | ||
13 | OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64") | |
14 | OUTPUT_ARCH(i386:x86-64) | |
15 | ENTRY(phys_startup_64) | |
16 | jiffies_64 = jiffies; | |
13a9cd42 TG |
17 | PHDRS { |
18 | text PT_LOAD FLAGS(5); /* R_E */ | |
19 | data PT_LOAD FLAGS(7); /* RWE */ | |
20 | user PT_LOAD FLAGS(7); /* RWE */ | |
21 | data.init PT_LOAD FLAGS(7); /* RWE */ | |
3e5d8f97 TH |
22 | #ifdef CONFIG_SMP |
23 | percpu PT_LOAD FLAGS(7); /* RWE */ | |
24 | #endif | |
ef3892bd | 25 | data.init2 PT_LOAD FLAGS(7); /* RWE */ |
6360b1fb | 26 | note PT_NOTE FLAGS(0); /* ___ */ |
13a9cd42 TG |
27 | } |
28 | SECTIONS | |
29 | { | |
30 | . = __START_KERNEL; | |
31 | phys_startup_64 = startup_64 - LOAD_OFFSET; | |
13a9cd42 | 32 | .text : AT(ADDR(.text) - LOAD_OFFSET) { |
b9719a4d | 33 | _text = .; /* Text and read-only data */ |
13a9cd42 TG |
34 | /* First the code that has to be first for bootstrapping */ |
35 | *(.text.head) | |
36 | _stext = .; | |
37 | /* Then the rest */ | |
38 | TEXT_TEXT | |
39 | SCHED_TEXT | |
40 | LOCK_TEXT | |
41 | KPROBES_TEXT | |
a0343e82 | 42 | IRQENTRY_TEXT |
13a9cd42 TG |
43 | *(.fixup) |
44 | *(.gnu.warning) | |
3cdac41f | 45 | _etext = .; /* End of text section */ |
c0400030 | 46 | } :text = 0x9090 |
13a9cd42 | 47 | |
6360b1fb JB |
48 | NOTES :text :note |
49 | ||
13a9cd42 | 50 | . = ALIGN(16); /* Exception table */ |
c0400030 JB |
51 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { |
52 | __start___ex_table = .; | |
53 | *(__ex_table) | |
54 | __stop___ex_table = .; | |
6360b1fb | 55 | } :text = 0x9090 |
13a9cd42 TG |
56 | |
57 | RODATA | |
58 | ||
3cdac41f | 59 | . = ALIGN(PAGE_SIZE); /* Align data segment to page size boundary */ |
13a9cd42 TG |
60 | /* Data */ |
61 | .data : AT(ADDR(.data) - LOAD_OFFSET) { | |
62 | DATA_DATA | |
63 | CONSTRUCTORS | |
b9719a4d | 64 | _edata = .; /* End of data section */ |
13a9cd42 TG |
65 | } :data |
66 | ||
13a9cd42 | 67 | |
13a9cd42 | 68 | .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) { |
b9719a4d JF |
69 | . = ALIGN(PAGE_SIZE); |
70 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
13a9cd42 TG |
71 | *(.data.cacheline_aligned) |
72 | } | |
73 | . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES); | |
74 | .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { | |
75 | *(.data.read_mostly) | |
76 | } | |
77 | ||
78 | #define VSYSCALL_ADDR (-10*1024*1024) | |
79 | #define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | |
80 | #define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095)) | |
81 | ||
82 | #define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR) | |
83 | #define VLOAD(x) (ADDR(x) - VLOAD_OFFSET) | |
84 | ||
85 | #define VVIRT_OFFSET (VSYSCALL_ADDR - VSYSCALL_VIRT_ADDR) | |
86 | #define VVIRT(x) (ADDR(x) - VVIRT_OFFSET) | |
87 | ||
88 | . = VSYSCALL_ADDR; | |
89 | .vsyscall_0 : AT(VSYSCALL_PHYS_ADDR) { *(.vsyscall_0) } :user | |
90 | __vsyscall_0 = VSYSCALL_VIRT_ADDR; | |
91 | ||
92 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
93 | .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) { *(.vsyscall_fn) } | |
94 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
95 | .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) | |
96 | { *(.vsyscall_gtod_data) } | |
97 | vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data); | |
98 | .vsyscall_clock : AT(VLOAD(.vsyscall_clock)) | |
99 | { *(.vsyscall_clock) } | |
100 | vsyscall_clock = VVIRT(.vsyscall_clock); | |
101 | ||
102 | ||
103 | .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) | |
104 | { *(.vsyscall_1) } | |
105 | .vsyscall_2 ADDR(.vsyscall_0) + 2048: AT(VLOAD(.vsyscall_2)) | |
106 | { *(.vsyscall_2) } | |
107 | ||
108 | .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) { *(.vgetcpu_mode) } | |
109 | vgetcpu_mode = VVIRT(.vgetcpu_mode); | |
110 | ||
111 | . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); | |
112 | .jiffies : AT(VLOAD(.jiffies)) { *(.jiffies) } | |
113 | jiffies = VVIRT(.jiffies); | |
114 | ||
115 | .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) | |
116 | { *(.vsyscall_3) } | |
117 | ||
3cdac41f | 118 | . = VSYSCALL_VIRT_ADDR + PAGE_SIZE; |
13a9cd42 TG |
119 | |
120 | #undef VSYSCALL_ADDR | |
121 | #undef VSYSCALL_PHYS_ADDR | |
122 | #undef VSYSCALL_VIRT_ADDR | |
123 | #undef VLOAD_OFFSET | |
124 | #undef VLOAD | |
125 | #undef VVIRT_OFFSET | |
126 | #undef VVIRT | |
127 | ||
13a9cd42 | 128 | .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) { |
b9719a4d | 129 | . = ALIGN(THREAD_SIZE); /* init_task */ |
13a9cd42 TG |
130 | *(.data.init_task) |
131 | }:data.init | |
132 | ||
13a9cd42 | 133 | .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) { |
b9719a4d | 134 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
135 | *(.data.page_aligned) |
136 | } | |
137 | ||
13a9cd42 | 138 | .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { |
b9719a4d JF |
139 | /* might get freed after init */ |
140 | . = ALIGN(PAGE_SIZE); | |
141 | __smp_alt_begin = .; | |
142 | __smp_locks = .; | |
13a9cd42 | 143 | *(.smp_locks) |
b9719a4d JF |
144 | __smp_locks_end = .; |
145 | . = ALIGN(PAGE_SIZE); | |
146 | __smp_alt_end = .; | |
13a9cd42 | 147 | } |
13a9cd42 | 148 | |
3cdac41f | 149 | . = ALIGN(PAGE_SIZE); /* Init code and data */ |
b9719a4d | 150 | __init_begin = .; /* paired with __init_end */ |
13a9cd42 TG |
151 | .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) { |
152 | _sinittext = .; | |
01ba2bdc | 153 | INIT_TEXT |
13a9cd42 TG |
154 | _einittext = .; |
155 | } | |
01ba2bdc SR |
156 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { |
157 | __initdata_begin = .; | |
158 | INIT_DATA | |
159 | __initdata_end = .; | |
160 | } | |
161 | ||
b9719a4d JF |
162 | .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { |
163 | . = ALIGN(16); | |
164 | __setup_start = .; | |
165 | *(.init.setup) | |
166 | __setup_end = .; | |
167 | } | |
13a9cd42 | 168 | .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) { |
b9719a4d | 169 | __initcall_start = .; |
13a9cd42 | 170 | INITCALLS |
b9719a4d | 171 | __initcall_end = .; |
13a9cd42 | 172 | } |
13a9cd42 | 173 | .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { |
b9719a4d | 174 | __con_initcall_start = .; |
13a9cd42 | 175 | *(.con_initcall.init) |
b9719a4d | 176 | __con_initcall_end = .; |
13a9cd42 | 177 | } |
10a434fc | 178 | .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { |
b9719a4d | 179 | __x86_cpu_dev_start = .; |
10a434fc | 180 | *(.x86_cpu_dev.init) |
b9719a4d | 181 | __x86_cpu_dev_end = .; |
03ae5768 | 182 | } |
cb58ffc3 | 183 | SECURITY_INIT |
fbf51924 GOC |
184 | |
185 | . = ALIGN(8); | |
186 | .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { | |
b9719a4d | 187 | __parainstructions = .; |
fbf51924 | 188 | *(.parainstructions) |
b9719a4d | 189 | __parainstructions_end = .; |
fbf51924 GOC |
190 | } |
191 | ||
13a9cd42 | 192 | .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { |
b9719a4d JF |
193 | . = ALIGN(8); |
194 | __alt_instructions = .; | |
13a9cd42 | 195 | *(.altinstructions) |
b9719a4d | 196 | __alt_instructions_end = .; |
13a9cd42 | 197 | } |
13a9cd42 TG |
198 | .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { |
199 | *(.altinstr_replacement) | |
200 | } | |
201 | /* .exit.text is discard at runtime, not link time, to deal with references | |
202 | from .altinstructions and .eh_frame */ | |
01ba2bdc SR |
203 | .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { |
204 | EXIT_TEXT | |
205 | } | |
206 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { | |
207 | EXIT_DATA | |
208 | } | |
13a9cd42 | 209 | |
13a9cd42 | 210 | #ifdef CONFIG_BLK_DEV_INITRD |
3cdac41f | 211 | . = ALIGN(PAGE_SIZE); |
b9719a4d JF |
212 | .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { |
213 | __initramfs_start = .; | |
214 | *(.init.ramfs) | |
215 | __initramfs_end = .; | |
216 | } | |
13a9cd42 TG |
217 | #endif |
218 | ||
3e5d8f97 TH |
219 | #ifdef CONFIG_SMP |
220 | /* | |
221 | * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the | |
222 | * output PHDR, so the next output section - __data_nosave - should | |
ef3892bd | 223 | * start another section data.init2. Also, pda should be at the head of |
b12d8db8 TH |
224 | * percpu area. Preallocate it and define the percpu offset symbol |
225 | * so that it can be accessed as a percpu variable. | |
3e5d8f97 TH |
226 | */ |
227 | . = ALIGN(PAGE_SIZE); | |
947e76cd | 228 | PERCPU_VADDR(0, :percpu) |
3e5d8f97 | 229 | #else |
3cdac41f | 230 | PERCPU(PAGE_SIZE) |
3e5d8f97 | 231 | #endif |
13a9cd42 | 232 | |
3cdac41f | 233 | . = ALIGN(PAGE_SIZE); |
13a9cd42 TG |
234 | __init_end = .; |
235 | ||
3e5d8f97 | 236 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { |
b9719a4d JF |
237 | . = ALIGN(PAGE_SIZE); |
238 | __nosave_begin = .; | |
239 | *(.data.nosave) | |
240 | . = ALIGN(PAGE_SIZE); | |
241 | __nosave_end = .; | |
ef3892bd | 242 | } :data.init2 /* use another section data.init2, see PERCPU_VADDR() above */ |
13a9cd42 | 243 | |
13a9cd42 | 244 | .bss : AT(ADDR(.bss) - LOAD_OFFSET) { |
b9719a4d JF |
245 | . = ALIGN(PAGE_SIZE); |
246 | __bss_start = .; /* BSS */ | |
13a9cd42 TG |
247 | *(.bss.page_aligned) |
248 | *(.bss) | |
b9719a4d | 249 | __bss_stop = .; |
704439dd | 250 | } |
93dbda7c | 251 | |
704439dd | 252 | .brk : AT(ADDR(.brk) - LOAD_OFFSET) { |
93dbda7c JF |
253 | . = ALIGN(PAGE_SIZE); |
254 | __brk_base = . ; | |
704439dd | 255 | . += 64 * 1024 ; /* 64k alignment slop space */ |
796216a5 | 256 | *(.brk_reservation) /* areas brk users have reserved */ |
93dbda7c | 257 | __brk_limit = . ; |
b9719a4d | 258 | } |
13a9cd42 TG |
259 | |
260 | _end = . ; | |
261 | ||
262 | /* Sections to be discarded */ | |
263 | /DISCARD/ : { | |
264 | *(.exitcall.exit) | |
265 | *(.eh_frame) | |
796216a5 | 266 | *(.discard) |
13a9cd42 TG |
267 | } |
268 | ||
269 | STABS_DEBUG | |
270 | ||
271 | DWARF_DEBUG | |
272 | } | |
b4e0409a | 273 | |
2add8e23 BG |
274 | /* |
275 | * Per-cpu symbols which need to be offset from __per_cpu_load | |
276 | * for the boot processor. | |
277 | */ | |
278 | #define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load | |
279 | INIT_PER_CPU(gdt_page); | |
280 | INIT_PER_CPU(irq_stack_union); | |
281 | ||
b4e0409a IM |
282 | /* |
283 | * Build-time check on the image size: | |
284 | */ | |
285 | ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), | |
286 | "kernel image bigger than KERNEL_IMAGE_SIZE") | |
947e76cd BG |
287 | |
288 | #ifdef CONFIG_SMP | |
289 | ASSERT((per_cpu__irq_stack_union == 0), | |
290 | "irq_stack_union is not at start of per-cpu area"); | |
291 | #endif | |
fee7b0d8 HY |
292 | |
293 | #ifdef CONFIG_KEXEC | |
294 | #include <asm/kexec.h> | |
295 | ||
296 | ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, | |
297 | "kexec control code size is too big") | |
298 | #endif |