Commit | Line | Data |
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7837699f SY |
1 | /* |
2 | * 8253/8254 interval timer emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2006 Intel Corporation | |
6 | * Copyright (c) 2007 Keir Fraser, XenSource Inc | |
7 | * Copyright (c) 2008 Intel Corporation | |
9611c187 | 8 | * Copyright 2009 Red Hat, Inc. and/or its affiliates. |
7837699f SY |
9 | * |
10 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
11 | * of this software and associated documentation files (the "Software"), to deal | |
12 | * in the Software without restriction, including without limitation the rights | |
13 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
14 | * copies of the Software, and to permit persons to whom the Software is | |
15 | * furnished to do so, subject to the following conditions: | |
16 | * | |
17 | * The above copyright notice and this permission notice shall be included in | |
18 | * all copies or substantial portions of the Software. | |
19 | * | |
20 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
21 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
23 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
24 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
25 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
26 | * THE SOFTWARE. | |
27 | * | |
28 | * Authors: | |
29 | * Sheng Yang <sheng.yang@intel.com> | |
30 | * Based on QEMU and Xen. | |
31 | */ | |
32 | ||
a78d9626 JP |
33 | #define pr_fmt(fmt) "pit: " fmt |
34 | ||
7837699f | 35 | #include <linux/kvm_host.h> |
5a0e3ad6 | 36 | #include <linux/slab.h> |
7837699f | 37 | |
49df6397 | 38 | #include "ioapic.h" |
7837699f SY |
39 | #include "irq.h" |
40 | #include "i8254.h" | |
9ed96e87 | 41 | #include "x86.h" |
7837699f SY |
42 | |
43 | #ifndef CONFIG_X86_64 | |
6f6d6a1a | 44 | #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) |
7837699f SY |
45 | #else |
46 | #define mod_64(x, y) ((x) % (y)) | |
47 | #endif | |
48 | ||
49 | #define RW_STATE_LSB 1 | |
50 | #define RW_STATE_MSB 2 | |
51 | #define RW_STATE_WORD0 3 | |
52 | #define RW_STATE_WORD1 4 | |
53 | ||
54 | /* Compute with 96 bit intermediate result: (a*b)/c */ | |
55 | static u64 muldiv64(u64 a, u32 b, u32 c) | |
56 | { | |
57 | union { | |
58 | u64 ll; | |
59 | struct { | |
60 | u32 low, high; | |
61 | } l; | |
62 | } u, res; | |
63 | u64 rl, rh; | |
64 | ||
65 | u.ll = a; | |
66 | rl = (u64)u.l.low * (u64)b; | |
67 | rh = (u64)u.l.high * (u64)b; | |
68 | rh += (rl >> 32); | |
6f6d6a1a RZ |
69 | res.l.high = div64_u64(rh, c); |
70 | res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); | |
7837699f SY |
71 | return res.ll; |
72 | } | |
73 | ||
74 | static void pit_set_gate(struct kvm *kvm, int channel, u32 val) | |
75 | { | |
76 | struct kvm_kpit_channel_state *c = | |
77 | &kvm->arch.vpit->pit_state.channels[channel]; | |
78 | ||
79 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
80 | ||
81 | switch (c->mode) { | |
82 | default: | |
83 | case 0: | |
84 | case 4: | |
85 | /* XXX: just disable/enable counting */ | |
86 | break; | |
87 | case 1: | |
88 | case 2: | |
89 | case 3: | |
90 | case 5: | |
91 | /* Restart counting on rising edge. */ | |
92 | if (c->gate < val) | |
93 | c->count_load_time = ktime_get(); | |
94 | break; | |
95 | } | |
96 | ||
97 | c->gate = val; | |
98 | } | |
99 | ||
8b2cf73c | 100 | static int pit_get_gate(struct kvm *kvm, int channel) |
7837699f SY |
101 | { |
102 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
103 | ||
104 | return kvm->arch.vpit->pit_state.channels[channel].gate; | |
105 | } | |
106 | ||
fd668423 MT |
107 | static s64 __kpit_elapsed(struct kvm *kvm) |
108 | { | |
109 | s64 elapsed; | |
110 | ktime_t remaining; | |
111 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
112 | ||
26ef1924 | 113 | if (!ps->period) |
0ff77873 MT |
114 | return 0; |
115 | ||
ede2ccc5 MT |
116 | /* |
117 | * The Counter does not stop when it reaches zero. In | |
118 | * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to | |
119 | * the highest count, either FFFF hex for binary counting | |
120 | * or 9999 for BCD counting, and continues counting. | |
121 | * Modes 2 and 3 are periodic; the Counter reloads | |
122 | * itself with the initial count and continues counting | |
123 | * from there. | |
124 | */ | |
26ef1924 AK |
125 | remaining = hrtimer_get_remaining(&ps->timer); |
126 | elapsed = ps->period - ktime_to_ns(remaining); | |
fd668423 MT |
127 | |
128 | return elapsed; | |
129 | } | |
130 | ||
131 | static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c, | |
132 | int channel) | |
133 | { | |
134 | if (channel == 0) | |
135 | return __kpit_elapsed(kvm); | |
136 | ||
137 | return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
138 | } | |
139 | ||
7837699f SY |
140 | static int pit_get_count(struct kvm *kvm, int channel) |
141 | { | |
142 | struct kvm_kpit_channel_state *c = | |
143 | &kvm->arch.vpit->pit_state.channels[channel]; | |
144 | s64 d, t; | |
145 | int counter; | |
146 | ||
147 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
148 | ||
fd668423 | 149 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
150 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
151 | ||
152 | switch (c->mode) { | |
153 | case 0: | |
154 | case 1: | |
155 | case 4: | |
156 | case 5: | |
157 | counter = (c->count - d) & 0xffff; | |
158 | break; | |
159 | case 3: | |
160 | /* XXX: may be incorrect for odd counts */ | |
161 | counter = c->count - (mod_64((2 * d), c->count)); | |
162 | break; | |
163 | default: | |
164 | counter = c->count - mod_64(d, c->count); | |
165 | break; | |
166 | } | |
167 | return counter; | |
168 | } | |
169 | ||
170 | static int pit_get_out(struct kvm *kvm, int channel) | |
171 | { | |
172 | struct kvm_kpit_channel_state *c = | |
173 | &kvm->arch.vpit->pit_state.channels[channel]; | |
174 | s64 d, t; | |
175 | int out; | |
176 | ||
177 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
178 | ||
fd668423 | 179 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
180 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
181 | ||
182 | switch (c->mode) { | |
183 | default: | |
184 | case 0: | |
185 | out = (d >= c->count); | |
186 | break; | |
187 | case 1: | |
188 | out = (d < c->count); | |
189 | break; | |
190 | case 2: | |
191 | out = ((mod_64(d, c->count) == 0) && (d != 0)); | |
192 | break; | |
193 | case 3: | |
194 | out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); | |
195 | break; | |
196 | case 4: | |
197 | case 5: | |
198 | out = (d == c->count); | |
199 | break; | |
200 | } | |
201 | ||
202 | return out; | |
203 | } | |
204 | ||
205 | static void pit_latch_count(struct kvm *kvm, int channel) | |
206 | { | |
207 | struct kvm_kpit_channel_state *c = | |
208 | &kvm->arch.vpit->pit_state.channels[channel]; | |
209 | ||
210 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
211 | ||
212 | if (!c->count_latched) { | |
213 | c->latched_count = pit_get_count(kvm, channel); | |
214 | c->count_latched = c->rw_mode; | |
215 | } | |
216 | } | |
217 | ||
218 | static void pit_latch_status(struct kvm *kvm, int channel) | |
219 | { | |
220 | struct kvm_kpit_channel_state *c = | |
221 | &kvm->arch.vpit->pit_state.channels[channel]; | |
222 | ||
223 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
224 | ||
225 | if (!c->status_latched) { | |
226 | /* TODO: Return NULL COUNT (bit 6). */ | |
227 | c->status = ((pit_get_out(kvm, channel) << 7) | | |
228 | (c->rw_mode << 4) | | |
229 | (c->mode << 1) | | |
230 | c->bcd); | |
231 | c->status_latched = 1; | |
232 | } | |
233 | } | |
234 | ||
ee032c99 | 235 | static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian) |
3cf57fed MT |
236 | { |
237 | struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, | |
238 | irq_ack_notifier); | |
33572ac0 CL |
239 | |
240 | spin_lock(&ps->inject_lock); | |
f6e0a0c1 | 241 | if (atomic_dec_if_positive(&ps->pending) > 0 && ps->reinject) |
b6ddf05f | 242 | queue_kthread_work(&ps->pit->worker, &ps->pit->expired); |
3cf57fed | 243 | ps->irq_ack = 1; |
33572ac0 | 244 | spin_unlock(&ps->inject_lock); |
3cf57fed MT |
245 | } |
246 | ||
2f599714 MT |
247 | void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu) |
248 | { | |
249 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
250 | struct hrtimer *timer; | |
251 | ||
c5af89b6 | 252 | if (!kvm_vcpu_is_bsp(vcpu) || !pit) |
2f599714 MT |
253 | return; |
254 | ||
26ef1924 | 255 | timer = &pit->pit_state.timer; |
2febc839 | 256 | mutex_lock(&pit->pit_state.lock); |
2f599714 | 257 | if (hrtimer_cancel(timer)) |
beb20d52 | 258 | hrtimer_start_expires(timer, HRTIMER_MODE_ABS); |
2febc839 | 259 | mutex_unlock(&pit->pit_state.lock); |
2f599714 MT |
260 | } |
261 | ||
33572ac0 | 262 | static void destroy_pit_timer(struct kvm_pit *pit) |
7837699f | 263 | { |
26ef1924 | 264 | hrtimer_cancel(&pit->pit_state.timer); |
b6ddf05f | 265 | flush_kthread_work(&pit->expired); |
7837699f SY |
266 | } |
267 | ||
b6ddf05f | 268 | static void pit_do_work(struct kthread_work *work) |
33572ac0 CL |
269 | { |
270 | struct kvm_pit *pit = container_of(work, struct kvm_pit, expired); | |
271 | struct kvm *kvm = pit->kvm; | |
272 | struct kvm_vcpu *vcpu; | |
273 | int i; | |
274 | struct kvm_kpit_state *ps = &pit->pit_state; | |
275 | int inject = 0; | |
276 | ||
277 | /* Try to inject pending interrupts when | |
278 | * last one has been acked. | |
279 | */ | |
280 | spin_lock(&ps->inject_lock); | |
7dd0fdff RK |
281 | if (!ps->reinject) |
282 | inject = 1; | |
283 | else if (ps->irq_ack) { | |
33572ac0 CL |
284 | ps->irq_ack = 0; |
285 | inject = 1; | |
286 | } | |
287 | spin_unlock(&ps->inject_lock); | |
288 | if (inject) { | |
aa2fbe6d YZ |
289 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1, false); |
290 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0, false); | |
33572ac0 CL |
291 | |
292 | /* | |
293 | * Provides NMI watchdog support via Virtual Wire mode. | |
294 | * The route is: PIT -> PIC -> LVT0 in NMI mode. | |
295 | * | |
296 | * Note: Our Virtual Wire implementation is simplified, only | |
297 | * propagating PIT interrupts to all VCPUs when they have set | |
298 | * LVT0 to NMI delivery. Other PIC interrupts are just sent to | |
299 | * VCPU0, and only if its LVT0 is in EXTINT mode. | |
300 | */ | |
42720138 | 301 | if (atomic_read(&kvm->arch.vapics_in_nmi_mode) > 0) |
33572ac0 CL |
302 | kvm_for_each_vcpu(i, vcpu, kvm) |
303 | kvm_apic_nmi_wd_deliver(vcpu); | |
304 | } | |
305 | } | |
306 | ||
307 | static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) | |
308 | { | |
26ef1924 AK |
309 | struct kvm_kpit_state *ps = container_of(data, struct kvm_kpit_state, timer); |
310 | struct kvm_pit *pt = ps->kvm->arch.vpit; | |
33572ac0 | 311 | |
7dd0fdff | 312 | if (ps->reinject) |
26ef1924 | 313 | atomic_inc(&ps->pending); |
7dd0fdff RK |
314 | |
315 | queue_kthread_work(&pt->worker, &pt->expired); | |
33572ac0 | 316 | |
26ef1924 AK |
317 | if (ps->is_periodic) { |
318 | hrtimer_add_expires_ns(&ps->timer, ps->period); | |
33572ac0 CL |
319 | return HRTIMER_RESTART; |
320 | } else | |
321 | return HRTIMER_NORESTART; | |
322 | } | |
323 | ||
fd700a00 RK |
324 | static inline void kvm_pit_reset_reinject(struct kvm_pit *pit) |
325 | { | |
326 | atomic_set(&pit->pit_state.pending, 0); | |
327 | pit->pit_state.irq_ack = 1; | |
328 | } | |
329 | ||
0924ab2c | 330 | static void create_pit_timer(struct kvm *kvm, u32 val, int is_period) |
7837699f | 331 | { |
0924ab2c | 332 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; |
7837699f SY |
333 | s64 interval; |
334 | ||
49df6397 SR |
335 | if (!ioapic_in_kernel(kvm) || |
336 | ps->flags & KVM_PIT_FLAGS_HPET_LEGACY) | |
0924ab2c JK |
337 | return; |
338 | ||
7837699f SY |
339 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); |
340 | ||
a78d9626 | 341 | pr_debug("create pit timer, interval is %llu nsec\n", interval); |
7837699f SY |
342 | |
343 | /* TODO The new value only affected after the retriggered */ | |
26ef1924 | 344 | hrtimer_cancel(&ps->timer); |
b6ddf05f | 345 | flush_kthread_work(&ps->pit->expired); |
26ef1924 | 346 | ps->period = interval; |
d3c7b77d MT |
347 | ps->is_periodic = is_period; |
348 | ||
26ef1924 AK |
349 | ps->timer.function = pit_timer_fn; |
350 | ps->kvm = ps->pit->kvm; | |
d3c7b77d | 351 | |
fd700a00 | 352 | kvm_pit_reset_reinject(ps->pit); |
7837699f | 353 | |
9ed96e87 MT |
354 | /* |
355 | * Do not allow the guest to program periodic timers with small | |
356 | * interval, since the hrtimers are not throttled by the host | |
357 | * scheduler. | |
358 | */ | |
359 | if (ps->is_periodic) { | |
360 | s64 min_period = min_timer_period_us * 1000LL; | |
361 | ||
362 | if (ps->period < min_period) { | |
363 | pr_info_ratelimited( | |
364 | "kvm: requested %lld ns " | |
365 | "i8254 timer period limited to %lld ns\n", | |
366 | ps->period, min_period); | |
367 | ps->period = min_period; | |
368 | } | |
369 | } | |
370 | ||
26ef1924 | 371 | hrtimer_start(&ps->timer, ktime_add_ns(ktime_get(), interval), |
7837699f SY |
372 | HRTIMER_MODE_ABS); |
373 | } | |
374 | ||
375 | static void pit_load_count(struct kvm *kvm, int channel, u32 val) | |
376 | { | |
377 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
378 | ||
379 | WARN_ON(!mutex_is_locked(&ps->lock)); | |
380 | ||
a78d9626 | 381 | pr_debug("load_count val is %d, channel is %d\n", val, channel); |
7837699f SY |
382 | |
383 | /* | |
ede2ccc5 MT |
384 | * The largest possible initial count is 0; this is equivalent |
385 | * to 216 for binary counting and 104 for BCD counting. | |
7837699f SY |
386 | */ |
387 | if (val == 0) | |
388 | val = 0x10000; | |
389 | ||
7837699f SY |
390 | ps->channels[channel].count = val; |
391 | ||
fd668423 MT |
392 | if (channel != 0) { |
393 | ps->channels[channel].count_load_time = ktime_get(); | |
7837699f | 394 | return; |
fd668423 | 395 | } |
7837699f SY |
396 | |
397 | /* Two types of timer | |
398 | * mode 1 is one shot, mode 2 is period, otherwise del timer */ | |
399 | switch (ps->channels[0].mode) { | |
ede2ccc5 | 400 | case 0: |
7837699f | 401 | case 1: |
ece15bab MT |
402 | /* FIXME: enhance mode 4 precision */ |
403 | case 4: | |
a647795e | 404 | create_pit_timer(kvm, val, 0); |
7837699f SY |
405 | break; |
406 | case 2: | |
f6975545 | 407 | case 3: |
a647795e | 408 | create_pit_timer(kvm, val, 1); |
7837699f SY |
409 | break; |
410 | default: | |
33572ac0 | 411 | destroy_pit_timer(kvm->arch.vpit); |
7837699f SY |
412 | } |
413 | } | |
414 | ||
e9f42757 | 415 | void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start) |
e0f63cb9 | 416 | { |
e9f42757 BK |
417 | u8 saved_mode; |
418 | if (hpet_legacy_start) { | |
419 | /* save existing mode for later reenablement */ | |
e5e57e7a | 420 | WARN_ON(channel != 0); |
e9f42757 BK |
421 | saved_mode = kvm->arch.vpit->pit_state.channels[0].mode; |
422 | kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */ | |
423 | pit_load_count(kvm, channel, val); | |
424 | kvm->arch.vpit->pit_state.channels[0].mode = saved_mode; | |
425 | } else { | |
426 | pit_load_count(kvm, channel, val); | |
427 | } | |
e0f63cb9 SY |
428 | } |
429 | ||
d76685c4 GH |
430 | static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev) |
431 | { | |
432 | return container_of(dev, struct kvm_pit, dev); | |
433 | } | |
434 | ||
435 | static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev) | |
436 | { | |
437 | return container_of(dev, struct kvm_pit, speaker_dev); | |
438 | } | |
439 | ||
bda9020e MT |
440 | static inline int pit_in_range(gpa_t addr) |
441 | { | |
442 | return ((addr >= KVM_PIT_BASE_ADDRESS) && | |
443 | (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); | |
444 | } | |
445 | ||
e32edf4f NN |
446 | static int pit_ioport_write(struct kvm_vcpu *vcpu, |
447 | struct kvm_io_device *this, | |
bda9020e | 448 | gpa_t addr, int len, const void *data) |
7837699f | 449 | { |
d76685c4 | 450 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
451 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
452 | struct kvm *kvm = pit->kvm; | |
453 | int channel, access; | |
454 | struct kvm_kpit_channel_state *s; | |
455 | u32 val = *(u32 *) data; | |
bda9020e MT |
456 | if (!pit_in_range(addr)) |
457 | return -EOPNOTSUPP; | |
7837699f SY |
458 | |
459 | val &= 0xff; | |
460 | addr &= KVM_PIT_CHANNEL_MASK; | |
461 | ||
462 | mutex_lock(&pit_state->lock); | |
463 | ||
464 | if (val != 0) | |
a78d9626 JP |
465 | pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n", |
466 | (unsigned int)addr, len, val); | |
7837699f SY |
467 | |
468 | if (addr == 3) { | |
469 | channel = val >> 6; | |
470 | if (channel == 3) { | |
471 | /* Read-Back Command. */ | |
472 | for (channel = 0; channel < 3; channel++) { | |
473 | s = &pit_state->channels[channel]; | |
474 | if (val & (2 << channel)) { | |
475 | if (!(val & 0x20)) | |
476 | pit_latch_count(kvm, channel); | |
477 | if (!(val & 0x10)) | |
478 | pit_latch_status(kvm, channel); | |
479 | } | |
480 | } | |
481 | } else { | |
482 | /* Select Counter <channel>. */ | |
483 | s = &pit_state->channels[channel]; | |
484 | access = (val >> 4) & KVM_PIT_CHANNEL_MASK; | |
485 | if (access == 0) { | |
486 | pit_latch_count(kvm, channel); | |
487 | } else { | |
488 | s->rw_mode = access; | |
489 | s->read_state = access; | |
490 | s->write_state = access; | |
491 | s->mode = (val >> 1) & 7; | |
492 | if (s->mode > 5) | |
493 | s->mode -= 4; | |
494 | s->bcd = val & 1; | |
495 | } | |
496 | } | |
497 | } else { | |
498 | /* Write Count. */ | |
499 | s = &pit_state->channels[addr]; | |
500 | switch (s->write_state) { | |
501 | default: | |
502 | case RW_STATE_LSB: | |
503 | pit_load_count(kvm, addr, val); | |
504 | break; | |
505 | case RW_STATE_MSB: | |
506 | pit_load_count(kvm, addr, val << 8); | |
507 | break; | |
508 | case RW_STATE_WORD0: | |
509 | s->write_latch = val; | |
510 | s->write_state = RW_STATE_WORD1; | |
511 | break; | |
512 | case RW_STATE_WORD1: | |
513 | pit_load_count(kvm, addr, s->write_latch | (val << 8)); | |
514 | s->write_state = RW_STATE_WORD0; | |
515 | break; | |
516 | } | |
517 | } | |
518 | ||
519 | mutex_unlock(&pit_state->lock); | |
bda9020e | 520 | return 0; |
7837699f SY |
521 | } |
522 | ||
e32edf4f NN |
523 | static int pit_ioport_read(struct kvm_vcpu *vcpu, |
524 | struct kvm_io_device *this, | |
bda9020e | 525 | gpa_t addr, int len, void *data) |
7837699f | 526 | { |
d76685c4 | 527 | struct kvm_pit *pit = dev_to_pit(this); |
7837699f SY |
528 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
529 | struct kvm *kvm = pit->kvm; | |
530 | int ret, count; | |
531 | struct kvm_kpit_channel_state *s; | |
bda9020e MT |
532 | if (!pit_in_range(addr)) |
533 | return -EOPNOTSUPP; | |
7837699f SY |
534 | |
535 | addr &= KVM_PIT_CHANNEL_MASK; | |
ee73f656 MT |
536 | if (addr == 3) |
537 | return 0; | |
538 | ||
7837699f SY |
539 | s = &pit_state->channels[addr]; |
540 | ||
541 | mutex_lock(&pit_state->lock); | |
542 | ||
543 | if (s->status_latched) { | |
544 | s->status_latched = 0; | |
545 | ret = s->status; | |
546 | } else if (s->count_latched) { | |
547 | switch (s->count_latched) { | |
548 | default: | |
549 | case RW_STATE_LSB: | |
550 | ret = s->latched_count & 0xff; | |
551 | s->count_latched = 0; | |
552 | break; | |
553 | case RW_STATE_MSB: | |
554 | ret = s->latched_count >> 8; | |
555 | s->count_latched = 0; | |
556 | break; | |
557 | case RW_STATE_WORD0: | |
558 | ret = s->latched_count & 0xff; | |
559 | s->count_latched = RW_STATE_MSB; | |
560 | break; | |
561 | } | |
562 | } else { | |
563 | switch (s->read_state) { | |
564 | default: | |
565 | case RW_STATE_LSB: | |
566 | count = pit_get_count(kvm, addr); | |
567 | ret = count & 0xff; | |
568 | break; | |
569 | case RW_STATE_MSB: | |
570 | count = pit_get_count(kvm, addr); | |
571 | ret = (count >> 8) & 0xff; | |
572 | break; | |
573 | case RW_STATE_WORD0: | |
574 | count = pit_get_count(kvm, addr); | |
575 | ret = count & 0xff; | |
576 | s->read_state = RW_STATE_WORD1; | |
577 | break; | |
578 | case RW_STATE_WORD1: | |
579 | count = pit_get_count(kvm, addr); | |
580 | ret = (count >> 8) & 0xff; | |
581 | s->read_state = RW_STATE_WORD0; | |
582 | break; | |
583 | } | |
584 | } | |
585 | ||
586 | if (len > sizeof(ret)) | |
587 | len = sizeof(ret); | |
588 | memcpy(data, (char *)&ret, len); | |
589 | ||
590 | mutex_unlock(&pit_state->lock); | |
bda9020e | 591 | return 0; |
7837699f SY |
592 | } |
593 | ||
e32edf4f NN |
594 | static int speaker_ioport_write(struct kvm_vcpu *vcpu, |
595 | struct kvm_io_device *this, | |
bda9020e | 596 | gpa_t addr, int len, const void *data) |
7837699f | 597 | { |
d76685c4 | 598 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
599 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
600 | struct kvm *kvm = pit->kvm; | |
601 | u32 val = *(u32 *) data; | |
bda9020e MT |
602 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
603 | return -EOPNOTSUPP; | |
7837699f SY |
604 | |
605 | mutex_lock(&pit_state->lock); | |
606 | pit_state->speaker_data_on = (val >> 1) & 1; | |
607 | pit_set_gate(kvm, 2, val & 1); | |
608 | mutex_unlock(&pit_state->lock); | |
bda9020e | 609 | return 0; |
7837699f SY |
610 | } |
611 | ||
e32edf4f NN |
612 | static int speaker_ioport_read(struct kvm_vcpu *vcpu, |
613 | struct kvm_io_device *this, | |
614 | gpa_t addr, int len, void *data) | |
7837699f | 615 | { |
d76685c4 | 616 | struct kvm_pit *pit = speaker_to_pit(this); |
7837699f SY |
617 | struct kvm_kpit_state *pit_state = &pit->pit_state; |
618 | struct kvm *kvm = pit->kvm; | |
619 | unsigned int refresh_clock; | |
620 | int ret; | |
bda9020e MT |
621 | if (addr != KVM_SPEAKER_BASE_ADDRESS) |
622 | return -EOPNOTSUPP; | |
7837699f SY |
623 | |
624 | /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ | |
625 | refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; | |
626 | ||
627 | mutex_lock(&pit_state->lock); | |
628 | ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) | | |
629 | (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4)); | |
630 | if (len > sizeof(ret)) | |
631 | len = sizeof(ret); | |
632 | memcpy(data, (char *)&ret, len); | |
633 | mutex_unlock(&pit_state->lock); | |
bda9020e | 634 | return 0; |
7837699f SY |
635 | } |
636 | ||
308b0f23 | 637 | void kvm_pit_reset(struct kvm_pit *pit) |
7837699f SY |
638 | { |
639 | int i; | |
308b0f23 SY |
640 | struct kvm_kpit_channel_state *c; |
641 | ||
642 | mutex_lock(&pit->pit_state.lock); | |
e9f42757 | 643 | pit->pit_state.flags = 0; |
308b0f23 SY |
644 | for (i = 0; i < 3; i++) { |
645 | c = &pit->pit_state.channels[i]; | |
646 | c->mode = 0xff; | |
647 | c->gate = (i != 2); | |
648 | pit_load_count(pit->kvm, i, 0); | |
649 | } | |
650 | mutex_unlock(&pit->pit_state.lock); | |
651 | ||
fd700a00 | 652 | kvm_pit_reset_reinject(pit); |
308b0f23 SY |
653 | } |
654 | ||
4780c659 AK |
655 | static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask) |
656 | { | |
657 | struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier); | |
658 | ||
fd700a00 RK |
659 | if (!mask) |
660 | kvm_pit_reset_reinject(pit); | |
4780c659 AK |
661 | } |
662 | ||
d76685c4 GH |
663 | static const struct kvm_io_device_ops pit_dev_ops = { |
664 | .read = pit_ioport_read, | |
665 | .write = pit_ioport_write, | |
d76685c4 GH |
666 | }; |
667 | ||
668 | static const struct kvm_io_device_ops speaker_dev_ops = { | |
669 | .read = speaker_ioport_read, | |
670 | .write = speaker_ioport_write, | |
d76685c4 GH |
671 | }; |
672 | ||
79fac95e | 673 | /* Caller must hold slots_lock */ |
c5ff41ce | 674 | struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags) |
308b0f23 | 675 | { |
7837699f SY |
676 | struct kvm_pit *pit; |
677 | struct kvm_kpit_state *pit_state; | |
b6ddf05f JK |
678 | struct pid *pid; |
679 | pid_t pid_nr; | |
090b7aff | 680 | int ret; |
7837699f SY |
681 | |
682 | pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); | |
683 | if (!pit) | |
684 | return NULL; | |
685 | ||
5550af4d | 686 | pit->irq_source_id = kvm_request_irq_source_id(kvm); |
e17d1dc0 AK |
687 | if (pit->irq_source_id < 0) { |
688 | kfree(pit); | |
5550af4d | 689 | return NULL; |
e17d1dc0 | 690 | } |
5550af4d | 691 | |
7837699f SY |
692 | mutex_init(&pit->pit_state.lock); |
693 | mutex_lock(&pit->pit_state.lock); | |
33572ac0 CL |
694 | spin_lock_init(&pit->pit_state.inject_lock); |
695 | ||
b6ddf05f JK |
696 | pid = get_pid(task_tgid(current)); |
697 | pid_nr = pid_vnr(pid); | |
698 | put_pid(pid); | |
699 | ||
700 | init_kthread_worker(&pit->worker); | |
701 | pit->worker_task = kthread_run(kthread_worker_fn, &pit->worker, | |
702 | "kvm-pit/%d", pid_nr); | |
703 | if (IS_ERR(pit->worker_task)) { | |
673813e8 | 704 | mutex_unlock(&pit->pit_state.lock); |
6b5d7a9f | 705 | kvm_free_irq_source_id(kvm, pit->irq_source_id); |
33572ac0 CL |
706 | kfree(pit); |
707 | return NULL; | |
708 | } | |
b6ddf05f | 709 | init_kthread_work(&pit->expired, pit_do_work); |
7837699f | 710 | |
7837699f SY |
711 | kvm->arch.vpit = pit; |
712 | pit->kvm = kvm; | |
713 | ||
714 | pit_state = &pit->pit_state; | |
715 | pit_state->pit = pit; | |
26ef1924 | 716 | hrtimer_init(&pit_state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); |
3cf57fed MT |
717 | pit_state->irq_ack_notifier.gsi = 0; |
718 | pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq; | |
719 | kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
26ef1924 | 720 | pit_state->reinject = true; |
7837699f SY |
721 | mutex_unlock(&pit->pit_state.lock); |
722 | ||
308b0f23 | 723 | kvm_pit_reset(pit); |
7837699f | 724 | |
4780c659 AK |
725 | pit->mask_notifier.func = pit_mask_notifer; |
726 | kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier); | |
727 | ||
6b66ac1a | 728 | kvm_iodevice_init(&pit->dev, &pit_dev_ops); |
743eeb0b SL |
729 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS, |
730 | KVM_PIT_MEM_LENGTH, &pit->dev); | |
090b7aff GH |
731 | if (ret < 0) |
732 | goto fail; | |
6b66ac1a GH |
733 | |
734 | if (flags & KVM_PIT_SPEAKER_DUMMY) { | |
735 | kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops); | |
e93f8a0f | 736 | ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, |
743eeb0b SL |
737 | KVM_SPEAKER_BASE_ADDRESS, 4, |
738 | &pit->speaker_dev); | |
090b7aff GH |
739 | if (ret < 0) |
740 | goto fail_unregister; | |
6b66ac1a GH |
741 | } |
742 | ||
7837699f | 743 | return pit; |
090b7aff GH |
744 | |
745 | fail_unregister: | |
e93f8a0f | 746 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev); |
090b7aff GH |
747 | |
748 | fail: | |
d225f53b WY |
749 | kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier); |
750 | kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
751 | kvm_free_irq_source_id(kvm, pit->irq_source_id); | |
b6ddf05f | 752 | kthread_stop(pit->worker_task); |
090b7aff GH |
753 | kfree(pit); |
754 | return NULL; | |
7837699f SY |
755 | } |
756 | ||
757 | void kvm_free_pit(struct kvm *kvm) | |
758 | { | |
759 | struct hrtimer *timer; | |
760 | ||
761 | if (kvm->arch.vpit) { | |
aea924f6 XG |
762 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev); |
763 | kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, | |
764 | &kvm->arch.vpit->speaker_dev); | |
4780c659 AK |
765 | kvm_unregister_irq_mask_notifier(kvm, 0, |
766 | &kvm->arch.vpit->mask_notifier); | |
84fde248 GN |
767 | kvm_unregister_irq_ack_notifier(kvm, |
768 | &kvm->arch.vpit->pit_state.irq_ack_notifier); | |
7837699f | 769 | mutex_lock(&kvm->arch.vpit->pit_state.lock); |
26ef1924 | 770 | timer = &kvm->arch.vpit->pit_state.timer; |
7837699f | 771 | hrtimer_cancel(timer); |
b6ddf05f JK |
772 | flush_kthread_work(&kvm->arch.vpit->expired); |
773 | kthread_stop(kvm->arch.vpit->worker_task); | |
5550af4d | 774 | kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id); |
7837699f SY |
775 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); |
776 | kfree(kvm->arch.vpit); | |
777 | } | |
778 | } |