KVM: VMX: Add PAT support for EPT
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
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33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
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37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
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73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
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76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
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131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
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134#define RMAP_EXT 4
135
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136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
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141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
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143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
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148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
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151};
152
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153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
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157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
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159static struct kmem_cache *pte_chain_cache;
160static struct kmem_cache *rmap_desc_cache;
d3d25b04 161static struct kmem_cache *mmu_page_header_cache;
b5a33a75 162
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163static u64 __read_mostly shadow_trap_nonpresent_pte;
164static u64 __read_mostly shadow_notrap_nonpresent_pte;
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165static u64 __read_mostly shadow_base_present_pte;
166static u64 __read_mostly shadow_nx_mask;
167static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168static u64 __read_mostly shadow_user_mask;
169static u64 __read_mostly shadow_accessed_mask;
170static u64 __read_mostly shadow_dirty_mask;
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171
172void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
173{
174 shadow_trap_nonpresent_pte = trap_pte;
175 shadow_notrap_nonpresent_pte = notrap_pte;
176}
177EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
178
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179void kvm_mmu_set_base_ptes(u64 base_pte)
180{
181 shadow_base_present_pte = base_pte;
182}
183EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
184
185void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
186 u64 dirty_mask, u64 nx_mask, u64 x_mask)
187{
188 shadow_user_mask = user_mask;
189 shadow_accessed_mask = accessed_mask;
190 shadow_dirty_mask = dirty_mask;
191 shadow_nx_mask = nx_mask;
192 shadow_x_mask = x_mask;
193}
194EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
195
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196static int is_write_protection(struct kvm_vcpu *vcpu)
197{
ad312c7c 198 return vcpu->arch.cr0 & X86_CR0_WP;
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199}
200
201static int is_cpuid_PSE36(void)
202{
203 return 1;
204}
205
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206static int is_nx(struct kvm_vcpu *vcpu)
207{
ad312c7c 208 return vcpu->arch.shadow_efer & EFER_NX;
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209}
210
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211static int is_present_pte(unsigned long pte)
212{
213 return pte & PT_PRESENT_MASK;
214}
215
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216static int is_shadow_present_pte(u64 pte)
217{
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218 return pte != shadow_trap_nonpresent_pte
219 && pte != shadow_notrap_nonpresent_pte;
220}
221
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222static int is_large_pte(u64 pte)
223{
224 return pte & PT_PAGE_SIZE_MASK;
225}
226
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227static int is_writeble_pte(unsigned long pte)
228{
229 return pte & PT_WRITABLE_MASK;
230}
231
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232static int is_dirty_pte(unsigned long pte)
233{
7b52345e 234 return pte & shadow_dirty_mask;
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235}
236
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237static int is_rmap_pte(u64 pte)
238{
4b1a80fa 239 return is_shadow_present_pte(pte);
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240}
241
35149e21 242static pfn_t spte_to_pfn(u64 pte)
0b49ea86 243{
35149e21 244 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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245}
246
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247static gfn_t pse36_gfn_delta(u32 gpte)
248{
249 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
250
251 return (gpte & PT32_DIR_PSE36_MASK) << shift;
252}
253
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254static void set_shadow_pte(u64 *sptep, u64 spte)
255{
256#ifdef CONFIG_X86_64
257 set_64bit((unsigned long *)sptep, spte);
258#else
259 set_64bit((unsigned long long *)sptep, spte);
260#endif
261}
262
e2dec939 263static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 264 struct kmem_cache *base_cache, int min)
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265{
266 void *obj;
267
268 if (cache->nobjs >= min)
e2dec939 269 return 0;
714b93da 270 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 271 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 272 if (!obj)
e2dec939 273 return -ENOMEM;
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274 cache->objects[cache->nobjs++] = obj;
275 }
e2dec939 276 return 0;
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277}
278
279static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
280{
281 while (mc->nobjs)
282 kfree(mc->objects[--mc->nobjs]);
283}
284
c1158e63 285static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 286 int min)
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287{
288 struct page *page;
289
290 if (cache->nobjs >= min)
291 return 0;
292 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 293 page = alloc_page(GFP_KERNEL);
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294 if (!page)
295 return -ENOMEM;
296 set_page_private(page, 0);
297 cache->objects[cache->nobjs++] = page_address(page);
298 }
299 return 0;
300}
301
302static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
303{
304 while (mc->nobjs)
c4d198d5 305 free_page((unsigned long)mc->objects[--mc->nobjs]);
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306}
307
2e3e5882 308static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 309{
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310 int r;
311
ad312c7c 312 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 313 pte_chain_cache, 4);
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314 if (r)
315 goto out;
ad312c7c 316 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 317 rmap_desc_cache, 4);
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318 if (r)
319 goto out;
ad312c7c 320 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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321 if (r)
322 goto out;
ad312c7c 323 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 324 mmu_page_header_cache, 4);
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325out:
326 return r;
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327}
328
329static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
330{
ad312c7c
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331 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
332 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
333 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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335}
336
337static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
338 size_t size)
339{
340 void *p;
341
342 BUG_ON(!mc->nobjs);
343 p = mc->objects[--mc->nobjs];
344 memset(p, 0, size);
345 return p;
346}
347
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348static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
349{
ad312c7c 350 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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351 sizeof(struct kvm_pte_chain));
352}
353
90cb0529 354static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 355{
90cb0529 356 kfree(pc);
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357}
358
359static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
360{
ad312c7c 361 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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362 sizeof(struct kvm_rmap_desc));
363}
364
90cb0529 365static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 366{
90cb0529 367 kfree(rd);
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368}
369
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370/*
371 * Return the pointer to the largepage write count for a given
372 * gfn, handling slots that are not large page aligned.
373 */
374static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
375{
376 unsigned long idx;
377
378 idx = (gfn / KVM_PAGES_PER_HPAGE) -
379 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
380 return &slot->lpage_info[idx].write_count;
381}
382
383static void account_shadowed(struct kvm *kvm, gfn_t gfn)
384{
385 int *write_count;
386
387 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
388 *write_count += 1;
05da4558
MT
389}
390
391static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
392{
393 int *write_count;
394
395 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
396 *write_count -= 1;
397 WARN_ON(*write_count < 0);
398}
399
400static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
401{
402 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
403 int *largepage_idx;
404
405 if (slot) {
406 largepage_idx = slot_largepage_idx(gfn, slot);
407 return *largepage_idx;
408 }
409
410 return 1;
411}
412
413static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
414{
415 struct vm_area_struct *vma;
416 unsigned long addr;
4c2155ce 417 int ret = 0;
05da4558
MT
418
419 addr = gfn_to_hva(kvm, gfn);
420 if (kvm_is_error_hva(addr))
4c2155ce 421 return ret;
05da4558 422
4c2155ce 423 down_read(&current->mm->mmap_sem);
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MT
424 vma = find_vma(current->mm, addr);
425 if (vma && is_vm_hugetlb_page(vma))
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MT
426 ret = 1;
427 up_read(&current->mm->mmap_sem);
05da4558 428
4c2155ce 429 return ret;
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MT
430}
431
432static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
433{
434 struct kvm_memory_slot *slot;
435
436 if (has_wrprotected_page(vcpu->kvm, large_gfn))
437 return 0;
438
439 if (!host_largepage_backed(vcpu->kvm, large_gfn))
440 return 0;
441
442 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
443 if (slot && slot->dirty_bitmap)
444 return 0;
445
446 return 1;
447}
448
290fc38d
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449/*
450 * Take gfn and return the reverse mapping to it.
451 * Note: gfn must be unaliased before this function get called
452 */
453
05da4558 454static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
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455{
456 struct kvm_memory_slot *slot;
05da4558 457 unsigned long idx;
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IE
458
459 slot = gfn_to_memslot(kvm, gfn);
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MT
460 if (!lpage)
461 return &slot->rmap[gfn - slot->base_gfn];
462
463 idx = (gfn / KVM_PAGES_PER_HPAGE) -
464 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
465
466 return &slot->lpage_info[idx].rmap_pde;
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467}
468
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469/*
470 * Reverse mapping data structures:
471 *
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472 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
473 * that points to page_address(page).
cd4a4e53 474 *
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475 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
476 * containing more mappings.
cd4a4e53 477 */
05da4558 478static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 479{
4db35314 480 struct kvm_mmu_page *sp;
cd4a4e53 481 struct kvm_rmap_desc *desc;
290fc38d 482 unsigned long *rmapp;
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483 int i;
484
485 if (!is_rmap_pte(*spte))
486 return;
290fc38d 487 gfn = unalias_gfn(vcpu->kvm, gfn);
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488 sp = page_header(__pa(spte));
489 sp->gfns[spte - sp->spt] = gfn;
05da4558 490 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 491 if (!*rmapp) {
cd4a4e53 492 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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IE
493 *rmapp = (unsigned long)spte;
494 } else if (!(*rmapp & 1)) {
cd4a4e53 495 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 496 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 497 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 498 desc->shadow_ptes[1] = spte;
290fc38d 499 *rmapp = (unsigned long)desc | 1;
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500 } else {
501 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 502 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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503 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
504 desc = desc->more;
505 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 506 desc->more = mmu_alloc_rmap_desc(vcpu);
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507 desc = desc->more;
508 }
509 for (i = 0; desc->shadow_ptes[i]; ++i)
510 ;
511 desc->shadow_ptes[i] = spte;
512 }
513}
514
290fc38d 515static void rmap_desc_remove_entry(unsigned long *rmapp,
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516 struct kvm_rmap_desc *desc,
517 int i,
518 struct kvm_rmap_desc *prev_desc)
519{
520 int j;
521
522 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
523 ;
524 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 525 desc->shadow_ptes[j] = NULL;
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526 if (j != 0)
527 return;
528 if (!prev_desc && !desc->more)
290fc38d 529 *rmapp = (unsigned long)desc->shadow_ptes[0];
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530 else
531 if (prev_desc)
532 prev_desc->more = desc->more;
533 else
290fc38d 534 *rmapp = (unsigned long)desc->more | 1;
90cb0529 535 mmu_free_rmap_desc(desc);
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536}
537
290fc38d 538static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 539{
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540 struct kvm_rmap_desc *desc;
541 struct kvm_rmap_desc *prev_desc;
4db35314 542 struct kvm_mmu_page *sp;
35149e21 543 pfn_t pfn;
290fc38d 544 unsigned long *rmapp;
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545 int i;
546
547 if (!is_rmap_pte(*spte))
548 return;
4db35314 549 sp = page_header(__pa(spte));
35149e21 550 pfn = spte_to_pfn(*spte);
7b52345e 551 if (*spte & shadow_accessed_mask)
35149e21 552 kvm_set_pfn_accessed(pfn);
b4231d61 553 if (is_writeble_pte(*spte))
35149e21 554 kvm_release_pfn_dirty(pfn);
b4231d61 555 else
35149e21 556 kvm_release_pfn_clean(pfn);
05da4558 557 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 558 if (!*rmapp) {
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559 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
560 BUG();
290fc38d 561 } else if (!(*rmapp & 1)) {
cd4a4e53 562 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 563 if ((u64 *)*rmapp != spte) {
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564 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
565 spte, *spte);
566 BUG();
567 }
290fc38d 568 *rmapp = 0;
cd4a4e53
AK
569 } else {
570 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 571 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
572 prev_desc = NULL;
573 while (desc) {
574 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
575 if (desc->shadow_ptes[i] == spte) {
290fc38d 576 rmap_desc_remove_entry(rmapp,
714b93da 577 desc, i,
cd4a4e53
AK
578 prev_desc);
579 return;
580 }
581 prev_desc = desc;
582 desc = desc->more;
583 }
584 BUG();
585 }
586}
587
98348e95 588static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 589{
374cbac0 590 struct kvm_rmap_desc *desc;
98348e95
IE
591 struct kvm_rmap_desc *prev_desc;
592 u64 *prev_spte;
593 int i;
594
595 if (!*rmapp)
596 return NULL;
597 else if (!(*rmapp & 1)) {
598 if (!spte)
599 return (u64 *)*rmapp;
600 return NULL;
601 }
602 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
603 prev_desc = NULL;
604 prev_spte = NULL;
605 while (desc) {
606 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
607 if (prev_spte == spte)
608 return desc->shadow_ptes[i];
609 prev_spte = desc->shadow_ptes[i];
610 }
611 desc = desc->more;
612 }
613 return NULL;
614}
615
616static void rmap_write_protect(struct kvm *kvm, u64 gfn)
617{
290fc38d 618 unsigned long *rmapp;
374cbac0 619 u64 *spte;
caa5b8a5 620 int write_protected = 0;
374cbac0 621
4a4c9924 622 gfn = unalias_gfn(kvm, gfn);
05da4558 623 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 624
98348e95
IE
625 spte = rmap_next(kvm, rmapp, NULL);
626 while (spte) {
374cbac0 627 BUG_ON(!spte);
374cbac0 628 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 629 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 630 if (is_writeble_pte(*spte)) {
9647c14c 631 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
632 write_protected = 1;
633 }
9647c14c 634 spte = rmap_next(kvm, rmapp, spte);
374cbac0 635 }
855149aa 636 if (write_protected) {
35149e21 637 pfn_t pfn;
855149aa
IE
638
639 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
640 pfn = spte_to_pfn(*spte);
641 kvm_set_pfn_dirty(pfn);
855149aa
IE
642 }
643
05da4558
MT
644 /* check for huge page mappings */
645 rmapp = gfn_to_rmap(kvm, gfn, 1);
646 spte = rmap_next(kvm, rmapp, NULL);
647 while (spte) {
648 BUG_ON(!spte);
649 BUG_ON(!(*spte & PT_PRESENT_MASK));
650 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
651 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
652 if (is_writeble_pte(*spte)) {
653 rmap_remove(kvm, spte);
654 --kvm->stat.lpages;
655 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 656 spte = NULL;
05da4558
MT
657 write_protected = 1;
658 }
659 spte = rmap_next(kvm, rmapp, spte);
660 }
661
caa5b8a5
ED
662 if (write_protected)
663 kvm_flush_remote_tlbs(kvm);
374cbac0
AK
664}
665
e930bffe
AA
666static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
667{
668 u64 *spte;
669 int need_tlb_flush = 0;
670
671 while ((spte = rmap_next(kvm, rmapp, NULL))) {
672 BUG_ON(!(*spte & PT_PRESENT_MASK));
673 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
674 rmap_remove(kvm, spte);
675 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
676 need_tlb_flush = 1;
677 }
678 return need_tlb_flush;
679}
680
681static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
682 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
683{
684 int i;
685 int retval = 0;
686
687 /*
688 * If mmap_sem isn't taken, we can look the memslots with only
689 * the mmu_lock by skipping over the slots with userspace_addr == 0.
690 */
691 for (i = 0; i < kvm->nmemslots; i++) {
692 struct kvm_memory_slot *memslot = &kvm->memslots[i];
693 unsigned long start = memslot->userspace_addr;
694 unsigned long end;
695
696 /* mmu_lock protects userspace_addr */
697 if (!start)
698 continue;
699
700 end = start + (memslot->npages << PAGE_SHIFT);
701 if (hva >= start && hva < end) {
702 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
703 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
704 retval |= handler(kvm,
705 &memslot->lpage_info[
706 gfn_offset /
707 KVM_PAGES_PER_HPAGE].rmap_pde);
708 }
709 }
710
711 return retval;
712}
713
714int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
715{
716 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
717}
718
719static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
720{
721 u64 *spte;
722 int young = 0;
723
534e38b4
SY
724 /* always return old for EPT */
725 if (!shadow_accessed_mask)
726 return 0;
727
e930bffe
AA
728 spte = rmap_next(kvm, rmapp, NULL);
729 while (spte) {
730 int _young;
731 u64 _spte = *spte;
732 BUG_ON(!(_spte & PT_PRESENT_MASK));
733 _young = _spte & PT_ACCESSED_MASK;
734 if (_young) {
735 young = 1;
736 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
737 }
738 spte = rmap_next(kvm, rmapp, spte);
739 }
740 return young;
741}
742
743int kvm_age_hva(struct kvm *kvm, unsigned long hva)
744{
745 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
746}
747
d6c69ee9 748#ifdef MMU_DEBUG
47ad8e68 749static int is_empty_shadow_page(u64 *spt)
6aa8b732 750{
139bdb2d
AK
751 u64 *pos;
752 u64 *end;
753
47ad8e68 754 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 755 if (is_shadow_present_pte(*pos)) {
b8688d51 756 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 757 pos, *pos);
6aa8b732 758 return 0;
139bdb2d 759 }
6aa8b732
AK
760 return 1;
761}
d6c69ee9 762#endif
6aa8b732 763
4db35314 764static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 765{
4db35314
AK
766 ASSERT(is_empty_shadow_page(sp->spt));
767 list_del(&sp->link);
768 __free_page(virt_to_page(sp->spt));
769 __free_page(virt_to_page(sp->gfns));
770 kfree(sp);
f05e70ac 771 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
772}
773
cea0f0e7
AK
774static unsigned kvm_page_table_hashfn(gfn_t gfn)
775{
1ae0a13d 776 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
777}
778
25c0de2c
AK
779static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
780 u64 *parent_pte)
6aa8b732 781{
4db35314 782 struct kvm_mmu_page *sp;
6aa8b732 783
ad312c7c
ZX
784 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
785 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
786 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 787 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 788 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
789 ASSERT(is_empty_shadow_page(sp->spt));
790 sp->slot_bitmap = 0;
791 sp->multimapped = 0;
792 sp->parent_pte = parent_pte;
f05e70ac 793 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 794 return sp;
6aa8b732
AK
795}
796
714b93da 797static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 798 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
799{
800 struct kvm_pte_chain *pte_chain;
801 struct hlist_node *node;
802 int i;
803
804 if (!parent_pte)
805 return;
4db35314
AK
806 if (!sp->multimapped) {
807 u64 *old = sp->parent_pte;
cea0f0e7
AK
808
809 if (!old) {
4db35314 810 sp->parent_pte = parent_pte;
cea0f0e7
AK
811 return;
812 }
4db35314 813 sp->multimapped = 1;
714b93da 814 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
815 INIT_HLIST_HEAD(&sp->parent_ptes);
816 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
817 pte_chain->parent_ptes[0] = old;
818 }
4db35314 819 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
820 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
821 continue;
822 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
823 if (!pte_chain->parent_ptes[i]) {
824 pte_chain->parent_ptes[i] = parent_pte;
825 return;
826 }
827 }
714b93da 828 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 829 BUG_ON(!pte_chain);
4db35314 830 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
831 pte_chain->parent_ptes[0] = parent_pte;
832}
833
4db35314 834static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
835 u64 *parent_pte)
836{
837 struct kvm_pte_chain *pte_chain;
838 struct hlist_node *node;
839 int i;
840
4db35314
AK
841 if (!sp->multimapped) {
842 BUG_ON(sp->parent_pte != parent_pte);
843 sp->parent_pte = NULL;
cea0f0e7
AK
844 return;
845 }
4db35314 846 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
847 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
848 if (!pte_chain->parent_ptes[i])
849 break;
850 if (pte_chain->parent_ptes[i] != parent_pte)
851 continue;
697fe2e2
AK
852 while (i + 1 < NR_PTE_CHAIN_ENTRIES
853 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
854 pte_chain->parent_ptes[i]
855 = pte_chain->parent_ptes[i + 1];
856 ++i;
857 }
858 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
859 if (i == 0) {
860 hlist_del(&pte_chain->link);
90cb0529 861 mmu_free_pte_chain(pte_chain);
4db35314
AK
862 if (hlist_empty(&sp->parent_ptes)) {
863 sp->multimapped = 0;
864 sp->parent_pte = NULL;
697fe2e2
AK
865 }
866 }
cea0f0e7
AK
867 return;
868 }
869 BUG();
870}
871
ad8cfbe3
MT
872
873static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
874 mmu_parent_walk_fn fn)
875{
876 struct kvm_pte_chain *pte_chain;
877 struct hlist_node *node;
878 struct kvm_mmu_page *parent_sp;
879 int i;
880
881 if (!sp->multimapped && sp->parent_pte) {
882 parent_sp = page_header(__pa(sp->parent_pte));
883 fn(vcpu, parent_sp);
884 mmu_parent_walk(vcpu, parent_sp, fn);
885 return;
886 }
887 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
888 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
889 if (!pte_chain->parent_ptes[i])
890 break;
891 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
892 fn(vcpu, parent_sp);
893 mmu_parent_walk(vcpu, parent_sp, fn);
894 }
895}
896
0074ff63
MT
897static void kvm_mmu_update_unsync_bitmap(u64 *spte)
898{
899 unsigned int index;
900 struct kvm_mmu_page *sp = page_header(__pa(spte));
901
902 index = spte - sp->spt;
903 __set_bit(index, sp->unsync_child_bitmap);
904 sp->unsync_children = 1;
905}
906
907static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
908{
909 struct kvm_pte_chain *pte_chain;
910 struct hlist_node *node;
911 int i;
912
913 if (!sp->parent_pte)
914 return;
915
916 if (!sp->multimapped) {
917 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
918 return;
919 }
920
921 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
922 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
923 if (!pte_chain->parent_ptes[i])
924 break;
925 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
926 }
927}
928
929static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
930{
931 sp->unsync_children = 1;
932 kvm_mmu_update_parents_unsync(sp);
933 return 1;
934}
935
936static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
937 struct kvm_mmu_page *sp)
938{
939 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
940 kvm_mmu_update_parents_unsync(sp);
941}
942
d761a501
AK
943static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
944 struct kvm_mmu_page *sp)
945{
946 int i;
947
948 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
949 sp->spt[i] = shadow_trap_nonpresent_pte;
950}
951
e8bc217a
MT
952static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
953 struct kvm_mmu_page *sp)
954{
955 return 1;
956}
957
a7052897
MT
958static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
959{
960}
961
0074ff63
MT
962#define for_each_unsync_children(bitmap, idx) \
963 for (idx = find_first_bit(bitmap, 512); \
964 idx < 512; \
965 idx = find_next_bit(bitmap, 512, idx+1))
966
4731d4c7
MT
967static int mmu_unsync_walk(struct kvm_mmu_page *sp,
968 struct kvm_unsync_walk *walker)
969{
970 int i, ret;
971
972 if (!sp->unsync_children)
973 return 0;
974
0074ff63 975 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
976 u64 ent = sp->spt[i];
977
978 if (is_shadow_present_pte(ent)) {
979 struct kvm_mmu_page *child;
980 child = page_header(ent & PT64_BASE_ADDR_MASK);
981
982 if (child->unsync_children) {
983 ret = mmu_unsync_walk(child, walker);
984 if (ret)
985 return ret;
0074ff63 986 __clear_bit(i, sp->unsync_child_bitmap);
4731d4c7
MT
987 }
988
989 if (child->unsync) {
990 ret = walker->entry(child, walker);
0074ff63 991 __clear_bit(i, sp->unsync_child_bitmap);
4731d4c7
MT
992 if (ret)
993 return ret;
994 }
995 }
996 }
997
0074ff63 998 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
999 sp->unsync_children = 0;
1000
1001 return 0;
1002}
1003
4db35314 1004static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1005{
1006 unsigned index;
1007 struct hlist_head *bucket;
4db35314 1008 struct kvm_mmu_page *sp;
cea0f0e7
AK
1009 struct hlist_node *node;
1010
b8688d51 1011 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1012 index = kvm_page_table_hashfn(gfn);
f05e70ac 1013 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1014 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1015 if (sp->gfn == gfn && !sp->role.metaphysical
1016 && !sp->role.invalid) {
cea0f0e7 1017 pgprintk("%s: found role %x\n",
b8688d51 1018 __func__, sp->role.word);
4db35314 1019 return sp;
cea0f0e7
AK
1020 }
1021 return NULL;
1022}
1023
4731d4c7
MT
1024static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1025{
1026 WARN_ON(!sp->unsync);
1027 sp->unsync = 0;
1028 --kvm->stat.mmu_unsync;
1029}
1030
1031static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1032
1033static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1034{
1035 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1036 kvm_mmu_zap_page(vcpu->kvm, sp);
1037 return 1;
1038 }
1039
1040 rmap_write_protect(vcpu->kvm, sp->gfn);
0c0f40bd 1041 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1042 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1043 kvm_mmu_zap_page(vcpu->kvm, sp);
1044 return 1;
1045 }
1046
1047 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1048 return 0;
1049}
1050
1051struct sync_walker {
1052 struct kvm_vcpu *vcpu;
1053 struct kvm_unsync_walk walker;
1054};
1055
1056static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1057{
1058 struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
1059 walker);
1060 struct kvm_vcpu *vcpu = sync_walk->vcpu;
1061
1062 kvm_sync_page(vcpu, sp);
1063 return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
1064}
1065
1066static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1067{
1068 struct sync_walker walker = {
1069 .walker = { .entry = mmu_sync_fn, },
1070 .vcpu = vcpu,
1071 };
1072
1073 while (mmu_unsync_walk(sp, &walker.walker))
1074 cond_resched_lock(&vcpu->kvm->mmu_lock);
1075}
1076
cea0f0e7
AK
1077static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1078 gfn_t gfn,
1079 gva_t gaddr,
1080 unsigned level,
1081 int metaphysical,
41074d07 1082 unsigned access,
f7d9c7b7 1083 u64 *parent_pte)
cea0f0e7
AK
1084{
1085 union kvm_mmu_page_role role;
1086 unsigned index;
1087 unsigned quadrant;
1088 struct hlist_head *bucket;
4db35314 1089 struct kvm_mmu_page *sp;
4731d4c7 1090 struct hlist_node *node, *tmp;
cea0f0e7
AK
1091
1092 role.word = 0;
ad312c7c 1093 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
1094 role.level = level;
1095 role.metaphysical = metaphysical;
41074d07 1096 role.access = access;
ad312c7c 1097 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1098 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1099 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1100 role.quadrant = quadrant;
1101 }
b8688d51 1102 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1103 gfn, role.word);
1ae0a13d 1104 index = kvm_page_table_hashfn(gfn);
f05e70ac 1105 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1106 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1107 if (sp->gfn == gfn) {
1108 if (sp->unsync)
1109 if (kvm_sync_page(vcpu, sp))
1110 continue;
1111
1112 if (sp->role.word != role.word)
1113 continue;
1114
4db35314 1115 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1116 if (sp->unsync_children) {
1117 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1118 kvm_mmu_mark_parents_unsync(vcpu, sp);
1119 }
b8688d51 1120 pgprintk("%s: found\n", __func__);
4db35314 1121 return sp;
cea0f0e7 1122 }
dfc5aa00 1123 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1124 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1125 if (!sp)
1126 return sp;
b8688d51 1127 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1128 sp->gfn = gfn;
1129 sp->role = role;
1130 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1131 if (!metaphysical) {
4a4c9924 1132 rmap_write_protect(vcpu->kvm, gfn);
4731d4c7
MT
1133 account_shadowed(vcpu->kvm, gfn);
1134 }
131d8279
AK
1135 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1136 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1137 else
1138 nonpaging_prefetch_page(vcpu, sp);
4db35314 1139 return sp;
cea0f0e7
AK
1140}
1141
3d000db5 1142static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1143 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
1144{
1145 hpa_t shadow_addr;
1146 int level;
1147 int r;
1148 u64 *sptep;
1149 unsigned index;
1150
1151 shadow_addr = vcpu->arch.mmu.root_hpa;
1152 level = vcpu->arch.mmu.shadow_root_level;
1153 if (level == PT32E_ROOT_LEVEL) {
1154 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1155 shadow_addr &= PT64_BASE_ADDR_MASK;
1156 --level;
1157 }
1158
1159 while (level >= PT_PAGE_TABLE_LEVEL) {
1160 index = SHADOW_PT_INDEX(addr, level);
1161 sptep = ((u64 *)__va(shadow_addr)) + index;
1162 r = walker->entry(walker, vcpu, addr, sptep, level);
1163 if (r)
1164 return r;
1165 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1166 --level;
1167 }
1168 return 0;
1169}
1170
90cb0529 1171static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1172 struct kvm_mmu_page *sp)
a436036b 1173{
697fe2e2
AK
1174 unsigned i;
1175 u64 *pt;
1176 u64 ent;
1177
4db35314 1178 pt = sp->spt;
697fe2e2 1179
4db35314 1180 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1181 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1182 if (is_shadow_present_pte(pt[i]))
290fc38d 1183 rmap_remove(kvm, &pt[i]);
c7addb90 1184 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1185 }
1186 return;
1187 }
1188
1189 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1190 ent = pt[i];
1191
05da4558
MT
1192 if (is_shadow_present_pte(ent)) {
1193 if (!is_large_pte(ent)) {
1194 ent &= PT64_BASE_ADDR_MASK;
1195 mmu_page_remove_parent_pte(page_header(ent),
1196 &pt[i]);
1197 } else {
1198 --kvm->stat.lpages;
1199 rmap_remove(kvm, &pt[i]);
1200 }
1201 }
c7addb90 1202 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1203 }
a436036b
AK
1204}
1205
4db35314 1206static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1207{
4db35314 1208 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1209}
1210
12b7d28f
AK
1211static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1212{
1213 int i;
1214
1215 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1216 if (kvm->vcpus[i])
ad312c7c 1217 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1218}
1219
31aa2b44 1220static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1221{
1222 u64 *parent_pte;
1223
4db35314
AK
1224 while (sp->multimapped || sp->parent_pte) {
1225 if (!sp->multimapped)
1226 parent_pte = sp->parent_pte;
a436036b
AK
1227 else {
1228 struct kvm_pte_chain *chain;
1229
4db35314 1230 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1231 struct kvm_pte_chain, link);
1232 parent_pte = chain->parent_ptes[0];
1233 }
697fe2e2 1234 BUG_ON(!parent_pte);
4db35314 1235 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1236 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1237 }
31aa2b44
AK
1238}
1239
4731d4c7
MT
1240struct zap_walker {
1241 struct kvm_unsync_walk walker;
1242 struct kvm *kvm;
1243 int zapped;
1244};
1245
1246static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1247{
1248 struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
1249 walker);
1250 kvm_mmu_zap_page(zap_walk->kvm, sp);
1251 zap_walk->zapped = 1;
1252 return 0;
1253}
1254
1255static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
1256{
1257 struct zap_walker walker = {
1258 .walker = { .entry = mmu_zap_fn, },
1259 .kvm = kvm,
1260 .zapped = 0,
1261 };
1262
1263 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1264 return 0;
1265 mmu_unsync_walk(sp, &walker.walker);
1266 return walker.zapped;
1267}
1268
07385413 1269static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1270{
4731d4c7 1271 int ret;
31aa2b44 1272 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1273 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1274 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1275 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1276 kvm_flush_remote_tlbs(kvm);
1277 if (!sp->role.invalid && !sp->role.metaphysical)
1278 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1279 if (sp->unsync)
1280 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1281 if (!sp->root_count) {
1282 hlist_del(&sp->hash_link);
1283 kvm_mmu_free_page(kvm, sp);
2e53d63a 1284 } else {
2e53d63a 1285 sp->role.invalid = 1;
5b5c6a5a 1286 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1287 kvm_reload_remote_mmus(kvm);
1288 }
12b7d28f 1289 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1290 return ret;
a436036b
AK
1291}
1292
82ce2c96
IE
1293/*
1294 * Changing the number of mmu pages allocated to the vm
1295 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1296 */
1297void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1298{
1299 /*
1300 * If we set the number of mmu pages to be smaller be than the
1301 * number of actived pages , we must to free some mmu pages before we
1302 * change the value
1303 */
1304
f05e70ac 1305 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1306 kvm_nr_mmu_pages) {
f05e70ac
ZX
1307 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1308 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1309
1310 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1311 struct kvm_mmu_page *page;
1312
f05e70ac 1313 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1314 struct kvm_mmu_page, link);
1315 kvm_mmu_zap_page(kvm, page);
1316 n_used_mmu_pages--;
1317 }
f05e70ac 1318 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1319 }
1320 else
f05e70ac
ZX
1321 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1322 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1323
f05e70ac 1324 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1325}
1326
f67a46f4 1327static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1328{
1329 unsigned index;
1330 struct hlist_head *bucket;
4db35314 1331 struct kvm_mmu_page *sp;
a436036b
AK
1332 struct hlist_node *node, *n;
1333 int r;
1334
b8688d51 1335 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1336 r = 0;
1ae0a13d 1337 index = kvm_page_table_hashfn(gfn);
f05e70ac 1338 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1339 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1340 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1341 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1342 sp->role.word);
a436036b 1343 r = 1;
07385413
MT
1344 if (kvm_mmu_zap_page(kvm, sp))
1345 n = bucket->first;
a436036b
AK
1346 }
1347 return r;
cea0f0e7
AK
1348}
1349
f67a46f4 1350static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1351{
4db35314 1352 struct kvm_mmu_page *sp;
97a0a01e 1353
4db35314 1354 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1355 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1356 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1357 }
1358}
1359
38c335f1 1360static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1361{
38c335f1 1362 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1363 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1364
4db35314 1365 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1366}
1367
6844dec6
MT
1368static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1369{
1370 int i;
1371 u64 *pt = sp->spt;
1372
1373 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1374 return;
1375
1376 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1377 if (pt[i] == shadow_notrap_nonpresent_pte)
1378 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1379 }
1380}
1381
039576c0
AK
1382struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1383{
72dc67a6
IE
1384 struct page *page;
1385
ad312c7c 1386 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1387
1388 if (gpa == UNMAPPED_GVA)
1389 return NULL;
72dc67a6 1390
72dc67a6 1391 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1392
1393 return page;
039576c0
AK
1394}
1395
4731d4c7
MT
1396static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1397{
1398 unsigned index;
1399 struct hlist_head *bucket;
1400 struct kvm_mmu_page *s;
1401 struct hlist_node *node, *n;
1402
1403 index = kvm_page_table_hashfn(sp->gfn);
1404 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1405 /* don't unsync if pagetable is shadowed with multiple roles */
1406 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1407 if (s->gfn != sp->gfn || s->role.metaphysical)
1408 continue;
1409 if (s->role.word != sp->role.word)
1410 return 1;
1411 }
0074ff63 1412 kvm_mmu_mark_parents_unsync(vcpu, sp);
4731d4c7
MT
1413 ++vcpu->kvm->stat.mmu_unsync;
1414 sp->unsync = 1;
1415 mmu_convert_notrap(sp);
1416 return 0;
1417}
1418
1419static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1420 bool can_unsync)
1421{
1422 struct kvm_mmu_page *shadow;
1423
1424 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1425 if (shadow) {
1426 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1427 return 1;
1428 if (shadow->unsync)
1429 return 0;
582801a9 1430 if (can_unsync && oos_shadow)
4731d4c7
MT
1431 return kvm_unsync_page(vcpu, shadow);
1432 return 1;
1433 }
1434 return 0;
1435}
1436
1e73f9dd
MT
1437static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1438 unsigned pte_access, int user_fault,
1439 int write_fault, int dirty, int largepage,
4731d4c7
MT
1440 gfn_t gfn, pfn_t pfn, bool speculative,
1441 bool can_unsync)
1c4f1fd6
AK
1442{
1443 u64 spte;
1e73f9dd 1444 int ret = 0;
1c4f1fd6
AK
1445 /*
1446 * We don't set the accessed bit, since we sometimes want to see
1447 * whether the guest actually used the pte (in order to detect
1448 * demand paging).
1449 */
7b52345e 1450 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1451 if (!speculative)
3201b5d9 1452 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1453 if (!dirty)
1454 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1455 if (pte_access & ACC_EXEC_MASK)
1456 spte |= shadow_x_mask;
1457 else
1458 spte |= shadow_nx_mask;
1c4f1fd6 1459 if (pte_access & ACC_USER_MASK)
7b52345e 1460 spte |= shadow_user_mask;
05da4558
MT
1461 if (largepage)
1462 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1463
35149e21 1464 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1465
1466 if ((pte_access & ACC_WRITE_MASK)
1467 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1468
38187c83
MT
1469 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1470 ret = 1;
1471 spte = shadow_trap_nonpresent_pte;
1472 goto set_pte;
1473 }
1474
1c4f1fd6 1475 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1476
4731d4c7 1477 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1478 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1479 __func__, gfn);
1e73f9dd 1480 ret = 1;
1c4f1fd6 1481 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1482 if (is_writeble_pte(spte))
1c4f1fd6 1483 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1484 }
1485 }
1486
1c4f1fd6
AK
1487 if (pte_access & ACC_WRITE_MASK)
1488 mark_page_dirty(vcpu->kvm, gfn);
1489
38187c83 1490set_pte:
1c4f1fd6 1491 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1492 return ret;
1493}
1494
1e73f9dd
MT
1495static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1496 unsigned pt_access, unsigned pte_access,
1497 int user_fault, int write_fault, int dirty,
1498 int *ptwrite, int largepage, gfn_t gfn,
1499 pfn_t pfn, bool speculative)
1500{
1501 int was_rmapped = 0;
1502 int was_writeble = is_writeble_pte(*shadow_pte);
1503
1504 pgprintk("%s: spte %llx access %x write_fault %d"
1505 " user_fault %d gfn %lx\n",
1506 __func__, *shadow_pte, pt_access,
1507 write_fault, user_fault, gfn);
1508
1509 if (is_rmap_pte(*shadow_pte)) {
1510 /*
1511 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1512 * the parent of the now unreachable PTE.
1513 */
1514 if (largepage && !is_large_pte(*shadow_pte)) {
1515 struct kvm_mmu_page *child;
1516 u64 pte = *shadow_pte;
1517
1518 child = page_header(pte & PT64_BASE_ADDR_MASK);
1519 mmu_page_remove_parent_pte(child, shadow_pte);
1520 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1521 pgprintk("hfn old %lx new %lx\n",
1522 spte_to_pfn(*shadow_pte), pfn);
1523 rmap_remove(vcpu->kvm, shadow_pte);
1524 } else {
1525 if (largepage)
1526 was_rmapped = is_large_pte(*shadow_pte);
1527 else
1528 was_rmapped = 1;
1529 }
1530 }
1531 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
4731d4c7 1532 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1533 if (write_fault)
1534 *ptwrite = 1;
a378b4e6
MT
1535 kvm_x86_ops->tlb_flush(vcpu);
1536 }
1e73f9dd
MT
1537
1538 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1539 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1540 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1541 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1542 *shadow_pte, shadow_pte);
1543 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1544 ++vcpu->kvm->stat.lpages;
1545
1c4f1fd6
AK
1546 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1547 if (!was_rmapped) {
05da4558 1548 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1549 if (!is_rmap_pte(*shadow_pte))
35149e21 1550 kvm_release_pfn_clean(pfn);
75e68e60
IE
1551 } else {
1552 if (was_writeble)
35149e21 1553 kvm_release_pfn_dirty(pfn);
75e68e60 1554 else
35149e21 1555 kvm_release_pfn_clean(pfn);
1c4f1fd6 1556 }
1b7fcd32 1557 if (speculative) {
ad312c7c 1558 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1559 vcpu->arch.last_pte_gfn = gfn;
1560 }
1c4f1fd6
AK
1561}
1562
6aa8b732
AK
1563static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1564{
1565}
1566
140754bc
AK
1567struct direct_shadow_walk {
1568 struct kvm_shadow_walk walker;
1569 pfn_t pfn;
1570 int write;
1571 int largepage;
1572 int pt_write;
1573};
6aa8b732 1574
140754bc
AK
1575static int direct_map_entry(struct kvm_shadow_walk *_walk,
1576 struct kvm_vcpu *vcpu,
d40a1ee4 1577 u64 addr, u64 *sptep, int level)
140754bc
AK
1578{
1579 struct direct_shadow_walk *walk =
1580 container_of(_walk, struct direct_shadow_walk, walker);
1581 struct kvm_mmu_page *sp;
1582 gfn_t pseudo_gfn;
1583 gfn_t gfn = addr >> PAGE_SHIFT;
1584
1585 if (level == PT_PAGE_TABLE_LEVEL
1586 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1587 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1588 0, walk->write, 1, &walk->pt_write,
1589 walk->largepage, gfn, walk->pfn, false);
bc2d4299 1590 ++vcpu->stat.pf_fixed;
140754bc
AK
1591 return 1;
1592 }
6aa8b732 1593
140754bc
AK
1594 if (*sptep == shadow_trap_nonpresent_pte) {
1595 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1596 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1597 1, ACC_ALL, sptep);
1598 if (!sp) {
1599 pgprintk("nonpaging_map: ENOMEM\n");
1600 kvm_release_pfn_clean(walk->pfn);
1601 return -ENOMEM;
6aa8b732
AK
1602 }
1603
140754bc
AK
1604 set_shadow_pte(sptep,
1605 __pa(sp->spt)
1606 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1607 | shadow_user_mask | shadow_x_mask);
6aa8b732 1608 }
140754bc
AK
1609 return 0;
1610}
1611
1612static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1613 int largepage, gfn_t gfn, pfn_t pfn)
1614{
1615 int r;
1616 struct direct_shadow_walk walker = {
1617 .walker = { .entry = direct_map_entry, },
1618 .pfn = pfn,
1619 .largepage = largepage,
1620 .write = write,
1621 .pt_write = 0,
1622 };
1623
d40a1ee4 1624 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1625 if (r < 0)
1626 return r;
1627 return walker.pt_write;
6aa8b732
AK
1628}
1629
10589a46
MT
1630static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1631{
1632 int r;
05da4558 1633 int largepage = 0;
35149e21 1634 pfn_t pfn;
e930bffe 1635 unsigned long mmu_seq;
aaee2c94 1636
05da4558
MT
1637 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1638 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1639 largepage = 1;
1640 }
1641
e930bffe 1642 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1643 smp_rmb();
35149e21 1644 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1645
d196e343 1646 /* mmio */
35149e21
AL
1647 if (is_error_pfn(pfn)) {
1648 kvm_release_pfn_clean(pfn);
d196e343
AK
1649 return 1;
1650 }
1651
aaee2c94 1652 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1653 if (mmu_notifier_retry(vcpu, mmu_seq))
1654 goto out_unlock;
eb787d10 1655 kvm_mmu_free_some_pages(vcpu);
6c41f428 1656 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1657 spin_unlock(&vcpu->kvm->mmu_lock);
1658
aaee2c94 1659
10589a46 1660 return r;
e930bffe
AA
1661
1662out_unlock:
1663 spin_unlock(&vcpu->kvm->mmu_lock);
1664 kvm_release_pfn_clean(pfn);
1665 return 0;
10589a46
MT
1666}
1667
1668
17ac10ad
AK
1669static void mmu_free_roots(struct kvm_vcpu *vcpu)
1670{
1671 int i;
4db35314 1672 struct kvm_mmu_page *sp;
17ac10ad 1673
ad312c7c 1674 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1675 return;
aaee2c94 1676 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1677 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1678 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1679
4db35314
AK
1680 sp = page_header(root);
1681 --sp->root_count;
2e53d63a
MT
1682 if (!sp->root_count && sp->role.invalid)
1683 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1684 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1685 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1686 return;
1687 }
17ac10ad 1688 for (i = 0; i < 4; ++i) {
ad312c7c 1689 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1690
417726a3 1691 if (root) {
417726a3 1692 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1693 sp = page_header(root);
1694 --sp->root_count;
2e53d63a
MT
1695 if (!sp->root_count && sp->role.invalid)
1696 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1697 }
ad312c7c 1698 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1699 }
aaee2c94 1700 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1701 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1702}
1703
1704static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1705{
1706 int i;
cea0f0e7 1707 gfn_t root_gfn;
4db35314 1708 struct kvm_mmu_page *sp;
fb72d167 1709 int metaphysical = 0;
3bb65a22 1710
ad312c7c 1711 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1712
ad312c7c
ZX
1713 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1714 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1715
1716 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1717 if (tdp_enabled)
1718 metaphysical = 1;
4db35314 1719 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1720 PT64_ROOT_LEVEL, metaphysical,
1721 ACC_ALL, NULL);
4db35314
AK
1722 root = __pa(sp->spt);
1723 ++sp->root_count;
ad312c7c 1724 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1725 return;
1726 }
fb72d167
JR
1727 metaphysical = !is_paging(vcpu);
1728 if (tdp_enabled)
1729 metaphysical = 1;
17ac10ad 1730 for (i = 0; i < 4; ++i) {
ad312c7c 1731 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1732
1733 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1734 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1735 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1736 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1737 continue;
1738 }
ad312c7c
ZX
1739 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1740 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1741 root_gfn = 0;
4db35314 1742 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1743 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1744 ACC_ALL, NULL);
4db35314
AK
1745 root = __pa(sp->spt);
1746 ++sp->root_count;
ad312c7c 1747 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1748 }
ad312c7c 1749 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1750}
1751
0ba73cda
MT
1752static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1753{
1754 int i;
1755 struct kvm_mmu_page *sp;
1756
1757 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1758 return;
1759 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1760 hpa_t root = vcpu->arch.mmu.root_hpa;
1761 sp = page_header(root);
1762 mmu_sync_children(vcpu, sp);
1763 return;
1764 }
1765 for (i = 0; i < 4; ++i) {
1766 hpa_t root = vcpu->arch.mmu.pae_root[i];
1767
1768 if (root) {
1769 root &= PT64_BASE_ADDR_MASK;
1770 sp = page_header(root);
1771 mmu_sync_children(vcpu, sp);
1772 }
1773 }
1774}
1775
1776void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1777{
1778 spin_lock(&vcpu->kvm->mmu_lock);
1779 mmu_sync_roots(vcpu);
1780 spin_unlock(&vcpu->kvm->mmu_lock);
1781}
1782
6aa8b732
AK
1783static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1784{
1785 return vaddr;
1786}
1787
1788static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1789 u32 error_code)
6aa8b732 1790{
e833240f 1791 gfn_t gfn;
e2dec939 1792 int r;
6aa8b732 1793
b8688d51 1794 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1795 r = mmu_topup_memory_caches(vcpu);
1796 if (r)
1797 return r;
714b93da 1798
6aa8b732 1799 ASSERT(vcpu);
ad312c7c 1800 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1801
e833240f 1802 gfn = gva >> PAGE_SHIFT;
6aa8b732 1803
e833240f
AK
1804 return nonpaging_map(vcpu, gva & PAGE_MASK,
1805 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1806}
1807
fb72d167
JR
1808static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1809 u32 error_code)
1810{
35149e21 1811 pfn_t pfn;
fb72d167 1812 int r;
05da4558
MT
1813 int largepage = 0;
1814 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 1815 unsigned long mmu_seq;
fb72d167
JR
1816
1817 ASSERT(vcpu);
1818 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1819
1820 r = mmu_topup_memory_caches(vcpu);
1821 if (r)
1822 return r;
1823
05da4558
MT
1824 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1825 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1826 largepage = 1;
1827 }
e930bffe 1828 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1829 smp_rmb();
35149e21 1830 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
1831 if (is_error_pfn(pfn)) {
1832 kvm_release_pfn_clean(pfn);
fb72d167
JR
1833 return 1;
1834 }
1835 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1836 if (mmu_notifier_retry(vcpu, mmu_seq))
1837 goto out_unlock;
fb72d167
JR
1838 kvm_mmu_free_some_pages(vcpu);
1839 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 1840 largepage, gfn, pfn);
fb72d167 1841 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1842
1843 return r;
e930bffe
AA
1844
1845out_unlock:
1846 spin_unlock(&vcpu->kvm->mmu_lock);
1847 kvm_release_pfn_clean(pfn);
1848 return 0;
fb72d167
JR
1849}
1850
6aa8b732
AK
1851static void nonpaging_free(struct kvm_vcpu *vcpu)
1852{
17ac10ad 1853 mmu_free_roots(vcpu);
6aa8b732
AK
1854}
1855
1856static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1857{
ad312c7c 1858 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1859
1860 context->new_cr3 = nonpaging_new_cr3;
1861 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1862 context->gva_to_gpa = nonpaging_gva_to_gpa;
1863 context->free = nonpaging_free;
c7addb90 1864 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 1865 context->sync_page = nonpaging_sync_page;
a7052897 1866 context->invlpg = nonpaging_invlpg;
cea0f0e7 1867 context->root_level = 0;
6aa8b732 1868 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1869 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1870 return 0;
1871}
1872
d835dfec 1873void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1874{
1165f5fe 1875 ++vcpu->stat.tlb_flush;
cbdd1bea 1876 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1877}
1878
1879static void paging_new_cr3(struct kvm_vcpu *vcpu)
1880{
b8688d51 1881 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1882 mmu_free_roots(vcpu);
6aa8b732
AK
1883}
1884
6aa8b732
AK
1885static void inject_page_fault(struct kvm_vcpu *vcpu,
1886 u64 addr,
1887 u32 err_code)
1888{
c3c91fee 1889 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1890}
1891
6aa8b732
AK
1892static void paging_free(struct kvm_vcpu *vcpu)
1893{
1894 nonpaging_free(vcpu);
1895}
1896
1897#define PTTYPE 64
1898#include "paging_tmpl.h"
1899#undef PTTYPE
1900
1901#define PTTYPE 32
1902#include "paging_tmpl.h"
1903#undef PTTYPE
1904
17ac10ad 1905static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1906{
ad312c7c 1907 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1908
1909 ASSERT(is_pae(vcpu));
1910 context->new_cr3 = paging_new_cr3;
1911 context->page_fault = paging64_page_fault;
6aa8b732 1912 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1913 context->prefetch_page = paging64_prefetch_page;
e8bc217a 1914 context->sync_page = paging64_sync_page;
a7052897 1915 context->invlpg = paging64_invlpg;
6aa8b732 1916 context->free = paging_free;
17ac10ad
AK
1917 context->root_level = level;
1918 context->shadow_root_level = level;
17c3ba9d 1919 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1920 return 0;
1921}
1922
17ac10ad
AK
1923static int paging64_init_context(struct kvm_vcpu *vcpu)
1924{
1925 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1926}
1927
6aa8b732
AK
1928static int paging32_init_context(struct kvm_vcpu *vcpu)
1929{
ad312c7c 1930 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1931
1932 context->new_cr3 = paging_new_cr3;
1933 context->page_fault = paging32_page_fault;
6aa8b732
AK
1934 context->gva_to_gpa = paging32_gva_to_gpa;
1935 context->free = paging_free;
c7addb90 1936 context->prefetch_page = paging32_prefetch_page;
e8bc217a 1937 context->sync_page = paging32_sync_page;
a7052897 1938 context->invlpg = paging32_invlpg;
6aa8b732
AK
1939 context->root_level = PT32_ROOT_LEVEL;
1940 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1941 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1942 return 0;
1943}
1944
1945static int paging32E_init_context(struct kvm_vcpu *vcpu)
1946{
17ac10ad 1947 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1948}
1949
fb72d167
JR
1950static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1951{
1952 struct kvm_mmu *context = &vcpu->arch.mmu;
1953
1954 context->new_cr3 = nonpaging_new_cr3;
1955 context->page_fault = tdp_page_fault;
1956 context->free = nonpaging_free;
1957 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 1958 context->sync_page = nonpaging_sync_page;
a7052897 1959 context->invlpg = nonpaging_invlpg;
67253af5 1960 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
1961 context->root_hpa = INVALID_PAGE;
1962
1963 if (!is_paging(vcpu)) {
1964 context->gva_to_gpa = nonpaging_gva_to_gpa;
1965 context->root_level = 0;
1966 } else if (is_long_mode(vcpu)) {
1967 context->gva_to_gpa = paging64_gva_to_gpa;
1968 context->root_level = PT64_ROOT_LEVEL;
1969 } else if (is_pae(vcpu)) {
1970 context->gva_to_gpa = paging64_gva_to_gpa;
1971 context->root_level = PT32E_ROOT_LEVEL;
1972 } else {
1973 context->gva_to_gpa = paging32_gva_to_gpa;
1974 context->root_level = PT32_ROOT_LEVEL;
1975 }
1976
1977 return 0;
1978}
1979
1980static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1981{
1982 ASSERT(vcpu);
ad312c7c 1983 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1984
1985 if (!is_paging(vcpu))
1986 return nonpaging_init_context(vcpu);
a9058ecd 1987 else if (is_long_mode(vcpu))
6aa8b732
AK
1988 return paging64_init_context(vcpu);
1989 else if (is_pae(vcpu))
1990 return paging32E_init_context(vcpu);
1991 else
1992 return paging32_init_context(vcpu);
1993}
1994
fb72d167
JR
1995static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1996{
35149e21
AL
1997 vcpu->arch.update_pte.pfn = bad_pfn;
1998
fb72d167
JR
1999 if (tdp_enabled)
2000 return init_kvm_tdp_mmu(vcpu);
2001 else
2002 return init_kvm_softmmu(vcpu);
2003}
2004
6aa8b732
AK
2005static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2006{
2007 ASSERT(vcpu);
ad312c7c
ZX
2008 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2009 vcpu->arch.mmu.free(vcpu);
2010 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2011 }
2012}
2013
2014int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2015{
2016 destroy_kvm_mmu(vcpu);
2017 return init_kvm_mmu(vcpu);
2018}
8668a3c4 2019EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2020
2021int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2022{
714b93da
AK
2023 int r;
2024
e2dec939 2025 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2026 if (r)
2027 goto out;
aaee2c94 2028 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2029 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2030 mmu_alloc_roots(vcpu);
0ba73cda 2031 mmu_sync_roots(vcpu);
aaee2c94 2032 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2033 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2034 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2035out:
2036 return r;
6aa8b732 2037}
17c3ba9d
AK
2038EXPORT_SYMBOL_GPL(kvm_mmu_load);
2039
2040void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2041{
2042 mmu_free_roots(vcpu);
2043}
6aa8b732 2044
09072daf 2045static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2046 struct kvm_mmu_page *sp,
ac1b714e
AK
2047 u64 *spte)
2048{
2049 u64 pte;
2050 struct kvm_mmu_page *child;
2051
2052 pte = *spte;
c7addb90 2053 if (is_shadow_present_pte(pte)) {
05da4558
MT
2054 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2055 is_large_pte(pte))
290fc38d 2056 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2057 else {
2058 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2059 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2060 }
2061 }
c7addb90 2062 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2063 if (is_large_pte(pte))
2064 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2065}
2066
0028425f 2067static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2068 struct kvm_mmu_page *sp,
0028425f 2069 u64 *spte,
489f1d65 2070 const void *new)
0028425f 2071{
30945387
MT
2072 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2073 if (!vcpu->arch.update_pte.largepage ||
2074 sp->role.glevels == PT32_ROOT_LEVEL) {
2075 ++vcpu->kvm->stat.mmu_pde_zapped;
2076 return;
2077 }
2078 }
0028425f 2079
4cee5764 2080 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2081 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2082 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2083 else
489f1d65 2084 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2085}
2086
79539cec
AK
2087static bool need_remote_flush(u64 old, u64 new)
2088{
2089 if (!is_shadow_present_pte(old))
2090 return false;
2091 if (!is_shadow_present_pte(new))
2092 return true;
2093 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2094 return true;
2095 old ^= PT64_NX_MASK;
2096 new ^= PT64_NX_MASK;
2097 return (old & ~new & PT64_PERM_MASK) != 0;
2098}
2099
2100static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2101{
2102 if (need_remote_flush(old, new))
2103 kvm_flush_remote_tlbs(vcpu->kvm);
2104 else
2105 kvm_mmu_flush_tlb(vcpu);
2106}
2107
12b7d28f
AK
2108static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2109{
ad312c7c 2110 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2111
7b52345e 2112 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2113}
2114
d7824fff
AK
2115static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2116 const u8 *new, int bytes)
2117{
2118 gfn_t gfn;
2119 int r;
2120 u64 gpte = 0;
35149e21 2121 pfn_t pfn;
d7824fff 2122
05da4558
MT
2123 vcpu->arch.update_pte.largepage = 0;
2124
d7824fff
AK
2125 if (bytes != 4 && bytes != 8)
2126 return;
2127
2128 /*
2129 * Assume that the pte write on a page table of the same type
2130 * as the current vcpu paging mode. This is nearly always true
2131 * (might be false while changing modes). Note it is verified later
2132 * by update_pte().
2133 */
2134 if (is_pae(vcpu)) {
2135 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2136 if ((bytes == 4) && (gpa % 4 == 0)) {
2137 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2138 if (r)
2139 return;
2140 memcpy((void *)&gpte + (gpa % 8), new, 4);
2141 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2142 memcpy((void *)&gpte, new, 8);
2143 }
2144 } else {
2145 if ((bytes == 4) && (gpa % 4 == 0))
2146 memcpy((void *)&gpte, new, 4);
2147 }
2148 if (!is_present_pte(gpte))
2149 return;
2150 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2151
05da4558
MT
2152 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2153 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2154 vcpu->arch.update_pte.largepage = 1;
2155 }
e930bffe 2156 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2157 smp_rmb();
35149e21 2158 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2159
35149e21
AL
2160 if (is_error_pfn(pfn)) {
2161 kvm_release_pfn_clean(pfn);
d196e343
AK
2162 return;
2163 }
d7824fff 2164 vcpu->arch.update_pte.gfn = gfn;
35149e21 2165 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2166}
2167
1b7fcd32
AK
2168static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2169{
2170 u64 *spte = vcpu->arch.last_pte_updated;
2171
2172 if (spte
2173 && vcpu->arch.last_pte_gfn == gfn
2174 && shadow_accessed_mask
2175 && !(*spte & shadow_accessed_mask)
2176 && is_shadow_present_pte(*spte))
2177 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2178}
2179
09072daf 2180void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 2181 const u8 *new, int bytes)
da4a00f0 2182{
9b7a0325 2183 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2184 struct kvm_mmu_page *sp;
0e7bc4b9 2185 struct hlist_node *node, *n;
9b7a0325
AK
2186 struct hlist_head *bucket;
2187 unsigned index;
489f1d65 2188 u64 entry, gentry;
9b7a0325 2189 u64 *spte;
9b7a0325 2190 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2191 unsigned pte_size;
9b7a0325 2192 unsigned page_offset;
0e7bc4b9 2193 unsigned misaligned;
fce0657f 2194 unsigned quadrant;
9b7a0325 2195 int level;
86a5ba02 2196 int flooded = 0;
ac1b714e 2197 int npte;
489f1d65 2198 int r;
9b7a0325 2199
b8688d51 2200 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2201 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2202 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2203 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2204 kvm_mmu_free_some_pages(vcpu);
4cee5764 2205 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2206 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 2207 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 2208 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
2209 ++vcpu->arch.last_pt_write_count;
2210 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
2211 flooded = 1;
2212 } else {
ad312c7c
ZX
2213 vcpu->arch.last_pt_write_gfn = gfn;
2214 vcpu->arch.last_pt_write_count = 1;
2215 vcpu->arch.last_pte_updated = NULL;
86a5ba02 2216 }
1ae0a13d 2217 index = kvm_page_table_hashfn(gfn);
f05e70ac 2218 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2219 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2220 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2221 continue;
4db35314 2222 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2223 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2224 misaligned |= bytes < 4;
86a5ba02 2225 if (misaligned || flooded) {
0e7bc4b9
AK
2226 /*
2227 * Misaligned accesses are too much trouble to fix
2228 * up; also, they usually indicate a page is not used
2229 * as a page table.
86a5ba02
AK
2230 *
2231 * If we're seeing too many writes to a page,
2232 * it may no longer be a page table, or we may be
2233 * forking, in which case it is better to unmap the
2234 * page.
0e7bc4b9
AK
2235 */
2236 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2237 gpa, bytes, sp->role.word);
07385413
MT
2238 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2239 n = bucket->first;
4cee5764 2240 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2241 continue;
2242 }
9b7a0325 2243 page_offset = offset;
4db35314 2244 level = sp->role.level;
ac1b714e 2245 npte = 1;
4db35314 2246 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2247 page_offset <<= 1; /* 32->64 */
2248 /*
2249 * A 32-bit pde maps 4MB while the shadow pdes map
2250 * only 2MB. So we need to double the offset again
2251 * and zap two pdes instead of one.
2252 */
2253 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2254 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2255 page_offset <<= 1;
2256 npte = 2;
2257 }
fce0657f 2258 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2259 page_offset &= ~PAGE_MASK;
4db35314 2260 if (quadrant != sp->role.quadrant)
fce0657f 2261 continue;
9b7a0325 2262 }
4db35314 2263 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2264 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2265 gentry = 0;
2266 r = kvm_read_guest_atomic(vcpu->kvm,
2267 gpa & ~(u64)(pte_size - 1),
2268 &gentry, pte_size);
2269 new = (const void *)&gentry;
2270 if (r < 0)
2271 new = NULL;
2272 }
ac1b714e 2273 while (npte--) {
79539cec 2274 entry = *spte;
4db35314 2275 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2276 if (new)
2277 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2278 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2279 ++spte;
9b7a0325 2280 }
9b7a0325 2281 }
c7addb90 2282 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2283 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2284 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2285 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2286 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2287 }
da4a00f0
AK
2288}
2289
a436036b
AK
2290int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2291{
10589a46
MT
2292 gpa_t gpa;
2293 int r;
a436036b 2294
10589a46 2295 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2296
aaee2c94 2297 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2298 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2299 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2300 return r;
a436036b 2301}
577bdc49 2302EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2303
22d95b12 2304void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2305{
f05e70ac 2306 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2307 struct kvm_mmu_page *sp;
ebeace86 2308
f05e70ac 2309 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2310 struct kvm_mmu_page, link);
2311 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2312 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2313 }
2314}
ebeace86 2315
3067714c
AK
2316int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2317{
2318 int r;
2319 enum emulation_result er;
2320
ad312c7c 2321 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2322 if (r < 0)
2323 goto out;
2324
2325 if (!r) {
2326 r = 1;
2327 goto out;
2328 }
2329
b733bfb5
AK
2330 r = mmu_topup_memory_caches(vcpu);
2331 if (r)
2332 goto out;
2333
3067714c 2334 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2335
2336 switch (er) {
2337 case EMULATE_DONE:
2338 return 1;
2339 case EMULATE_DO_MMIO:
2340 ++vcpu->stat.mmio_exits;
2341 return 0;
2342 case EMULATE_FAIL:
2343 kvm_report_emulation_failure(vcpu, "pagetable");
2344 return 1;
2345 default:
2346 BUG();
2347 }
2348out:
3067714c
AK
2349 return r;
2350}
2351EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2352
a7052897
MT
2353void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2354{
2355 spin_lock(&vcpu->kvm->mmu_lock);
2356 vcpu->arch.mmu.invlpg(vcpu, gva);
2357 spin_unlock(&vcpu->kvm->mmu_lock);
2358 kvm_mmu_flush_tlb(vcpu);
2359 ++vcpu->stat.invlpg;
2360}
2361EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2362
18552672
JR
2363void kvm_enable_tdp(void)
2364{
2365 tdp_enabled = true;
2366}
2367EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2368
5f4cb662
JR
2369void kvm_disable_tdp(void)
2370{
2371 tdp_enabled = false;
2372}
2373EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2374
6aa8b732
AK
2375static void free_mmu_pages(struct kvm_vcpu *vcpu)
2376{
4db35314 2377 struct kvm_mmu_page *sp;
6aa8b732 2378
f05e70ac
ZX
2379 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2380 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2381 struct kvm_mmu_page, link);
2382 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2383 cond_resched();
f51234c2 2384 }
ad312c7c 2385 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2386}
2387
2388static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2389{
17ac10ad 2390 struct page *page;
6aa8b732
AK
2391 int i;
2392
2393 ASSERT(vcpu);
2394
f05e70ac
ZX
2395 if (vcpu->kvm->arch.n_requested_mmu_pages)
2396 vcpu->kvm->arch.n_free_mmu_pages =
2397 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2398 else
f05e70ac
ZX
2399 vcpu->kvm->arch.n_free_mmu_pages =
2400 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2401 /*
2402 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2403 * Therefore we need to allocate shadow page tables in the first
2404 * 4GB of memory, which happens to fit the DMA32 zone.
2405 */
2406 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2407 if (!page)
2408 goto error_1;
ad312c7c 2409 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2410 for (i = 0; i < 4; ++i)
ad312c7c 2411 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2412
6aa8b732
AK
2413 return 0;
2414
2415error_1:
2416 free_mmu_pages(vcpu);
2417 return -ENOMEM;
2418}
2419
8018c27b 2420int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2421{
6aa8b732 2422 ASSERT(vcpu);
ad312c7c 2423 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2424
8018c27b
IM
2425 return alloc_mmu_pages(vcpu);
2426}
6aa8b732 2427
8018c27b
IM
2428int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2429{
2430 ASSERT(vcpu);
ad312c7c 2431 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2432
8018c27b 2433 return init_kvm_mmu(vcpu);
6aa8b732
AK
2434}
2435
2436void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2437{
2438 ASSERT(vcpu);
2439
2440 destroy_kvm_mmu(vcpu);
2441 free_mmu_pages(vcpu);
714b93da 2442 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2443}
2444
90cb0529 2445void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2446{
4db35314 2447 struct kvm_mmu_page *sp;
6aa8b732 2448
2245a28f 2449 spin_lock(&kvm->mmu_lock);
f05e70ac 2450 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2451 int i;
2452 u64 *pt;
2453
4db35314 2454 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
2455 continue;
2456
4db35314 2457 pt = sp->spt;
6aa8b732
AK
2458 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2459 /* avoid RMW */
9647c14c 2460 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2461 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2462 }
171d595d 2463 kvm_flush_remote_tlbs(kvm);
2245a28f 2464 spin_unlock(&kvm->mmu_lock);
6aa8b732 2465}
37a7d8b0 2466
90cb0529 2467void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2468{
4db35314 2469 struct kvm_mmu_page *sp, *node;
e0fa826f 2470
aaee2c94 2471 spin_lock(&kvm->mmu_lock);
f05e70ac 2472 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2473 if (kvm_mmu_zap_page(kvm, sp))
2474 node = container_of(kvm->arch.active_mmu_pages.next,
2475 struct kvm_mmu_page, link);
aaee2c94 2476 spin_unlock(&kvm->mmu_lock);
e0fa826f 2477
90cb0529 2478 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2479}
2480
8b2cf73c 2481static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2482{
2483 struct kvm_mmu_page *page;
2484
2485 page = container_of(kvm->arch.active_mmu_pages.prev,
2486 struct kvm_mmu_page, link);
2487 kvm_mmu_zap_page(kvm, page);
2488}
2489
2490static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2491{
2492 struct kvm *kvm;
2493 struct kvm *kvm_freed = NULL;
2494 int cache_count = 0;
2495
2496 spin_lock(&kvm_lock);
2497
2498 list_for_each_entry(kvm, &vm_list, vm_list) {
2499 int npages;
2500
5a4c9288
MT
2501 if (!down_read_trylock(&kvm->slots_lock))
2502 continue;
3ee16c81
IE
2503 spin_lock(&kvm->mmu_lock);
2504 npages = kvm->arch.n_alloc_mmu_pages -
2505 kvm->arch.n_free_mmu_pages;
2506 cache_count += npages;
2507 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2508 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2509 cache_count--;
2510 kvm_freed = kvm;
2511 }
2512 nr_to_scan--;
2513
2514 spin_unlock(&kvm->mmu_lock);
5a4c9288 2515 up_read(&kvm->slots_lock);
3ee16c81
IE
2516 }
2517 if (kvm_freed)
2518 list_move_tail(&kvm_freed->vm_list, &vm_list);
2519
2520 spin_unlock(&kvm_lock);
2521
2522 return cache_count;
2523}
2524
2525static struct shrinker mmu_shrinker = {
2526 .shrink = mmu_shrink,
2527 .seeks = DEFAULT_SEEKS * 10,
2528};
2529
2ddfd20e 2530static void mmu_destroy_caches(void)
b5a33a75
AK
2531{
2532 if (pte_chain_cache)
2533 kmem_cache_destroy(pte_chain_cache);
2534 if (rmap_desc_cache)
2535 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2536 if (mmu_page_header_cache)
2537 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2538}
2539
3ee16c81
IE
2540void kvm_mmu_module_exit(void)
2541{
2542 mmu_destroy_caches();
2543 unregister_shrinker(&mmu_shrinker);
2544}
2545
b5a33a75
AK
2546int kvm_mmu_module_init(void)
2547{
2548 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2549 sizeof(struct kvm_pte_chain),
20c2df83 2550 0, 0, NULL);
b5a33a75
AK
2551 if (!pte_chain_cache)
2552 goto nomem;
2553 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2554 sizeof(struct kvm_rmap_desc),
20c2df83 2555 0, 0, NULL);
b5a33a75
AK
2556 if (!rmap_desc_cache)
2557 goto nomem;
2558
d3d25b04
AK
2559 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2560 sizeof(struct kvm_mmu_page),
20c2df83 2561 0, 0, NULL);
d3d25b04
AK
2562 if (!mmu_page_header_cache)
2563 goto nomem;
2564
3ee16c81
IE
2565 register_shrinker(&mmu_shrinker);
2566
b5a33a75
AK
2567 return 0;
2568
2569nomem:
3ee16c81 2570 mmu_destroy_caches();
b5a33a75
AK
2571 return -ENOMEM;
2572}
2573
3ad82a7e
ZX
2574/*
2575 * Caculate mmu pages needed for kvm.
2576 */
2577unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2578{
2579 int i;
2580 unsigned int nr_mmu_pages;
2581 unsigned int nr_pages = 0;
2582
2583 for (i = 0; i < kvm->nmemslots; i++)
2584 nr_pages += kvm->memslots[i].npages;
2585
2586 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2587 nr_mmu_pages = max(nr_mmu_pages,
2588 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2589
2590 return nr_mmu_pages;
2591}
2592
2f333bcb
MT
2593static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2594 unsigned len)
2595{
2596 if (len > buffer->len)
2597 return NULL;
2598 return buffer->ptr;
2599}
2600
2601static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2602 unsigned len)
2603{
2604 void *ret;
2605
2606 ret = pv_mmu_peek_buffer(buffer, len);
2607 if (!ret)
2608 return ret;
2609 buffer->ptr += len;
2610 buffer->len -= len;
2611 buffer->processed += len;
2612 return ret;
2613}
2614
2615static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2616 gpa_t addr, gpa_t value)
2617{
2618 int bytes = 8;
2619 int r;
2620
2621 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2622 bytes = 4;
2623
2624 r = mmu_topup_memory_caches(vcpu);
2625 if (r)
2626 return r;
2627
3200f405 2628 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2629 return -EFAULT;
2630
2631 return 1;
2632}
2633
2634static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2635{
2636 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2637 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2638 return 1;
2639}
2640
2641static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2642{
2643 spin_lock(&vcpu->kvm->mmu_lock);
2644 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2645 spin_unlock(&vcpu->kvm->mmu_lock);
2646 return 1;
2647}
2648
2649static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2650 struct kvm_pv_mmu_op_buffer *buffer)
2651{
2652 struct kvm_mmu_op_header *header;
2653
2654 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2655 if (!header)
2656 return 0;
2657 switch (header->op) {
2658 case KVM_MMU_OP_WRITE_PTE: {
2659 struct kvm_mmu_op_write_pte *wpte;
2660
2661 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2662 if (!wpte)
2663 return 0;
2664 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2665 wpte->pte_val);
2666 }
2667 case KVM_MMU_OP_FLUSH_TLB: {
2668 struct kvm_mmu_op_flush_tlb *ftlb;
2669
2670 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2671 if (!ftlb)
2672 return 0;
2673 return kvm_pv_mmu_flush_tlb(vcpu);
2674 }
2675 case KVM_MMU_OP_RELEASE_PT: {
2676 struct kvm_mmu_op_release_pt *rpt;
2677
2678 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2679 if (!rpt)
2680 return 0;
2681 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2682 }
2683 default: return 0;
2684 }
2685}
2686
2687int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2688 gpa_t addr, unsigned long *ret)
2689{
2690 int r;
6ad18fba 2691 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2692
6ad18fba
DH
2693 buffer->ptr = buffer->buf;
2694 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2695 buffer->processed = 0;
2f333bcb 2696
6ad18fba 2697 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2698 if (r)
2699 goto out;
2700
6ad18fba
DH
2701 while (buffer->len) {
2702 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2703 if (r < 0)
2704 goto out;
2705 if (r == 0)
2706 break;
2707 }
2708
2709 r = 1;
2710out:
6ad18fba 2711 *ret = buffer->processed;
2f333bcb
MT
2712 return r;
2713}
2714
37a7d8b0
AK
2715#ifdef AUDIT
2716
2717static const char *audit_msg;
2718
2719static gva_t canonicalize(gva_t gva)
2720{
2721#ifdef CONFIG_X86_64
2722 gva = (long long)(gva << 16) >> 16;
2723#endif
2724 return gva;
2725}
2726
2727static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2728 gva_t va, int level)
2729{
2730 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2731 int i;
2732 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2733
2734 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2735 u64 ent = pt[i];
2736
c7addb90 2737 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2738 continue;
2739
2740 va = canonicalize(va);
c7addb90
AK
2741 if (level > 1) {
2742 if (ent == shadow_notrap_nonpresent_pte)
2743 printk(KERN_ERR "audit: (%s) nontrapping pte"
2744 " in nonleaf level: levels %d gva %lx"
2745 " level %d pte %llx\n", audit_msg,
ad312c7c 2746 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2747
37a7d8b0 2748 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2749 } else {
ad312c7c 2750 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2751 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2752
c7addb90 2753 if (is_shadow_present_pte(ent)
37a7d8b0 2754 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2755 printk(KERN_ERR "xx audit error: (%s) levels %d"
2756 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2757 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2758 va, gpa, hpa, ent,
2759 is_shadow_present_pte(ent));
c7addb90
AK
2760 else if (ent == shadow_notrap_nonpresent_pte
2761 && !is_error_hpa(hpa))
2762 printk(KERN_ERR "audit: (%s) notrap shadow,"
2763 " valid guest gva %lx\n", audit_msg, va);
35149e21 2764 kvm_release_pfn_clean(pfn);
c7addb90 2765
37a7d8b0
AK
2766 }
2767 }
2768}
2769
2770static void audit_mappings(struct kvm_vcpu *vcpu)
2771{
1ea252af 2772 unsigned i;
37a7d8b0 2773
ad312c7c
ZX
2774 if (vcpu->arch.mmu.root_level == 4)
2775 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2776 else
2777 for (i = 0; i < 4; ++i)
ad312c7c 2778 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2779 audit_mappings_page(vcpu,
ad312c7c 2780 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2781 i << 30,
2782 2);
2783}
2784
2785static int count_rmaps(struct kvm_vcpu *vcpu)
2786{
2787 int nmaps = 0;
2788 int i, j, k;
2789
2790 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2791 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2792 struct kvm_rmap_desc *d;
2793
2794 for (j = 0; j < m->npages; ++j) {
290fc38d 2795 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2796
290fc38d 2797 if (!*rmapp)
37a7d8b0 2798 continue;
290fc38d 2799 if (!(*rmapp & 1)) {
37a7d8b0
AK
2800 ++nmaps;
2801 continue;
2802 }
290fc38d 2803 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2804 while (d) {
2805 for (k = 0; k < RMAP_EXT; ++k)
2806 if (d->shadow_ptes[k])
2807 ++nmaps;
2808 else
2809 break;
2810 d = d->more;
2811 }
2812 }
2813 }
2814 return nmaps;
2815}
2816
2817static int count_writable_mappings(struct kvm_vcpu *vcpu)
2818{
2819 int nmaps = 0;
4db35314 2820 struct kvm_mmu_page *sp;
37a7d8b0
AK
2821 int i;
2822
f05e70ac 2823 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2824 u64 *pt = sp->spt;
37a7d8b0 2825
4db35314 2826 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2827 continue;
2828
2829 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2830 u64 ent = pt[i];
2831
2832 if (!(ent & PT_PRESENT_MASK))
2833 continue;
2834 if (!(ent & PT_WRITABLE_MASK))
2835 continue;
2836 ++nmaps;
2837 }
2838 }
2839 return nmaps;
2840}
2841
2842static void audit_rmap(struct kvm_vcpu *vcpu)
2843{
2844 int n_rmap = count_rmaps(vcpu);
2845 int n_actual = count_writable_mappings(vcpu);
2846
2847 if (n_rmap != n_actual)
2848 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2849 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2850}
2851
2852static void audit_write_protection(struct kvm_vcpu *vcpu)
2853{
4db35314 2854 struct kvm_mmu_page *sp;
290fc38d
IE
2855 struct kvm_memory_slot *slot;
2856 unsigned long *rmapp;
2857 gfn_t gfn;
37a7d8b0 2858
f05e70ac 2859 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2860 if (sp->role.metaphysical)
37a7d8b0
AK
2861 continue;
2862
4db35314
AK
2863 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2864 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2865 rmapp = &slot->rmap[gfn - slot->base_gfn];
2866 if (*rmapp)
37a7d8b0
AK
2867 printk(KERN_ERR "%s: (%s) shadow page has writable"
2868 " mappings: gfn %lx role %x\n",
b8688d51 2869 __func__, audit_msg, sp->gfn,
4db35314 2870 sp->role.word);
37a7d8b0
AK
2871 }
2872}
2873
2874static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2875{
2876 int olddbg = dbg;
2877
2878 dbg = 0;
2879 audit_msg = msg;
2880 audit_rmap(vcpu);
2881 audit_write_protection(vcpu);
2882 audit_mappings(vcpu);
2883 dbg = olddbg;
2884}
2885
2886#endif
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