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KVM: MSI to INTx translate
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
6aa8b732
AK		 23#include <linux/types.h>
24#include <linux/string.h>
6aa8b732
AK		 25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
e495606d
AK		 32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR		 37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
37a7d8b0
AK		 46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK		 69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT		 73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
d6c69ee9
YD		 76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
6aa8b732
AK		 79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
6aa8b732
AK		 86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
6aa8b732
AK		 89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK		 95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK		 107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK		 116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
79539cec
AK		 123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
6aa8b732
AK		 125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
6aa8b732
AK		 131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
cd4a4e53
AK		 134#define RMAP_EXT 4
135
fe135d2c
AK		 136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
135f8c2b
AK		 141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
cd4a4e53
AK		 143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
3d000db5
AK		 148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
3d000db5
AK		 151};
152
4731d4c7
MT		 153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
ad8cfbe3
MT		 157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
b5a33a75
AK		 159static struct kmem_cache *pte_chain_cache;
160static struct kmem_cache *rmap_desc_cache;
d3d25b04 161static struct kmem_cache *mmu_page_header_cache;
b5a33a75 162
c7addb90
AK		 163static u64 __read_mostly shadow_trap_nonpresent_pte;
164static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY		 165static u64 __read_mostly shadow_base_present_pte;
166static u64 __read_mostly shadow_nx_mask;
167static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168static u64 __read_mostly shadow_user_mask;
169static u64 __read_mostly shadow_accessed_mask;
170static u64 __read_mostly shadow_dirty_mask;
64d4d521 171static u64 __read_mostly shadow_mt_mask;
c7addb90
AK		 172
173void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174{
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177}
178EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
7b52345e
SY		 180void kvm_mmu_set_base_ptes(u64 base_pte)
181{
182 shadow_base_present_pte = base_pte;
183}
184EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
7b52345e
SY		 188{
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
64d4d521 194 shadow_mt_mask = mt_mask;
7b52345e
SY		 195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
6aa8b732
AK		 198static int is_write_protection(struct kvm_vcpu *vcpu)
199{
ad312c7c 200 return vcpu->arch.cr0 & X86_CR0_WP;
6aa8b732
AK		 201}
202
203static int is_cpuid_PSE36(void)
204{
205 return 1;
206}
207
73b1087e
AK		 208static int is_nx(struct kvm_vcpu *vcpu)
209{
ad312c7c 210 return vcpu->arch.shadow_efer & EFER_NX;
73b1087e
AK		 211}
212
6aa8b732
AK		 213static int is_present_pte(unsigned long pte)
214{
215 return pte & PT_PRESENT_MASK;
216}
217
c7addb90
AK		 218static int is_shadow_present_pte(u64 pte)
219{
c7addb90
AK		 220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222}
223
05da4558
MT		 224static int is_large_pte(u64 pte)
225{
226 return pte & PT_PAGE_SIZE_MASK;
227}
228
6aa8b732
AK		 229static int is_writeble_pte(unsigned long pte)
230{
231 return pte & PT_WRITABLE_MASK;
232}
233
e3c5e7ec
AK		 234static int is_dirty_pte(unsigned long pte)
235{
7b52345e 236 return pte & shadow_dirty_mask;
e3c5e7ec
AK		 237}
238
cd4a4e53
AK		 239static int is_rmap_pte(u64 pte)
240{
4b1a80fa 241 return is_shadow_present_pte(pte);
cd4a4e53
AK		 242}
243
35149e21 244static pfn_t spte_to_pfn(u64 pte)
0b49ea86 245{
35149e21 246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK		 247}
248
da928521
AK		 249static gfn_t pse36_gfn_delta(u32 gpte)
250{
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254}
255
e663ee64
AK		 256static void set_shadow_pte(u64 *sptep, u64 spte)
257{
258#ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260#else
261 set_64bit((unsigned long long *)sptep, spte);
262#endif
263}
264
e2dec939 265static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 266 struct kmem_cache *base_cache, int min)
714b93da
AK		 267{
268 void *obj;
269
270 if (cache->nobjs >= min)
e2dec939 271 return 0;
714b93da 272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 274 if (!obj)
e2dec939 275 return -ENOMEM;
714b93da
AK		 276 cache->objects[cache->nobjs++] = obj;
277 }
e2dec939 278 return 0;
714b93da
AK		 279}
280
281static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282{
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285}
286
c1158e63 287static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 288 int min)
c1158e63
AK		 289{
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 295 page = alloc_page(GFP_KERNEL);
c1158e63
AK		 296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302}
303
304static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305{
306 while (mc->nobjs)
c4d198d5 307 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK		 308}
309
2e3e5882 310static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 311{
e2dec939
AK		 312 int r;
313
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 315 pte_chain_cache, 4);
e2dec939
AK		 316 if (r)
317 goto out;
ad312c7c 318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 319 rmap_desc_cache, 4);
d3d25b04
AK		 320 if (r)
321 goto out;
ad312c7c 322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK		 323 if (r)
324 goto out;
ad312c7c 325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 326 mmu_page_header_cache, 4);
e2dec939
AK		 327out:
328 return r;
714b93da
AK		 329}
330
331static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332{
ad312c7c
ZX		 333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK		 337}
338
339static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341{
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348}
349
714b93da
AK		 350static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK		 353 sizeof(struct kvm_pte_chain));
354}
355
90cb0529 356static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 357{
90cb0529 358 kfree(pc);
714b93da
AK		 359}
360
361static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362{
ad312c7c 363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK		 364 sizeof(struct kvm_rmap_desc));
365}
366
90cb0529 367static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 368{
90cb0529 369 kfree(rd);
714b93da
AK		 370}
371
05da4558
MT		 372/*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377{
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383}
384
385static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386{
387 int *write_count;
388
2843099f
IE		 389 gfn = unalias_gfn(kvm, gfn);
390 write_count = slot_largepage_idx(gfn,
391 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 392 *write_count += 1;
05da4558
MT		 393}
394
395static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396{
397 int *write_count;
398
2843099f
IE		 399 gfn = unalias_gfn(kvm, gfn);
400 write_count = slot_largepage_idx(gfn,
401 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT		 402 *write_count -= 1;
403 WARN_ON(*write_count < 0);
404}
405
406static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
407{
2843099f 408 struct kvm_memory_slot *slot;
05da4558
MT		 409 int *largepage_idx;
410
2843099f
IE		 411 gfn = unalias_gfn(kvm, gfn);
412 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT		 413 if (slot) {
414 largepage_idx = slot_largepage_idx(gfn, slot);
415 return *largepage_idx;
416 }
417
418 return 1;
419}
420
421static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
422{
423 struct vm_area_struct *vma;
424 unsigned long addr;
4c2155ce 425 int ret = 0;
05da4558
MT		 426
427 addr = gfn_to_hva(kvm, gfn);
428 if (kvm_is_error_hva(addr))
4c2155ce 429 return ret;
05da4558 430
4c2155ce 431 down_read(&current->mm->mmap_sem);
05da4558
MT		 432 vma = find_vma(current->mm, addr);
433 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT		 434 ret = 1;
435 up_read(&current->mm->mmap_sem);
05da4558 436
4c2155ce 437 return ret;
05da4558
MT		 438}
439
440static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
441{
442 struct kvm_memory_slot *slot;
443
444 if (has_wrprotected_page(vcpu->kvm, large_gfn))
445 return 0;
446
447 if (!host_largepage_backed(vcpu->kvm, large_gfn))
448 return 0;
449
450 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
451 if (slot && slot->dirty_bitmap)
452 return 0;
453
454 return 1;
455}
456
290fc38d
IE		 457/*
458 * Take gfn and return the reverse mapping to it.
459 * Note: gfn must be unaliased before this function get called
460 */
461
05da4558 462static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE		 463{
464 struct kvm_memory_slot *slot;
05da4558 465 unsigned long idx;
290fc38d
IE		 466
467 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT		 468 if (!lpage)
469 return &slot->rmap[gfn - slot->base_gfn];
470
471 idx = (gfn / KVM_PAGES_PER_HPAGE) -
472 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
473
474 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE		 475}
476
cd4a4e53
AK		 477/*
478 * Reverse mapping data structures:
479 *
290fc38d
IE		 480 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
481 * that points to page_address(page).
cd4a4e53 482 *
290fc38d
IE		 483 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
484 * containing more mappings.
cd4a4e53 485 */
05da4558 486static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 487{
4db35314 488 struct kvm_mmu_page *sp;
cd4a4e53 489 struct kvm_rmap_desc *desc;
290fc38d 490 unsigned long *rmapp;
cd4a4e53
AK		 491 int i;
492
493 if (!is_rmap_pte(*spte))
494 return;
290fc38d 495 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK		 496 sp = page_header(__pa(spte));
497 sp->gfns[spte - sp->spt] = gfn;
05da4558 498 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 499 if (!*rmapp) {
cd4a4e53 500 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE		 501 *rmapp = (unsigned long)spte;
502 } else if (!(*rmapp & 1)) {
cd4a4e53 503 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 504 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 505 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 506 desc->shadow_ptes[1] = spte;
290fc38d 507 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK		 508 } else {
509 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 510 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK		 511 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
512 desc = desc->more;
513 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 514 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK		 515 desc = desc->more;
516 }
517 for (i = 0; desc->shadow_ptes[i]; ++i)
518 ;
519 desc->shadow_ptes[i] = spte;
520 }
521}
522
290fc38d 523static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK		 524 struct kvm_rmap_desc *desc,
525 int i,
526 struct kvm_rmap_desc *prev_desc)
527{
528 int j;
529
530 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
531 ;
532 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 533 desc->shadow_ptes[j] = NULL;
cd4a4e53
AK		 534 if (j != 0)
535 return;
536 if (!prev_desc && !desc->more)
290fc38d 537 *rmapp = (unsigned long)desc->shadow_ptes[0];
cd4a4e53
AK		 538 else
539 if (prev_desc)
540 prev_desc->more = desc->more;
541 else
290fc38d 542 *rmapp = (unsigned long)desc->more | 1;
90cb0529 543 mmu_free_rmap_desc(desc);
cd4a4e53
AK		 544}
545
290fc38d 546static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 547{
cd4a4e53
AK		 548 struct kvm_rmap_desc *desc;
549 struct kvm_rmap_desc *prev_desc;
4db35314 550 struct kvm_mmu_page *sp;
35149e21 551 pfn_t pfn;
290fc38d 552 unsigned long *rmapp;
cd4a4e53
AK		 553 int i;
554
555 if (!is_rmap_pte(*spte))
556 return;
4db35314 557 sp = page_header(__pa(spte));
35149e21 558 pfn = spte_to_pfn(*spte);
7b52345e 559 if (*spte & shadow_accessed_mask)
35149e21 560 kvm_set_pfn_accessed(pfn);
b4231d61 561 if (is_writeble_pte(*spte))
35149e21 562 kvm_release_pfn_dirty(pfn);
b4231d61 563 else
35149e21 564 kvm_release_pfn_clean(pfn);
05da4558 565 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 566 if (!*rmapp) {
cd4a4e53
AK		 567 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
568 BUG();
290fc38d 569 } else if (!(*rmapp & 1)) {
cd4a4e53 570 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 571 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK		 572 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
573 spte, *spte);
574 BUG();
575 }
290fc38d 576 *rmapp = 0;
cd4a4e53
AK		 577 } else {
578 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK		 580 prev_desc = NULL;
581 while (desc) {
582 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
583 if (desc->shadow_ptes[i] == spte) {
290fc38d 584 rmap_desc_remove_entry(rmapp,
714b93da 585 desc, i,
cd4a4e53
AK		 586 prev_desc);
587 return;
588 }
589 prev_desc = desc;
590 desc = desc->more;
591 }
592 BUG();
593 }
594}
595
98348e95 596static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 597{
374cbac0 598 struct kvm_rmap_desc *desc;
98348e95
IE		 599 struct kvm_rmap_desc *prev_desc;
600 u64 *prev_spte;
601 int i;
602
603 if (!*rmapp)
604 return NULL;
605 else if (!(*rmapp & 1)) {
606 if (!spte)
607 return (u64 *)*rmapp;
608 return NULL;
609 }
610 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
611 prev_desc = NULL;
612 prev_spte = NULL;
613 while (desc) {
614 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
615 if (prev_spte == spte)
616 return desc->shadow_ptes[i];
617 prev_spte = desc->shadow_ptes[i];
618 }
619 desc = desc->more;
620 }
621 return NULL;
622}
623
624static void rmap_write_protect(struct kvm *kvm, u64 gfn)
625{
290fc38d 626 unsigned long *rmapp;
374cbac0 627 u64 *spte;
caa5b8a5 628 int write_protected = 0;
374cbac0 629
4a4c9924 630 gfn = unalias_gfn(kvm, gfn);
05da4558 631 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 632
98348e95
IE		 633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
374cbac0 635 BUG_ON(!spte);
374cbac0 636 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 637 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 638 if (is_writeble_pte(*spte)) {
9647c14c 639 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED		 640 write_protected = 1;
641 }
9647c14c 642 spte = rmap_next(kvm, rmapp, spte);
374cbac0 643 }
855149aa 644 if (write_protected) {
35149e21 645 pfn_t pfn;
855149aa
IE		 646
647 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL		 648 pfn = spte_to_pfn(*spte);
649 kvm_set_pfn_dirty(pfn);
855149aa
IE		 650 }
651
05da4558
MT		 652 /* check for huge page mappings */
653 rmapp = gfn_to_rmap(kvm, gfn, 1);
654 spte = rmap_next(kvm, rmapp, NULL);
655 while (spte) {
656 BUG_ON(!spte);
657 BUG_ON(!(*spte & PT_PRESENT_MASK));
658 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
659 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
660 if (is_writeble_pte(*spte)) {
661 rmap_remove(kvm, spte);
662 --kvm->stat.lpages;
663 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 664 spte = NULL;
05da4558
MT		 665 write_protected = 1;
666 }
667 spte = rmap_next(kvm, rmapp, spte);
668 }
669
caa5b8a5
ED		 670 if (write_protected)
671 kvm_flush_remote_tlbs(kvm);
374cbac0
AK		 672}
673
e930bffe
AA		 674static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
675{
676 u64 *spte;
677 int need_tlb_flush = 0;
678
679 while ((spte = rmap_next(kvm, rmapp, NULL))) {
680 BUG_ON(!(*spte & PT_PRESENT_MASK));
681 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
682 rmap_remove(kvm, spte);
683 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
684 need_tlb_flush = 1;
685 }
686 return need_tlb_flush;
687}
688
689static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
690 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
691{
692 int i;
693 int retval = 0;
694
695 /*
696 * If mmap_sem isn't taken, we can look the memslots with only
697 * the mmu_lock by skipping over the slots with userspace_addr == 0.
698 */
699 for (i = 0; i < kvm->nmemslots; i++) {
700 struct kvm_memory_slot *memslot = &kvm->memslots[i];
701 unsigned long start = memslot->userspace_addr;
702 unsigned long end;
703
704 /* mmu_lock protects userspace_addr */
705 if (!start)
706 continue;
707
708 end = start + (memslot->npages << PAGE_SHIFT);
709 if (hva >= start && hva < end) {
710 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
711 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
712 retval |= handler(kvm,
713 &memslot->lpage_info[
714 gfn_offset /
715 KVM_PAGES_PER_HPAGE].rmap_pde);
716 }
717 }
718
719 return retval;
720}
721
722int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
723{
724 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
725}
726
727static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
728{
729 u64 *spte;
730 int young = 0;
731
534e38b4
SY		 732 /* always return old for EPT */
733 if (!shadow_accessed_mask)
734 return 0;
735
e930bffe
AA		 736 spte = rmap_next(kvm, rmapp, NULL);
737 while (spte) {
738 int _young;
739 u64 _spte = *spte;
740 BUG_ON(!(_spte & PT_PRESENT_MASK));
741 _young = _spte & PT_ACCESSED_MASK;
742 if (_young) {
743 young = 1;
744 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
745 }
746 spte = rmap_next(kvm, rmapp, spte);
747 }
748 return young;
749}
750
751int kvm_age_hva(struct kvm *kvm, unsigned long hva)
752{
753 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
754}
755
d6c69ee9 756#ifdef MMU_DEBUG
47ad8e68 757static int is_empty_shadow_page(u64 *spt)
6aa8b732 758{
139bdb2d
AK		 759 u64 *pos;
760 u64 *end;
761
47ad8e68 762 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 763 if (is_shadow_present_pte(*pos)) {
b8688d51 764 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 765 pos, *pos);
6aa8b732 766 return 0;
139bdb2d 767 }
6aa8b732
AK		 768 return 1;
769}
d6c69ee9 770#endif
6aa8b732 771
4db35314 772static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 773{
4db35314
AK		 774 ASSERT(is_empty_shadow_page(sp->spt));
775 list_del(&sp->link);
776 __free_page(virt_to_page(sp->spt));
777 __free_page(virt_to_page(sp->gfns));
778 kfree(sp);
f05e70ac 779 ++kvm->arch.n_free_mmu_pages;
260746c0
AK		 780}
781
cea0f0e7
AK		 782static unsigned kvm_page_table_hashfn(gfn_t gfn)
783{
1ae0a13d 784 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK		 785}
786
25c0de2c
AK		 787static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
788 u64 *parent_pte)
6aa8b732 789{
4db35314 790 struct kvm_mmu_page *sp;
6aa8b732 791
ad312c7c
ZX		 792 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
793 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
794 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 795 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 796 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314 797 ASSERT(is_empty_shadow_page(sp->spt));
291f26bc 798 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK		 799 sp->multimapped = 0;
800 sp->parent_pte = parent_pte;
f05e70ac 801 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 802 return sp;
6aa8b732
AK		 803}
804
714b93da 805static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 806 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK		 807{
808 struct kvm_pte_chain *pte_chain;
809 struct hlist_node *node;
810 int i;
811
812 if (!parent_pte)
813 return;
4db35314
AK		 814 if (!sp->multimapped) {
815 u64 *old = sp->parent_pte;
cea0f0e7
AK		 816
817 if (!old) {
4db35314 818 sp->parent_pte = parent_pte;
cea0f0e7
AK		 819 return;
820 }
4db35314 821 sp->multimapped = 1;
714b93da 822 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK		 823 INIT_HLIST_HEAD(&sp->parent_ptes);
824 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 825 pte_chain->parent_ptes[0] = old;
826 }
4db35314 827 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK		 828 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
829 continue;
830 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
831 if (!pte_chain->parent_ptes[i]) {
832 pte_chain->parent_ptes[i] = parent_pte;
833 return;
834 }
835 }
714b93da 836 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 837 BUG_ON(!pte_chain);
4db35314 838 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 839 pte_chain->parent_ptes[0] = parent_pte;
840}
841
4db35314 842static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK		 843 u64 *parent_pte)
844{
845 struct kvm_pte_chain *pte_chain;
846 struct hlist_node *node;
847 int i;
848
4db35314
AK		 849 if (!sp->multimapped) {
850 BUG_ON(sp->parent_pte != parent_pte);
851 sp->parent_pte = NULL;
cea0f0e7
AK		 852 return;
853 }
4db35314 854 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK		 855 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
856 if (!pte_chain->parent_ptes[i])
857 break;
858 if (pte_chain->parent_ptes[i] != parent_pte)
859 continue;
697fe2e2
AK		 860 while (i + 1 < NR_PTE_CHAIN_ENTRIES
861 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK		 862 pte_chain->parent_ptes[i]
863 = pte_chain->parent_ptes[i + 1];
864 ++i;
865 }
866 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK		 867 if (i == 0) {
868 hlist_del(&pte_chain->link);
90cb0529 869 mmu_free_pte_chain(pte_chain);
4db35314
AK		 870 if (hlist_empty(&sp->parent_ptes)) {
871 sp->multimapped = 0;
872 sp->parent_pte = NULL;
697fe2e2
AK		 873 }
874 }
cea0f0e7
AK		 875 return;
876 }
877 BUG();
878}
879
ad8cfbe3
MT		 880
881static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
882 mmu_parent_walk_fn fn)
883{
884 struct kvm_pte_chain *pte_chain;
885 struct hlist_node *node;
886 struct kvm_mmu_page *parent_sp;
887 int i;
888
889 if (!sp->multimapped && sp->parent_pte) {
890 parent_sp = page_header(__pa(sp->parent_pte));
891 fn(vcpu, parent_sp);
892 mmu_parent_walk(vcpu, parent_sp, fn);
893 return;
894 }
895 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
896 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
897 if (!pte_chain->parent_ptes[i])
898 break;
899 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
900 fn(vcpu, parent_sp);
901 mmu_parent_walk(vcpu, parent_sp, fn);
902 }
903}
904
0074ff63
MT		 905static void kvm_mmu_update_unsync_bitmap(u64 *spte)
906{
907 unsigned int index;
908 struct kvm_mmu_page *sp = page_header(__pa(spte));
909
910 index = spte - sp->spt;
911 __set_bit(index, sp->unsync_child_bitmap);
912 sp->unsync_children = 1;
913}
914
915static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
916{
917 struct kvm_pte_chain *pte_chain;
918 struct hlist_node *node;
919 int i;
920
921 if (!sp->parent_pte)
922 return;
923
924 if (!sp->multimapped) {
925 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
926 return;
927 }
928
929 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
930 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
931 if (!pte_chain->parent_ptes[i])
932 break;
933 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
934 }
935}
936
937static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
938{
939 sp->unsync_children = 1;
940 kvm_mmu_update_parents_unsync(sp);
941 return 1;
942}
943
944static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
945 struct kvm_mmu_page *sp)
946{
947 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
948 kvm_mmu_update_parents_unsync(sp);
949}
950
d761a501
AK		 951static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
952 struct kvm_mmu_page *sp)
953{
954 int i;
955
956 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
957 sp->spt[i] = shadow_trap_nonpresent_pte;
958}
959
e8bc217a
MT		 960static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
961 struct kvm_mmu_page *sp)
962{
963 return 1;
964}
965
a7052897
MT		 966static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
967{
968}
969
0074ff63
MT		 970#define for_each_unsync_children(bitmap, idx) \
971 for (idx = find_first_bit(bitmap, 512); \
972 idx < 512; \
973 idx = find_next_bit(bitmap, 512, idx+1))
974
4731d4c7
MT		 975static int mmu_unsync_walk(struct kvm_mmu_page *sp,
976 struct kvm_unsync_walk *walker)
977{
978 int i, ret;
979
980 if (!sp->unsync_children)
981 return 0;
982
0074ff63 983 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT		 984 u64 ent = sp->spt[i];
985
986 if (is_shadow_present_pte(ent)) {
987 struct kvm_mmu_page *child;
988 child = page_header(ent & PT64_BASE_ADDR_MASK);
989
990 if (child->unsync_children) {
991 ret = mmu_unsync_walk(child, walker);
992 if (ret)
993 return ret;
0074ff63 994 __clear_bit(i, sp->unsync_child_bitmap);
4731d4c7
MT		 995 }
996
997 if (child->unsync) {
998 ret = walker->entry(child, walker);
0074ff63 999 __clear_bit(i, sp->unsync_child_bitmap);
4731d4c7
MT		 1000 if (ret)
1001 return ret;
1002 }
1003 }
1004 }
1005
0074ff63 1006 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT		 1007 sp->unsync_children = 0;
1008
1009 return 0;
1010}
1011
4db35314 1012static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK		 1013{
1014 unsigned index;
1015 struct hlist_head *bucket;
4db35314 1016 struct kvm_mmu_page *sp;
cea0f0e7
AK		 1017 struct hlist_node *node;
1018
b8688d51 1019 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1020 index = kvm_page_table_hashfn(gfn);
f05e70ac 1021 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1022 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT		 1023 if (sp->gfn == gfn && !sp->role.metaphysical
1024 && !sp->role.invalid) {
cea0f0e7 1025 pgprintk("%s: found role %x\n",
b8688d51 1026 __func__, sp->role.word);
4db35314 1027 return sp;
cea0f0e7
AK		 1028 }
1029 return NULL;
1030}
1031
4731d4c7
MT		 1032static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1033{
1034 WARN_ON(!sp->unsync);
1035 sp->unsync = 0;
1036 --kvm->stat.mmu_unsync;
1037}
1038
1039static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1040
1041static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1042{
1043 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1044 kvm_mmu_zap_page(vcpu->kvm, sp);
1045 return 1;
1046 }
1047
1048 rmap_write_protect(vcpu->kvm, sp->gfn);
0c0f40bd 1049 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT		 1050 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1051 kvm_mmu_zap_page(vcpu->kvm, sp);
1052 return 1;
1053 }
1054
1055 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT		 1056 return 0;
1057}
1058
1059struct sync_walker {
1060 struct kvm_vcpu *vcpu;
1061 struct kvm_unsync_walk walker;
1062};
1063
1064static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1065{
1066 struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
1067 walker);
1068 struct kvm_vcpu *vcpu = sync_walk->vcpu;
1069
1070 kvm_sync_page(vcpu, sp);
1071 return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
1072}
1073
1074static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1075{
1076 struct sync_walker walker = {
1077 .walker = { .entry = mmu_sync_fn, },
1078 .vcpu = vcpu,
1079 };
1080
1081 while (mmu_unsync_walk(sp, &walker.walker))
1082 cond_resched_lock(&vcpu->kvm->mmu_lock);
1083}
1084
cea0f0e7
AK		 1085static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1086 gfn_t gfn,
1087 gva_t gaddr,
1088 unsigned level,
1089 int metaphysical,
41074d07 1090 unsigned access,
f7d9c7b7 1091 u64 *parent_pte)
cea0f0e7
AK		 1092{
1093 union kvm_mmu_page_role role;
1094 unsigned index;
1095 unsigned quadrant;
1096 struct hlist_head *bucket;
4db35314 1097 struct kvm_mmu_page *sp;
4731d4c7 1098 struct hlist_node *node, *tmp;
cea0f0e7
AK		 1099
1100 role.word = 0;
ad312c7c 1101 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK		 1102 role.level = level;
1103 role.metaphysical = metaphysical;
41074d07 1104 role.access = access;
ad312c7c 1105 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK		 1106 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1107 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1108 role.quadrant = quadrant;
1109 }
b8688d51 1110 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1111 gfn, role.word);
1ae0a13d 1112 index = kvm_page_table_hashfn(gfn);
f05e70ac 1113 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT		 1114 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1115 if (sp->gfn == gfn) {
1116 if (sp->unsync)
1117 if (kvm_sync_page(vcpu, sp))
1118 continue;
1119
1120 if (sp->role.word != role.word)
1121 continue;
1122
4db35314 1123 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT		 1124 if (sp->unsync_children) {
1125 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1126 kvm_mmu_mark_parents_unsync(vcpu, sp);
1127 }
b8688d51 1128 pgprintk("%s: found\n", __func__);
4db35314 1129 return sp;
cea0f0e7 1130 }
dfc5aa00 1131 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK		 1132 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1133 if (!sp)
1134 return sp;
b8688d51 1135 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK		 1136 sp->gfn = gfn;
1137 sp->role = role;
1138 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1139 if (!metaphysical) {
4a4c9924 1140 rmap_write_protect(vcpu->kvm, gfn);
4731d4c7
MT		 1141 account_shadowed(vcpu->kvm, gfn);
1142 }
131d8279
AK		 1143 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1144 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1145 else
1146 nonpaging_prefetch_page(vcpu, sp);
4db35314 1147 return sp;
cea0f0e7
AK		 1148}
1149
3d000db5 1150static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1151 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK		 1152{
1153 hpa_t shadow_addr;
1154 int level;
1155 int r;
1156 u64 *sptep;
1157 unsigned index;
1158
1159 shadow_addr = vcpu->arch.mmu.root_hpa;
1160 level = vcpu->arch.mmu.shadow_root_level;
1161 if (level == PT32E_ROOT_LEVEL) {
1162 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1163 shadow_addr &= PT64_BASE_ADDR_MASK;
1164 --level;
1165 }
1166
1167 while (level >= PT_PAGE_TABLE_LEVEL) {
1168 index = SHADOW_PT_INDEX(addr, level);
1169 sptep = ((u64 *)__va(shadow_addr)) + index;
1170 r = walker->entry(walker, vcpu, addr, sptep, level);
1171 if (r)
1172 return r;
1173 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1174 --level;
1175 }
1176 return 0;
1177}
1178
90cb0529 1179static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1180 struct kvm_mmu_page *sp)
a436036b 1181{
697fe2e2
AK		 1182 unsigned i;
1183 u64 *pt;
1184 u64 ent;
1185
4db35314 1186 pt = sp->spt;
697fe2e2 1187
4db35314 1188 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1189 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1190 if (is_shadow_present_pte(pt[i]))
290fc38d 1191 rmap_remove(kvm, &pt[i]);
c7addb90 1192 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK		 1193 }
1194 return;
1195 }
1196
1197 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1198 ent = pt[i];
1199
05da4558
MT		 1200 if (is_shadow_present_pte(ent)) {
1201 if (!is_large_pte(ent)) {
1202 ent &= PT64_BASE_ADDR_MASK;
1203 mmu_page_remove_parent_pte(page_header(ent),
1204 &pt[i]);
1205 } else {
1206 --kvm->stat.lpages;
1207 rmap_remove(kvm, &pt[i]);
1208 }
1209 }
c7addb90 1210 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1211 }
a436036b
AK		 1212}
1213
4db35314 1214static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1215{
4db35314 1216 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK		 1217}
1218
12b7d28f
AK		 1219static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1220{
1221 int i;
1222
1223 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1224 if (kvm->vcpus[i])
ad312c7c 1225 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK		 1226}
1227
31aa2b44 1228static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK		 1229{
1230 u64 *parent_pte;
1231
4db35314
AK		 1232 while (sp->multimapped || sp->parent_pte) {
1233 if (!sp->multimapped)
1234 parent_pte = sp->parent_pte;
a436036b
AK		 1235 else {
1236 struct kvm_pte_chain *chain;
1237
4db35314 1238 chain = container_of(sp->parent_ptes.first,
a436036b
AK		 1239 struct kvm_pte_chain, link);
1240 parent_pte = chain->parent_ptes[0];
1241 }
697fe2e2 1242 BUG_ON(!parent_pte);
4db35314 1243 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1244 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1245 }
31aa2b44
AK		 1246}
1247
4731d4c7
MT		 1248struct zap_walker {
1249 struct kvm_unsync_walk walker;
1250 struct kvm *kvm;
1251 int zapped;
1252};
1253
1254static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
1255{
1256 struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
1257 walker);
1258 kvm_mmu_zap_page(zap_walk->kvm, sp);
1259 zap_walk->zapped = 1;
1260 return 0;
1261}
1262
1263static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
1264{
1265 struct zap_walker walker = {
1266 .walker = { .entry = mmu_zap_fn, },
1267 .kvm = kvm,
1268 .zapped = 0,
1269 };
1270
1271 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
1272 return 0;
1273 mmu_unsync_walk(sp, &walker.walker);
1274 return walker.zapped;
1275}
1276
07385413 1277static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1278{
4731d4c7 1279 int ret;
31aa2b44 1280 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1281 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1282 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1283 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK		 1284 kvm_flush_remote_tlbs(kvm);
1285 if (!sp->role.invalid && !sp->role.metaphysical)
1286 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT		 1287 if (sp->unsync)
1288 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK		 1289 if (!sp->root_count) {
1290 hlist_del(&sp->hash_link);
1291 kvm_mmu_free_page(kvm, sp);
2e53d63a 1292 } else {
2e53d63a 1293 sp->role.invalid = 1;
5b5c6a5a 1294 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT		 1295 kvm_reload_remote_mmus(kvm);
1296 }
12b7d28f 1297 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1298 return ret;
a436036b
AK		 1299}
1300
82ce2c96
IE		 1301/*
1302 * Changing the number of mmu pages allocated to the vm
1303 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1304 */
1305void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1306{
1307 /*
1308 * If we set the number of mmu pages to be smaller be than the
1309 * number of actived pages , we must to free some mmu pages before we
1310 * change the value
1311 */
1312
f05e70ac 1313 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1314 kvm_nr_mmu_pages) {
f05e70ac
ZX		 1315 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1316 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE		 1317
1318 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1319 struct kvm_mmu_page *page;
1320
f05e70ac 1321 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE		 1322 struct kvm_mmu_page, link);
1323 kvm_mmu_zap_page(kvm, page);
1324 n_used_mmu_pages--;
1325 }
f05e70ac 1326 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE		 1327 }
1328 else
f05e70ac
ZX		 1329 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1330 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1331
f05e70ac 1332 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE		 1333}
1334
f67a46f4 1335static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK		 1336{
1337 unsigned index;
1338 struct hlist_head *bucket;
4db35314 1339 struct kvm_mmu_page *sp;
a436036b
AK		 1340 struct hlist_node *node, *n;
1341 int r;
1342
b8688d51 1343 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1344 r = 0;
1ae0a13d 1345 index = kvm_page_table_hashfn(gfn);
f05e70ac 1346 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK		 1347 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1348 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1349 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1350 sp->role.word);
a436036b 1351 r = 1;
07385413
MT		 1352 if (kvm_mmu_zap_page(kvm, sp))
1353 n = bucket->first;
a436036b
AK		 1354 }
1355 return r;
cea0f0e7
AK		 1356}
1357
f67a46f4 1358static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1359{
4db35314 1360 struct kvm_mmu_page *sp;
97a0a01e 1361
4db35314 1362 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1363 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1364 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK		 1365 }
1366}
1367
38c335f1 1368static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1369{
38c335f1 1370 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1371 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1372
291f26bc 1373 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK		 1374}
1375
6844dec6
MT		 1376static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1377{
1378 int i;
1379 u64 *pt = sp->spt;
1380
1381 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1382 return;
1383
1384 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1385 if (pt[i] == shadow_notrap_nonpresent_pte)
1386 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1387 }
1388}
1389
039576c0
AK		 1390struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1391{
72dc67a6
IE		 1392 struct page *page;
1393
ad312c7c 1394 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK		 1395
1396 if (gpa == UNMAPPED_GVA)
1397 return NULL;
72dc67a6 1398
72dc67a6 1399 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1400
1401 return page;
039576c0
AK		 1402}
1403
74be52e3
SY		 1404/*
1405 * The function is based on mtrr_type_lookup() in
1406 * arch/x86/kernel/cpu/mtrr/generic.c
1407 */
1408static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1409 u64 start, u64 end)
1410{
1411 int i;
1412 u64 base, mask;
1413 u8 prev_match, curr_match;
1414 int num_var_ranges = KVM_NR_VAR_MTRR;
1415
1416 if (!mtrr_state->enabled)
1417 return 0xFF;
1418
1419 /* Make end inclusive end, instead of exclusive */
1420 end--;
1421
1422 /* Look in fixed ranges. Just return the type as per start */
1423 if (mtrr_state->have_fixed && (start < 0x100000)) {
1424 int idx;
1425
1426 if (start < 0x80000) {
1427 idx = 0;
1428 idx += (start >> 16);
1429 return mtrr_state->fixed_ranges[idx];
1430 } else if (start < 0xC0000) {
1431 idx = 1 * 8;
1432 idx += ((start - 0x80000) >> 14);
1433 return mtrr_state->fixed_ranges[idx];
1434 } else if (start < 0x1000000) {
1435 idx = 3 * 8;
1436 idx += ((start - 0xC0000) >> 12);
1437 return mtrr_state->fixed_ranges[idx];
1438 }
1439 }
1440
1441 /*
1442 * Look in variable ranges
1443 * Look of multiple ranges matching this address and pick type
1444 * as per MTRR precedence
1445 */
1446 if (!(mtrr_state->enabled & 2))
1447 return mtrr_state->def_type;
1448
1449 prev_match = 0xFF;
1450 for (i = 0; i < num_var_ranges; ++i) {
1451 unsigned short start_state, end_state;
1452
1453 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1454 continue;
1455
1456 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1457 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1458 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1459 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1460
1461 start_state = ((start & mask) == (base & mask));
1462 end_state = ((end & mask) == (base & mask));
1463 if (start_state != end_state)
1464 return 0xFE;
1465
1466 if ((start & mask) != (base & mask))
1467 continue;
1468
1469 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1470 if (prev_match == 0xFF) {
1471 prev_match = curr_match;
1472 continue;
1473 }
1474
1475 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1476 curr_match == MTRR_TYPE_UNCACHABLE)
1477 return MTRR_TYPE_UNCACHABLE;
1478
1479 if ((prev_match == MTRR_TYPE_WRBACK &&
1480 curr_match == MTRR_TYPE_WRTHROUGH) ||
1481 (prev_match == MTRR_TYPE_WRTHROUGH &&
1482 curr_match == MTRR_TYPE_WRBACK)) {
1483 prev_match = MTRR_TYPE_WRTHROUGH;
1484 curr_match = MTRR_TYPE_WRTHROUGH;
1485 }
1486
1487 if (prev_match != curr_match)
1488 return MTRR_TYPE_UNCACHABLE;
1489 }
1490
1491 if (prev_match != 0xFF)
1492 return prev_match;
1493
1494 return mtrr_state->def_type;
1495}
1496
1497static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1498{
1499 u8 mtrr;
1500
1501 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1502 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1503 if (mtrr == 0xfe || mtrr == 0xff)
1504 mtrr = MTRR_TYPE_WRBACK;
1505 return mtrr;
1506}
1507
4731d4c7
MT		 1508static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1509{
1510 unsigned index;
1511 struct hlist_head *bucket;
1512 struct kvm_mmu_page *s;
1513 struct hlist_node *node, *n;
1514
1515 index = kvm_page_table_hashfn(sp->gfn);
1516 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1517 /* don't unsync if pagetable is shadowed with multiple roles */
1518 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1519 if (s->gfn != sp->gfn || s->role.metaphysical)
1520 continue;
1521 if (s->role.word != sp->role.word)
1522 return 1;
1523 }
0074ff63 1524 kvm_mmu_mark_parents_unsync(vcpu, sp);
4731d4c7
MT		 1525 ++vcpu->kvm->stat.mmu_unsync;
1526 sp->unsync = 1;
1527 mmu_convert_notrap(sp);
1528 return 0;
1529}
1530
1531static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1532 bool can_unsync)
1533{
1534 struct kvm_mmu_page *shadow;
1535
1536 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1537 if (shadow) {
1538 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1539 return 1;
1540 if (shadow->unsync)
1541 return 0;
582801a9 1542 if (can_unsync && oos_shadow)
4731d4c7
MT		 1543 return kvm_unsync_page(vcpu, shadow);
1544 return 1;
1545 }
1546 return 0;
1547}
1548
1e73f9dd
MT		 1549static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1550 unsigned pte_access, int user_fault,
1551 int write_fault, int dirty, int largepage,
4731d4c7
MT		 1552 gfn_t gfn, pfn_t pfn, bool speculative,
1553 bool can_unsync)
1c4f1fd6
AK		 1554{
1555 u64 spte;
1e73f9dd 1556 int ret = 0;
64d4d521
SY		 1557 u64 mt_mask = shadow_mt_mask;
1558
1c4f1fd6
AK		 1559 /*
1560 * We don't set the accessed bit, since we sometimes want to see
1561 * whether the guest actually used the pte (in order to detect
1562 * demand paging).
1563 */
7b52345e 1564 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1565 if (!speculative)
3201b5d9 1566 spte |= shadow_accessed_mask;
1c4f1fd6
AK		 1567 if (!dirty)
1568 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY		 1569 if (pte_access & ACC_EXEC_MASK)
1570 spte |= shadow_x_mask;
1571 else
1572 spte |= shadow_nx_mask;
1c4f1fd6 1573 if (pte_access & ACC_USER_MASK)
7b52345e 1574 spte |= shadow_user_mask;
05da4558
MT		 1575 if (largepage)
1576 spte |= PT_PAGE_SIZE_MASK;
64d4d521
SY		 1577 if (mt_mask) {
1578 mt_mask = get_memory_type(vcpu, gfn) <<
1579 kvm_x86_ops->get_mt_mask_shift();
1580 spte |= mt_mask;
1581 }
1c4f1fd6 1582
35149e21 1583 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK		 1584
1585 if ((pte_access & ACC_WRITE_MASK)
1586 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1587
38187c83
MT		 1588 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1589 ret = 1;
1590 spte = shadow_trap_nonpresent_pte;
1591 goto set_pte;
1592 }
1593
1c4f1fd6 1594 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1595
4731d4c7 1596 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1597 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1598 __func__, gfn);
1e73f9dd 1599 ret = 1;
1c4f1fd6 1600 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1601 if (is_writeble_pte(spte))
1c4f1fd6 1602 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK		 1603 }
1604 }
1605
1c4f1fd6
AK		 1606 if (pte_access & ACC_WRITE_MASK)
1607 mark_page_dirty(vcpu->kvm, gfn);
1608
38187c83 1609set_pte:
1c4f1fd6 1610 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT		 1611 return ret;
1612}
1613
1e73f9dd
MT		 1614static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1615 unsigned pt_access, unsigned pte_access,
1616 int user_fault, int write_fault, int dirty,
1617 int *ptwrite, int largepage, gfn_t gfn,
1618 pfn_t pfn, bool speculative)
1619{
1620 int was_rmapped = 0;
1621 int was_writeble = is_writeble_pte(*shadow_pte);
1622
1623 pgprintk("%s: spte %llx access %x write_fault %d"
1624 " user_fault %d gfn %lx\n",
1625 __func__, *shadow_pte, pt_access,
1626 write_fault, user_fault, gfn);
1627
1628 if (is_rmap_pte(*shadow_pte)) {
1629 /*
1630 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1631 * the parent of the now unreachable PTE.
1632 */
1633 if (largepage && !is_large_pte(*shadow_pte)) {
1634 struct kvm_mmu_page *child;
1635 u64 pte = *shadow_pte;
1636
1637 child = page_header(pte & PT64_BASE_ADDR_MASK);
1638 mmu_page_remove_parent_pte(child, shadow_pte);
1639 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1640 pgprintk("hfn old %lx new %lx\n",
1641 spte_to_pfn(*shadow_pte), pfn);
1642 rmap_remove(vcpu->kvm, shadow_pte);
1643 } else {
1644 if (largepage)
1645 was_rmapped = is_large_pte(*shadow_pte);
1646 else
1647 was_rmapped = 1;
1648 }
1649 }
1650 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
4731d4c7 1651 dirty, largepage, gfn, pfn, speculative, true)) {
1e73f9dd
MT		 1652 if (write_fault)
1653 *ptwrite = 1;
a378b4e6
MT		 1654 kvm_x86_ops->tlb_flush(vcpu);
1655 }
1e73f9dd
MT		 1656
1657 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1658 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1659 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1660 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1661 *shadow_pte, shadow_pte);
1662 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT		 1663 ++vcpu->kvm->stat.lpages;
1664
1c4f1fd6
AK		 1665 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1666 if (!was_rmapped) {
05da4558 1667 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1668 if (!is_rmap_pte(*shadow_pte))
35149e21 1669 kvm_release_pfn_clean(pfn);
75e68e60
IE		 1670 } else {
1671 if (was_writeble)
35149e21 1672 kvm_release_pfn_dirty(pfn);
75e68e60 1673 else
35149e21 1674 kvm_release_pfn_clean(pfn);
1c4f1fd6 1675 }
1b7fcd32 1676 if (speculative) {
ad312c7c 1677 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK		 1678 vcpu->arch.last_pte_gfn = gfn;
1679 }
1c4f1fd6
AK		 1680}
1681
6aa8b732
AK		 1682static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1683{
1684}
1685
140754bc
AK		 1686struct direct_shadow_walk {
1687 struct kvm_shadow_walk walker;
1688 pfn_t pfn;
1689 int write;
1690 int largepage;
1691 int pt_write;
1692};
6aa8b732 1693
140754bc
AK		 1694static int direct_map_entry(struct kvm_shadow_walk *_walk,
1695 struct kvm_vcpu *vcpu,
d40a1ee4 1696 u64 addr, u64 *sptep, int level)
140754bc
AK		 1697{
1698 struct direct_shadow_walk *walk =
1699 container_of(_walk, struct direct_shadow_walk, walker);
1700 struct kvm_mmu_page *sp;
1701 gfn_t pseudo_gfn;
1702 gfn_t gfn = addr >> PAGE_SHIFT;
1703
1704 if (level == PT_PAGE_TABLE_LEVEL
1705 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1706 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1707 0, walk->write, 1, &walk->pt_write,
1708 walk->largepage, gfn, walk->pfn, false);
bc2d4299 1709 ++vcpu->stat.pf_fixed;
140754bc
AK		 1710 return 1;
1711 }
6aa8b732 1712
140754bc
AK		 1713 if (*sptep == shadow_trap_nonpresent_pte) {
1714 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1715 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK		 1716 1, ACC_ALL, sptep);
1717 if (!sp) {
1718 pgprintk("nonpaging_map: ENOMEM\n");
1719 kvm_release_pfn_clean(walk->pfn);
1720 return -ENOMEM;
6aa8b732
AK		 1721 }
1722
140754bc
AK		 1723 set_shadow_pte(sptep,
1724 __pa(sp->spt)
1725 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1726 | shadow_user_mask | shadow_x_mask);
6aa8b732 1727 }
140754bc
AK		 1728 return 0;
1729}
1730
1731static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1732 int largepage, gfn_t gfn, pfn_t pfn)
1733{
1734 int r;
1735 struct direct_shadow_walk walker = {
1736 .walker = { .entry = direct_map_entry, },
1737 .pfn = pfn,
1738 .largepage = largepage,
1739 .write = write,
1740 .pt_write = 0,
1741 };
1742
d40a1ee4 1743 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK		 1744 if (r < 0)
1745 return r;
1746 return walker.pt_write;
6aa8b732
AK		 1747}
1748
10589a46
MT		 1749static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1750{
1751 int r;
05da4558 1752 int largepage = 0;
35149e21 1753 pfn_t pfn;
e930bffe 1754 unsigned long mmu_seq;
aaee2c94 1755
05da4558
MT		 1756 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1757 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1758 largepage = 1;
1759 }
1760
e930bffe 1761 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1762 smp_rmb();
35149e21 1763 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1764
d196e343 1765 /* mmio */
35149e21
AL		 1766 if (is_error_pfn(pfn)) {
1767 kvm_release_pfn_clean(pfn);
d196e343
AK		 1768 return 1;
1769 }
1770
aaee2c94 1771 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 1772 if (mmu_notifier_retry(vcpu, mmu_seq))
1773 goto out_unlock;
eb787d10 1774 kvm_mmu_free_some_pages(vcpu);
6c41f428 1775 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT		 1776 spin_unlock(&vcpu->kvm->mmu_lock);
1777
aaee2c94 1778
10589a46 1779 return r;
e930bffe
AA		 1780
1781out_unlock:
1782 spin_unlock(&vcpu->kvm->mmu_lock);
1783 kvm_release_pfn_clean(pfn);
1784 return 0;
10589a46
MT		 1785}
1786
1787
17ac10ad
AK		 1788static void mmu_free_roots(struct kvm_vcpu *vcpu)
1789{
1790 int i;
4db35314 1791 struct kvm_mmu_page *sp;
17ac10ad 1792
ad312c7c 1793 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1794 return;
aaee2c94 1795 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX		 1796 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1797 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1798
4db35314
AK		 1799 sp = page_header(root);
1800 --sp->root_count;
2e53d63a
MT		 1801 if (!sp->root_count && sp->role.invalid)
1802 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1803 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1804 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK		 1805 return;
1806 }
17ac10ad 1807 for (i = 0; i < 4; ++i) {
ad312c7c 1808 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1809
417726a3 1810 if (root) {
417726a3 1811 root &= PT64_BASE_ADDR_MASK;
4db35314
AK		 1812 sp = page_header(root);
1813 --sp->root_count;
2e53d63a
MT		 1814 if (!sp->root_count && sp->role.invalid)
1815 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1816 }
ad312c7c 1817 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1818 }
aaee2c94 1819 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1820 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK		 1821}
1822
1823static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1824{
1825 int i;
cea0f0e7 1826 gfn_t root_gfn;
4db35314 1827 struct kvm_mmu_page *sp;
fb72d167 1828 int metaphysical = 0;
3bb65a22 1829
ad312c7c 1830 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1831
ad312c7c
ZX		 1832 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1833 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK		 1834
1835 ASSERT(!VALID_PAGE(root));
fb72d167
JR		 1836 if (tdp_enabled)
1837 metaphysical = 1;
4db35314 1838 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR		 1839 PT64_ROOT_LEVEL, metaphysical,
1840 ACC_ALL, NULL);
4db35314
AK		 1841 root = __pa(sp->spt);
1842 ++sp->root_count;
ad312c7c 1843 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK		 1844 return;
1845 }
fb72d167
JR		 1846 metaphysical = !is_paging(vcpu);
1847 if (tdp_enabled)
1848 metaphysical = 1;
17ac10ad 1849 for (i = 0; i < 4; ++i) {
ad312c7c 1850 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK		 1851
1852 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX		 1853 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1854 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1855 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK		 1856 continue;
1857 }
ad312c7c
ZX		 1858 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1859 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1860 root_gfn = 0;
4db35314 1861 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1862 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1863 ACC_ALL, NULL);
4db35314
AK		 1864 root = __pa(sp->spt);
1865 ++sp->root_count;
ad312c7c 1866 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1867 }
ad312c7c 1868 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK		 1869}
1870
0ba73cda
MT		 1871static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1872{
1873 int i;
1874 struct kvm_mmu_page *sp;
1875
1876 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1877 return;
1878 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1879 hpa_t root = vcpu->arch.mmu.root_hpa;
1880 sp = page_header(root);
1881 mmu_sync_children(vcpu, sp);
1882 return;
1883 }
1884 for (i = 0; i < 4; ++i) {
1885 hpa_t root = vcpu->arch.mmu.pae_root[i];
1886
1887 if (root) {
1888 root &= PT64_BASE_ADDR_MASK;
1889 sp = page_header(root);
1890 mmu_sync_children(vcpu, sp);
1891 }
1892 }
1893}
1894
1895void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1896{
1897 spin_lock(&vcpu->kvm->mmu_lock);
1898 mmu_sync_roots(vcpu);
1899 spin_unlock(&vcpu->kvm->mmu_lock);
1900}
1901
6aa8b732
AK		 1902static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1903{
1904 return vaddr;
1905}
1906
1907static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1908 u32 error_code)
6aa8b732 1909{
e833240f 1910 gfn_t gfn;
e2dec939 1911 int r;
6aa8b732 1912
b8688d51 1913 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK		 1914 r = mmu_topup_memory_caches(vcpu);
1915 if (r)
1916 return r;
714b93da 1917
6aa8b732 1918 ASSERT(vcpu);
ad312c7c 1919 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1920
e833240f 1921 gfn = gva >> PAGE_SHIFT;
6aa8b732 1922
e833240f
AK		 1923 return nonpaging_map(vcpu, gva & PAGE_MASK,
1924 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK		 1925}
1926
fb72d167
JR		 1927static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1928 u32 error_code)
1929{
35149e21 1930 pfn_t pfn;
fb72d167 1931 int r;
05da4558
MT		 1932 int largepage = 0;
1933 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 1934 unsigned long mmu_seq;
fb72d167
JR		 1935
1936 ASSERT(vcpu);
1937 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1938
1939 r = mmu_topup_memory_caches(vcpu);
1940 if (r)
1941 return r;
1942
05da4558
MT		 1943 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1944 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1945 largepage = 1;
1946 }
e930bffe 1947 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1948 smp_rmb();
35149e21 1949 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL		 1950 if (is_error_pfn(pfn)) {
1951 kvm_release_pfn_clean(pfn);
fb72d167
JR		 1952 return 1;
1953 }
1954 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 1955 if (mmu_notifier_retry(vcpu, mmu_seq))
1956 goto out_unlock;
fb72d167
JR		 1957 kvm_mmu_free_some_pages(vcpu);
1958 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 1959 largepage, gfn, pfn);
fb72d167 1960 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR		 1961
1962 return r;
e930bffe
AA		 1963
1964out_unlock:
1965 spin_unlock(&vcpu->kvm->mmu_lock);
1966 kvm_release_pfn_clean(pfn);
1967 return 0;
fb72d167
JR		 1968}
1969
6aa8b732
AK		 1970static void nonpaging_free(struct kvm_vcpu *vcpu)
1971{
17ac10ad 1972 mmu_free_roots(vcpu);
6aa8b732
AK		 1973}
1974
1975static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1976{
ad312c7c 1977 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 1978
1979 context->new_cr3 = nonpaging_new_cr3;
1980 context->page_fault = nonpaging_page_fault;
6aa8b732
AK		 1981 context->gva_to_gpa = nonpaging_gva_to_gpa;
1982 context->free = nonpaging_free;
c7addb90 1983 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 1984 context->sync_page = nonpaging_sync_page;
a7052897 1985 context->invlpg = nonpaging_invlpg;
cea0f0e7 1986 context->root_level = 0;
6aa8b732 1987 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1988 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 1989 return 0;
1990}
1991
d835dfec 1992void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1993{
1165f5fe 1994 ++vcpu->stat.tlb_flush;
cbdd1bea 1995 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK		 1996}
1997
1998static void paging_new_cr3(struct kvm_vcpu *vcpu)
1999{
b8688d51 2000 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2001 mmu_free_roots(vcpu);
6aa8b732
AK		 2002}
2003
6aa8b732
AK		 2004static void inject_page_fault(struct kvm_vcpu *vcpu,
2005 u64 addr,
2006 u32 err_code)
2007{
c3c91fee 2008 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK		 2009}
2010
6aa8b732
AK		 2011static void paging_free(struct kvm_vcpu *vcpu)
2012{
2013 nonpaging_free(vcpu);
2014}
2015
2016#define PTTYPE 64
2017#include "paging_tmpl.h"
2018#undef PTTYPE
2019
2020#define PTTYPE 32
2021#include "paging_tmpl.h"
2022#undef PTTYPE
2023
17ac10ad 2024static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2025{
ad312c7c 2026 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2027
2028 ASSERT(is_pae(vcpu));
2029 context->new_cr3 = paging_new_cr3;
2030 context->page_fault = paging64_page_fault;
6aa8b732 2031 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2032 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2033 context->sync_page = paging64_sync_page;
a7052897 2034 context->invlpg = paging64_invlpg;
6aa8b732 2035 context->free = paging_free;
17ac10ad
AK		 2036 context->root_level = level;
2037 context->shadow_root_level = level;
17c3ba9d 2038 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2039 return 0;
2040}
2041
17ac10ad
AK		 2042static int paging64_init_context(struct kvm_vcpu *vcpu)
2043{
2044 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2045}
2046
6aa8b732
AK		 2047static int paging32_init_context(struct kvm_vcpu *vcpu)
2048{
ad312c7c 2049 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2050
2051 context->new_cr3 = paging_new_cr3;
2052 context->page_fault = paging32_page_fault;
6aa8b732
AK		 2053 context->gva_to_gpa = paging32_gva_to_gpa;
2054 context->free = paging_free;
c7addb90 2055 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2056 context->sync_page = paging32_sync_page;
a7052897 2057 context->invlpg = paging32_invlpg;
6aa8b732
AK		 2058 context->root_level = PT32_ROOT_LEVEL;
2059 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2060 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2061 return 0;
2062}
2063
2064static int paging32E_init_context(struct kvm_vcpu *vcpu)
2065{
17ac10ad 2066 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK		 2067}
2068
fb72d167
JR		 2069static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2070{
2071 struct kvm_mmu *context = &vcpu->arch.mmu;
2072
2073 context->new_cr3 = nonpaging_new_cr3;
2074 context->page_fault = tdp_page_fault;
2075 context->free = nonpaging_free;
2076 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2077 context->sync_page = nonpaging_sync_page;
a7052897 2078 context->invlpg = nonpaging_invlpg;
67253af5 2079 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR		 2080 context->root_hpa = INVALID_PAGE;
2081
2082 if (!is_paging(vcpu)) {
2083 context->gva_to_gpa = nonpaging_gva_to_gpa;
2084 context->root_level = 0;
2085 } else if (is_long_mode(vcpu)) {
2086 context->gva_to_gpa = paging64_gva_to_gpa;
2087 context->root_level = PT64_ROOT_LEVEL;
2088 } else if (is_pae(vcpu)) {
2089 context->gva_to_gpa = paging64_gva_to_gpa;
2090 context->root_level = PT32E_ROOT_LEVEL;
2091 } else {
2092 context->gva_to_gpa = paging32_gva_to_gpa;
2093 context->root_level = PT32_ROOT_LEVEL;
2094 }
2095
2096 return 0;
2097}
2098
2099static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK		 2100{
2101 ASSERT(vcpu);
ad312c7c 2102 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK		 2103
2104 if (!is_paging(vcpu))
2105 return nonpaging_init_context(vcpu);
a9058ecd 2106 else if (is_long_mode(vcpu))
6aa8b732
AK		 2107 return paging64_init_context(vcpu);
2108 else if (is_pae(vcpu))
2109 return paging32E_init_context(vcpu);
2110 else
2111 return paging32_init_context(vcpu);
2112}
2113
fb72d167
JR		 2114static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2115{
35149e21
AL		 2116 vcpu->arch.update_pte.pfn = bad_pfn;
2117
fb72d167
JR		 2118 if (tdp_enabled)
2119 return init_kvm_tdp_mmu(vcpu);
2120 else
2121 return init_kvm_softmmu(vcpu);
2122}
2123
6aa8b732
AK		 2124static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2125{
2126 ASSERT(vcpu);
ad312c7c
ZX		 2127 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2128 vcpu->arch.mmu.free(vcpu);
2129 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK		 2130 }
2131}
2132
2133int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK		 2134{
2135 destroy_kvm_mmu(vcpu);
2136 return init_kvm_mmu(vcpu);
2137}
8668a3c4 2138EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK		 2139
2140int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2141{
714b93da
AK		 2142 int r;
2143
e2dec939 2144 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK		 2145 if (r)
2146 goto out;
aaee2c94 2147 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2148 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2149 mmu_alloc_roots(vcpu);
0ba73cda 2150 mmu_sync_roots(vcpu);
aaee2c94 2151 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2152 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2153 kvm_mmu_flush_tlb(vcpu);
714b93da
AK		 2154out:
2155 return r;
6aa8b732 2156}
17c3ba9d
AK		 2157EXPORT_SYMBOL_GPL(kvm_mmu_load);
2158
2159void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2160{
2161 mmu_free_roots(vcpu);
2162}
6aa8b732 2163
09072daf 2164static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2165 struct kvm_mmu_page *sp,
ac1b714e
AK		 2166 u64 *spte)
2167{
2168 u64 pte;
2169 struct kvm_mmu_page *child;
2170
2171 pte = *spte;
c7addb90 2172 if (is_shadow_present_pte(pte)) {
05da4558
MT		 2173 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2174 is_large_pte(pte))
290fc38d 2175 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK		 2176 else {
2177 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2178 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK		 2179 }
2180 }
c7addb90 2181 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT		 2182 if (is_large_pte(pte))
2183 --vcpu->kvm->stat.lpages;
ac1b714e
AK		 2184}
2185
0028425f 2186static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2187 struct kvm_mmu_page *sp,
0028425f 2188 u64 *spte,
489f1d65 2189 const void *new)
0028425f 2190{
30945387
MT		 2191 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2192 if (!vcpu->arch.update_pte.largepage ||
2193 sp->role.glevels == PT32_ROOT_LEVEL) {
2194 ++vcpu->kvm->stat.mmu_pde_zapped;
2195 return;
2196 }
2197 }
0028425f 2198
4cee5764 2199 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2200 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2201 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2202 else
489f1d65 2203 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK		 2204}
2205
79539cec
AK		 2206static bool need_remote_flush(u64 old, u64 new)
2207{
2208 if (!is_shadow_present_pte(old))
2209 return false;
2210 if (!is_shadow_present_pte(new))
2211 return true;
2212 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2213 return true;
2214 old ^= PT64_NX_MASK;
2215 new ^= PT64_NX_MASK;
2216 return (old & ~new & PT64_PERM_MASK) != 0;
2217}
2218
2219static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2220{
2221 if (need_remote_flush(old, new))
2222 kvm_flush_remote_tlbs(vcpu->kvm);
2223 else
2224 kvm_mmu_flush_tlb(vcpu);
2225}
2226
12b7d28f
AK		 2227static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2228{
ad312c7c 2229 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2230
7b52345e 2231 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK		 2232}
2233
d7824fff
AK		 2234static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2235 const u8 *new, int bytes)
2236{
2237 gfn_t gfn;
2238 int r;
2239 u64 gpte = 0;
35149e21 2240 pfn_t pfn;
d7824fff 2241
05da4558
MT		 2242 vcpu->arch.update_pte.largepage = 0;
2243
d7824fff
AK		 2244 if (bytes != 4 && bytes != 8)
2245 return;
2246
2247 /*
2248 * Assume that the pte write on a page table of the same type
2249 * as the current vcpu paging mode. This is nearly always true
2250 * (might be false while changing modes). Note it is verified later
2251 * by update_pte().
2252 */
2253 if (is_pae(vcpu)) {
2254 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2255 if ((bytes == 4) && (gpa % 4 == 0)) {
2256 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2257 if (r)
2258 return;
2259 memcpy((void *)&gpte + (gpa % 8), new, 4);
2260 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2261 memcpy((void *)&gpte, new, 8);
2262 }
2263 } else {
2264 if ((bytes == 4) && (gpa % 4 == 0))
2265 memcpy((void *)&gpte, new, 4);
2266 }
2267 if (!is_present_pte(gpte))
2268 return;
2269 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2270
05da4558
MT		 2271 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2272 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2273 vcpu->arch.update_pte.largepage = 1;
2274 }
e930bffe 2275 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2276 smp_rmb();
35149e21 2277 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2278
35149e21
AL		 2279 if (is_error_pfn(pfn)) {
2280 kvm_release_pfn_clean(pfn);
d196e343
AK		 2281 return;
2282 }
d7824fff 2283 vcpu->arch.update_pte.gfn = gfn;
35149e21 2284 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK		 2285}
2286
1b7fcd32
AK		 2287static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2288{
2289 u64 *spte = vcpu->arch.last_pte_updated;
2290
2291 if (spte
2292 && vcpu->arch.last_pte_gfn == gfn
2293 && shadow_accessed_mask
2294 && !(*spte & shadow_accessed_mask)
2295 && is_shadow_present_pte(*spte))
2296 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2297}
2298
09072daf 2299void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 2300 const u8 *new, int bytes)
da4a00f0 2301{
9b7a0325 2302 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2303 struct kvm_mmu_page *sp;
0e7bc4b9 2304 struct hlist_node *node, *n;
9b7a0325
AK		 2305 struct hlist_head *bucket;
2306 unsigned index;
489f1d65 2307 u64 entry, gentry;
9b7a0325 2308 u64 *spte;
9b7a0325 2309 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2310 unsigned pte_size;
9b7a0325 2311 unsigned page_offset;
0e7bc4b9 2312 unsigned misaligned;
fce0657f 2313 unsigned quadrant;
9b7a0325 2314 int level;
86a5ba02 2315 int flooded = 0;
ac1b714e 2316 int npte;
489f1d65 2317 int r;
9b7a0325 2318
b8688d51 2319 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2320 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2321 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2322 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2323 kvm_mmu_free_some_pages(vcpu);
4cee5764 2324 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2325 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 2326 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 2327 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX		 2328 ++vcpu->arch.last_pt_write_count;
2329 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK		 2330 flooded = 1;
2331 } else {
ad312c7c
ZX		 2332 vcpu->arch.last_pt_write_gfn = gfn;
2333 vcpu->arch.last_pt_write_count = 1;
2334 vcpu->arch.last_pte_updated = NULL;
86a5ba02 2335 }
1ae0a13d 2336 index = kvm_page_table_hashfn(gfn);
f05e70ac 2337 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2338 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2339 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2340 continue;
4db35314 2341 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2342 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2343 misaligned |= bytes < 4;
86a5ba02 2344 if (misaligned || flooded) {
0e7bc4b9
AK		 2345 /*
2346 * Misaligned accesses are too much trouble to fix
2347 * up; also, they usually indicate a page is not used
2348 * as a page table.
86a5ba02
AK		 2349 *
2350 * If we're seeing too many writes to a page,
2351 * it may no longer be a page table, or we may be
2352 * forking, in which case it is better to unmap the
2353 * page.
0e7bc4b9
AK		 2354 */
2355 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2356 gpa, bytes, sp->role.word);
07385413
MT		 2357 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2358 n = bucket->first;
4cee5764 2359 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK		 2360 continue;
2361 }
9b7a0325 2362 page_offset = offset;
4db35314 2363 level = sp->role.level;
ac1b714e 2364 npte = 1;
4db35314 2365 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK		 2366 page_offset <<= 1; /* 32->64 */
2367 /*
2368 * A 32-bit pde maps 4MB while the shadow pdes map
2369 * only 2MB. So we need to double the offset again
2370 * and zap two pdes instead of one.
2371 */
2372 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2373 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK		 2374 page_offset <<= 1;
2375 npte = 2;
2376 }
fce0657f 2377 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2378 page_offset &= ~PAGE_MASK;
4db35314 2379 if (quadrant != sp->role.quadrant)
fce0657f 2380 continue;
9b7a0325 2381 }
4db35314 2382 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE		 2383 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2384 gentry = 0;
2385 r = kvm_read_guest_atomic(vcpu->kvm,
2386 gpa & ~(u64)(pte_size - 1),
2387 &gentry, pte_size);
2388 new = (const void *)&gentry;
2389 if (r < 0)
2390 new = NULL;
2391 }
ac1b714e 2392 while (npte--) {
79539cec 2393 entry = *spte;
4db35314 2394 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE		 2395 if (new)
2396 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2397 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2398 ++spte;
9b7a0325 2399 }
9b7a0325 2400 }
c7addb90 2401 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2402 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL		 2403 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2404 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2405 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2406 }
da4a00f0
AK		 2407}
2408
a436036b
AK		 2409int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2410{
10589a46
MT		 2411 gpa_t gpa;
2412 int r;
a436036b 2413
10589a46 2414 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2415
aaee2c94 2416 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2417 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2418 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2419 return r;
a436036b 2420}
577bdc49 2421EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2422
22d95b12 2423void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2424{
f05e70ac 2425 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2426 struct kvm_mmu_page *sp;
ebeace86 2427
f05e70ac 2428 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK		 2429 struct kvm_mmu_page, link);
2430 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2431 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK		 2432 }
2433}
ebeace86 2434
3067714c
AK		 2435int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2436{
2437 int r;
2438 enum emulation_result er;
2439
ad312c7c 2440 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK		 2441 if (r < 0)
2442 goto out;
2443
2444 if (!r) {
2445 r = 1;
2446 goto out;
2447 }
2448
b733bfb5
AK		 2449 r = mmu_topup_memory_caches(vcpu);
2450 if (r)
2451 goto out;
2452
3067714c 2453 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK		 2454
2455 switch (er) {
2456 case EMULATE_DONE:
2457 return 1;
2458 case EMULATE_DO_MMIO:
2459 ++vcpu->stat.mmio_exits;
2460 return 0;
2461 case EMULATE_FAIL:
2462 kvm_report_emulation_failure(vcpu, "pagetable");
2463 return 1;
2464 default:
2465 BUG();
2466 }
2467out:
3067714c
AK		 2468 return r;
2469}
2470EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2471
a7052897
MT		 2472void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2473{
2474 spin_lock(&vcpu->kvm->mmu_lock);
2475 vcpu->arch.mmu.invlpg(vcpu, gva);
2476 spin_unlock(&vcpu->kvm->mmu_lock);
2477 kvm_mmu_flush_tlb(vcpu);
2478 ++vcpu->stat.invlpg;
2479}
2480EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2481
18552672
JR		 2482void kvm_enable_tdp(void)
2483{
2484 tdp_enabled = true;
2485}
2486EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2487
5f4cb662
JR		 2488void kvm_disable_tdp(void)
2489{
2490 tdp_enabled = false;
2491}
2492EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2493
6aa8b732
AK		 2494static void free_mmu_pages(struct kvm_vcpu *vcpu)
2495{
4db35314 2496 struct kvm_mmu_page *sp;
6aa8b732 2497
f05e70ac
ZX		 2498 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2499 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK		 2500 struct kvm_mmu_page, link);
2501 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2502 cond_resched();
f51234c2 2503 }
ad312c7c 2504 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK		 2505}
2506
2507static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2508{
17ac10ad 2509 struct page *page;
6aa8b732
AK		 2510 int i;
2511
2512 ASSERT(vcpu);
2513
f05e70ac
ZX		 2514 if (vcpu->kvm->arch.n_requested_mmu_pages)
2515 vcpu->kvm->arch.n_free_mmu_pages =
2516 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2517 else
f05e70ac
ZX		 2518 vcpu->kvm->arch.n_free_mmu_pages =
2519 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK		 2520 /*
2521 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2522 * Therefore we need to allocate shadow page tables in the first
2523 * 4GB of memory, which happens to fit the DMA32 zone.
2524 */
2525 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2526 if (!page)
2527 goto error_1;
ad312c7c 2528 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2529 for (i = 0; i < 4; ++i)
ad312c7c 2530 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2531
6aa8b732
AK		 2532 return 0;
2533
2534error_1:
2535 free_mmu_pages(vcpu);
2536 return -ENOMEM;
2537}
2538
8018c27b 2539int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2540{
6aa8b732 2541 ASSERT(vcpu);
ad312c7c 2542 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2543
8018c27b
IM		 2544 return alloc_mmu_pages(vcpu);
2545}
6aa8b732 2546
8018c27b
IM		 2547int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2548{
2549 ASSERT(vcpu);
ad312c7c 2550 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2551
8018c27b 2552 return init_kvm_mmu(vcpu);
6aa8b732
AK		 2553}
2554
2555void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2556{
2557 ASSERT(vcpu);
2558
2559 destroy_kvm_mmu(vcpu);
2560 free_mmu_pages(vcpu);
714b93da 2561 mmu_free_memory_caches(vcpu);
6aa8b732
AK		 2562}
2563
90cb0529 2564void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2565{
4db35314 2566 struct kvm_mmu_page *sp;
6aa8b732 2567
2245a28f 2568 spin_lock(&kvm->mmu_lock);
f05e70ac 2569 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK		 2570 int i;
2571 u64 *pt;
2572
291f26bc 2573 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK		 2574 continue;
2575
4db35314 2576 pt = sp->spt;
6aa8b732
AK		 2577 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2578 /* avoid RMW */
9647c14c 2579 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2580 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2581 }
171d595d 2582 kvm_flush_remote_tlbs(kvm);
2245a28f 2583 spin_unlock(&kvm->mmu_lock);
6aa8b732 2584}
37a7d8b0 2585
90cb0529 2586void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2587{
4db35314 2588 struct kvm_mmu_page *sp, *node;
e0fa826f 2589
aaee2c94 2590 spin_lock(&kvm->mmu_lock);
f05e70ac 2591 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT		 2592 if (kvm_mmu_zap_page(kvm, sp))
2593 node = container_of(kvm->arch.active_mmu_pages.next,
2594 struct kvm_mmu_page, link);
aaee2c94 2595 spin_unlock(&kvm->mmu_lock);
e0fa826f 2596
90cb0529 2597 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL		 2598}
2599
8b2cf73c 2600static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE		 2601{
2602 struct kvm_mmu_page *page;
2603
2604 page = container_of(kvm->arch.active_mmu_pages.prev,
2605 struct kvm_mmu_page, link);
2606 kvm_mmu_zap_page(kvm, page);
2607}
2608
2609static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2610{
2611 struct kvm *kvm;
2612 struct kvm *kvm_freed = NULL;
2613 int cache_count = 0;
2614
2615 spin_lock(&kvm_lock);
2616
2617 list_for_each_entry(kvm, &vm_list, vm_list) {
2618 int npages;
2619
5a4c9288
MT		 2620 if (!down_read_trylock(&kvm->slots_lock))
2621 continue;
3ee16c81
IE		 2622 spin_lock(&kvm->mmu_lock);
2623 npages = kvm->arch.n_alloc_mmu_pages -
2624 kvm->arch.n_free_mmu_pages;
2625 cache_count += npages;
2626 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2627 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2628 cache_count--;
2629 kvm_freed = kvm;
2630 }
2631 nr_to_scan--;
2632
2633 spin_unlock(&kvm->mmu_lock);
5a4c9288 2634 up_read(&kvm->slots_lock);
3ee16c81
IE		 2635 }
2636 if (kvm_freed)
2637 list_move_tail(&kvm_freed->vm_list, &vm_list);
2638
2639 spin_unlock(&kvm_lock);
2640
2641 return cache_count;
2642}
2643
2644static struct shrinker mmu_shrinker = {
2645 .shrink = mmu_shrink,
2646 .seeks = DEFAULT_SEEKS * 10,
2647};
2648
2ddfd20e 2649static void mmu_destroy_caches(void)
b5a33a75
AK		 2650{
2651 if (pte_chain_cache)
2652 kmem_cache_destroy(pte_chain_cache);
2653 if (rmap_desc_cache)
2654 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK		 2655 if (mmu_page_header_cache)
2656 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK		 2657}
2658
3ee16c81
IE		 2659void kvm_mmu_module_exit(void)
2660{
2661 mmu_destroy_caches();
2662 unregister_shrinker(&mmu_shrinker);
2663}
2664
b5a33a75
AK		 2665int kvm_mmu_module_init(void)
2666{
2667 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2668 sizeof(struct kvm_pte_chain),
20c2df83 2669 0, 0, NULL);
b5a33a75
AK		 2670 if (!pte_chain_cache)
2671 goto nomem;
2672 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2673 sizeof(struct kvm_rmap_desc),
20c2df83 2674 0, 0, NULL);
b5a33a75
AK		 2675 if (!rmap_desc_cache)
2676 goto nomem;
2677
d3d25b04
AK		 2678 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2679 sizeof(struct kvm_mmu_page),
20c2df83 2680 0, 0, NULL);
d3d25b04
AK		 2681 if (!mmu_page_header_cache)
2682 goto nomem;
2683
3ee16c81
IE		 2684 register_shrinker(&mmu_shrinker);
2685
b5a33a75
AK		 2686 return 0;
2687
2688nomem:
3ee16c81 2689 mmu_destroy_caches();
b5a33a75
AK		 2690 return -ENOMEM;
2691}
2692
3ad82a7e
ZX		 2693/*
2694 * Caculate mmu pages needed for kvm.
2695 */
2696unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2697{
2698 int i;
2699 unsigned int nr_mmu_pages;
2700 unsigned int nr_pages = 0;
2701
2702 for (i = 0; i < kvm->nmemslots; i++)
2703 nr_pages += kvm->memslots[i].npages;
2704
2705 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2706 nr_mmu_pages = max(nr_mmu_pages,
2707 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2708
2709 return nr_mmu_pages;
2710}
2711
2f333bcb
MT		 2712static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2713 unsigned len)
2714{
2715 if (len > buffer->len)
2716 return NULL;
2717 return buffer->ptr;
2718}
2719
2720static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2721 unsigned len)
2722{
2723 void *ret;
2724
2725 ret = pv_mmu_peek_buffer(buffer, len);
2726 if (!ret)
2727 return ret;
2728 buffer->ptr += len;
2729 buffer->len -= len;
2730 buffer->processed += len;
2731 return ret;
2732}
2733
2734static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2735 gpa_t addr, gpa_t value)
2736{
2737 int bytes = 8;
2738 int r;
2739
2740 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2741 bytes = 4;
2742
2743 r = mmu_topup_memory_caches(vcpu);
2744 if (r)
2745 return r;
2746
3200f405 2747 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT		 2748 return -EFAULT;
2749
2750 return 1;
2751}
2752
2753static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2754{
2755 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2756 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT		 2757 return 1;
2758}
2759
2760static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2761{
2762 spin_lock(&vcpu->kvm->mmu_lock);
2763 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2764 spin_unlock(&vcpu->kvm->mmu_lock);
2765 return 1;
2766}
2767
2768static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2769 struct kvm_pv_mmu_op_buffer *buffer)
2770{
2771 struct kvm_mmu_op_header *header;
2772
2773 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2774 if (!header)
2775 return 0;
2776 switch (header->op) {
2777 case KVM_MMU_OP_WRITE_PTE: {
2778 struct kvm_mmu_op_write_pte *wpte;
2779
2780 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2781 if (!wpte)
2782 return 0;
2783 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2784 wpte->pte_val);
2785 }
2786 case KVM_MMU_OP_FLUSH_TLB: {
2787 struct kvm_mmu_op_flush_tlb *ftlb;
2788
2789 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2790 if (!ftlb)
2791 return 0;
2792 return kvm_pv_mmu_flush_tlb(vcpu);
2793 }
2794 case KVM_MMU_OP_RELEASE_PT: {
2795 struct kvm_mmu_op_release_pt *rpt;
2796
2797 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2798 if (!rpt)
2799 return 0;
2800 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2801 }
2802 default: return 0;
2803 }
2804}
2805
2806int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2807 gpa_t addr, unsigned long *ret)
2808{
2809 int r;
6ad18fba 2810 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2811
6ad18fba
DH		 2812 buffer->ptr = buffer->buf;
2813 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2814 buffer->processed = 0;
2f333bcb 2815
6ad18fba 2816 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT		 2817 if (r)
2818 goto out;
2819
6ad18fba
DH		 2820 while (buffer->len) {
2821 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT		 2822 if (r < 0)
2823 goto out;
2824 if (r == 0)
2825 break;
2826 }
2827
2828 r = 1;
2829out:
6ad18fba 2830 *ret = buffer->processed;
2f333bcb
MT		 2831 return r;
2832}
2833
37a7d8b0
AK		 2834#ifdef AUDIT
2835
2836static const char *audit_msg;
2837
2838static gva_t canonicalize(gva_t gva)
2839{
2840#ifdef CONFIG_X86_64
2841 gva = (long long)(gva << 16) >> 16;
2842#endif
2843 return gva;
2844}
2845
2846static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2847 gva_t va, int level)
2848{
2849 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2850 int i;
2851 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2852
2853 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2854 u64 ent = pt[i];
2855
c7addb90 2856 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK		 2857 continue;
2858
2859 va = canonicalize(va);
c7addb90
AK		 2860 if (level > 1) {
2861 if (ent == shadow_notrap_nonpresent_pte)
2862 printk(KERN_ERR "audit: (%s) nontrapping pte"
2863 " in nonleaf level: levels %d gva %lx"
2864 " level %d pte %llx\n", audit_msg,
ad312c7c 2865 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2866
37a7d8b0 2867 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2868 } else {
ad312c7c 2869 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2870 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2871
c7addb90 2872 if (is_shadow_present_pte(ent)
37a7d8b0 2873 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK		 2874 printk(KERN_ERR "xx audit error: (%s) levels %d"
2875 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2876 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD		 2877 va, gpa, hpa, ent,
2878 is_shadow_present_pte(ent));
c7addb90
AK		 2879 else if (ent == shadow_notrap_nonpresent_pte
2880 && !is_error_hpa(hpa))
2881 printk(KERN_ERR "audit: (%s) notrap shadow,"
2882 " valid guest gva %lx\n", audit_msg, va);
35149e21 2883 kvm_release_pfn_clean(pfn);
c7addb90 2884
37a7d8b0
AK		 2885 }
2886 }
2887}
2888
2889static void audit_mappings(struct kvm_vcpu *vcpu)
2890{
1ea252af 2891 unsigned i;
37a7d8b0 2892
ad312c7c
ZX		 2893 if (vcpu->arch.mmu.root_level == 4)
2894 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK		 2895 else
2896 for (i = 0; i < 4; ++i)
ad312c7c 2897 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2898 audit_mappings_page(vcpu,
ad312c7c 2899 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK		 2900 i << 30,
2901 2);
2902}
2903
2904static int count_rmaps(struct kvm_vcpu *vcpu)
2905{
2906 int nmaps = 0;
2907 int i, j, k;
2908
2909 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2910 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2911 struct kvm_rmap_desc *d;
2912
2913 for (j = 0; j < m->npages; ++j) {
290fc38d 2914 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2915
290fc38d 2916 if (!*rmapp)
37a7d8b0 2917 continue;
290fc38d 2918 if (!(*rmapp & 1)) {
37a7d8b0
AK		 2919 ++nmaps;
2920 continue;
2921 }
290fc38d 2922 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK		 2923 while (d) {
2924 for (k = 0; k < RMAP_EXT; ++k)
2925 if (d->shadow_ptes[k])
2926 ++nmaps;
2927 else
2928 break;
2929 d = d->more;
2930 }
2931 }
2932 }
2933 return nmaps;
2934}
2935
2936static int count_writable_mappings(struct kvm_vcpu *vcpu)
2937{
2938 int nmaps = 0;
4db35314 2939 struct kvm_mmu_page *sp;
37a7d8b0
AK		 2940 int i;
2941
f05e70ac 2942 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2943 u64 *pt = sp->spt;
37a7d8b0 2944
4db35314 2945 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK		 2946 continue;
2947
2948 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2949 u64 ent = pt[i];
2950
2951 if (!(ent & PT_PRESENT_MASK))
2952 continue;
2953 if (!(ent & PT_WRITABLE_MASK))
2954 continue;
2955 ++nmaps;
2956 }
2957 }
2958 return nmaps;
2959}
2960
2961static void audit_rmap(struct kvm_vcpu *vcpu)
2962{
2963 int n_rmap = count_rmaps(vcpu);
2964 int n_actual = count_writable_mappings(vcpu);
2965
2966 if (n_rmap != n_actual)
2967 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2968 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK		 2969}
2970
2971static void audit_write_protection(struct kvm_vcpu *vcpu)
2972{
4db35314 2973 struct kvm_mmu_page *sp;
290fc38d
IE		 2974 struct kvm_memory_slot *slot;
2975 unsigned long *rmapp;
2976 gfn_t gfn;
37a7d8b0 2977
f05e70ac 2978 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2979 if (sp->role.metaphysical)
37a7d8b0
AK		 2980 continue;
2981
4db35314 2982 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 2983 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE		 2984 rmapp = &slot->rmap[gfn - slot->base_gfn];
2985 if (*rmapp)
37a7d8b0
AK		 2986 printk(KERN_ERR "%s: (%s) shadow page has writable"
2987 " mappings: gfn %lx role %x\n",
b8688d51 2988 __func__, audit_msg, sp->gfn,
4db35314 2989 sp->role.word);
37a7d8b0
AK		 2990 }
2991}
2992
2993static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2994{
2995 int olddbg = dbg;
2996
2997 dbg = 0;
2998 audit_msg = msg;
2999 audit_rmap(vcpu);
3000 audit_write_protection(vcpu);
3001 audit_mappings(vcpu);
3002 dbg = olddbg;
3003}
3004
3005#endif
Linux kernel - Deliverables
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