Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
1d737c8a | 21 | #include "mmu.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
6aa8b732 | 32 | |
e495606d AK |
33 | #include <asm/page.h> |
34 | #include <asm/cmpxchg.h> | |
4e542370 | 35 | #include <asm/io.h> |
6aa8b732 | 36 | |
18552672 JR |
37 | /* |
38 | * When setting this variable to true it enables Two-Dimensional-Paging | |
39 | * where the hardware walks 2 page tables: | |
40 | * 1. the guest-virtual to guest-physical | |
41 | * 2. while doing 1. it walks guest-physical to host-physical | |
42 | * If the hardware supports that we don't need to do shadow paging. | |
43 | */ | |
2f333bcb | 44 | bool tdp_enabled = false; |
18552672 | 45 | |
37a7d8b0 AK |
46 | #undef MMU_DEBUG |
47 | ||
48 | #undef AUDIT | |
49 | ||
50 | #ifdef AUDIT | |
51 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
52 | #else | |
53 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
54 | #endif | |
55 | ||
56 | #ifdef MMU_DEBUG | |
57 | ||
58 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
59 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
60 | ||
61 | #else | |
62 | ||
63 | #define pgprintk(x...) do { } while (0) | |
64 | #define rmap_printk(x...) do { } while (0) | |
65 | ||
66 | #endif | |
67 | ||
68 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
6ada8cca AK |
69 | static int dbg = 0; |
70 | module_param(dbg, bool, 0644); | |
37a7d8b0 | 71 | #endif |
6aa8b732 | 72 | |
d6c69ee9 YD |
73 | #ifndef MMU_DEBUG |
74 | #define ASSERT(x) do { } while (0) | |
75 | #else | |
6aa8b732 AK |
76 | #define ASSERT(x) \ |
77 | if (!(x)) { \ | |
78 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
79 | __FILE__, __LINE__, #x); \ | |
80 | } | |
d6c69ee9 | 81 | #endif |
6aa8b732 | 82 | |
6aa8b732 AK |
83 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
84 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
85 | ||
6aa8b732 AK |
86 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
87 | ||
88 | #define PT64_LEVEL_BITS 9 | |
89 | ||
90 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 91 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
92 | |
93 | #define PT64_LEVEL_MASK(level) \ | |
94 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
95 | ||
96 | #define PT64_INDEX(address, level)\ | |
97 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
98 | ||
99 | ||
100 | #define PT32_LEVEL_BITS 10 | |
101 | ||
102 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 103 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
104 | |
105 | #define PT32_LEVEL_MASK(level) \ | |
106 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
107 | ||
108 | #define PT32_INDEX(address, level)\ | |
109 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
110 | ||
111 | ||
27aba766 | 112 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
113 | #define PT64_DIR_BASE_ADDR_MASK \ |
114 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
115 | ||
116 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
117 | #define PT32_DIR_BASE_ADDR_MASK \ | |
118 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
119 | ||
79539cec AK |
120 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
121 | | PT64_NX_MASK) | |
6aa8b732 AK |
122 | |
123 | #define PFERR_PRESENT_MASK (1U << 0) | |
124 | #define PFERR_WRITE_MASK (1U << 1) | |
125 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 126 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 | 127 | |
6aa8b732 AK |
128 | #define PT_DIRECTORY_LEVEL 2 |
129 | #define PT_PAGE_TABLE_LEVEL 1 | |
130 | ||
cd4a4e53 AK |
131 | #define RMAP_EXT 4 |
132 | ||
fe135d2c AK |
133 | #define ACC_EXEC_MASK 1 |
134 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
135 | #define ACC_USER_MASK PT_USER_MASK | |
136 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
137 | ||
135f8c2b AK |
138 | #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) |
139 | ||
cd4a4e53 AK |
140 | struct kvm_rmap_desc { |
141 | u64 *shadow_ptes[RMAP_EXT]; | |
142 | struct kvm_rmap_desc *more; | |
143 | }; | |
144 | ||
b5a33a75 AK |
145 | static struct kmem_cache *pte_chain_cache; |
146 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 147 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 148 | |
c7addb90 AK |
149 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
150 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
7b52345e SY |
151 | static u64 __read_mostly shadow_base_present_pte; |
152 | static u64 __read_mostly shadow_nx_mask; | |
153 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ | |
154 | static u64 __read_mostly shadow_user_mask; | |
155 | static u64 __read_mostly shadow_accessed_mask; | |
156 | static u64 __read_mostly shadow_dirty_mask; | |
c7addb90 AK |
157 | |
158 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
159 | { | |
160 | shadow_trap_nonpresent_pte = trap_pte; | |
161 | shadow_notrap_nonpresent_pte = notrap_pte; | |
162 | } | |
163 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
164 | ||
7b52345e SY |
165 | void kvm_mmu_set_base_ptes(u64 base_pte) |
166 | { | |
167 | shadow_base_present_pte = base_pte; | |
168 | } | |
169 | EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes); | |
170 | ||
171 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
172 | u64 dirty_mask, u64 nx_mask, u64 x_mask) | |
173 | { | |
174 | shadow_user_mask = user_mask; | |
175 | shadow_accessed_mask = accessed_mask; | |
176 | shadow_dirty_mask = dirty_mask; | |
177 | shadow_nx_mask = nx_mask; | |
178 | shadow_x_mask = x_mask; | |
179 | } | |
180 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | |
181 | ||
6aa8b732 AK |
182 | static int is_write_protection(struct kvm_vcpu *vcpu) |
183 | { | |
ad312c7c | 184 | return vcpu->arch.cr0 & X86_CR0_WP; |
6aa8b732 AK |
185 | } |
186 | ||
187 | static int is_cpuid_PSE36(void) | |
188 | { | |
189 | return 1; | |
190 | } | |
191 | ||
73b1087e AK |
192 | static int is_nx(struct kvm_vcpu *vcpu) |
193 | { | |
ad312c7c | 194 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
195 | } |
196 | ||
6aa8b732 AK |
197 | static int is_present_pte(unsigned long pte) |
198 | { | |
199 | return pte & PT_PRESENT_MASK; | |
200 | } | |
201 | ||
c7addb90 AK |
202 | static int is_shadow_present_pte(u64 pte) |
203 | { | |
c7addb90 AK |
204 | return pte != shadow_trap_nonpresent_pte |
205 | && pte != shadow_notrap_nonpresent_pte; | |
206 | } | |
207 | ||
05da4558 MT |
208 | static int is_large_pte(u64 pte) |
209 | { | |
210 | return pte & PT_PAGE_SIZE_MASK; | |
211 | } | |
212 | ||
6aa8b732 AK |
213 | static int is_writeble_pte(unsigned long pte) |
214 | { | |
215 | return pte & PT_WRITABLE_MASK; | |
216 | } | |
217 | ||
e3c5e7ec AK |
218 | static int is_dirty_pte(unsigned long pte) |
219 | { | |
7b52345e | 220 | return pte & shadow_dirty_mask; |
e3c5e7ec AK |
221 | } |
222 | ||
cd4a4e53 AK |
223 | static int is_rmap_pte(u64 pte) |
224 | { | |
4b1a80fa | 225 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
226 | } |
227 | ||
35149e21 | 228 | static pfn_t spte_to_pfn(u64 pte) |
0b49ea86 | 229 | { |
35149e21 | 230 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
0b49ea86 AK |
231 | } |
232 | ||
da928521 AK |
233 | static gfn_t pse36_gfn_delta(u32 gpte) |
234 | { | |
235 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
236 | ||
237 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
238 | } | |
239 | ||
e663ee64 AK |
240 | static void set_shadow_pte(u64 *sptep, u64 spte) |
241 | { | |
242 | #ifdef CONFIG_X86_64 | |
243 | set_64bit((unsigned long *)sptep, spte); | |
244 | #else | |
245 | set_64bit((unsigned long long *)sptep, spte); | |
246 | #endif | |
247 | } | |
248 | ||
e2dec939 | 249 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 250 | struct kmem_cache *base_cache, int min) |
714b93da AK |
251 | { |
252 | void *obj; | |
253 | ||
254 | if (cache->nobjs >= min) | |
e2dec939 | 255 | return 0; |
714b93da | 256 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 257 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 258 | if (!obj) |
e2dec939 | 259 | return -ENOMEM; |
714b93da AK |
260 | cache->objects[cache->nobjs++] = obj; |
261 | } | |
e2dec939 | 262 | return 0; |
714b93da AK |
263 | } |
264 | ||
265 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
266 | { | |
267 | while (mc->nobjs) | |
268 | kfree(mc->objects[--mc->nobjs]); | |
269 | } | |
270 | ||
c1158e63 | 271 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 272 | int min) |
c1158e63 AK |
273 | { |
274 | struct page *page; | |
275 | ||
276 | if (cache->nobjs >= min) | |
277 | return 0; | |
278 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 279 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
280 | if (!page) |
281 | return -ENOMEM; | |
282 | set_page_private(page, 0); | |
283 | cache->objects[cache->nobjs++] = page_address(page); | |
284 | } | |
285 | return 0; | |
286 | } | |
287 | ||
288 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
289 | { | |
290 | while (mc->nobjs) | |
c4d198d5 | 291 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
292 | } |
293 | ||
2e3e5882 | 294 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 295 | { |
e2dec939 AK |
296 | int r; |
297 | ||
ad312c7c | 298 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 299 | pte_chain_cache, 4); |
e2dec939 AK |
300 | if (r) |
301 | goto out; | |
ad312c7c | 302 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
2e3e5882 | 303 | rmap_desc_cache, 1); |
d3d25b04 AK |
304 | if (r) |
305 | goto out; | |
ad312c7c | 306 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
307 | if (r) |
308 | goto out; | |
ad312c7c | 309 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 310 | mmu_page_header_cache, 4); |
e2dec939 AK |
311 | out: |
312 | return r; | |
714b93da AK |
313 | } |
314 | ||
315 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
316 | { | |
ad312c7c ZX |
317 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
318 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
319 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
320 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
321 | } |
322 | ||
323 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
324 | size_t size) | |
325 | { | |
326 | void *p; | |
327 | ||
328 | BUG_ON(!mc->nobjs); | |
329 | p = mc->objects[--mc->nobjs]; | |
330 | memset(p, 0, size); | |
331 | return p; | |
332 | } | |
333 | ||
714b93da AK |
334 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
335 | { | |
ad312c7c | 336 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
337 | sizeof(struct kvm_pte_chain)); |
338 | } | |
339 | ||
90cb0529 | 340 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 341 | { |
90cb0529 | 342 | kfree(pc); |
714b93da AK |
343 | } |
344 | ||
345 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
346 | { | |
ad312c7c | 347 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
348 | sizeof(struct kvm_rmap_desc)); |
349 | } | |
350 | ||
90cb0529 | 351 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 352 | { |
90cb0529 | 353 | kfree(rd); |
714b93da AK |
354 | } |
355 | ||
05da4558 MT |
356 | /* |
357 | * Return the pointer to the largepage write count for a given | |
358 | * gfn, handling slots that are not large page aligned. | |
359 | */ | |
360 | static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot) | |
361 | { | |
362 | unsigned long idx; | |
363 | ||
364 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
365 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
366 | return &slot->lpage_info[idx].write_count; | |
367 | } | |
368 | ||
369 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
370 | { | |
371 | int *write_count; | |
372 | ||
373 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
374 | *write_count += 1; | |
05da4558 MT |
375 | } |
376 | ||
377 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
378 | { | |
379 | int *write_count; | |
380 | ||
381 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
382 | *write_count -= 1; | |
383 | WARN_ON(*write_count < 0); | |
384 | } | |
385 | ||
386 | static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn) | |
387 | { | |
388 | struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn); | |
389 | int *largepage_idx; | |
390 | ||
391 | if (slot) { | |
392 | largepage_idx = slot_largepage_idx(gfn, slot); | |
393 | return *largepage_idx; | |
394 | } | |
395 | ||
396 | return 1; | |
397 | } | |
398 | ||
399 | static int host_largepage_backed(struct kvm *kvm, gfn_t gfn) | |
400 | { | |
401 | struct vm_area_struct *vma; | |
402 | unsigned long addr; | |
403 | ||
404 | addr = gfn_to_hva(kvm, gfn); | |
405 | if (kvm_is_error_hva(addr)) | |
406 | return 0; | |
407 | ||
408 | vma = find_vma(current->mm, addr); | |
409 | if (vma && is_vm_hugetlb_page(vma)) | |
410 | return 1; | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
415 | static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn) | |
416 | { | |
417 | struct kvm_memory_slot *slot; | |
418 | ||
419 | if (has_wrprotected_page(vcpu->kvm, large_gfn)) | |
420 | return 0; | |
421 | ||
422 | if (!host_largepage_backed(vcpu->kvm, large_gfn)) | |
423 | return 0; | |
424 | ||
425 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
426 | if (slot && slot->dirty_bitmap) | |
427 | return 0; | |
428 | ||
429 | return 1; | |
430 | } | |
431 | ||
290fc38d IE |
432 | /* |
433 | * Take gfn and return the reverse mapping to it. | |
434 | * Note: gfn must be unaliased before this function get called | |
435 | */ | |
436 | ||
05da4558 | 437 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage) |
290fc38d IE |
438 | { |
439 | struct kvm_memory_slot *slot; | |
05da4558 | 440 | unsigned long idx; |
290fc38d IE |
441 | |
442 | slot = gfn_to_memslot(kvm, gfn); | |
05da4558 MT |
443 | if (!lpage) |
444 | return &slot->rmap[gfn - slot->base_gfn]; | |
445 | ||
446 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
447 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
448 | ||
449 | return &slot->lpage_info[idx].rmap_pde; | |
290fc38d IE |
450 | } |
451 | ||
cd4a4e53 AK |
452 | /* |
453 | * Reverse mapping data structures: | |
454 | * | |
290fc38d IE |
455 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
456 | * that points to page_address(page). | |
cd4a4e53 | 457 | * |
290fc38d IE |
458 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
459 | * containing more mappings. | |
cd4a4e53 | 460 | */ |
05da4558 | 461 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage) |
cd4a4e53 | 462 | { |
4db35314 | 463 | struct kvm_mmu_page *sp; |
cd4a4e53 | 464 | struct kvm_rmap_desc *desc; |
290fc38d | 465 | unsigned long *rmapp; |
cd4a4e53 AK |
466 | int i; |
467 | ||
468 | if (!is_rmap_pte(*spte)) | |
469 | return; | |
290fc38d | 470 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
471 | sp = page_header(__pa(spte)); |
472 | sp->gfns[spte - sp->spt] = gfn; | |
05da4558 | 473 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage); |
290fc38d | 474 | if (!*rmapp) { |
cd4a4e53 | 475 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
476 | *rmapp = (unsigned long)spte; |
477 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 478 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 479 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 480 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 481 | desc->shadow_ptes[1] = spte; |
290fc38d | 482 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
483 | } else { |
484 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 485 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
486 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
487 | desc = desc->more; | |
488 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 489 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
490 | desc = desc->more; |
491 | } | |
492 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
493 | ; | |
494 | desc->shadow_ptes[i] = spte; | |
495 | } | |
496 | } | |
497 | ||
290fc38d | 498 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
499 | struct kvm_rmap_desc *desc, |
500 | int i, | |
501 | struct kvm_rmap_desc *prev_desc) | |
502 | { | |
503 | int j; | |
504 | ||
505 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
506 | ; | |
507 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 508 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
509 | if (j != 0) |
510 | return; | |
511 | if (!prev_desc && !desc->more) | |
290fc38d | 512 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
513 | else |
514 | if (prev_desc) | |
515 | prev_desc->more = desc->more; | |
516 | else | |
290fc38d | 517 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 518 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
519 | } |
520 | ||
290fc38d | 521 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 522 | { |
cd4a4e53 AK |
523 | struct kvm_rmap_desc *desc; |
524 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 525 | struct kvm_mmu_page *sp; |
35149e21 | 526 | pfn_t pfn; |
290fc38d | 527 | unsigned long *rmapp; |
cd4a4e53 AK |
528 | int i; |
529 | ||
530 | if (!is_rmap_pte(*spte)) | |
531 | return; | |
4db35314 | 532 | sp = page_header(__pa(spte)); |
35149e21 | 533 | pfn = spte_to_pfn(*spte); |
7b52345e | 534 | if (*spte & shadow_accessed_mask) |
35149e21 | 535 | kvm_set_pfn_accessed(pfn); |
b4231d61 | 536 | if (is_writeble_pte(*spte)) |
35149e21 | 537 | kvm_release_pfn_dirty(pfn); |
b4231d61 | 538 | else |
35149e21 | 539 | kvm_release_pfn_clean(pfn); |
05da4558 | 540 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte)); |
290fc38d | 541 | if (!*rmapp) { |
cd4a4e53 AK |
542 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
543 | BUG(); | |
290fc38d | 544 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 545 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 546 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
547 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
548 | spte, *spte); | |
549 | BUG(); | |
550 | } | |
290fc38d | 551 | *rmapp = 0; |
cd4a4e53 AK |
552 | } else { |
553 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 554 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
555 | prev_desc = NULL; |
556 | while (desc) { | |
557 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
558 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 559 | rmap_desc_remove_entry(rmapp, |
714b93da | 560 | desc, i, |
cd4a4e53 AK |
561 | prev_desc); |
562 | return; | |
563 | } | |
564 | prev_desc = desc; | |
565 | desc = desc->more; | |
566 | } | |
567 | BUG(); | |
568 | } | |
569 | } | |
570 | ||
98348e95 | 571 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 572 | { |
374cbac0 | 573 | struct kvm_rmap_desc *desc; |
98348e95 IE |
574 | struct kvm_rmap_desc *prev_desc; |
575 | u64 *prev_spte; | |
576 | int i; | |
577 | ||
578 | if (!*rmapp) | |
579 | return NULL; | |
580 | else if (!(*rmapp & 1)) { | |
581 | if (!spte) | |
582 | return (u64 *)*rmapp; | |
583 | return NULL; | |
584 | } | |
585 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
586 | prev_desc = NULL; | |
587 | prev_spte = NULL; | |
588 | while (desc) { | |
589 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
590 | if (prev_spte == spte) | |
591 | return desc->shadow_ptes[i]; | |
592 | prev_spte = desc->shadow_ptes[i]; | |
593 | } | |
594 | desc = desc->more; | |
595 | } | |
596 | return NULL; | |
597 | } | |
598 | ||
599 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
600 | { | |
290fc38d | 601 | unsigned long *rmapp; |
374cbac0 | 602 | u64 *spte; |
caa5b8a5 | 603 | int write_protected = 0; |
374cbac0 | 604 | |
4a4c9924 | 605 | gfn = unalias_gfn(kvm, gfn); |
05da4558 | 606 | rmapp = gfn_to_rmap(kvm, gfn, 0); |
374cbac0 | 607 | |
98348e95 IE |
608 | spte = rmap_next(kvm, rmapp, NULL); |
609 | while (spte) { | |
374cbac0 | 610 | BUG_ON(!spte); |
374cbac0 | 611 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 612 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
caa5b8a5 | 613 | if (is_writeble_pte(*spte)) { |
9647c14c | 614 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
615 | write_protected = 1; |
616 | } | |
9647c14c | 617 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 618 | } |
855149aa | 619 | if (write_protected) { |
35149e21 | 620 | pfn_t pfn; |
855149aa IE |
621 | |
622 | spte = rmap_next(kvm, rmapp, NULL); | |
35149e21 AL |
623 | pfn = spte_to_pfn(*spte); |
624 | kvm_set_pfn_dirty(pfn); | |
855149aa IE |
625 | } |
626 | ||
05da4558 MT |
627 | /* check for huge page mappings */ |
628 | rmapp = gfn_to_rmap(kvm, gfn, 1); | |
629 | spte = rmap_next(kvm, rmapp, NULL); | |
630 | while (spte) { | |
631 | BUG_ON(!spte); | |
632 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
633 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
634 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
635 | if (is_writeble_pte(*spte)) { | |
636 | rmap_remove(kvm, spte); | |
637 | --kvm->stat.lpages; | |
638 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
6597ca09 | 639 | spte = NULL; |
05da4558 MT |
640 | write_protected = 1; |
641 | } | |
642 | spte = rmap_next(kvm, rmapp, spte); | |
643 | } | |
644 | ||
caa5b8a5 ED |
645 | if (write_protected) |
646 | kvm_flush_remote_tlbs(kvm); | |
05da4558 MT |
647 | |
648 | account_shadowed(kvm, gfn); | |
374cbac0 AK |
649 | } |
650 | ||
e930bffe AA |
651 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp) |
652 | { | |
653 | u64 *spte; | |
654 | int need_tlb_flush = 0; | |
655 | ||
656 | while ((spte = rmap_next(kvm, rmapp, NULL))) { | |
657 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
658 | rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte); | |
659 | rmap_remove(kvm, spte); | |
660 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
661 | need_tlb_flush = 1; | |
662 | } | |
663 | return need_tlb_flush; | |
664 | } | |
665 | ||
666 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, | |
667 | int (*handler)(struct kvm *kvm, unsigned long *rmapp)) | |
668 | { | |
669 | int i; | |
670 | int retval = 0; | |
671 | ||
672 | /* | |
673 | * If mmap_sem isn't taken, we can look the memslots with only | |
674 | * the mmu_lock by skipping over the slots with userspace_addr == 0. | |
675 | */ | |
676 | for (i = 0; i < kvm->nmemslots; i++) { | |
677 | struct kvm_memory_slot *memslot = &kvm->memslots[i]; | |
678 | unsigned long start = memslot->userspace_addr; | |
679 | unsigned long end; | |
680 | ||
681 | /* mmu_lock protects userspace_addr */ | |
682 | if (!start) | |
683 | continue; | |
684 | ||
685 | end = start + (memslot->npages << PAGE_SHIFT); | |
686 | if (hva >= start && hva < end) { | |
687 | gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT; | |
688 | retval |= handler(kvm, &memslot->rmap[gfn_offset]); | |
689 | retval |= handler(kvm, | |
690 | &memslot->lpage_info[ | |
691 | gfn_offset / | |
692 | KVM_PAGES_PER_HPAGE].rmap_pde); | |
693 | } | |
694 | } | |
695 | ||
696 | return retval; | |
697 | } | |
698 | ||
699 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
700 | { | |
701 | return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); | |
702 | } | |
703 | ||
704 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp) | |
705 | { | |
706 | u64 *spte; | |
707 | int young = 0; | |
708 | ||
534e38b4 SY |
709 | /* always return old for EPT */ |
710 | if (!shadow_accessed_mask) | |
711 | return 0; | |
712 | ||
e930bffe AA |
713 | spte = rmap_next(kvm, rmapp, NULL); |
714 | while (spte) { | |
715 | int _young; | |
716 | u64 _spte = *spte; | |
717 | BUG_ON(!(_spte & PT_PRESENT_MASK)); | |
718 | _young = _spte & PT_ACCESSED_MASK; | |
719 | if (_young) { | |
720 | young = 1; | |
721 | clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
722 | } | |
723 | spte = rmap_next(kvm, rmapp, spte); | |
724 | } | |
725 | return young; | |
726 | } | |
727 | ||
728 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
729 | { | |
730 | return kvm_handle_hva(kvm, hva, kvm_age_rmapp); | |
731 | } | |
732 | ||
d6c69ee9 | 733 | #ifdef MMU_DEBUG |
47ad8e68 | 734 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 735 | { |
139bdb2d AK |
736 | u64 *pos; |
737 | u64 *end; | |
738 | ||
47ad8e68 | 739 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
3c915510 | 740 | if (is_shadow_present_pte(*pos)) { |
b8688d51 | 741 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 742 | pos, *pos); |
6aa8b732 | 743 | return 0; |
139bdb2d | 744 | } |
6aa8b732 AK |
745 | return 1; |
746 | } | |
d6c69ee9 | 747 | #endif |
6aa8b732 | 748 | |
4db35314 | 749 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 750 | { |
4db35314 AK |
751 | ASSERT(is_empty_shadow_page(sp->spt)); |
752 | list_del(&sp->link); | |
753 | __free_page(virt_to_page(sp->spt)); | |
754 | __free_page(virt_to_page(sp->gfns)); | |
755 | kfree(sp); | |
f05e70ac | 756 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
757 | } |
758 | ||
cea0f0e7 AK |
759 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
760 | { | |
1ae0a13d | 761 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
762 | } |
763 | ||
25c0de2c AK |
764 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
765 | u64 *parent_pte) | |
6aa8b732 | 766 | { |
4db35314 | 767 | struct kvm_mmu_page *sp; |
6aa8b732 | 768 | |
ad312c7c ZX |
769 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
770 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
771 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 772 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 773 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
4db35314 AK |
774 | ASSERT(is_empty_shadow_page(sp->spt)); |
775 | sp->slot_bitmap = 0; | |
776 | sp->multimapped = 0; | |
777 | sp->parent_pte = parent_pte; | |
f05e70ac | 778 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 779 | return sp; |
6aa8b732 AK |
780 | } |
781 | ||
714b93da | 782 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 783 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
784 | { |
785 | struct kvm_pte_chain *pte_chain; | |
786 | struct hlist_node *node; | |
787 | int i; | |
788 | ||
789 | if (!parent_pte) | |
790 | return; | |
4db35314 AK |
791 | if (!sp->multimapped) { |
792 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
793 | |
794 | if (!old) { | |
4db35314 | 795 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
796 | return; |
797 | } | |
4db35314 | 798 | sp->multimapped = 1; |
714b93da | 799 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
800 | INIT_HLIST_HEAD(&sp->parent_ptes); |
801 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
802 | pte_chain->parent_ptes[0] = old; |
803 | } | |
4db35314 | 804 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
805 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
806 | continue; | |
807 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
808 | if (!pte_chain->parent_ptes[i]) { | |
809 | pte_chain->parent_ptes[i] = parent_pte; | |
810 | return; | |
811 | } | |
812 | } | |
714b93da | 813 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 814 | BUG_ON(!pte_chain); |
4db35314 | 815 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
816 | pte_chain->parent_ptes[0] = parent_pte; |
817 | } | |
818 | ||
4db35314 | 819 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
820 | u64 *parent_pte) |
821 | { | |
822 | struct kvm_pte_chain *pte_chain; | |
823 | struct hlist_node *node; | |
824 | int i; | |
825 | ||
4db35314 AK |
826 | if (!sp->multimapped) { |
827 | BUG_ON(sp->parent_pte != parent_pte); | |
828 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
829 | return; |
830 | } | |
4db35314 | 831 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
832 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
833 | if (!pte_chain->parent_ptes[i]) | |
834 | break; | |
835 | if (pte_chain->parent_ptes[i] != parent_pte) | |
836 | continue; | |
697fe2e2 AK |
837 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
838 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
839 | pte_chain->parent_ptes[i] |
840 | = pte_chain->parent_ptes[i + 1]; | |
841 | ++i; | |
842 | } | |
843 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
844 | if (i == 0) { |
845 | hlist_del(&pte_chain->link); | |
90cb0529 | 846 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
847 | if (hlist_empty(&sp->parent_ptes)) { |
848 | sp->multimapped = 0; | |
849 | sp->parent_pte = NULL; | |
697fe2e2 AK |
850 | } |
851 | } | |
cea0f0e7 AK |
852 | return; |
853 | } | |
854 | BUG(); | |
855 | } | |
856 | ||
d761a501 AK |
857 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
858 | struct kvm_mmu_page *sp) | |
859 | { | |
860 | int i; | |
861 | ||
862 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
863 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
864 | } | |
865 | ||
4db35314 | 866 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
867 | { |
868 | unsigned index; | |
869 | struct hlist_head *bucket; | |
4db35314 | 870 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
871 | struct hlist_node *node; |
872 | ||
b8688d51 | 873 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 874 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 875 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 876 | hlist_for_each_entry(sp, node, bucket, hash_link) |
2e53d63a MT |
877 | if (sp->gfn == gfn && !sp->role.metaphysical |
878 | && !sp->role.invalid) { | |
cea0f0e7 | 879 | pgprintk("%s: found role %x\n", |
b8688d51 | 880 | __func__, sp->role.word); |
4db35314 | 881 | return sp; |
cea0f0e7 AK |
882 | } |
883 | return NULL; | |
884 | } | |
885 | ||
886 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
887 | gfn_t gfn, | |
888 | gva_t gaddr, | |
889 | unsigned level, | |
890 | int metaphysical, | |
41074d07 | 891 | unsigned access, |
f7d9c7b7 | 892 | u64 *parent_pte) |
cea0f0e7 AK |
893 | { |
894 | union kvm_mmu_page_role role; | |
895 | unsigned index; | |
896 | unsigned quadrant; | |
897 | struct hlist_head *bucket; | |
4db35314 | 898 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
899 | struct hlist_node *node; |
900 | ||
901 | role.word = 0; | |
ad312c7c | 902 | role.glevels = vcpu->arch.mmu.root_level; |
cea0f0e7 AK |
903 | role.level = level; |
904 | role.metaphysical = metaphysical; | |
41074d07 | 905 | role.access = access; |
ad312c7c | 906 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
907 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
908 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
909 | role.quadrant = quadrant; | |
910 | } | |
b8688d51 | 911 | pgprintk("%s: looking gfn %lx role %x\n", __func__, |
cea0f0e7 | 912 | gfn, role.word); |
1ae0a13d | 913 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 914 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
915 | hlist_for_each_entry(sp, node, bucket, hash_link) |
916 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
917 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
b8688d51 | 918 | pgprintk("%s: found\n", __func__); |
4db35314 | 919 | return sp; |
cea0f0e7 | 920 | } |
dfc5aa00 | 921 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
922 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
923 | if (!sp) | |
924 | return sp; | |
b8688d51 | 925 | pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word); |
4db35314 AK |
926 | sp->gfn = gfn; |
927 | sp->role = role; | |
928 | hlist_add_head(&sp->hash_link, bucket); | |
374cbac0 | 929 | if (!metaphysical) |
4a4c9924 | 930 | rmap_write_protect(vcpu->kvm, gfn); |
131d8279 AK |
931 | if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) |
932 | vcpu->arch.mmu.prefetch_page(vcpu, sp); | |
933 | else | |
934 | nonpaging_prefetch_page(vcpu, sp); | |
4db35314 | 935 | return sp; |
cea0f0e7 AK |
936 | } |
937 | ||
90cb0529 | 938 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 939 | struct kvm_mmu_page *sp) |
a436036b | 940 | { |
697fe2e2 AK |
941 | unsigned i; |
942 | u64 *pt; | |
943 | u64 ent; | |
944 | ||
4db35314 | 945 | pt = sp->spt; |
697fe2e2 | 946 | |
4db35314 | 947 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 948 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 949 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 950 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 951 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 AK |
952 | } |
953 | return; | |
954 | } | |
955 | ||
956 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
957 | ent = pt[i]; | |
958 | ||
05da4558 MT |
959 | if (is_shadow_present_pte(ent)) { |
960 | if (!is_large_pte(ent)) { | |
961 | ent &= PT64_BASE_ADDR_MASK; | |
962 | mmu_page_remove_parent_pte(page_header(ent), | |
963 | &pt[i]); | |
964 | } else { | |
965 | --kvm->stat.lpages; | |
966 | rmap_remove(kvm, &pt[i]); | |
967 | } | |
968 | } | |
c7addb90 | 969 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 970 | } |
a436036b AK |
971 | } |
972 | ||
4db35314 | 973 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 974 | { |
4db35314 | 975 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
976 | } |
977 | ||
12b7d28f AK |
978 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
979 | { | |
980 | int i; | |
981 | ||
982 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
983 | if (kvm->vcpus[i]) | |
ad312c7c | 984 | kvm->vcpus[i]->arch.last_pte_updated = NULL; |
12b7d28f AK |
985 | } |
986 | ||
31aa2b44 | 987 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
988 | { |
989 | u64 *parent_pte; | |
990 | ||
4db35314 AK |
991 | while (sp->multimapped || sp->parent_pte) { |
992 | if (!sp->multimapped) | |
993 | parent_pte = sp->parent_pte; | |
a436036b AK |
994 | else { |
995 | struct kvm_pte_chain *chain; | |
996 | ||
4db35314 | 997 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
998 | struct kvm_pte_chain, link); |
999 | parent_pte = chain->parent_ptes[0]; | |
1000 | } | |
697fe2e2 | 1001 | BUG_ON(!parent_pte); |
4db35314 | 1002 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 1003 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 1004 | } |
31aa2b44 AK |
1005 | } |
1006 | ||
1007 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) | |
1008 | { | |
1009 | ++kvm->stat.mmu_shadow_zapped; | |
4db35314 | 1010 | kvm_mmu_page_unlink_children(kvm, sp); |
31aa2b44 | 1011 | kvm_mmu_unlink_parents(kvm, sp); |
5b5c6a5a AK |
1012 | kvm_flush_remote_tlbs(kvm); |
1013 | if (!sp->role.invalid && !sp->role.metaphysical) | |
1014 | unaccount_shadowed(kvm, sp->gfn); | |
4db35314 AK |
1015 | if (!sp->root_count) { |
1016 | hlist_del(&sp->hash_link); | |
1017 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 1018 | } else { |
2e53d63a | 1019 | sp->role.invalid = 1; |
5b5c6a5a | 1020 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
1021 | kvm_reload_remote_mmus(kvm); |
1022 | } | |
12b7d28f | 1023 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
1024 | } |
1025 | ||
82ce2c96 IE |
1026 | /* |
1027 | * Changing the number of mmu pages allocated to the vm | |
1028 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
1029 | */ | |
1030 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
1031 | { | |
1032 | /* | |
1033 | * If we set the number of mmu pages to be smaller be than the | |
1034 | * number of actived pages , we must to free some mmu pages before we | |
1035 | * change the value | |
1036 | */ | |
1037 | ||
f05e70ac | 1038 | if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) > |
82ce2c96 | 1039 | kvm_nr_mmu_pages) { |
f05e70ac ZX |
1040 | int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages |
1041 | - kvm->arch.n_free_mmu_pages; | |
82ce2c96 IE |
1042 | |
1043 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
1044 | struct kvm_mmu_page *page; | |
1045 | ||
f05e70ac | 1046 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
1047 | struct kvm_mmu_page, link); |
1048 | kvm_mmu_zap_page(kvm, page); | |
1049 | n_used_mmu_pages--; | |
1050 | } | |
f05e70ac | 1051 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
1052 | } |
1053 | else | |
f05e70ac ZX |
1054 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
1055 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 1056 | |
f05e70ac | 1057 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
1058 | } |
1059 | ||
f67a46f4 | 1060 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
1061 | { |
1062 | unsigned index; | |
1063 | struct hlist_head *bucket; | |
4db35314 | 1064 | struct kvm_mmu_page *sp; |
a436036b AK |
1065 | struct hlist_node *node, *n; |
1066 | int r; | |
1067 | ||
b8688d51 | 1068 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 1069 | r = 0; |
1ae0a13d | 1070 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1071 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
1072 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
1073 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
b8688d51 | 1074 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 AK |
1075 | sp->role.word); |
1076 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
1077 | r = 1; |
1078 | } | |
1079 | return r; | |
cea0f0e7 AK |
1080 | } |
1081 | ||
f67a46f4 | 1082 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1083 | { |
4db35314 | 1084 | struct kvm_mmu_page *sp; |
97a0a01e | 1085 | |
4db35314 | 1086 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
b8688d51 | 1087 | pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word); |
4db35314 | 1088 | kvm_mmu_zap_page(kvm, sp); |
97a0a01e AK |
1089 | } |
1090 | } | |
1091 | ||
38c335f1 | 1092 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1093 | { |
38c335f1 | 1094 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 1095 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1096 | |
4db35314 | 1097 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
1098 | } |
1099 | ||
039576c0 AK |
1100 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1101 | { | |
72dc67a6 IE |
1102 | struct page *page; |
1103 | ||
ad312c7c | 1104 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1105 | |
1106 | if (gpa == UNMAPPED_GVA) | |
1107 | return NULL; | |
72dc67a6 IE |
1108 | |
1109 | down_read(¤t->mm->mmap_sem); | |
1110 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | |
1111 | up_read(¤t->mm->mmap_sem); | |
1112 | ||
1113 | return page; | |
039576c0 AK |
1114 | } |
1115 | ||
1c4f1fd6 AK |
1116 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, |
1117 | unsigned pt_access, unsigned pte_access, | |
1118 | int user_fault, int write_fault, int dirty, | |
05da4558 | 1119 | int *ptwrite, int largepage, gfn_t gfn, |
35149e21 | 1120 | pfn_t pfn, bool speculative) |
1c4f1fd6 AK |
1121 | { |
1122 | u64 spte; | |
15aaa819 | 1123 | int was_rmapped = 0; |
75e68e60 | 1124 | int was_writeble = is_writeble_pte(*shadow_pte); |
1c4f1fd6 | 1125 | |
bc750ba8 | 1126 | pgprintk("%s: spte %llx access %x write_fault %d" |
1c4f1fd6 | 1127 | " user_fault %d gfn %lx\n", |
b8688d51 | 1128 | __func__, *shadow_pte, pt_access, |
1c4f1fd6 AK |
1129 | write_fault, user_fault, gfn); |
1130 | ||
15aaa819 | 1131 | if (is_rmap_pte(*shadow_pte)) { |
05da4558 MT |
1132 | /* |
1133 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1134 | * the parent of the now unreachable PTE. | |
1135 | */ | |
1136 | if (largepage && !is_large_pte(*shadow_pte)) { | |
1137 | struct kvm_mmu_page *child; | |
1138 | u64 pte = *shadow_pte; | |
1139 | ||
1140 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1141 | mmu_page_remove_parent_pte(child, shadow_pte); | |
35149e21 | 1142 | } else if (pfn != spte_to_pfn(*shadow_pte)) { |
15aaa819 | 1143 | pgprintk("hfn old %lx new %lx\n", |
35149e21 | 1144 | spte_to_pfn(*shadow_pte), pfn); |
15aaa819 | 1145 | rmap_remove(vcpu->kvm, shadow_pte); |
05da4558 MT |
1146 | } else { |
1147 | if (largepage) | |
1148 | was_rmapped = is_large_pte(*shadow_pte); | |
1149 | else | |
1150 | was_rmapped = 1; | |
15aaa819 | 1151 | } |
15aaa819 MT |
1152 | } |
1153 | ||
1c4f1fd6 AK |
1154 | /* |
1155 | * We don't set the accessed bit, since we sometimes want to see | |
1156 | * whether the guest actually used the pte (in order to detect | |
1157 | * demand paging). | |
1158 | */ | |
7b52345e | 1159 | spte = shadow_base_present_pte | shadow_dirty_mask; |
947da538 AK |
1160 | if (!speculative) |
1161 | pte_access |= PT_ACCESSED_MASK; | |
1c4f1fd6 AK |
1162 | if (!dirty) |
1163 | pte_access &= ~ACC_WRITE_MASK; | |
7b52345e SY |
1164 | if (pte_access & ACC_EXEC_MASK) |
1165 | spte |= shadow_x_mask; | |
1166 | else | |
1167 | spte |= shadow_nx_mask; | |
1c4f1fd6 | 1168 | if (pte_access & ACC_USER_MASK) |
7b52345e | 1169 | spte |= shadow_user_mask; |
05da4558 MT |
1170 | if (largepage) |
1171 | spte |= PT_PAGE_SIZE_MASK; | |
1c4f1fd6 | 1172 | |
35149e21 | 1173 | spte |= (u64)pfn << PAGE_SHIFT; |
1c4f1fd6 AK |
1174 | |
1175 | if ((pte_access & ACC_WRITE_MASK) | |
1176 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1177 | struct kvm_mmu_page *shadow; | |
1178 | ||
1179 | spte |= PT_WRITABLE_MASK; | |
1c4f1fd6 AK |
1180 | |
1181 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
05da4558 MT |
1182 | if (shadow || |
1183 | (largepage && has_wrprotected_page(vcpu->kvm, gfn))) { | |
1c4f1fd6 | 1184 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1185 | __func__, gfn); |
1c4f1fd6 AK |
1186 | pte_access &= ~ACC_WRITE_MASK; |
1187 | if (is_writeble_pte(spte)) { | |
1188 | spte &= ~PT_WRITABLE_MASK; | |
1189 | kvm_x86_ops->tlb_flush(vcpu); | |
1190 | } | |
1191 | if (write_fault) | |
1192 | *ptwrite = 1; | |
1193 | } | |
1194 | } | |
1195 | ||
1c4f1fd6 AK |
1196 | if (pte_access & ACC_WRITE_MASK) |
1197 | mark_page_dirty(vcpu->kvm, gfn); | |
1198 | ||
b8688d51 | 1199 | pgprintk("%s: setting spte %llx\n", __func__, spte); |
db475c39 | 1200 | pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n", |
05da4558 MT |
1201 | (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB", |
1202 | (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte); | |
1c4f1fd6 | 1203 | set_shadow_pte(shadow_pte, spte); |
05da4558 MT |
1204 | if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK) |
1205 | && (spte & PT_PRESENT_MASK)) | |
1206 | ++vcpu->kvm->stat.lpages; | |
1207 | ||
1c4f1fd6 AK |
1208 | page_header_update_slot(vcpu->kvm, shadow_pte, gfn); |
1209 | if (!was_rmapped) { | |
05da4558 | 1210 | rmap_add(vcpu, shadow_pte, gfn, largepage); |
1c4f1fd6 | 1211 | if (!is_rmap_pte(*shadow_pte)) |
35149e21 | 1212 | kvm_release_pfn_clean(pfn); |
75e68e60 IE |
1213 | } else { |
1214 | if (was_writeble) | |
35149e21 | 1215 | kvm_release_pfn_dirty(pfn); |
75e68e60 | 1216 | else |
35149e21 | 1217 | kvm_release_pfn_clean(pfn); |
1c4f1fd6 | 1218 | } |
1b7fcd32 | 1219 | if (speculative) { |
ad312c7c | 1220 | vcpu->arch.last_pte_updated = shadow_pte; |
1b7fcd32 AK |
1221 | vcpu->arch.last_pte_gfn = gfn; |
1222 | } | |
1c4f1fd6 AK |
1223 | } |
1224 | ||
6aa8b732 AK |
1225 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1226 | { | |
1227 | } | |
1228 | ||
4d9976bb | 1229 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, |
6c41f428 | 1230 | int largepage, gfn_t gfn, pfn_t pfn) |
6aa8b732 | 1231 | { |
ad312c7c | 1232 | hpa_t table_addr = vcpu->arch.mmu.root_hpa; |
e833240f | 1233 | int pt_write = 0; |
6c41f428 | 1234 | int level = vcpu->arch.mmu.shadow_root_level; |
6aa8b732 AK |
1235 | |
1236 | for (; ; level--) { | |
1237 | u32 index = PT64_INDEX(v, level); | |
1238 | u64 *table; | |
1239 | ||
1240 | ASSERT(VALID_PAGE(table_addr)); | |
1241 | table = __va(table_addr); | |
1242 | ||
6e37d3dc | 1243 | if (level == 1 || (largepage && level == 2)) { |
e833240f | 1244 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, |
6e37d3dc AK |
1245 | 0, write, 1, &pt_write, largepage, |
1246 | gfn, pfn, false); | |
d196e343 | 1247 | return pt_write; |
6aa8b732 AK |
1248 | } |
1249 | ||
c7addb90 | 1250 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 1251 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 1252 | gfn_t pseudo_gfn; |
6aa8b732 | 1253 | |
cea0f0e7 AK |
1254 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
1255 | >> PAGE_SHIFT; | |
1256 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
1257 | v, level - 1, | |
f7d9c7b7 | 1258 | 1, ACC_ALL, &table[index]); |
25c0de2c | 1259 | if (!new_table) { |
6aa8b732 | 1260 | pgprintk("nonpaging_map: ENOMEM\n"); |
35149e21 | 1261 | kvm_release_pfn_clean(pfn); |
6aa8b732 AK |
1262 | return -ENOMEM; |
1263 | } | |
1264 | ||
722c05f2 AK |
1265 | set_shadow_pte(&table[index], |
1266 | __pa(new_table->spt) | |
1267 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
1268 | | shadow_user_mask | shadow_x_mask); | |
6aa8b732 AK |
1269 | } |
1270 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
1271 | } | |
1272 | } | |
1273 | ||
10589a46 MT |
1274 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1275 | { | |
1276 | int r; | |
05da4558 | 1277 | int largepage = 0; |
35149e21 | 1278 | pfn_t pfn; |
e930bffe | 1279 | unsigned long mmu_seq; |
aaee2c94 MT |
1280 | |
1281 | down_read(¤t->mm->mmap_sem); | |
05da4558 MT |
1282 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1283 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1284 | largepage = 1; | |
1285 | } | |
1286 | ||
e930bffe AA |
1287 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1288 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1289 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
72dc67a6 | 1290 | up_read(¤t->mm->mmap_sem); |
aaee2c94 | 1291 | |
d196e343 | 1292 | /* mmio */ |
35149e21 AL |
1293 | if (is_error_pfn(pfn)) { |
1294 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1295 | return 1; |
1296 | } | |
1297 | ||
aaee2c94 | 1298 | spin_lock(&vcpu->kvm->mmu_lock); |
e930bffe AA |
1299 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1300 | goto out_unlock; | |
eb787d10 | 1301 | kvm_mmu_free_some_pages(vcpu); |
6c41f428 | 1302 | r = __direct_map(vcpu, v, write, largepage, gfn, pfn); |
aaee2c94 MT |
1303 | spin_unlock(&vcpu->kvm->mmu_lock); |
1304 | ||
aaee2c94 | 1305 | |
10589a46 | 1306 | return r; |
e930bffe AA |
1307 | |
1308 | out_unlock: | |
1309 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1310 | kvm_release_pfn_clean(pfn); | |
1311 | return 0; | |
10589a46 MT |
1312 | } |
1313 | ||
1314 | ||
17ac10ad AK |
1315 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
1316 | { | |
1317 | int i; | |
4db35314 | 1318 | struct kvm_mmu_page *sp; |
17ac10ad | 1319 | |
ad312c7c | 1320 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 1321 | return; |
aaee2c94 | 1322 | spin_lock(&vcpu->kvm->mmu_lock); |
ad312c7c ZX |
1323 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1324 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 1325 | |
4db35314 AK |
1326 | sp = page_header(root); |
1327 | --sp->root_count; | |
2e53d63a MT |
1328 | if (!sp->root_count && sp->role.invalid) |
1329 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 1330 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 1331 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
1332 | return; |
1333 | } | |
17ac10ad | 1334 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1335 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 1336 | |
417726a3 | 1337 | if (root) { |
417726a3 | 1338 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
1339 | sp = page_header(root); |
1340 | --sp->root_count; | |
2e53d63a MT |
1341 | if (!sp->root_count && sp->role.invalid) |
1342 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 1343 | } |
ad312c7c | 1344 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 1345 | } |
aaee2c94 | 1346 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1347 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
1348 | } |
1349 | ||
1350 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
1351 | { | |
1352 | int i; | |
cea0f0e7 | 1353 | gfn_t root_gfn; |
4db35314 | 1354 | struct kvm_mmu_page *sp; |
fb72d167 | 1355 | int metaphysical = 0; |
3bb65a22 | 1356 | |
ad312c7c | 1357 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad | 1358 | |
ad312c7c ZX |
1359 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1360 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
1361 | |
1362 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 JR |
1363 | if (tdp_enabled) |
1364 | metaphysical = 1; | |
4db35314 | 1365 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fb72d167 JR |
1366 | PT64_ROOT_LEVEL, metaphysical, |
1367 | ACC_ALL, NULL); | |
4db35314 AK |
1368 | root = __pa(sp->spt); |
1369 | ++sp->root_count; | |
ad312c7c | 1370 | vcpu->arch.mmu.root_hpa = root; |
17ac10ad AK |
1371 | return; |
1372 | } | |
fb72d167 JR |
1373 | metaphysical = !is_paging(vcpu); |
1374 | if (tdp_enabled) | |
1375 | metaphysical = 1; | |
17ac10ad | 1376 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1377 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
1378 | |
1379 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c ZX |
1380 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
1381 | if (!is_present_pte(vcpu->arch.pdptrs[i])) { | |
1382 | vcpu->arch.mmu.pae_root[i] = 0; | |
417726a3 AK |
1383 | continue; |
1384 | } | |
ad312c7c ZX |
1385 | root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT; |
1386 | } else if (vcpu->arch.mmu.root_level == 0) | |
cea0f0e7 | 1387 | root_gfn = 0; |
4db35314 | 1388 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
fb72d167 | 1389 | PT32_ROOT_LEVEL, metaphysical, |
f7d9c7b7 | 1390 | ACC_ALL, NULL); |
4db35314 AK |
1391 | root = __pa(sp->spt); |
1392 | ++sp->root_count; | |
ad312c7c | 1393 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 1394 | } |
ad312c7c | 1395 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
17ac10ad AK |
1396 | } |
1397 | ||
6aa8b732 AK |
1398 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1399 | { | |
1400 | return vaddr; | |
1401 | } | |
1402 | ||
1403 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1404 | u32 error_code) |
6aa8b732 | 1405 | { |
e833240f | 1406 | gfn_t gfn; |
e2dec939 | 1407 | int r; |
6aa8b732 | 1408 | |
b8688d51 | 1409 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
1410 | r = mmu_topup_memory_caches(vcpu); |
1411 | if (r) | |
1412 | return r; | |
714b93da | 1413 | |
6aa8b732 | 1414 | ASSERT(vcpu); |
ad312c7c | 1415 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 1416 | |
e833240f | 1417 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 1418 | |
e833240f AK |
1419 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
1420 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
1421 | } |
1422 | ||
fb72d167 JR |
1423 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
1424 | u32 error_code) | |
1425 | { | |
35149e21 | 1426 | pfn_t pfn; |
fb72d167 | 1427 | int r; |
05da4558 MT |
1428 | int largepage = 0; |
1429 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
e930bffe | 1430 | unsigned long mmu_seq; |
fb72d167 JR |
1431 | |
1432 | ASSERT(vcpu); | |
1433 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
1434 | ||
1435 | r = mmu_topup_memory_caches(vcpu); | |
1436 | if (r) | |
1437 | return r; | |
1438 | ||
1439 | down_read(¤t->mm->mmap_sem); | |
05da4558 MT |
1440 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1441 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1442 | largepage = 1; | |
1443 | } | |
e930bffe AA |
1444 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1445 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1446 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
3200f405 | 1447 | up_read(¤t->mm->mmap_sem); |
35149e21 AL |
1448 | if (is_error_pfn(pfn)) { |
1449 | kvm_release_pfn_clean(pfn); | |
fb72d167 JR |
1450 | return 1; |
1451 | } | |
1452 | spin_lock(&vcpu->kvm->mmu_lock); | |
e930bffe AA |
1453 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1454 | goto out_unlock; | |
fb72d167 JR |
1455 | kvm_mmu_free_some_pages(vcpu); |
1456 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
6c41f428 | 1457 | largepage, gfn, pfn); |
fb72d167 | 1458 | spin_unlock(&vcpu->kvm->mmu_lock); |
fb72d167 JR |
1459 | |
1460 | return r; | |
e930bffe AA |
1461 | |
1462 | out_unlock: | |
1463 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1464 | kvm_release_pfn_clean(pfn); | |
1465 | return 0; | |
fb72d167 JR |
1466 | } |
1467 | ||
6aa8b732 AK |
1468 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1469 | { | |
17ac10ad | 1470 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1471 | } |
1472 | ||
1473 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1474 | { | |
ad312c7c | 1475 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1476 | |
1477 | context->new_cr3 = nonpaging_new_cr3; | |
1478 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1479 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1480 | context->free = nonpaging_free; | |
c7addb90 | 1481 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1482 | context->root_level = 0; |
6aa8b732 | 1483 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1484 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1485 | return 0; |
1486 | } | |
1487 | ||
d835dfec | 1488 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1489 | { |
1165f5fe | 1490 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1491 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1492 | } |
1493 | ||
1494 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1495 | { | |
b8688d51 | 1496 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 1497 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1498 | } |
1499 | ||
6aa8b732 AK |
1500 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1501 | u64 addr, | |
1502 | u32 err_code) | |
1503 | { | |
c3c91fee | 1504 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1505 | } |
1506 | ||
6aa8b732 AK |
1507 | static void paging_free(struct kvm_vcpu *vcpu) |
1508 | { | |
1509 | nonpaging_free(vcpu); | |
1510 | } | |
1511 | ||
1512 | #define PTTYPE 64 | |
1513 | #include "paging_tmpl.h" | |
1514 | #undef PTTYPE | |
1515 | ||
1516 | #define PTTYPE 32 | |
1517 | #include "paging_tmpl.h" | |
1518 | #undef PTTYPE | |
1519 | ||
17ac10ad | 1520 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 1521 | { |
ad312c7c | 1522 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1523 | |
1524 | ASSERT(is_pae(vcpu)); | |
1525 | context->new_cr3 = paging_new_cr3; | |
1526 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1527 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1528 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1529 | context->free = paging_free; |
17ac10ad AK |
1530 | context->root_level = level; |
1531 | context->shadow_root_level = level; | |
17c3ba9d | 1532 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1533 | return 0; |
1534 | } | |
1535 | ||
17ac10ad AK |
1536 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1537 | { | |
1538 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1539 | } | |
1540 | ||
6aa8b732 AK |
1541 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1542 | { | |
ad312c7c | 1543 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1544 | |
1545 | context->new_cr3 = paging_new_cr3; | |
1546 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1547 | context->gva_to_gpa = paging32_gva_to_gpa; |
1548 | context->free = paging_free; | |
c7addb90 | 1549 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1550 | context->root_level = PT32_ROOT_LEVEL; |
1551 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1552 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1553 | return 0; |
1554 | } | |
1555 | ||
1556 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1557 | { | |
17ac10ad | 1558 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1559 | } |
1560 | ||
fb72d167 JR |
1561 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
1562 | { | |
1563 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
1564 | ||
1565 | context->new_cr3 = nonpaging_new_cr3; | |
1566 | context->page_fault = tdp_page_fault; | |
1567 | context->free = nonpaging_free; | |
1568 | context->prefetch_page = nonpaging_prefetch_page; | |
67253af5 | 1569 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
fb72d167 JR |
1570 | context->root_hpa = INVALID_PAGE; |
1571 | ||
1572 | if (!is_paging(vcpu)) { | |
1573 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
1574 | context->root_level = 0; | |
1575 | } else if (is_long_mode(vcpu)) { | |
1576 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1577 | context->root_level = PT64_ROOT_LEVEL; | |
1578 | } else if (is_pae(vcpu)) { | |
1579 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1580 | context->root_level = PT32E_ROOT_LEVEL; | |
1581 | } else { | |
1582 | context->gva_to_gpa = paging32_gva_to_gpa; | |
1583 | context->root_level = PT32_ROOT_LEVEL; | |
1584 | } | |
1585 | ||
1586 | return 0; | |
1587 | } | |
1588 | ||
1589 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 AK |
1590 | { |
1591 | ASSERT(vcpu); | |
ad312c7c | 1592 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
1593 | |
1594 | if (!is_paging(vcpu)) | |
1595 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1596 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1597 | return paging64_init_context(vcpu); |
1598 | else if (is_pae(vcpu)) | |
1599 | return paging32E_init_context(vcpu); | |
1600 | else | |
1601 | return paging32_init_context(vcpu); | |
1602 | } | |
1603 | ||
fb72d167 JR |
1604 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
1605 | { | |
35149e21 AL |
1606 | vcpu->arch.update_pte.pfn = bad_pfn; |
1607 | ||
fb72d167 JR |
1608 | if (tdp_enabled) |
1609 | return init_kvm_tdp_mmu(vcpu); | |
1610 | else | |
1611 | return init_kvm_softmmu(vcpu); | |
1612 | } | |
1613 | ||
6aa8b732 AK |
1614 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
1615 | { | |
1616 | ASSERT(vcpu); | |
ad312c7c ZX |
1617 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
1618 | vcpu->arch.mmu.free(vcpu); | |
1619 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
1620 | } |
1621 | } | |
1622 | ||
1623 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1624 | { |
1625 | destroy_kvm_mmu(vcpu); | |
1626 | return init_kvm_mmu(vcpu); | |
1627 | } | |
8668a3c4 | 1628 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1629 | |
1630 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1631 | { |
714b93da AK |
1632 | int r; |
1633 | ||
e2dec939 | 1634 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1635 | if (r) |
1636 | goto out; | |
aaee2c94 | 1637 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1638 | kvm_mmu_free_some_pages(vcpu); |
17c3ba9d | 1639 | mmu_alloc_roots(vcpu); |
aaee2c94 | 1640 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1641 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
17c3ba9d | 1642 | kvm_mmu_flush_tlb(vcpu); |
714b93da AK |
1643 | out: |
1644 | return r; | |
6aa8b732 | 1645 | } |
17c3ba9d AK |
1646 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1647 | ||
1648 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1649 | { | |
1650 | mmu_free_roots(vcpu); | |
1651 | } | |
6aa8b732 | 1652 | |
09072daf | 1653 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1654 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1655 | u64 *spte) |
1656 | { | |
1657 | u64 pte; | |
1658 | struct kvm_mmu_page *child; | |
1659 | ||
1660 | pte = *spte; | |
c7addb90 | 1661 | if (is_shadow_present_pte(pte)) { |
05da4558 MT |
1662 | if (sp->role.level == PT_PAGE_TABLE_LEVEL || |
1663 | is_large_pte(pte)) | |
290fc38d | 1664 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1665 | else { |
1666 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1667 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1668 | } |
1669 | } | |
c7addb90 | 1670 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
1671 | if (is_large_pte(pte)) |
1672 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
1673 | } |
1674 | ||
0028425f | 1675 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1676 | struct kvm_mmu_page *sp, |
0028425f | 1677 | u64 *spte, |
489f1d65 | 1678 | const void *new) |
0028425f | 1679 | { |
30945387 MT |
1680 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
1681 | if (!vcpu->arch.update_pte.largepage || | |
1682 | sp->role.glevels == PT32_ROOT_LEVEL) { | |
1683 | ++vcpu->kvm->stat.mmu_pde_zapped; | |
1684 | return; | |
1685 | } | |
1686 | } | |
0028425f | 1687 | |
4cee5764 | 1688 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 1689 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 1690 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 1691 | else |
489f1d65 | 1692 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
1693 | } |
1694 | ||
79539cec AK |
1695 | static bool need_remote_flush(u64 old, u64 new) |
1696 | { | |
1697 | if (!is_shadow_present_pte(old)) | |
1698 | return false; | |
1699 | if (!is_shadow_present_pte(new)) | |
1700 | return true; | |
1701 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1702 | return true; | |
1703 | old ^= PT64_NX_MASK; | |
1704 | new ^= PT64_NX_MASK; | |
1705 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1706 | } | |
1707 | ||
1708 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1709 | { | |
1710 | if (need_remote_flush(old, new)) | |
1711 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1712 | else | |
1713 | kvm_mmu_flush_tlb(vcpu); | |
1714 | } | |
1715 | ||
12b7d28f AK |
1716 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1717 | { | |
ad312c7c | 1718 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f | 1719 | |
7b52345e | 1720 | return !!(spte && (*spte & shadow_accessed_mask)); |
12b7d28f AK |
1721 | } |
1722 | ||
d7824fff AK |
1723 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1724 | const u8 *new, int bytes) | |
1725 | { | |
1726 | gfn_t gfn; | |
1727 | int r; | |
1728 | u64 gpte = 0; | |
35149e21 | 1729 | pfn_t pfn; |
d7824fff | 1730 | |
05da4558 MT |
1731 | vcpu->arch.update_pte.largepage = 0; |
1732 | ||
d7824fff AK |
1733 | if (bytes != 4 && bytes != 8) |
1734 | return; | |
1735 | ||
1736 | /* | |
1737 | * Assume that the pte write on a page table of the same type | |
1738 | * as the current vcpu paging mode. This is nearly always true | |
1739 | * (might be false while changing modes). Note it is verified later | |
1740 | * by update_pte(). | |
1741 | */ | |
1742 | if (is_pae(vcpu)) { | |
1743 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
1744 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
1745 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
1746 | if (r) | |
1747 | return; | |
1748 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
1749 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
1750 | memcpy((void *)&gpte, new, 8); | |
1751 | } | |
1752 | } else { | |
1753 | if ((bytes == 4) && (gpa % 4 == 0)) | |
1754 | memcpy((void *)&gpte, new, 4); | |
1755 | } | |
1756 | if (!is_present_pte(gpte)) | |
1757 | return; | |
1758 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 1759 | |
05da4558 MT |
1760 | down_read(¤t->mm->mmap_sem); |
1761 | if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) { | |
1762 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1763 | vcpu->arch.update_pte.largepage = 1; | |
1764 | } | |
e930bffe AA |
1765 | vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1766 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1767 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
05da4558 | 1768 | up_read(¤t->mm->mmap_sem); |
72dc67a6 | 1769 | |
35149e21 AL |
1770 | if (is_error_pfn(pfn)) { |
1771 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1772 | return; |
1773 | } | |
d7824fff | 1774 | vcpu->arch.update_pte.gfn = gfn; |
35149e21 | 1775 | vcpu->arch.update_pte.pfn = pfn; |
d7824fff AK |
1776 | } |
1777 | ||
1b7fcd32 AK |
1778 | static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn) |
1779 | { | |
1780 | u64 *spte = vcpu->arch.last_pte_updated; | |
1781 | ||
1782 | if (spte | |
1783 | && vcpu->arch.last_pte_gfn == gfn | |
1784 | && shadow_accessed_mask | |
1785 | && !(*spte & shadow_accessed_mask) | |
1786 | && is_shadow_present_pte(*spte)) | |
1787 | set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
1788 | } | |
1789 | ||
09072daf | 1790 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1791 | const u8 *new, int bytes) |
da4a00f0 | 1792 | { |
9b7a0325 | 1793 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1794 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1795 | struct hlist_node *node, *n; |
9b7a0325 AK |
1796 | struct hlist_head *bucket; |
1797 | unsigned index; | |
489f1d65 | 1798 | u64 entry, gentry; |
9b7a0325 | 1799 | u64 *spte; |
9b7a0325 | 1800 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1801 | unsigned pte_size; |
9b7a0325 | 1802 | unsigned page_offset; |
0e7bc4b9 | 1803 | unsigned misaligned; |
fce0657f | 1804 | unsigned quadrant; |
9b7a0325 | 1805 | int level; |
86a5ba02 | 1806 | int flooded = 0; |
ac1b714e | 1807 | int npte; |
489f1d65 | 1808 | int r; |
9b7a0325 | 1809 | |
b8688d51 | 1810 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 1811 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 1812 | spin_lock(&vcpu->kvm->mmu_lock); |
1b7fcd32 | 1813 | kvm_mmu_access_page(vcpu, gfn); |
eb787d10 | 1814 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 1815 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1816 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad312c7c | 1817 | if (gfn == vcpu->arch.last_pt_write_gfn |
12b7d28f | 1818 | && !last_updated_pte_accessed(vcpu)) { |
ad312c7c ZX |
1819 | ++vcpu->arch.last_pt_write_count; |
1820 | if (vcpu->arch.last_pt_write_count >= 3) | |
86a5ba02 AK |
1821 | flooded = 1; |
1822 | } else { | |
ad312c7c ZX |
1823 | vcpu->arch.last_pt_write_gfn = gfn; |
1824 | vcpu->arch.last_pt_write_count = 1; | |
1825 | vcpu->arch.last_pte_updated = NULL; | |
86a5ba02 | 1826 | } |
1ae0a13d | 1827 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1828 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 | 1829 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
5b5c6a5a | 1830 | if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid) |
9b7a0325 | 1831 | continue; |
4db35314 | 1832 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1833 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1834 | misaligned |= bytes < 4; |
86a5ba02 | 1835 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1836 | /* |
1837 | * Misaligned accesses are too much trouble to fix | |
1838 | * up; also, they usually indicate a page is not used | |
1839 | * as a page table. | |
86a5ba02 AK |
1840 | * |
1841 | * If we're seeing too many writes to a page, | |
1842 | * it may no longer be a page table, or we may be | |
1843 | * forking, in which case it is better to unmap the | |
1844 | * page. | |
0e7bc4b9 AK |
1845 | */ |
1846 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1847 | gpa, bytes, sp->role.word); |
1848 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1849 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1850 | continue; |
1851 | } | |
9b7a0325 | 1852 | page_offset = offset; |
4db35314 | 1853 | level = sp->role.level; |
ac1b714e | 1854 | npte = 1; |
4db35314 | 1855 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1856 | page_offset <<= 1; /* 32->64 */ |
1857 | /* | |
1858 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1859 | * only 2MB. So we need to double the offset again | |
1860 | * and zap two pdes instead of one. | |
1861 | */ | |
1862 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1863 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1864 | page_offset <<= 1; |
1865 | npte = 2; | |
1866 | } | |
fce0657f | 1867 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1868 | page_offset &= ~PAGE_MASK; |
4db35314 | 1869 | if (quadrant != sp->role.quadrant) |
fce0657f | 1870 | continue; |
9b7a0325 | 1871 | } |
4db35314 | 1872 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
1873 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
1874 | gentry = 0; | |
1875 | r = kvm_read_guest_atomic(vcpu->kvm, | |
1876 | gpa & ~(u64)(pte_size - 1), | |
1877 | &gentry, pte_size); | |
1878 | new = (const void *)&gentry; | |
1879 | if (r < 0) | |
1880 | new = NULL; | |
1881 | } | |
ac1b714e | 1882 | while (npte--) { |
79539cec | 1883 | entry = *spte; |
4db35314 | 1884 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
1885 | if (new) |
1886 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 1887 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 1888 | ++spte; |
9b7a0325 | 1889 | } |
9b7a0325 | 1890 | } |
c7addb90 | 1891 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 1892 | spin_unlock(&vcpu->kvm->mmu_lock); |
35149e21 AL |
1893 | if (!is_error_pfn(vcpu->arch.update_pte.pfn)) { |
1894 | kvm_release_pfn_clean(vcpu->arch.update_pte.pfn); | |
1895 | vcpu->arch.update_pte.pfn = bad_pfn; | |
d7824fff | 1896 | } |
da4a00f0 AK |
1897 | } |
1898 | ||
a436036b AK |
1899 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1900 | { | |
10589a46 MT |
1901 | gpa_t gpa; |
1902 | int r; | |
a436036b | 1903 | |
10589a46 | 1904 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
10589a46 | 1905 | |
aaee2c94 | 1906 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 1907 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 1908 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 1909 | return r; |
a436036b | 1910 | } |
577bdc49 | 1911 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
a436036b | 1912 | |
22d95b12 | 1913 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 1914 | { |
f05e70ac | 1915 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) { |
4db35314 | 1916 | struct kvm_mmu_page *sp; |
ebeace86 | 1917 | |
f05e70ac | 1918 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
1919 | struct kvm_mmu_page, link); |
1920 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1921 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
1922 | } |
1923 | } | |
ebeace86 | 1924 | |
3067714c AK |
1925 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
1926 | { | |
1927 | int r; | |
1928 | enum emulation_result er; | |
1929 | ||
ad312c7c | 1930 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
1931 | if (r < 0) |
1932 | goto out; | |
1933 | ||
1934 | if (!r) { | |
1935 | r = 1; | |
1936 | goto out; | |
1937 | } | |
1938 | ||
b733bfb5 AK |
1939 | r = mmu_topup_memory_caches(vcpu); |
1940 | if (r) | |
1941 | goto out; | |
1942 | ||
3067714c | 1943 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
3067714c AK |
1944 | |
1945 | switch (er) { | |
1946 | case EMULATE_DONE: | |
1947 | return 1; | |
1948 | case EMULATE_DO_MMIO: | |
1949 | ++vcpu->stat.mmio_exits; | |
1950 | return 0; | |
1951 | case EMULATE_FAIL: | |
1952 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
1953 | return 1; | |
1954 | default: | |
1955 | BUG(); | |
1956 | } | |
1957 | out: | |
3067714c AK |
1958 | return r; |
1959 | } | |
1960 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
1961 | ||
18552672 JR |
1962 | void kvm_enable_tdp(void) |
1963 | { | |
1964 | tdp_enabled = true; | |
1965 | } | |
1966 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
1967 | ||
5f4cb662 JR |
1968 | void kvm_disable_tdp(void) |
1969 | { | |
1970 | tdp_enabled = false; | |
1971 | } | |
1972 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); | |
1973 | ||
6aa8b732 AK |
1974 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1975 | { | |
4db35314 | 1976 | struct kvm_mmu_page *sp; |
6aa8b732 | 1977 | |
f05e70ac ZX |
1978 | while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) { |
1979 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.next, | |
4db35314 AK |
1980 | struct kvm_mmu_page, link); |
1981 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
8d2d73b9 | 1982 | cond_resched(); |
f51234c2 | 1983 | } |
ad312c7c | 1984 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
1985 | } |
1986 | ||
1987 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1988 | { | |
17ac10ad | 1989 | struct page *page; |
6aa8b732 AK |
1990 | int i; |
1991 | ||
1992 | ASSERT(vcpu); | |
1993 | ||
f05e70ac ZX |
1994 | if (vcpu->kvm->arch.n_requested_mmu_pages) |
1995 | vcpu->kvm->arch.n_free_mmu_pages = | |
1996 | vcpu->kvm->arch.n_requested_mmu_pages; | |
82ce2c96 | 1997 | else |
f05e70ac ZX |
1998 | vcpu->kvm->arch.n_free_mmu_pages = |
1999 | vcpu->kvm->arch.n_alloc_mmu_pages; | |
17ac10ad AK |
2000 | /* |
2001 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
2002 | * Therefore we need to allocate shadow page tables in the first | |
2003 | * 4GB of memory, which happens to fit the DMA32 zone. | |
2004 | */ | |
2005 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
2006 | if (!page) | |
2007 | goto error_1; | |
ad312c7c | 2008 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 2009 | for (i = 0; i < 4; ++i) |
ad312c7c | 2010 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2011 | |
6aa8b732 AK |
2012 | return 0; |
2013 | ||
2014 | error_1: | |
2015 | free_mmu_pages(vcpu); | |
2016 | return -ENOMEM; | |
2017 | } | |
2018 | ||
8018c27b | 2019 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 2020 | { |
6aa8b732 | 2021 | ASSERT(vcpu); |
ad312c7c | 2022 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2023 | |
8018c27b IM |
2024 | return alloc_mmu_pages(vcpu); |
2025 | } | |
6aa8b732 | 2026 | |
8018c27b IM |
2027 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
2028 | { | |
2029 | ASSERT(vcpu); | |
ad312c7c | 2030 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 2031 | |
8018c27b | 2032 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
2033 | } |
2034 | ||
2035 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
2036 | { | |
2037 | ASSERT(vcpu); | |
2038 | ||
2039 | destroy_kvm_mmu(vcpu); | |
2040 | free_mmu_pages(vcpu); | |
714b93da | 2041 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
2042 | } |
2043 | ||
90cb0529 | 2044 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 2045 | { |
4db35314 | 2046 | struct kvm_mmu_page *sp; |
6aa8b732 | 2047 | |
f05e70ac | 2048 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
2049 | int i; |
2050 | u64 *pt; | |
2051 | ||
4db35314 | 2052 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
2053 | continue; |
2054 | ||
4db35314 | 2055 | pt = sp->spt; |
6aa8b732 AK |
2056 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
2057 | /* avoid RMW */ | |
9647c14c | 2058 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 2059 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 AK |
2060 | } |
2061 | } | |
37a7d8b0 | 2062 | |
90cb0529 | 2063 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 2064 | { |
4db35314 | 2065 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 2066 | |
aaee2c94 | 2067 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2068 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
4db35314 | 2069 | kvm_mmu_zap_page(kvm, sp); |
aaee2c94 | 2070 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 2071 | |
90cb0529 | 2072 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
2073 | } |
2074 | ||
8b2cf73c | 2075 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) |
3ee16c81 IE |
2076 | { |
2077 | struct kvm_mmu_page *page; | |
2078 | ||
2079 | page = container_of(kvm->arch.active_mmu_pages.prev, | |
2080 | struct kvm_mmu_page, link); | |
2081 | kvm_mmu_zap_page(kvm, page); | |
2082 | } | |
2083 | ||
2084 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |
2085 | { | |
2086 | struct kvm *kvm; | |
2087 | struct kvm *kvm_freed = NULL; | |
2088 | int cache_count = 0; | |
2089 | ||
2090 | spin_lock(&kvm_lock); | |
2091 | ||
2092 | list_for_each_entry(kvm, &vm_list, vm_list) { | |
2093 | int npages; | |
2094 | ||
5a4c9288 MT |
2095 | if (!down_read_trylock(&kvm->slots_lock)) |
2096 | continue; | |
3ee16c81 IE |
2097 | spin_lock(&kvm->mmu_lock); |
2098 | npages = kvm->arch.n_alloc_mmu_pages - | |
2099 | kvm->arch.n_free_mmu_pages; | |
2100 | cache_count += npages; | |
2101 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | |
2102 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | |
2103 | cache_count--; | |
2104 | kvm_freed = kvm; | |
2105 | } | |
2106 | nr_to_scan--; | |
2107 | ||
2108 | spin_unlock(&kvm->mmu_lock); | |
5a4c9288 | 2109 | up_read(&kvm->slots_lock); |
3ee16c81 IE |
2110 | } |
2111 | if (kvm_freed) | |
2112 | list_move_tail(&kvm_freed->vm_list, &vm_list); | |
2113 | ||
2114 | spin_unlock(&kvm_lock); | |
2115 | ||
2116 | return cache_count; | |
2117 | } | |
2118 | ||
2119 | static struct shrinker mmu_shrinker = { | |
2120 | .shrink = mmu_shrink, | |
2121 | .seeks = DEFAULT_SEEKS * 10, | |
2122 | }; | |
2123 | ||
2ddfd20e | 2124 | static void mmu_destroy_caches(void) |
b5a33a75 AK |
2125 | { |
2126 | if (pte_chain_cache) | |
2127 | kmem_cache_destroy(pte_chain_cache); | |
2128 | if (rmap_desc_cache) | |
2129 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
2130 | if (mmu_page_header_cache) |
2131 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
2132 | } |
2133 | ||
3ee16c81 IE |
2134 | void kvm_mmu_module_exit(void) |
2135 | { | |
2136 | mmu_destroy_caches(); | |
2137 | unregister_shrinker(&mmu_shrinker); | |
2138 | } | |
2139 | ||
b5a33a75 AK |
2140 | int kvm_mmu_module_init(void) |
2141 | { | |
2142 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
2143 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 2144 | 0, 0, NULL); |
b5a33a75 AK |
2145 | if (!pte_chain_cache) |
2146 | goto nomem; | |
2147 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
2148 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 2149 | 0, 0, NULL); |
b5a33a75 AK |
2150 | if (!rmap_desc_cache) |
2151 | goto nomem; | |
2152 | ||
d3d25b04 AK |
2153 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
2154 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 2155 | 0, 0, NULL); |
d3d25b04 AK |
2156 | if (!mmu_page_header_cache) |
2157 | goto nomem; | |
2158 | ||
3ee16c81 IE |
2159 | register_shrinker(&mmu_shrinker); |
2160 | ||
b5a33a75 AK |
2161 | return 0; |
2162 | ||
2163 | nomem: | |
3ee16c81 | 2164 | mmu_destroy_caches(); |
b5a33a75 AK |
2165 | return -ENOMEM; |
2166 | } | |
2167 | ||
3ad82a7e ZX |
2168 | /* |
2169 | * Caculate mmu pages needed for kvm. | |
2170 | */ | |
2171 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
2172 | { | |
2173 | int i; | |
2174 | unsigned int nr_mmu_pages; | |
2175 | unsigned int nr_pages = 0; | |
2176 | ||
2177 | for (i = 0; i < kvm->nmemslots; i++) | |
2178 | nr_pages += kvm->memslots[i].npages; | |
2179 | ||
2180 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
2181 | nr_mmu_pages = max(nr_mmu_pages, | |
2182 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
2183 | ||
2184 | return nr_mmu_pages; | |
2185 | } | |
2186 | ||
2f333bcb MT |
2187 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
2188 | unsigned len) | |
2189 | { | |
2190 | if (len > buffer->len) | |
2191 | return NULL; | |
2192 | return buffer->ptr; | |
2193 | } | |
2194 | ||
2195 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
2196 | unsigned len) | |
2197 | { | |
2198 | void *ret; | |
2199 | ||
2200 | ret = pv_mmu_peek_buffer(buffer, len); | |
2201 | if (!ret) | |
2202 | return ret; | |
2203 | buffer->ptr += len; | |
2204 | buffer->len -= len; | |
2205 | buffer->processed += len; | |
2206 | return ret; | |
2207 | } | |
2208 | ||
2209 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
2210 | gpa_t addr, gpa_t value) | |
2211 | { | |
2212 | int bytes = 8; | |
2213 | int r; | |
2214 | ||
2215 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
2216 | bytes = 4; | |
2217 | ||
2218 | r = mmu_topup_memory_caches(vcpu); | |
2219 | if (r) | |
2220 | return r; | |
2221 | ||
3200f405 | 2222 | if (!emulator_write_phys(vcpu, addr, &value, bytes)) |
2f333bcb MT |
2223 | return -EFAULT; |
2224 | ||
2225 | return 1; | |
2226 | } | |
2227 | ||
2228 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
2229 | { | |
2230 | kvm_x86_ops->tlb_flush(vcpu); | |
2231 | return 1; | |
2232 | } | |
2233 | ||
2234 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
2235 | { | |
2236 | spin_lock(&vcpu->kvm->mmu_lock); | |
2237 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
2238 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2239 | return 1; | |
2240 | } | |
2241 | ||
2242 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
2243 | struct kvm_pv_mmu_op_buffer *buffer) | |
2244 | { | |
2245 | struct kvm_mmu_op_header *header; | |
2246 | ||
2247 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
2248 | if (!header) | |
2249 | return 0; | |
2250 | switch (header->op) { | |
2251 | case KVM_MMU_OP_WRITE_PTE: { | |
2252 | struct kvm_mmu_op_write_pte *wpte; | |
2253 | ||
2254 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
2255 | if (!wpte) | |
2256 | return 0; | |
2257 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
2258 | wpte->pte_val); | |
2259 | } | |
2260 | case KVM_MMU_OP_FLUSH_TLB: { | |
2261 | struct kvm_mmu_op_flush_tlb *ftlb; | |
2262 | ||
2263 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
2264 | if (!ftlb) | |
2265 | return 0; | |
2266 | return kvm_pv_mmu_flush_tlb(vcpu); | |
2267 | } | |
2268 | case KVM_MMU_OP_RELEASE_PT: { | |
2269 | struct kvm_mmu_op_release_pt *rpt; | |
2270 | ||
2271 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
2272 | if (!rpt) | |
2273 | return 0; | |
2274 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
2275 | } | |
2276 | default: return 0; | |
2277 | } | |
2278 | } | |
2279 | ||
2280 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
2281 | gpa_t addr, unsigned long *ret) | |
2282 | { | |
2283 | int r; | |
6ad18fba | 2284 | struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer; |
2f333bcb | 2285 | |
6ad18fba DH |
2286 | buffer->ptr = buffer->buf; |
2287 | buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf); | |
2288 | buffer->processed = 0; | |
2f333bcb | 2289 | |
6ad18fba | 2290 | r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len); |
2f333bcb MT |
2291 | if (r) |
2292 | goto out; | |
2293 | ||
6ad18fba DH |
2294 | while (buffer->len) { |
2295 | r = kvm_pv_mmu_op_one(vcpu, buffer); | |
2f333bcb MT |
2296 | if (r < 0) |
2297 | goto out; | |
2298 | if (r == 0) | |
2299 | break; | |
2300 | } | |
2301 | ||
2302 | r = 1; | |
2303 | out: | |
6ad18fba | 2304 | *ret = buffer->processed; |
2f333bcb MT |
2305 | return r; |
2306 | } | |
2307 | ||
37a7d8b0 AK |
2308 | #ifdef AUDIT |
2309 | ||
2310 | static const char *audit_msg; | |
2311 | ||
2312 | static gva_t canonicalize(gva_t gva) | |
2313 | { | |
2314 | #ifdef CONFIG_X86_64 | |
2315 | gva = (long long)(gva << 16) >> 16; | |
2316 | #endif | |
2317 | return gva; | |
2318 | } | |
2319 | ||
2320 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
2321 | gva_t va, int level) | |
2322 | { | |
2323 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
2324 | int i; | |
2325 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
2326 | ||
2327 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
2328 | u64 ent = pt[i]; | |
2329 | ||
c7addb90 | 2330 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
2331 | continue; |
2332 | ||
2333 | va = canonicalize(va); | |
c7addb90 AK |
2334 | if (level > 1) { |
2335 | if (ent == shadow_notrap_nonpresent_pte) | |
2336 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
2337 | " in nonleaf level: levels %d gva %lx" | |
2338 | " level %d pte %llx\n", audit_msg, | |
ad312c7c | 2339 | vcpu->arch.mmu.root_level, va, level, ent); |
c7addb90 | 2340 | |
37a7d8b0 | 2341 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 2342 | } else { |
ad312c7c | 2343 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
35149e21 | 2344 | hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT; |
37a7d8b0 | 2345 | |
c7addb90 | 2346 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 2347 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
2348 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
2349 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 2350 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
2351 | va, gpa, hpa, ent, |
2352 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
2353 | else if (ent == shadow_notrap_nonpresent_pte |
2354 | && !is_error_hpa(hpa)) | |
2355 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
2356 | " valid guest gva %lx\n", audit_msg, va); | |
35149e21 | 2357 | kvm_release_pfn_clean(pfn); |
c7addb90 | 2358 | |
37a7d8b0 AK |
2359 | } |
2360 | } | |
2361 | } | |
2362 | ||
2363 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
2364 | { | |
1ea252af | 2365 | unsigned i; |
37a7d8b0 | 2366 | |
ad312c7c ZX |
2367 | if (vcpu->arch.mmu.root_level == 4) |
2368 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
2369 | else |
2370 | for (i = 0; i < 4; ++i) | |
ad312c7c | 2371 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 2372 | audit_mappings_page(vcpu, |
ad312c7c | 2373 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
2374 | i << 30, |
2375 | 2); | |
2376 | } | |
2377 | ||
2378 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
2379 | { | |
2380 | int nmaps = 0; | |
2381 | int i, j, k; | |
2382 | ||
2383 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
2384 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
2385 | struct kvm_rmap_desc *d; | |
2386 | ||
2387 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 2388 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 2389 | |
290fc38d | 2390 | if (!*rmapp) |
37a7d8b0 | 2391 | continue; |
290fc38d | 2392 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
2393 | ++nmaps; |
2394 | continue; | |
2395 | } | |
290fc38d | 2396 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
2397 | while (d) { |
2398 | for (k = 0; k < RMAP_EXT; ++k) | |
2399 | if (d->shadow_ptes[k]) | |
2400 | ++nmaps; | |
2401 | else | |
2402 | break; | |
2403 | d = d->more; | |
2404 | } | |
2405 | } | |
2406 | } | |
2407 | return nmaps; | |
2408 | } | |
2409 | ||
2410 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
2411 | { | |
2412 | int nmaps = 0; | |
4db35314 | 2413 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
2414 | int i; |
2415 | ||
f05e70ac | 2416 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2417 | u64 *pt = sp->spt; |
37a7d8b0 | 2418 | |
4db35314 | 2419 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
2420 | continue; |
2421 | ||
2422 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
2423 | u64 ent = pt[i]; | |
2424 | ||
2425 | if (!(ent & PT_PRESENT_MASK)) | |
2426 | continue; | |
2427 | if (!(ent & PT_WRITABLE_MASK)) | |
2428 | continue; | |
2429 | ++nmaps; | |
2430 | } | |
2431 | } | |
2432 | return nmaps; | |
2433 | } | |
2434 | ||
2435 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
2436 | { | |
2437 | int n_rmap = count_rmaps(vcpu); | |
2438 | int n_actual = count_writable_mappings(vcpu); | |
2439 | ||
2440 | if (n_rmap != n_actual) | |
2441 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
b8688d51 | 2442 | __func__, audit_msg, n_rmap, n_actual); |
37a7d8b0 AK |
2443 | } |
2444 | ||
2445 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
2446 | { | |
4db35314 | 2447 | struct kvm_mmu_page *sp; |
290fc38d IE |
2448 | struct kvm_memory_slot *slot; |
2449 | unsigned long *rmapp; | |
2450 | gfn_t gfn; | |
37a7d8b0 | 2451 | |
f05e70ac | 2452 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2453 | if (sp->role.metaphysical) |
37a7d8b0 AK |
2454 | continue; |
2455 | ||
4db35314 AK |
2456 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
2457 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
2458 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
2459 | if (*rmapp) | |
37a7d8b0 AK |
2460 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
2461 | " mappings: gfn %lx role %x\n", | |
b8688d51 | 2462 | __func__, audit_msg, sp->gfn, |
4db35314 | 2463 | sp->role.word); |
37a7d8b0 AK |
2464 | } |
2465 | } | |
2466 | ||
2467 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
2468 | { | |
2469 | int olddbg = dbg; | |
2470 | ||
2471 | dbg = 0; | |
2472 | audit_msg = msg; | |
2473 | audit_rmap(vcpu); | |
2474 | audit_write_protection(vcpu); | |
2475 | audit_mappings(vcpu); | |
2476 | dbg = olddbg; | |
2477 | } | |
2478 | ||
2479 | #endif |