Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d | 19 | |
1d737c8a | 20 | #include "mmu.h" |
6de4f3ad | 21 | #include "kvm_cache_regs.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
6aa8b732 | 32 | |
e495606d AK |
33 | #include <asm/page.h> |
34 | #include <asm/cmpxchg.h> | |
4e542370 | 35 | #include <asm/io.h> |
13673a90 | 36 | #include <asm/vmx.h> |
6aa8b732 | 37 | |
18552672 JR |
38 | /* |
39 | * When setting this variable to true it enables Two-Dimensional-Paging | |
40 | * where the hardware walks 2 page tables: | |
41 | * 1. the guest-virtual to guest-physical | |
42 | * 2. while doing 1. it walks guest-physical to host-physical | |
43 | * If the hardware supports that we don't need to do shadow paging. | |
44 | */ | |
2f333bcb | 45 | bool tdp_enabled = false; |
18552672 | 46 | |
37a7d8b0 AK |
47 | #undef MMU_DEBUG |
48 | ||
49 | #undef AUDIT | |
50 | ||
51 | #ifdef AUDIT | |
52 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
53 | #else | |
54 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
55 | #endif | |
56 | ||
57 | #ifdef MMU_DEBUG | |
58 | ||
59 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
60 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
61 | ||
62 | #else | |
63 | ||
64 | #define pgprintk(x...) do { } while (0) | |
65 | #define rmap_printk(x...) do { } while (0) | |
66 | ||
67 | #endif | |
68 | ||
69 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
6ada8cca AK |
70 | static int dbg = 0; |
71 | module_param(dbg, bool, 0644); | |
37a7d8b0 | 72 | #endif |
6aa8b732 | 73 | |
582801a9 MT |
74 | static int oos_shadow = 1; |
75 | module_param(oos_shadow, bool, 0644); | |
76 | ||
d6c69ee9 YD |
77 | #ifndef MMU_DEBUG |
78 | #define ASSERT(x) do { } while (0) | |
79 | #else | |
6aa8b732 AK |
80 | #define ASSERT(x) \ |
81 | if (!(x)) { \ | |
82 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
83 | __FILE__, __LINE__, #x); \ | |
84 | } | |
d6c69ee9 | 85 | #endif |
6aa8b732 | 86 | |
6aa8b732 AK |
87 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
88 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
89 | ||
6aa8b732 AK |
90 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
91 | ||
92 | #define PT64_LEVEL_BITS 9 | |
93 | ||
94 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 95 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
96 | |
97 | #define PT64_LEVEL_MASK(level) \ | |
98 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
99 | ||
100 | #define PT64_INDEX(address, level)\ | |
101 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
102 | ||
103 | ||
104 | #define PT32_LEVEL_BITS 10 | |
105 | ||
106 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 107 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
108 | |
109 | #define PT32_LEVEL_MASK(level) \ | |
110 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
e04da980 JR |
111 | #define PT32_LVL_OFFSET_MASK(level) \ |
112 | (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
113 | * PT32_LEVEL_BITS))) - 1)) | |
6aa8b732 AK |
114 | |
115 | #define PT32_INDEX(address, level)\ | |
116 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
117 | ||
118 | ||
27aba766 | 119 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
120 | #define PT64_DIR_BASE_ADDR_MASK \ |
121 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
e04da980 JR |
122 | #define PT64_LVL_ADDR_MASK(level) \ |
123 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
124 | * PT64_LEVEL_BITS))) - 1)) | |
125 | #define PT64_LVL_OFFSET_MASK(level) \ | |
126 | (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
127 | * PT64_LEVEL_BITS))) - 1)) | |
6aa8b732 AK |
128 | |
129 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
130 | #define PT32_DIR_BASE_ADDR_MASK \ | |
131 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
e04da980 JR |
132 | #define PT32_LVL_ADDR_MASK(level) \ |
133 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \ | |
134 | * PT32_LEVEL_BITS))) - 1)) | |
6aa8b732 | 135 | |
79539cec AK |
136 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
137 | | PT64_NX_MASK) | |
6aa8b732 AK |
138 | |
139 | #define PFERR_PRESENT_MASK (1U << 0) | |
140 | #define PFERR_WRITE_MASK (1U << 1) | |
141 | #define PFERR_USER_MASK (1U << 2) | |
82725b20 | 142 | #define PFERR_RSVD_MASK (1U << 3) |
73b1087e | 143 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 | 144 | |
e04da980 | 145 | #define PT_PDPE_LEVEL 3 |
6aa8b732 AK |
146 | #define PT_DIRECTORY_LEVEL 2 |
147 | #define PT_PAGE_TABLE_LEVEL 1 | |
148 | ||
cd4a4e53 AK |
149 | #define RMAP_EXT 4 |
150 | ||
fe135d2c AK |
151 | #define ACC_EXEC_MASK 1 |
152 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
153 | #define ACC_USER_MASK PT_USER_MASK | |
154 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
155 | ||
07420171 AK |
156 | #define CREATE_TRACE_POINTS |
157 | #include "mmutrace.h" | |
158 | ||
1403283a IE |
159 | #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
160 | ||
135f8c2b AK |
161 | #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level) |
162 | ||
cd4a4e53 | 163 | struct kvm_rmap_desc { |
d555c333 | 164 | u64 *sptes[RMAP_EXT]; |
cd4a4e53 AK |
165 | struct kvm_rmap_desc *more; |
166 | }; | |
167 | ||
2d11123a AK |
168 | struct kvm_shadow_walk_iterator { |
169 | u64 addr; | |
170 | hpa_t shadow_addr; | |
171 | int level; | |
172 | u64 *sptep; | |
173 | unsigned index; | |
174 | }; | |
175 | ||
176 | #define for_each_shadow_entry(_vcpu, _addr, _walker) \ | |
177 | for (shadow_walk_init(&(_walker), _vcpu, _addr); \ | |
178 | shadow_walk_okay(&(_walker)); \ | |
179 | shadow_walk_next(&(_walker))) | |
180 | ||
181 | ||
4731d4c7 MT |
182 | struct kvm_unsync_walk { |
183 | int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk); | |
184 | }; | |
185 | ||
ad8cfbe3 MT |
186 | typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp); |
187 | ||
b5a33a75 AK |
188 | static struct kmem_cache *pte_chain_cache; |
189 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 190 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 191 | |
c7addb90 AK |
192 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
193 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
7b52345e SY |
194 | static u64 __read_mostly shadow_base_present_pte; |
195 | static u64 __read_mostly shadow_nx_mask; | |
196 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ | |
197 | static u64 __read_mostly shadow_user_mask; | |
198 | static u64 __read_mostly shadow_accessed_mask; | |
199 | static u64 __read_mostly shadow_dirty_mask; | |
c7addb90 | 200 | |
82725b20 DE |
201 | static inline u64 rsvd_bits(int s, int e) |
202 | { | |
203 | return ((1ULL << (e - s + 1)) - 1) << s; | |
204 | } | |
205 | ||
c7addb90 AK |
206 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) |
207 | { | |
208 | shadow_trap_nonpresent_pte = trap_pte; | |
209 | shadow_notrap_nonpresent_pte = notrap_pte; | |
210 | } | |
211 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
212 | ||
7b52345e SY |
213 | void kvm_mmu_set_base_ptes(u64 base_pte) |
214 | { | |
215 | shadow_base_present_pte = base_pte; | |
216 | } | |
217 | EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes); | |
218 | ||
219 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
4b12f0de | 220 | u64 dirty_mask, u64 nx_mask, u64 x_mask) |
7b52345e SY |
221 | { |
222 | shadow_user_mask = user_mask; | |
223 | shadow_accessed_mask = accessed_mask; | |
224 | shadow_dirty_mask = dirty_mask; | |
225 | shadow_nx_mask = nx_mask; | |
226 | shadow_x_mask = x_mask; | |
227 | } | |
228 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | |
229 | ||
6aa8b732 AK |
230 | static int is_write_protection(struct kvm_vcpu *vcpu) |
231 | { | |
ad312c7c | 232 | return vcpu->arch.cr0 & X86_CR0_WP; |
6aa8b732 AK |
233 | } |
234 | ||
235 | static int is_cpuid_PSE36(void) | |
236 | { | |
237 | return 1; | |
238 | } | |
239 | ||
73b1087e AK |
240 | static int is_nx(struct kvm_vcpu *vcpu) |
241 | { | |
ad312c7c | 242 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
243 | } |
244 | ||
c7addb90 AK |
245 | static int is_shadow_present_pte(u64 pte) |
246 | { | |
c7addb90 AK |
247 | return pte != shadow_trap_nonpresent_pte |
248 | && pte != shadow_notrap_nonpresent_pte; | |
249 | } | |
250 | ||
05da4558 MT |
251 | static int is_large_pte(u64 pte) |
252 | { | |
253 | return pte & PT_PAGE_SIZE_MASK; | |
254 | } | |
255 | ||
6aa8b732 AK |
256 | static int is_writeble_pte(unsigned long pte) |
257 | { | |
258 | return pte & PT_WRITABLE_MASK; | |
259 | } | |
260 | ||
43a3795a | 261 | static int is_dirty_gpte(unsigned long pte) |
e3c5e7ec | 262 | { |
439e218a | 263 | return pte & PT_DIRTY_MASK; |
e3c5e7ec AK |
264 | } |
265 | ||
43a3795a | 266 | static int is_rmap_spte(u64 pte) |
cd4a4e53 | 267 | { |
4b1a80fa | 268 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
269 | } |
270 | ||
776e6633 MT |
271 | static int is_last_spte(u64 pte, int level) |
272 | { | |
273 | if (level == PT_PAGE_TABLE_LEVEL) | |
274 | return 1; | |
852e3c19 | 275 | if (is_large_pte(pte)) |
776e6633 MT |
276 | return 1; |
277 | return 0; | |
278 | } | |
279 | ||
35149e21 | 280 | static pfn_t spte_to_pfn(u64 pte) |
0b49ea86 | 281 | { |
35149e21 | 282 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
0b49ea86 AK |
283 | } |
284 | ||
da928521 AK |
285 | static gfn_t pse36_gfn_delta(u32 gpte) |
286 | { | |
287 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
288 | ||
289 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
290 | } | |
291 | ||
d555c333 | 292 | static void __set_spte(u64 *sptep, u64 spte) |
e663ee64 AK |
293 | { |
294 | #ifdef CONFIG_X86_64 | |
295 | set_64bit((unsigned long *)sptep, spte); | |
296 | #else | |
297 | set_64bit((unsigned long long *)sptep, spte); | |
298 | #endif | |
299 | } | |
300 | ||
e2dec939 | 301 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 302 | struct kmem_cache *base_cache, int min) |
714b93da AK |
303 | { |
304 | void *obj; | |
305 | ||
306 | if (cache->nobjs >= min) | |
e2dec939 | 307 | return 0; |
714b93da | 308 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 309 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 310 | if (!obj) |
e2dec939 | 311 | return -ENOMEM; |
714b93da AK |
312 | cache->objects[cache->nobjs++] = obj; |
313 | } | |
e2dec939 | 314 | return 0; |
714b93da AK |
315 | } |
316 | ||
317 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
318 | { | |
319 | while (mc->nobjs) | |
320 | kfree(mc->objects[--mc->nobjs]); | |
321 | } | |
322 | ||
c1158e63 | 323 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 324 | int min) |
c1158e63 AK |
325 | { |
326 | struct page *page; | |
327 | ||
328 | if (cache->nobjs >= min) | |
329 | return 0; | |
330 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 331 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
332 | if (!page) |
333 | return -ENOMEM; | |
334 | set_page_private(page, 0); | |
335 | cache->objects[cache->nobjs++] = page_address(page); | |
336 | } | |
337 | return 0; | |
338 | } | |
339 | ||
340 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
341 | { | |
342 | while (mc->nobjs) | |
c4d198d5 | 343 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
344 | } |
345 | ||
2e3e5882 | 346 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 347 | { |
e2dec939 AK |
348 | int r; |
349 | ||
ad312c7c | 350 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 351 | pte_chain_cache, 4); |
e2dec939 AK |
352 | if (r) |
353 | goto out; | |
ad312c7c | 354 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
c41ef344 | 355 | rmap_desc_cache, 4); |
d3d25b04 AK |
356 | if (r) |
357 | goto out; | |
ad312c7c | 358 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
359 | if (r) |
360 | goto out; | |
ad312c7c | 361 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 362 | mmu_page_header_cache, 4); |
e2dec939 AK |
363 | out: |
364 | return r; | |
714b93da AK |
365 | } |
366 | ||
367 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
368 | { | |
ad312c7c ZX |
369 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
370 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
371 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
372 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
373 | } |
374 | ||
375 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
376 | size_t size) | |
377 | { | |
378 | void *p; | |
379 | ||
380 | BUG_ON(!mc->nobjs); | |
381 | p = mc->objects[--mc->nobjs]; | |
714b93da AK |
382 | return p; |
383 | } | |
384 | ||
714b93da AK |
385 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
386 | { | |
ad312c7c | 387 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
388 | sizeof(struct kvm_pte_chain)); |
389 | } | |
390 | ||
90cb0529 | 391 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 392 | { |
90cb0529 | 393 | kfree(pc); |
714b93da AK |
394 | } |
395 | ||
396 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
397 | { | |
ad312c7c | 398 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
399 | sizeof(struct kvm_rmap_desc)); |
400 | } | |
401 | ||
90cb0529 | 402 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 403 | { |
90cb0529 | 404 | kfree(rd); |
714b93da AK |
405 | } |
406 | ||
05da4558 MT |
407 | /* |
408 | * Return the pointer to the largepage write count for a given | |
409 | * gfn, handling slots that are not large page aligned. | |
410 | */ | |
d25797b2 JR |
411 | static int *slot_largepage_idx(gfn_t gfn, |
412 | struct kvm_memory_slot *slot, | |
413 | int level) | |
05da4558 MT |
414 | { |
415 | unsigned long idx; | |
416 | ||
d25797b2 JR |
417 | idx = (gfn / KVM_PAGES_PER_HPAGE(level)) - |
418 | (slot->base_gfn / KVM_PAGES_PER_HPAGE(level)); | |
419 | return &slot->lpage_info[level - 2][idx].write_count; | |
05da4558 MT |
420 | } |
421 | ||
422 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
423 | { | |
d25797b2 | 424 | struct kvm_memory_slot *slot; |
05da4558 | 425 | int *write_count; |
d25797b2 | 426 | int i; |
05da4558 | 427 | |
2843099f | 428 | gfn = unalias_gfn(kvm, gfn); |
d25797b2 JR |
429 | |
430 | slot = gfn_to_memslot_unaliased(kvm, gfn); | |
431 | for (i = PT_DIRECTORY_LEVEL; | |
432 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { | |
433 | write_count = slot_largepage_idx(gfn, slot, i); | |
434 | *write_count += 1; | |
435 | } | |
05da4558 MT |
436 | } |
437 | ||
438 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
439 | { | |
d25797b2 | 440 | struct kvm_memory_slot *slot; |
05da4558 | 441 | int *write_count; |
d25797b2 | 442 | int i; |
05da4558 | 443 | |
2843099f | 444 | gfn = unalias_gfn(kvm, gfn); |
d25797b2 JR |
445 | for (i = PT_DIRECTORY_LEVEL; |
446 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { | |
447 | slot = gfn_to_memslot_unaliased(kvm, gfn); | |
448 | write_count = slot_largepage_idx(gfn, slot, i); | |
449 | *write_count -= 1; | |
450 | WARN_ON(*write_count < 0); | |
451 | } | |
05da4558 MT |
452 | } |
453 | ||
d25797b2 JR |
454 | static int has_wrprotected_page(struct kvm *kvm, |
455 | gfn_t gfn, | |
456 | int level) | |
05da4558 | 457 | { |
2843099f | 458 | struct kvm_memory_slot *slot; |
05da4558 MT |
459 | int *largepage_idx; |
460 | ||
2843099f IE |
461 | gfn = unalias_gfn(kvm, gfn); |
462 | slot = gfn_to_memslot_unaliased(kvm, gfn); | |
05da4558 | 463 | if (slot) { |
d25797b2 | 464 | largepage_idx = slot_largepage_idx(gfn, slot, level); |
05da4558 MT |
465 | return *largepage_idx; |
466 | } | |
467 | ||
468 | return 1; | |
469 | } | |
470 | ||
d25797b2 | 471 | static int host_mapping_level(struct kvm *kvm, gfn_t gfn) |
05da4558 | 472 | { |
d25797b2 | 473 | unsigned long page_size = PAGE_SIZE; |
05da4558 MT |
474 | struct vm_area_struct *vma; |
475 | unsigned long addr; | |
d25797b2 | 476 | int i, ret = 0; |
05da4558 MT |
477 | |
478 | addr = gfn_to_hva(kvm, gfn); | |
479 | if (kvm_is_error_hva(addr)) | |
d25797b2 | 480 | return page_size; |
05da4558 | 481 | |
4c2155ce | 482 | down_read(¤t->mm->mmap_sem); |
05da4558 | 483 | vma = find_vma(current->mm, addr); |
d25797b2 JR |
484 | if (!vma) |
485 | goto out; | |
486 | ||
487 | page_size = vma_kernel_pagesize(vma); | |
488 | ||
489 | out: | |
4c2155ce | 490 | up_read(¤t->mm->mmap_sem); |
05da4558 | 491 | |
d25797b2 JR |
492 | for (i = PT_PAGE_TABLE_LEVEL; |
493 | i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) { | |
494 | if (page_size >= KVM_HPAGE_SIZE(i)) | |
495 | ret = i; | |
496 | else | |
497 | break; | |
498 | } | |
499 | ||
4c2155ce | 500 | return ret; |
05da4558 MT |
501 | } |
502 | ||
d25797b2 | 503 | static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn) |
05da4558 MT |
504 | { |
505 | struct kvm_memory_slot *slot; | |
d25797b2 JR |
506 | int host_level; |
507 | int level = PT_PAGE_TABLE_LEVEL; | |
05da4558 MT |
508 | |
509 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
510 | if (slot && slot->dirty_bitmap) | |
d25797b2 | 511 | return PT_PAGE_TABLE_LEVEL; |
05da4558 | 512 | |
d25797b2 JR |
513 | host_level = host_mapping_level(vcpu->kvm, large_gfn); |
514 | ||
515 | if (host_level == PT_PAGE_TABLE_LEVEL) | |
516 | return host_level; | |
517 | ||
518 | for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level) { | |
519 | ||
520 | if (has_wrprotected_page(vcpu->kvm, large_gfn, level)) | |
521 | break; | |
522 | } | |
523 | ||
524 | return level - 1; | |
05da4558 MT |
525 | } |
526 | ||
290fc38d IE |
527 | /* |
528 | * Take gfn and return the reverse mapping to it. | |
529 | * Note: gfn must be unaliased before this function get called | |
530 | */ | |
531 | ||
44ad9944 | 532 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level) |
290fc38d IE |
533 | { |
534 | struct kvm_memory_slot *slot; | |
05da4558 | 535 | unsigned long idx; |
290fc38d IE |
536 | |
537 | slot = gfn_to_memslot(kvm, gfn); | |
44ad9944 | 538 | if (likely(level == PT_PAGE_TABLE_LEVEL)) |
05da4558 MT |
539 | return &slot->rmap[gfn - slot->base_gfn]; |
540 | ||
44ad9944 JR |
541 | idx = (gfn / KVM_PAGES_PER_HPAGE(level)) - |
542 | (slot->base_gfn / KVM_PAGES_PER_HPAGE(level)); | |
05da4558 | 543 | |
44ad9944 | 544 | return &slot->lpage_info[level - 2][idx].rmap_pde; |
290fc38d IE |
545 | } |
546 | ||
cd4a4e53 AK |
547 | /* |
548 | * Reverse mapping data structures: | |
549 | * | |
290fc38d IE |
550 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
551 | * that points to page_address(page). | |
cd4a4e53 | 552 | * |
290fc38d IE |
553 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
554 | * containing more mappings. | |
53a27b39 MT |
555 | * |
556 | * Returns the number of rmap entries before the spte was added or zero if | |
557 | * the spte was not added. | |
558 | * | |
cd4a4e53 | 559 | */ |
44ad9944 | 560 | static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
cd4a4e53 | 561 | { |
4db35314 | 562 | struct kvm_mmu_page *sp; |
cd4a4e53 | 563 | struct kvm_rmap_desc *desc; |
290fc38d | 564 | unsigned long *rmapp; |
53a27b39 | 565 | int i, count = 0; |
cd4a4e53 | 566 | |
43a3795a | 567 | if (!is_rmap_spte(*spte)) |
53a27b39 | 568 | return count; |
290fc38d | 569 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
570 | sp = page_header(__pa(spte)); |
571 | sp->gfns[spte - sp->spt] = gfn; | |
44ad9944 | 572 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level); |
290fc38d | 573 | if (!*rmapp) { |
cd4a4e53 | 574 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
575 | *rmapp = (unsigned long)spte; |
576 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 577 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 578 | desc = mmu_alloc_rmap_desc(vcpu); |
d555c333 AK |
579 | desc->sptes[0] = (u64 *)*rmapp; |
580 | desc->sptes[1] = spte; | |
290fc38d | 581 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
582 | } else { |
583 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 584 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
d555c333 | 585 | while (desc->sptes[RMAP_EXT-1] && desc->more) { |
cd4a4e53 | 586 | desc = desc->more; |
53a27b39 MT |
587 | count += RMAP_EXT; |
588 | } | |
d555c333 | 589 | if (desc->sptes[RMAP_EXT-1]) { |
714b93da | 590 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
591 | desc = desc->more; |
592 | } | |
d555c333 | 593 | for (i = 0; desc->sptes[i]; ++i) |
cd4a4e53 | 594 | ; |
d555c333 | 595 | desc->sptes[i] = spte; |
cd4a4e53 | 596 | } |
53a27b39 | 597 | return count; |
cd4a4e53 AK |
598 | } |
599 | ||
290fc38d | 600 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
601 | struct kvm_rmap_desc *desc, |
602 | int i, | |
603 | struct kvm_rmap_desc *prev_desc) | |
604 | { | |
605 | int j; | |
606 | ||
d555c333 | 607 | for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j) |
cd4a4e53 | 608 | ; |
d555c333 AK |
609 | desc->sptes[i] = desc->sptes[j]; |
610 | desc->sptes[j] = NULL; | |
cd4a4e53 AK |
611 | if (j != 0) |
612 | return; | |
613 | if (!prev_desc && !desc->more) | |
d555c333 | 614 | *rmapp = (unsigned long)desc->sptes[0]; |
cd4a4e53 AK |
615 | else |
616 | if (prev_desc) | |
617 | prev_desc->more = desc->more; | |
618 | else | |
290fc38d | 619 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 620 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
621 | } |
622 | ||
290fc38d | 623 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 624 | { |
cd4a4e53 AK |
625 | struct kvm_rmap_desc *desc; |
626 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 627 | struct kvm_mmu_page *sp; |
35149e21 | 628 | pfn_t pfn; |
290fc38d | 629 | unsigned long *rmapp; |
cd4a4e53 AK |
630 | int i; |
631 | ||
43a3795a | 632 | if (!is_rmap_spte(*spte)) |
cd4a4e53 | 633 | return; |
4db35314 | 634 | sp = page_header(__pa(spte)); |
35149e21 | 635 | pfn = spte_to_pfn(*spte); |
7b52345e | 636 | if (*spte & shadow_accessed_mask) |
35149e21 | 637 | kvm_set_pfn_accessed(pfn); |
b4231d61 | 638 | if (is_writeble_pte(*spte)) |
acb66dd0 | 639 | kvm_set_pfn_dirty(pfn); |
44ad9944 | 640 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level); |
290fc38d | 641 | if (!*rmapp) { |
cd4a4e53 AK |
642 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
643 | BUG(); | |
290fc38d | 644 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 645 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 646 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
647 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
648 | spte, *spte); | |
649 | BUG(); | |
650 | } | |
290fc38d | 651 | *rmapp = 0; |
cd4a4e53 AK |
652 | } else { |
653 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 654 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
655 | prev_desc = NULL; |
656 | while (desc) { | |
d555c333 AK |
657 | for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) |
658 | if (desc->sptes[i] == spte) { | |
290fc38d | 659 | rmap_desc_remove_entry(rmapp, |
714b93da | 660 | desc, i, |
cd4a4e53 AK |
661 | prev_desc); |
662 | return; | |
663 | } | |
664 | prev_desc = desc; | |
665 | desc = desc->more; | |
666 | } | |
667 | BUG(); | |
668 | } | |
669 | } | |
670 | ||
98348e95 | 671 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 672 | { |
374cbac0 | 673 | struct kvm_rmap_desc *desc; |
98348e95 IE |
674 | struct kvm_rmap_desc *prev_desc; |
675 | u64 *prev_spte; | |
676 | int i; | |
677 | ||
678 | if (!*rmapp) | |
679 | return NULL; | |
680 | else if (!(*rmapp & 1)) { | |
681 | if (!spte) | |
682 | return (u64 *)*rmapp; | |
683 | return NULL; | |
684 | } | |
685 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
686 | prev_desc = NULL; | |
687 | prev_spte = NULL; | |
688 | while (desc) { | |
d555c333 | 689 | for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) { |
98348e95 | 690 | if (prev_spte == spte) |
d555c333 AK |
691 | return desc->sptes[i]; |
692 | prev_spte = desc->sptes[i]; | |
98348e95 IE |
693 | } |
694 | desc = desc->more; | |
695 | } | |
696 | return NULL; | |
697 | } | |
698 | ||
b1a36821 | 699 | static int rmap_write_protect(struct kvm *kvm, u64 gfn) |
98348e95 | 700 | { |
290fc38d | 701 | unsigned long *rmapp; |
374cbac0 | 702 | u64 *spte; |
44ad9944 | 703 | int i, write_protected = 0; |
374cbac0 | 704 | |
4a4c9924 | 705 | gfn = unalias_gfn(kvm, gfn); |
44ad9944 | 706 | rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL); |
374cbac0 | 707 | |
98348e95 IE |
708 | spte = rmap_next(kvm, rmapp, NULL); |
709 | while (spte) { | |
374cbac0 | 710 | BUG_ON(!spte); |
374cbac0 | 711 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 712 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
caa5b8a5 | 713 | if (is_writeble_pte(*spte)) { |
d555c333 | 714 | __set_spte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
715 | write_protected = 1; |
716 | } | |
9647c14c | 717 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 718 | } |
855149aa | 719 | if (write_protected) { |
35149e21 | 720 | pfn_t pfn; |
855149aa IE |
721 | |
722 | spte = rmap_next(kvm, rmapp, NULL); | |
35149e21 AL |
723 | pfn = spte_to_pfn(*spte); |
724 | kvm_set_pfn_dirty(pfn); | |
855149aa IE |
725 | } |
726 | ||
05da4558 | 727 | /* check for huge page mappings */ |
44ad9944 JR |
728 | for (i = PT_DIRECTORY_LEVEL; |
729 | i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) { | |
730 | rmapp = gfn_to_rmap(kvm, gfn, i); | |
731 | spte = rmap_next(kvm, rmapp, NULL); | |
732 | while (spte) { | |
733 | BUG_ON(!spte); | |
734 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
735 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
736 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
737 | if (is_writeble_pte(*spte)) { | |
738 | rmap_remove(kvm, spte); | |
739 | --kvm->stat.lpages; | |
740 | __set_spte(spte, shadow_trap_nonpresent_pte); | |
741 | spte = NULL; | |
742 | write_protected = 1; | |
743 | } | |
744 | spte = rmap_next(kvm, rmapp, spte); | |
05da4558 | 745 | } |
05da4558 MT |
746 | } |
747 | ||
b1a36821 | 748 | return write_protected; |
374cbac0 AK |
749 | } |
750 | ||
8a8365c5 FD |
751 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp, |
752 | unsigned long data) | |
e930bffe AA |
753 | { |
754 | u64 *spte; | |
755 | int need_tlb_flush = 0; | |
756 | ||
757 | while ((spte = rmap_next(kvm, rmapp, NULL))) { | |
758 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
759 | rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte); | |
760 | rmap_remove(kvm, spte); | |
d555c333 | 761 | __set_spte(spte, shadow_trap_nonpresent_pte); |
e930bffe AA |
762 | need_tlb_flush = 1; |
763 | } | |
764 | return need_tlb_flush; | |
765 | } | |
766 | ||
8a8365c5 FD |
767 | static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp, |
768 | unsigned long data) | |
3da0dd43 IE |
769 | { |
770 | int need_flush = 0; | |
771 | u64 *spte, new_spte; | |
772 | pte_t *ptep = (pte_t *)data; | |
773 | pfn_t new_pfn; | |
774 | ||
775 | WARN_ON(pte_huge(*ptep)); | |
776 | new_pfn = pte_pfn(*ptep); | |
777 | spte = rmap_next(kvm, rmapp, NULL); | |
778 | while (spte) { | |
779 | BUG_ON(!is_shadow_present_pte(*spte)); | |
780 | rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte); | |
781 | need_flush = 1; | |
782 | if (pte_write(*ptep)) { | |
783 | rmap_remove(kvm, spte); | |
784 | __set_spte(spte, shadow_trap_nonpresent_pte); | |
785 | spte = rmap_next(kvm, rmapp, NULL); | |
786 | } else { | |
787 | new_spte = *spte &~ (PT64_BASE_ADDR_MASK); | |
788 | new_spte |= (u64)new_pfn << PAGE_SHIFT; | |
789 | ||
790 | new_spte &= ~PT_WRITABLE_MASK; | |
791 | new_spte &= ~SPTE_HOST_WRITEABLE; | |
792 | if (is_writeble_pte(*spte)) | |
793 | kvm_set_pfn_dirty(spte_to_pfn(*spte)); | |
794 | __set_spte(spte, new_spte); | |
795 | spte = rmap_next(kvm, rmapp, spte); | |
796 | } | |
797 | } | |
798 | if (need_flush) | |
799 | kvm_flush_remote_tlbs(kvm); | |
800 | ||
801 | return 0; | |
802 | } | |
803 | ||
8a8365c5 FD |
804 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, |
805 | unsigned long data, | |
3da0dd43 | 806 | int (*handler)(struct kvm *kvm, unsigned long *rmapp, |
8a8365c5 | 807 | unsigned long data)) |
e930bffe | 808 | { |
852e3c19 | 809 | int i, j; |
e930bffe AA |
810 | int retval = 0; |
811 | ||
812 | /* | |
813 | * If mmap_sem isn't taken, we can look the memslots with only | |
814 | * the mmu_lock by skipping over the slots with userspace_addr == 0. | |
815 | */ | |
816 | for (i = 0; i < kvm->nmemslots; i++) { | |
817 | struct kvm_memory_slot *memslot = &kvm->memslots[i]; | |
818 | unsigned long start = memslot->userspace_addr; | |
819 | unsigned long end; | |
820 | ||
821 | /* mmu_lock protects userspace_addr */ | |
822 | if (!start) | |
823 | continue; | |
824 | ||
825 | end = start + (memslot->npages << PAGE_SHIFT); | |
826 | if (hva >= start && hva < end) { | |
827 | gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT; | |
852e3c19 | 828 | |
3da0dd43 IE |
829 | retval |= handler(kvm, &memslot->rmap[gfn_offset], |
830 | data); | |
852e3c19 JR |
831 | |
832 | for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) { | |
833 | int idx = gfn_offset; | |
834 | idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j); | |
835 | retval |= handler(kvm, | |
3da0dd43 IE |
836 | &memslot->lpage_info[j][idx].rmap_pde, |
837 | data); | |
852e3c19 | 838 | } |
e930bffe AA |
839 | } |
840 | } | |
841 | ||
842 | return retval; | |
843 | } | |
844 | ||
845 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
846 | { | |
3da0dd43 IE |
847 | return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp); |
848 | } | |
849 | ||
850 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
851 | { | |
8a8365c5 | 852 | kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp); |
e930bffe AA |
853 | } |
854 | ||
8a8365c5 FD |
855 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp, |
856 | unsigned long data) | |
e930bffe AA |
857 | { |
858 | u64 *spte; | |
859 | int young = 0; | |
860 | ||
534e38b4 SY |
861 | /* always return old for EPT */ |
862 | if (!shadow_accessed_mask) | |
863 | return 0; | |
864 | ||
e930bffe AA |
865 | spte = rmap_next(kvm, rmapp, NULL); |
866 | while (spte) { | |
867 | int _young; | |
868 | u64 _spte = *spte; | |
869 | BUG_ON(!(_spte & PT_PRESENT_MASK)); | |
870 | _young = _spte & PT_ACCESSED_MASK; | |
871 | if (_young) { | |
872 | young = 1; | |
873 | clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
874 | } | |
875 | spte = rmap_next(kvm, rmapp, spte); | |
876 | } | |
877 | return young; | |
878 | } | |
879 | ||
53a27b39 MT |
880 | #define RMAP_RECYCLE_THRESHOLD 1000 |
881 | ||
852e3c19 | 882 | static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
53a27b39 MT |
883 | { |
884 | unsigned long *rmapp; | |
852e3c19 JR |
885 | struct kvm_mmu_page *sp; |
886 | ||
887 | sp = page_header(__pa(spte)); | |
53a27b39 MT |
888 | |
889 | gfn = unalias_gfn(vcpu->kvm, gfn); | |
852e3c19 | 890 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level); |
53a27b39 | 891 | |
3da0dd43 | 892 | kvm_unmap_rmapp(vcpu->kvm, rmapp, 0); |
53a27b39 MT |
893 | kvm_flush_remote_tlbs(vcpu->kvm); |
894 | } | |
895 | ||
e930bffe AA |
896 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) |
897 | { | |
3da0dd43 | 898 | return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp); |
e930bffe AA |
899 | } |
900 | ||
d6c69ee9 | 901 | #ifdef MMU_DEBUG |
47ad8e68 | 902 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 903 | { |
139bdb2d AK |
904 | u64 *pos; |
905 | u64 *end; | |
906 | ||
47ad8e68 | 907 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
3c915510 | 908 | if (is_shadow_present_pte(*pos)) { |
b8688d51 | 909 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 910 | pos, *pos); |
6aa8b732 | 911 | return 0; |
139bdb2d | 912 | } |
6aa8b732 AK |
913 | return 1; |
914 | } | |
d6c69ee9 | 915 | #endif |
6aa8b732 | 916 | |
4db35314 | 917 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 918 | { |
4db35314 AK |
919 | ASSERT(is_empty_shadow_page(sp->spt)); |
920 | list_del(&sp->link); | |
921 | __free_page(virt_to_page(sp->spt)); | |
922 | __free_page(virt_to_page(sp->gfns)); | |
923 | kfree(sp); | |
f05e70ac | 924 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
925 | } |
926 | ||
cea0f0e7 AK |
927 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
928 | { | |
1ae0a13d | 929 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
930 | } |
931 | ||
25c0de2c AK |
932 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
933 | u64 *parent_pte) | |
6aa8b732 | 934 | { |
4db35314 | 935 | struct kvm_mmu_page *sp; |
6aa8b732 | 936 | |
ad312c7c ZX |
937 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
938 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
939 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 940 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 941 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
6cffe8ca | 942 | INIT_LIST_HEAD(&sp->oos_link); |
291f26bc | 943 | bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); |
4db35314 AK |
944 | sp->multimapped = 0; |
945 | sp->parent_pte = parent_pte; | |
f05e70ac | 946 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 947 | return sp; |
6aa8b732 AK |
948 | } |
949 | ||
714b93da | 950 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 951 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
952 | { |
953 | struct kvm_pte_chain *pte_chain; | |
954 | struct hlist_node *node; | |
955 | int i; | |
956 | ||
957 | if (!parent_pte) | |
958 | return; | |
4db35314 AK |
959 | if (!sp->multimapped) { |
960 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
961 | |
962 | if (!old) { | |
4db35314 | 963 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
964 | return; |
965 | } | |
4db35314 | 966 | sp->multimapped = 1; |
714b93da | 967 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
968 | INIT_HLIST_HEAD(&sp->parent_ptes); |
969 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
970 | pte_chain->parent_ptes[0] = old; |
971 | } | |
4db35314 | 972 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
973 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
974 | continue; | |
975 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
976 | if (!pte_chain->parent_ptes[i]) { | |
977 | pte_chain->parent_ptes[i] = parent_pte; | |
978 | return; | |
979 | } | |
980 | } | |
714b93da | 981 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 982 | BUG_ON(!pte_chain); |
4db35314 | 983 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
984 | pte_chain->parent_ptes[0] = parent_pte; |
985 | } | |
986 | ||
4db35314 | 987 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
988 | u64 *parent_pte) |
989 | { | |
990 | struct kvm_pte_chain *pte_chain; | |
991 | struct hlist_node *node; | |
992 | int i; | |
993 | ||
4db35314 AK |
994 | if (!sp->multimapped) { |
995 | BUG_ON(sp->parent_pte != parent_pte); | |
996 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
997 | return; |
998 | } | |
4db35314 | 999 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
1000 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
1001 | if (!pte_chain->parent_ptes[i]) | |
1002 | break; | |
1003 | if (pte_chain->parent_ptes[i] != parent_pte) | |
1004 | continue; | |
697fe2e2 AK |
1005 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
1006 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
1007 | pte_chain->parent_ptes[i] |
1008 | = pte_chain->parent_ptes[i + 1]; | |
1009 | ++i; | |
1010 | } | |
1011 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
1012 | if (i == 0) { |
1013 | hlist_del(&pte_chain->link); | |
90cb0529 | 1014 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
1015 | if (hlist_empty(&sp->parent_ptes)) { |
1016 | sp->multimapped = 0; | |
1017 | sp->parent_pte = NULL; | |
697fe2e2 AK |
1018 | } |
1019 | } | |
cea0f0e7 AK |
1020 | return; |
1021 | } | |
1022 | BUG(); | |
1023 | } | |
1024 | ||
ad8cfbe3 MT |
1025 | |
1026 | static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, | |
1027 | mmu_parent_walk_fn fn) | |
1028 | { | |
1029 | struct kvm_pte_chain *pte_chain; | |
1030 | struct hlist_node *node; | |
1031 | struct kvm_mmu_page *parent_sp; | |
1032 | int i; | |
1033 | ||
1034 | if (!sp->multimapped && sp->parent_pte) { | |
1035 | parent_sp = page_header(__pa(sp->parent_pte)); | |
1036 | fn(vcpu, parent_sp); | |
1037 | mmu_parent_walk(vcpu, parent_sp, fn); | |
1038 | return; | |
1039 | } | |
1040 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) | |
1041 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
1042 | if (!pte_chain->parent_ptes[i]) | |
1043 | break; | |
1044 | parent_sp = page_header(__pa(pte_chain->parent_ptes[i])); | |
1045 | fn(vcpu, parent_sp); | |
1046 | mmu_parent_walk(vcpu, parent_sp, fn); | |
1047 | } | |
1048 | } | |
1049 | ||
0074ff63 MT |
1050 | static void kvm_mmu_update_unsync_bitmap(u64 *spte) |
1051 | { | |
1052 | unsigned int index; | |
1053 | struct kvm_mmu_page *sp = page_header(__pa(spte)); | |
1054 | ||
1055 | index = spte - sp->spt; | |
60c8aec6 MT |
1056 | if (!__test_and_set_bit(index, sp->unsync_child_bitmap)) |
1057 | sp->unsync_children++; | |
1058 | WARN_ON(!sp->unsync_children); | |
0074ff63 MT |
1059 | } |
1060 | ||
1061 | static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp) | |
1062 | { | |
1063 | struct kvm_pte_chain *pte_chain; | |
1064 | struct hlist_node *node; | |
1065 | int i; | |
1066 | ||
1067 | if (!sp->parent_pte) | |
1068 | return; | |
1069 | ||
1070 | if (!sp->multimapped) { | |
1071 | kvm_mmu_update_unsync_bitmap(sp->parent_pte); | |
1072 | return; | |
1073 | } | |
1074 | ||
1075 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) | |
1076 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
1077 | if (!pte_chain->parent_ptes[i]) | |
1078 | break; | |
1079 | kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]); | |
1080 | } | |
1081 | } | |
1082 | ||
1083 | static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |
1084 | { | |
0074ff63 MT |
1085 | kvm_mmu_update_parents_unsync(sp); |
1086 | return 1; | |
1087 | } | |
1088 | ||
1089 | static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu, | |
1090 | struct kvm_mmu_page *sp) | |
1091 | { | |
1092 | mmu_parent_walk(vcpu, sp, unsync_walk_fn); | |
1093 | kvm_mmu_update_parents_unsync(sp); | |
1094 | } | |
1095 | ||
d761a501 AK |
1096 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
1097 | struct kvm_mmu_page *sp) | |
1098 | { | |
1099 | int i; | |
1100 | ||
1101 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1102 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
1103 | } | |
1104 | ||
e8bc217a MT |
1105 | static int nonpaging_sync_page(struct kvm_vcpu *vcpu, |
1106 | struct kvm_mmu_page *sp) | |
1107 | { | |
1108 | return 1; | |
1109 | } | |
1110 | ||
a7052897 MT |
1111 | static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
1112 | { | |
1113 | } | |
1114 | ||
60c8aec6 MT |
1115 | #define KVM_PAGE_ARRAY_NR 16 |
1116 | ||
1117 | struct kvm_mmu_pages { | |
1118 | struct mmu_page_and_offset { | |
1119 | struct kvm_mmu_page *sp; | |
1120 | unsigned int idx; | |
1121 | } page[KVM_PAGE_ARRAY_NR]; | |
1122 | unsigned int nr; | |
1123 | }; | |
1124 | ||
0074ff63 MT |
1125 | #define for_each_unsync_children(bitmap, idx) \ |
1126 | for (idx = find_first_bit(bitmap, 512); \ | |
1127 | idx < 512; \ | |
1128 | idx = find_next_bit(bitmap, 512, idx+1)) | |
1129 | ||
cded19f3 HE |
1130 | static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp, |
1131 | int idx) | |
4731d4c7 | 1132 | { |
60c8aec6 | 1133 | int i; |
4731d4c7 | 1134 | |
60c8aec6 MT |
1135 | if (sp->unsync) |
1136 | for (i=0; i < pvec->nr; i++) | |
1137 | if (pvec->page[i].sp == sp) | |
1138 | return 0; | |
1139 | ||
1140 | pvec->page[pvec->nr].sp = sp; | |
1141 | pvec->page[pvec->nr].idx = idx; | |
1142 | pvec->nr++; | |
1143 | return (pvec->nr == KVM_PAGE_ARRAY_NR); | |
1144 | } | |
1145 | ||
1146 | static int __mmu_unsync_walk(struct kvm_mmu_page *sp, | |
1147 | struct kvm_mmu_pages *pvec) | |
1148 | { | |
1149 | int i, ret, nr_unsync_leaf = 0; | |
4731d4c7 | 1150 | |
0074ff63 | 1151 | for_each_unsync_children(sp->unsync_child_bitmap, i) { |
4731d4c7 MT |
1152 | u64 ent = sp->spt[i]; |
1153 | ||
87917239 | 1154 | if (is_shadow_present_pte(ent) && !is_large_pte(ent)) { |
4731d4c7 MT |
1155 | struct kvm_mmu_page *child; |
1156 | child = page_header(ent & PT64_BASE_ADDR_MASK); | |
1157 | ||
1158 | if (child->unsync_children) { | |
60c8aec6 MT |
1159 | if (mmu_pages_add(pvec, child, i)) |
1160 | return -ENOSPC; | |
1161 | ||
1162 | ret = __mmu_unsync_walk(child, pvec); | |
1163 | if (!ret) | |
1164 | __clear_bit(i, sp->unsync_child_bitmap); | |
1165 | else if (ret > 0) | |
1166 | nr_unsync_leaf += ret; | |
1167 | else | |
4731d4c7 MT |
1168 | return ret; |
1169 | } | |
1170 | ||
1171 | if (child->unsync) { | |
60c8aec6 MT |
1172 | nr_unsync_leaf++; |
1173 | if (mmu_pages_add(pvec, child, i)) | |
1174 | return -ENOSPC; | |
4731d4c7 MT |
1175 | } |
1176 | } | |
1177 | } | |
1178 | ||
0074ff63 | 1179 | if (find_first_bit(sp->unsync_child_bitmap, 512) == 512) |
4731d4c7 MT |
1180 | sp->unsync_children = 0; |
1181 | ||
60c8aec6 MT |
1182 | return nr_unsync_leaf; |
1183 | } | |
1184 | ||
1185 | static int mmu_unsync_walk(struct kvm_mmu_page *sp, | |
1186 | struct kvm_mmu_pages *pvec) | |
1187 | { | |
1188 | if (!sp->unsync_children) | |
1189 | return 0; | |
1190 | ||
1191 | mmu_pages_add(pvec, sp, 0); | |
1192 | return __mmu_unsync_walk(sp, pvec); | |
4731d4c7 MT |
1193 | } |
1194 | ||
4db35314 | 1195 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
1196 | { |
1197 | unsigned index; | |
1198 | struct hlist_head *bucket; | |
4db35314 | 1199 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
1200 | struct hlist_node *node; |
1201 | ||
b8688d51 | 1202 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 1203 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1204 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 1205 | hlist_for_each_entry(sp, node, bucket, hash_link) |
f6e2c02b | 1206 | if (sp->gfn == gfn && !sp->role.direct |
2e53d63a | 1207 | && !sp->role.invalid) { |
cea0f0e7 | 1208 | pgprintk("%s: found role %x\n", |
b8688d51 | 1209 | __func__, sp->role.word); |
4db35314 | 1210 | return sp; |
cea0f0e7 AK |
1211 | } |
1212 | return NULL; | |
1213 | } | |
1214 | ||
4731d4c7 MT |
1215 | static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
1216 | { | |
1217 | WARN_ON(!sp->unsync); | |
1218 | sp->unsync = 0; | |
1219 | --kvm->stat.mmu_unsync; | |
1220 | } | |
1221 | ||
1222 | static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp); | |
1223 | ||
1224 | static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) | |
1225 | { | |
1226 | if (sp->role.glevels != vcpu->arch.mmu.root_level) { | |
1227 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
1228 | return 1; | |
1229 | } | |
1230 | ||
f691fe1d | 1231 | trace_kvm_mmu_sync_page(sp); |
b1a36821 MT |
1232 | if (rmap_write_protect(vcpu->kvm, sp->gfn)) |
1233 | kvm_flush_remote_tlbs(vcpu->kvm); | |
0c0f40bd | 1234 | kvm_unlink_unsync_page(vcpu->kvm, sp); |
4731d4c7 MT |
1235 | if (vcpu->arch.mmu.sync_page(vcpu, sp)) { |
1236 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
1237 | return 1; | |
1238 | } | |
1239 | ||
1240 | kvm_mmu_flush_tlb(vcpu); | |
4731d4c7 MT |
1241 | return 0; |
1242 | } | |
1243 | ||
60c8aec6 MT |
1244 | struct mmu_page_path { |
1245 | struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1]; | |
1246 | unsigned int idx[PT64_ROOT_LEVEL-1]; | |
4731d4c7 MT |
1247 | }; |
1248 | ||
60c8aec6 MT |
1249 | #define for_each_sp(pvec, sp, parents, i) \ |
1250 | for (i = mmu_pages_next(&pvec, &parents, -1), \ | |
1251 | sp = pvec.page[i].sp; \ | |
1252 | i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \ | |
1253 | i = mmu_pages_next(&pvec, &parents, i)) | |
1254 | ||
cded19f3 HE |
1255 | static int mmu_pages_next(struct kvm_mmu_pages *pvec, |
1256 | struct mmu_page_path *parents, | |
1257 | int i) | |
60c8aec6 MT |
1258 | { |
1259 | int n; | |
1260 | ||
1261 | for (n = i+1; n < pvec->nr; n++) { | |
1262 | struct kvm_mmu_page *sp = pvec->page[n].sp; | |
1263 | ||
1264 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { | |
1265 | parents->idx[0] = pvec->page[n].idx; | |
1266 | return n; | |
1267 | } | |
1268 | ||
1269 | parents->parent[sp->role.level-2] = sp; | |
1270 | parents->idx[sp->role.level-1] = pvec->page[n].idx; | |
1271 | } | |
1272 | ||
1273 | return n; | |
1274 | } | |
1275 | ||
cded19f3 | 1276 | static void mmu_pages_clear_parents(struct mmu_page_path *parents) |
4731d4c7 | 1277 | { |
60c8aec6 MT |
1278 | struct kvm_mmu_page *sp; |
1279 | unsigned int level = 0; | |
1280 | ||
1281 | do { | |
1282 | unsigned int idx = parents->idx[level]; | |
4731d4c7 | 1283 | |
60c8aec6 MT |
1284 | sp = parents->parent[level]; |
1285 | if (!sp) | |
1286 | return; | |
1287 | ||
1288 | --sp->unsync_children; | |
1289 | WARN_ON((int)sp->unsync_children < 0); | |
1290 | __clear_bit(idx, sp->unsync_child_bitmap); | |
1291 | level++; | |
1292 | } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children); | |
4731d4c7 MT |
1293 | } |
1294 | ||
60c8aec6 MT |
1295 | static void kvm_mmu_pages_init(struct kvm_mmu_page *parent, |
1296 | struct mmu_page_path *parents, | |
1297 | struct kvm_mmu_pages *pvec) | |
4731d4c7 | 1298 | { |
60c8aec6 MT |
1299 | parents->parent[parent->role.level-1] = NULL; |
1300 | pvec->nr = 0; | |
1301 | } | |
4731d4c7 | 1302 | |
60c8aec6 MT |
1303 | static void mmu_sync_children(struct kvm_vcpu *vcpu, |
1304 | struct kvm_mmu_page *parent) | |
1305 | { | |
1306 | int i; | |
1307 | struct kvm_mmu_page *sp; | |
1308 | struct mmu_page_path parents; | |
1309 | struct kvm_mmu_pages pages; | |
1310 | ||
1311 | kvm_mmu_pages_init(parent, &parents, &pages); | |
1312 | while (mmu_unsync_walk(parent, &pages)) { | |
b1a36821 MT |
1313 | int protected = 0; |
1314 | ||
1315 | for_each_sp(pages, sp, parents, i) | |
1316 | protected |= rmap_write_protect(vcpu->kvm, sp->gfn); | |
1317 | ||
1318 | if (protected) | |
1319 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1320 | ||
60c8aec6 MT |
1321 | for_each_sp(pages, sp, parents, i) { |
1322 | kvm_sync_page(vcpu, sp); | |
1323 | mmu_pages_clear_parents(&parents); | |
1324 | } | |
4731d4c7 | 1325 | cond_resched_lock(&vcpu->kvm->mmu_lock); |
60c8aec6 MT |
1326 | kvm_mmu_pages_init(parent, &parents, &pages); |
1327 | } | |
4731d4c7 MT |
1328 | } |
1329 | ||
cea0f0e7 AK |
1330 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, |
1331 | gfn_t gfn, | |
1332 | gva_t gaddr, | |
1333 | unsigned level, | |
f6e2c02b | 1334 | int direct, |
41074d07 | 1335 | unsigned access, |
f7d9c7b7 | 1336 | u64 *parent_pte) |
cea0f0e7 AK |
1337 | { |
1338 | union kvm_mmu_page_role role; | |
1339 | unsigned index; | |
1340 | unsigned quadrant; | |
1341 | struct hlist_head *bucket; | |
4db35314 | 1342 | struct kvm_mmu_page *sp; |
4731d4c7 | 1343 | struct hlist_node *node, *tmp; |
cea0f0e7 | 1344 | |
a770f6f2 | 1345 | role = vcpu->arch.mmu.base_role; |
cea0f0e7 | 1346 | role.level = level; |
f6e2c02b | 1347 | role.direct = direct; |
41074d07 | 1348 | role.access = access; |
ad312c7c | 1349 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
1350 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
1351 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
1352 | role.quadrant = quadrant; | |
1353 | } | |
1ae0a13d | 1354 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1355 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4731d4c7 MT |
1356 | hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link) |
1357 | if (sp->gfn == gfn) { | |
1358 | if (sp->unsync) | |
1359 | if (kvm_sync_page(vcpu, sp)) | |
1360 | continue; | |
1361 | ||
1362 | if (sp->role.word != role.word) | |
1363 | continue; | |
1364 | ||
4db35314 | 1365 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); |
0074ff63 MT |
1366 | if (sp->unsync_children) { |
1367 | set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests); | |
1368 | kvm_mmu_mark_parents_unsync(vcpu, sp); | |
1369 | } | |
f691fe1d | 1370 | trace_kvm_mmu_get_page(sp, false); |
4db35314 | 1371 | return sp; |
cea0f0e7 | 1372 | } |
dfc5aa00 | 1373 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
1374 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
1375 | if (!sp) | |
1376 | return sp; | |
4db35314 AK |
1377 | sp->gfn = gfn; |
1378 | sp->role = role; | |
1379 | hlist_add_head(&sp->hash_link, bucket); | |
f6e2c02b | 1380 | if (!direct) { |
b1a36821 MT |
1381 | if (rmap_write_protect(vcpu->kvm, gfn)) |
1382 | kvm_flush_remote_tlbs(vcpu->kvm); | |
4731d4c7 MT |
1383 | account_shadowed(vcpu->kvm, gfn); |
1384 | } | |
131d8279 AK |
1385 | if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) |
1386 | vcpu->arch.mmu.prefetch_page(vcpu, sp); | |
1387 | else | |
1388 | nonpaging_prefetch_page(vcpu, sp); | |
f691fe1d | 1389 | trace_kvm_mmu_get_page(sp, true); |
4db35314 | 1390 | return sp; |
cea0f0e7 AK |
1391 | } |
1392 | ||
2d11123a AK |
1393 | static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator, |
1394 | struct kvm_vcpu *vcpu, u64 addr) | |
1395 | { | |
1396 | iterator->addr = addr; | |
1397 | iterator->shadow_addr = vcpu->arch.mmu.root_hpa; | |
1398 | iterator->level = vcpu->arch.mmu.shadow_root_level; | |
1399 | if (iterator->level == PT32E_ROOT_LEVEL) { | |
1400 | iterator->shadow_addr | |
1401 | = vcpu->arch.mmu.pae_root[(addr >> 30) & 3]; | |
1402 | iterator->shadow_addr &= PT64_BASE_ADDR_MASK; | |
1403 | --iterator->level; | |
1404 | if (!iterator->shadow_addr) | |
1405 | iterator->level = 0; | |
1406 | } | |
1407 | } | |
1408 | ||
1409 | static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator) | |
1410 | { | |
1411 | if (iterator->level < PT_PAGE_TABLE_LEVEL) | |
1412 | return false; | |
4d88954d MT |
1413 | |
1414 | if (iterator->level == PT_PAGE_TABLE_LEVEL) | |
1415 | if (is_large_pte(*iterator->sptep)) | |
1416 | return false; | |
1417 | ||
2d11123a AK |
1418 | iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level); |
1419 | iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index; | |
1420 | return true; | |
1421 | } | |
1422 | ||
1423 | static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator) | |
1424 | { | |
1425 | iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK; | |
1426 | --iterator->level; | |
1427 | } | |
1428 | ||
90cb0529 | 1429 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 1430 | struct kvm_mmu_page *sp) |
a436036b | 1431 | { |
697fe2e2 AK |
1432 | unsigned i; |
1433 | u64 *pt; | |
1434 | u64 ent; | |
1435 | ||
4db35314 | 1436 | pt = sp->spt; |
697fe2e2 | 1437 | |
697fe2e2 AK |
1438 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
1439 | ent = pt[i]; | |
1440 | ||
05da4558 | 1441 | if (is_shadow_present_pte(ent)) { |
776e6633 | 1442 | if (!is_last_spte(ent, sp->role.level)) { |
05da4558 MT |
1443 | ent &= PT64_BASE_ADDR_MASK; |
1444 | mmu_page_remove_parent_pte(page_header(ent), | |
1445 | &pt[i]); | |
1446 | } else { | |
776e6633 MT |
1447 | if (is_large_pte(ent)) |
1448 | --kvm->stat.lpages; | |
05da4558 MT |
1449 | rmap_remove(kvm, &pt[i]); |
1450 | } | |
1451 | } | |
c7addb90 | 1452 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 1453 | } |
a436036b AK |
1454 | } |
1455 | ||
4db35314 | 1456 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 1457 | { |
4db35314 | 1458 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
1459 | } |
1460 | ||
12b7d28f AK |
1461 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
1462 | { | |
1463 | int i; | |
988a2cae | 1464 | struct kvm_vcpu *vcpu; |
12b7d28f | 1465 | |
988a2cae GN |
1466 | kvm_for_each_vcpu(i, vcpu, kvm) |
1467 | vcpu->arch.last_pte_updated = NULL; | |
12b7d28f AK |
1468 | } |
1469 | ||
31aa2b44 | 1470 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
1471 | { |
1472 | u64 *parent_pte; | |
1473 | ||
4db35314 AK |
1474 | while (sp->multimapped || sp->parent_pte) { |
1475 | if (!sp->multimapped) | |
1476 | parent_pte = sp->parent_pte; | |
a436036b AK |
1477 | else { |
1478 | struct kvm_pte_chain *chain; | |
1479 | ||
4db35314 | 1480 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
1481 | struct kvm_pte_chain, link); |
1482 | parent_pte = chain->parent_ptes[0]; | |
1483 | } | |
697fe2e2 | 1484 | BUG_ON(!parent_pte); |
4db35314 | 1485 | kvm_mmu_put_page(sp, parent_pte); |
d555c333 | 1486 | __set_spte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 1487 | } |
31aa2b44 AK |
1488 | } |
1489 | ||
60c8aec6 MT |
1490 | static int mmu_zap_unsync_children(struct kvm *kvm, |
1491 | struct kvm_mmu_page *parent) | |
4731d4c7 | 1492 | { |
60c8aec6 MT |
1493 | int i, zapped = 0; |
1494 | struct mmu_page_path parents; | |
1495 | struct kvm_mmu_pages pages; | |
4731d4c7 | 1496 | |
60c8aec6 | 1497 | if (parent->role.level == PT_PAGE_TABLE_LEVEL) |
4731d4c7 | 1498 | return 0; |
60c8aec6 MT |
1499 | |
1500 | kvm_mmu_pages_init(parent, &parents, &pages); | |
1501 | while (mmu_unsync_walk(parent, &pages)) { | |
1502 | struct kvm_mmu_page *sp; | |
1503 | ||
1504 | for_each_sp(pages, sp, parents, i) { | |
1505 | kvm_mmu_zap_page(kvm, sp); | |
1506 | mmu_pages_clear_parents(&parents); | |
1507 | } | |
1508 | zapped += pages.nr; | |
1509 | kvm_mmu_pages_init(parent, &parents, &pages); | |
1510 | } | |
1511 | ||
1512 | return zapped; | |
4731d4c7 MT |
1513 | } |
1514 | ||
07385413 | 1515 | static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
31aa2b44 | 1516 | { |
4731d4c7 | 1517 | int ret; |
f691fe1d AK |
1518 | |
1519 | trace_kvm_mmu_zap_page(sp); | |
31aa2b44 | 1520 | ++kvm->stat.mmu_shadow_zapped; |
4731d4c7 | 1521 | ret = mmu_zap_unsync_children(kvm, sp); |
4db35314 | 1522 | kvm_mmu_page_unlink_children(kvm, sp); |
31aa2b44 | 1523 | kvm_mmu_unlink_parents(kvm, sp); |
5b5c6a5a | 1524 | kvm_flush_remote_tlbs(kvm); |
f6e2c02b | 1525 | if (!sp->role.invalid && !sp->role.direct) |
5b5c6a5a | 1526 | unaccount_shadowed(kvm, sp->gfn); |
4731d4c7 MT |
1527 | if (sp->unsync) |
1528 | kvm_unlink_unsync_page(kvm, sp); | |
4db35314 AK |
1529 | if (!sp->root_count) { |
1530 | hlist_del(&sp->hash_link); | |
1531 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 1532 | } else { |
2e53d63a | 1533 | sp->role.invalid = 1; |
5b5c6a5a | 1534 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
1535 | kvm_reload_remote_mmus(kvm); |
1536 | } | |
12b7d28f | 1537 | kvm_mmu_reset_last_pte_updated(kvm); |
4731d4c7 | 1538 | return ret; |
a436036b AK |
1539 | } |
1540 | ||
82ce2c96 IE |
1541 | /* |
1542 | * Changing the number of mmu pages allocated to the vm | |
1543 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
1544 | */ | |
1545 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
1546 | { | |
025dbbf3 MT |
1547 | int used_pages; |
1548 | ||
1549 | used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages; | |
1550 | used_pages = max(0, used_pages); | |
1551 | ||
82ce2c96 IE |
1552 | /* |
1553 | * If we set the number of mmu pages to be smaller be than the | |
1554 | * number of actived pages , we must to free some mmu pages before we | |
1555 | * change the value | |
1556 | */ | |
1557 | ||
025dbbf3 MT |
1558 | if (used_pages > kvm_nr_mmu_pages) { |
1559 | while (used_pages > kvm_nr_mmu_pages) { | |
82ce2c96 IE |
1560 | struct kvm_mmu_page *page; |
1561 | ||
f05e70ac | 1562 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
1563 | struct kvm_mmu_page, link); |
1564 | kvm_mmu_zap_page(kvm, page); | |
025dbbf3 | 1565 | used_pages--; |
82ce2c96 | 1566 | } |
f05e70ac | 1567 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
1568 | } |
1569 | else | |
f05e70ac ZX |
1570 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
1571 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 1572 | |
f05e70ac | 1573 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
1574 | } |
1575 | ||
f67a46f4 | 1576 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
1577 | { |
1578 | unsigned index; | |
1579 | struct hlist_head *bucket; | |
4db35314 | 1580 | struct kvm_mmu_page *sp; |
a436036b AK |
1581 | struct hlist_node *node, *n; |
1582 | int r; | |
1583 | ||
b8688d51 | 1584 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 1585 | r = 0; |
1ae0a13d | 1586 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1587 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 1588 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
f6e2c02b | 1589 | if (sp->gfn == gfn && !sp->role.direct) { |
b8688d51 | 1590 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 | 1591 | sp->role.word); |
a436036b | 1592 | r = 1; |
07385413 MT |
1593 | if (kvm_mmu_zap_page(kvm, sp)) |
1594 | n = bucket->first; | |
a436036b AK |
1595 | } |
1596 | return r; | |
cea0f0e7 AK |
1597 | } |
1598 | ||
f67a46f4 | 1599 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1600 | { |
4677a3b6 AK |
1601 | unsigned index; |
1602 | struct hlist_head *bucket; | |
4db35314 | 1603 | struct kvm_mmu_page *sp; |
4677a3b6 | 1604 | struct hlist_node *node, *nn; |
97a0a01e | 1605 | |
4677a3b6 AK |
1606 | index = kvm_page_table_hashfn(gfn); |
1607 | bucket = &kvm->arch.mmu_page_hash[index]; | |
1608 | hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) { | |
f6e2c02b | 1609 | if (sp->gfn == gfn && !sp->role.direct |
4677a3b6 AK |
1610 | && !sp->role.invalid) { |
1611 | pgprintk("%s: zap %lx %x\n", | |
1612 | __func__, gfn, sp->role.word); | |
1613 | kvm_mmu_zap_page(kvm, sp); | |
1614 | } | |
97a0a01e AK |
1615 | } |
1616 | } | |
1617 | ||
38c335f1 | 1618 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1619 | { |
38c335f1 | 1620 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 1621 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1622 | |
291f26bc | 1623 | __set_bit(slot, sp->slot_bitmap); |
6aa8b732 AK |
1624 | } |
1625 | ||
6844dec6 MT |
1626 | static void mmu_convert_notrap(struct kvm_mmu_page *sp) |
1627 | { | |
1628 | int i; | |
1629 | u64 *pt = sp->spt; | |
1630 | ||
1631 | if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte) | |
1632 | return; | |
1633 | ||
1634 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1635 | if (pt[i] == shadow_notrap_nonpresent_pte) | |
d555c333 | 1636 | __set_spte(&pt[i], shadow_trap_nonpresent_pte); |
6844dec6 MT |
1637 | } |
1638 | } | |
1639 | ||
039576c0 AK |
1640 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1641 | { | |
72dc67a6 IE |
1642 | struct page *page; |
1643 | ||
ad312c7c | 1644 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1645 | |
1646 | if (gpa == UNMAPPED_GVA) | |
1647 | return NULL; | |
72dc67a6 | 1648 | |
72dc67a6 | 1649 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
72dc67a6 IE |
1650 | |
1651 | return page; | |
039576c0 AK |
1652 | } |
1653 | ||
74be52e3 SY |
1654 | /* |
1655 | * The function is based on mtrr_type_lookup() in | |
1656 | * arch/x86/kernel/cpu/mtrr/generic.c | |
1657 | */ | |
1658 | static int get_mtrr_type(struct mtrr_state_type *mtrr_state, | |
1659 | u64 start, u64 end) | |
1660 | { | |
1661 | int i; | |
1662 | u64 base, mask; | |
1663 | u8 prev_match, curr_match; | |
1664 | int num_var_ranges = KVM_NR_VAR_MTRR; | |
1665 | ||
1666 | if (!mtrr_state->enabled) | |
1667 | return 0xFF; | |
1668 | ||
1669 | /* Make end inclusive end, instead of exclusive */ | |
1670 | end--; | |
1671 | ||
1672 | /* Look in fixed ranges. Just return the type as per start */ | |
1673 | if (mtrr_state->have_fixed && (start < 0x100000)) { | |
1674 | int idx; | |
1675 | ||
1676 | if (start < 0x80000) { | |
1677 | idx = 0; | |
1678 | idx += (start >> 16); | |
1679 | return mtrr_state->fixed_ranges[idx]; | |
1680 | } else if (start < 0xC0000) { | |
1681 | idx = 1 * 8; | |
1682 | idx += ((start - 0x80000) >> 14); | |
1683 | return mtrr_state->fixed_ranges[idx]; | |
1684 | } else if (start < 0x1000000) { | |
1685 | idx = 3 * 8; | |
1686 | idx += ((start - 0xC0000) >> 12); | |
1687 | return mtrr_state->fixed_ranges[idx]; | |
1688 | } | |
1689 | } | |
1690 | ||
1691 | /* | |
1692 | * Look in variable ranges | |
1693 | * Look of multiple ranges matching this address and pick type | |
1694 | * as per MTRR precedence | |
1695 | */ | |
1696 | if (!(mtrr_state->enabled & 2)) | |
1697 | return mtrr_state->def_type; | |
1698 | ||
1699 | prev_match = 0xFF; | |
1700 | for (i = 0; i < num_var_ranges; ++i) { | |
1701 | unsigned short start_state, end_state; | |
1702 | ||
1703 | if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11))) | |
1704 | continue; | |
1705 | ||
1706 | base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) + | |
1707 | (mtrr_state->var_ranges[i].base_lo & PAGE_MASK); | |
1708 | mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) + | |
1709 | (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK); | |
1710 | ||
1711 | start_state = ((start & mask) == (base & mask)); | |
1712 | end_state = ((end & mask) == (base & mask)); | |
1713 | if (start_state != end_state) | |
1714 | return 0xFE; | |
1715 | ||
1716 | if ((start & mask) != (base & mask)) | |
1717 | continue; | |
1718 | ||
1719 | curr_match = mtrr_state->var_ranges[i].base_lo & 0xff; | |
1720 | if (prev_match == 0xFF) { | |
1721 | prev_match = curr_match; | |
1722 | continue; | |
1723 | } | |
1724 | ||
1725 | if (prev_match == MTRR_TYPE_UNCACHABLE || | |
1726 | curr_match == MTRR_TYPE_UNCACHABLE) | |
1727 | return MTRR_TYPE_UNCACHABLE; | |
1728 | ||
1729 | if ((prev_match == MTRR_TYPE_WRBACK && | |
1730 | curr_match == MTRR_TYPE_WRTHROUGH) || | |
1731 | (prev_match == MTRR_TYPE_WRTHROUGH && | |
1732 | curr_match == MTRR_TYPE_WRBACK)) { | |
1733 | prev_match = MTRR_TYPE_WRTHROUGH; | |
1734 | curr_match = MTRR_TYPE_WRTHROUGH; | |
1735 | } | |
1736 | ||
1737 | if (prev_match != curr_match) | |
1738 | return MTRR_TYPE_UNCACHABLE; | |
1739 | } | |
1740 | ||
1741 | if (prev_match != 0xFF) | |
1742 | return prev_match; | |
1743 | ||
1744 | return mtrr_state->def_type; | |
1745 | } | |
1746 | ||
4b12f0de | 1747 | u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn) |
74be52e3 SY |
1748 | { |
1749 | u8 mtrr; | |
1750 | ||
1751 | mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT, | |
1752 | (gfn << PAGE_SHIFT) + PAGE_SIZE); | |
1753 | if (mtrr == 0xfe || mtrr == 0xff) | |
1754 | mtrr = MTRR_TYPE_WRBACK; | |
1755 | return mtrr; | |
1756 | } | |
4b12f0de | 1757 | EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type); |
74be52e3 | 1758 | |
4731d4c7 MT |
1759 | static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp) |
1760 | { | |
1761 | unsigned index; | |
1762 | struct hlist_head *bucket; | |
1763 | struct kvm_mmu_page *s; | |
1764 | struct hlist_node *node, *n; | |
1765 | ||
f691fe1d | 1766 | trace_kvm_mmu_unsync_page(sp); |
4731d4c7 MT |
1767 | index = kvm_page_table_hashfn(sp->gfn); |
1768 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; | |
1769 | /* don't unsync if pagetable is shadowed with multiple roles */ | |
1770 | hlist_for_each_entry_safe(s, node, n, bucket, hash_link) { | |
f6e2c02b | 1771 | if (s->gfn != sp->gfn || s->role.direct) |
4731d4c7 MT |
1772 | continue; |
1773 | if (s->role.word != sp->role.word) | |
1774 | return 1; | |
1775 | } | |
4731d4c7 MT |
1776 | ++vcpu->kvm->stat.mmu_unsync; |
1777 | sp->unsync = 1; | |
6cffe8ca | 1778 | |
c2d0ee46 | 1779 | kvm_mmu_mark_parents_unsync(vcpu, sp); |
6cffe8ca | 1780 | |
4731d4c7 MT |
1781 | mmu_convert_notrap(sp); |
1782 | return 0; | |
1783 | } | |
1784 | ||
1785 | static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn, | |
1786 | bool can_unsync) | |
1787 | { | |
1788 | struct kvm_mmu_page *shadow; | |
1789 | ||
1790 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
1791 | if (shadow) { | |
1792 | if (shadow->role.level != PT_PAGE_TABLE_LEVEL) | |
1793 | return 1; | |
1794 | if (shadow->unsync) | |
1795 | return 0; | |
582801a9 | 1796 | if (can_unsync && oos_shadow) |
4731d4c7 MT |
1797 | return kvm_unsync_page(vcpu, shadow); |
1798 | return 1; | |
1799 | } | |
1800 | return 0; | |
1801 | } | |
1802 | ||
d555c333 | 1803 | static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, |
1e73f9dd | 1804 | unsigned pte_access, int user_fault, |
852e3c19 | 1805 | int write_fault, int dirty, int level, |
c2d0ee46 | 1806 | gfn_t gfn, pfn_t pfn, bool speculative, |
1403283a | 1807 | bool can_unsync, bool reset_host_protection) |
1c4f1fd6 AK |
1808 | { |
1809 | u64 spte; | |
1e73f9dd | 1810 | int ret = 0; |
64d4d521 | 1811 | |
1c4f1fd6 AK |
1812 | /* |
1813 | * We don't set the accessed bit, since we sometimes want to see | |
1814 | * whether the guest actually used the pte (in order to detect | |
1815 | * demand paging). | |
1816 | */ | |
7b52345e | 1817 | spte = shadow_base_present_pte | shadow_dirty_mask; |
947da538 | 1818 | if (!speculative) |
3201b5d9 | 1819 | spte |= shadow_accessed_mask; |
1c4f1fd6 AK |
1820 | if (!dirty) |
1821 | pte_access &= ~ACC_WRITE_MASK; | |
7b52345e SY |
1822 | if (pte_access & ACC_EXEC_MASK) |
1823 | spte |= shadow_x_mask; | |
1824 | else | |
1825 | spte |= shadow_nx_mask; | |
1c4f1fd6 | 1826 | if (pte_access & ACC_USER_MASK) |
7b52345e | 1827 | spte |= shadow_user_mask; |
852e3c19 | 1828 | if (level > PT_PAGE_TABLE_LEVEL) |
05da4558 | 1829 | spte |= PT_PAGE_SIZE_MASK; |
4b12f0de SY |
1830 | if (tdp_enabled) |
1831 | spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn, | |
1832 | kvm_is_mmio_pfn(pfn)); | |
1c4f1fd6 | 1833 | |
1403283a IE |
1834 | if (reset_host_protection) |
1835 | spte |= SPTE_HOST_WRITEABLE; | |
1836 | ||
35149e21 | 1837 | spte |= (u64)pfn << PAGE_SHIFT; |
1c4f1fd6 AK |
1838 | |
1839 | if ((pte_access & ACC_WRITE_MASK) | |
1840 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1c4f1fd6 | 1841 | |
852e3c19 JR |
1842 | if (level > PT_PAGE_TABLE_LEVEL && |
1843 | has_wrprotected_page(vcpu->kvm, gfn, level)) { | |
38187c83 MT |
1844 | ret = 1; |
1845 | spte = shadow_trap_nonpresent_pte; | |
1846 | goto set_pte; | |
1847 | } | |
1848 | ||
1c4f1fd6 | 1849 | spte |= PT_WRITABLE_MASK; |
1c4f1fd6 | 1850 | |
ecc5589f MT |
1851 | /* |
1852 | * Optimization: for pte sync, if spte was writable the hash | |
1853 | * lookup is unnecessary (and expensive). Write protection | |
1854 | * is responsibility of mmu_get_page / kvm_sync_page. | |
1855 | * Same reasoning can be applied to dirty page accounting. | |
1856 | */ | |
d555c333 | 1857 | if (!can_unsync && is_writeble_pte(*sptep)) |
ecc5589f MT |
1858 | goto set_pte; |
1859 | ||
4731d4c7 | 1860 | if (mmu_need_write_protect(vcpu, gfn, can_unsync)) { |
1c4f1fd6 | 1861 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1862 | __func__, gfn); |
1e73f9dd | 1863 | ret = 1; |
1c4f1fd6 | 1864 | pte_access &= ~ACC_WRITE_MASK; |
a378b4e6 | 1865 | if (is_writeble_pte(spte)) |
1c4f1fd6 | 1866 | spte &= ~PT_WRITABLE_MASK; |
1c4f1fd6 AK |
1867 | } |
1868 | } | |
1869 | ||
1c4f1fd6 AK |
1870 | if (pte_access & ACC_WRITE_MASK) |
1871 | mark_page_dirty(vcpu->kvm, gfn); | |
1872 | ||
38187c83 | 1873 | set_pte: |
d555c333 | 1874 | __set_spte(sptep, spte); |
1e73f9dd MT |
1875 | return ret; |
1876 | } | |
1877 | ||
d555c333 | 1878 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, |
1e73f9dd MT |
1879 | unsigned pt_access, unsigned pte_access, |
1880 | int user_fault, int write_fault, int dirty, | |
852e3c19 | 1881 | int *ptwrite, int level, gfn_t gfn, |
1403283a IE |
1882 | pfn_t pfn, bool speculative, |
1883 | bool reset_host_protection) | |
1e73f9dd MT |
1884 | { |
1885 | int was_rmapped = 0; | |
d555c333 | 1886 | int was_writeble = is_writeble_pte(*sptep); |
53a27b39 | 1887 | int rmap_count; |
1e73f9dd MT |
1888 | |
1889 | pgprintk("%s: spte %llx access %x write_fault %d" | |
1890 | " user_fault %d gfn %lx\n", | |
d555c333 | 1891 | __func__, *sptep, pt_access, |
1e73f9dd MT |
1892 | write_fault, user_fault, gfn); |
1893 | ||
d555c333 | 1894 | if (is_rmap_spte(*sptep)) { |
1e73f9dd MT |
1895 | /* |
1896 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1897 | * the parent of the now unreachable PTE. | |
1898 | */ | |
852e3c19 JR |
1899 | if (level > PT_PAGE_TABLE_LEVEL && |
1900 | !is_large_pte(*sptep)) { | |
1e73f9dd | 1901 | struct kvm_mmu_page *child; |
d555c333 | 1902 | u64 pte = *sptep; |
1e73f9dd MT |
1903 | |
1904 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
d555c333 AK |
1905 | mmu_page_remove_parent_pte(child, sptep); |
1906 | } else if (pfn != spte_to_pfn(*sptep)) { | |
1e73f9dd | 1907 | pgprintk("hfn old %lx new %lx\n", |
d555c333 AK |
1908 | spte_to_pfn(*sptep), pfn); |
1909 | rmap_remove(vcpu->kvm, sptep); | |
6bed6b9e JR |
1910 | } else |
1911 | was_rmapped = 1; | |
1e73f9dd | 1912 | } |
852e3c19 | 1913 | |
d555c333 | 1914 | if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault, |
1403283a IE |
1915 | dirty, level, gfn, pfn, speculative, true, |
1916 | reset_host_protection)) { | |
1e73f9dd MT |
1917 | if (write_fault) |
1918 | *ptwrite = 1; | |
a378b4e6 MT |
1919 | kvm_x86_ops->tlb_flush(vcpu); |
1920 | } | |
1e73f9dd | 1921 | |
d555c333 | 1922 | pgprintk("%s: setting spte %llx\n", __func__, *sptep); |
1e73f9dd | 1923 | pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n", |
d555c333 | 1924 | is_large_pte(*sptep)? "2MB" : "4kB", |
a205bc19 JR |
1925 | *sptep & PT_PRESENT_MASK ?"RW":"R", gfn, |
1926 | *sptep, sptep); | |
d555c333 | 1927 | if (!was_rmapped && is_large_pte(*sptep)) |
05da4558 MT |
1928 | ++vcpu->kvm->stat.lpages; |
1929 | ||
d555c333 | 1930 | page_header_update_slot(vcpu->kvm, sptep, gfn); |
1c4f1fd6 | 1931 | if (!was_rmapped) { |
44ad9944 | 1932 | rmap_count = rmap_add(vcpu, sptep, gfn); |
acb66dd0 | 1933 | kvm_release_pfn_clean(pfn); |
53a27b39 | 1934 | if (rmap_count > RMAP_RECYCLE_THRESHOLD) |
852e3c19 | 1935 | rmap_recycle(vcpu, sptep, gfn); |
75e68e60 IE |
1936 | } else { |
1937 | if (was_writeble) | |
35149e21 | 1938 | kvm_release_pfn_dirty(pfn); |
75e68e60 | 1939 | else |
35149e21 | 1940 | kvm_release_pfn_clean(pfn); |
1c4f1fd6 | 1941 | } |
1b7fcd32 | 1942 | if (speculative) { |
d555c333 | 1943 | vcpu->arch.last_pte_updated = sptep; |
1b7fcd32 AK |
1944 | vcpu->arch.last_pte_gfn = gfn; |
1945 | } | |
1c4f1fd6 AK |
1946 | } |
1947 | ||
6aa8b732 AK |
1948 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1949 | { | |
1950 | } | |
1951 | ||
9f652d21 | 1952 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, |
852e3c19 | 1953 | int level, gfn_t gfn, pfn_t pfn) |
140754bc | 1954 | { |
9f652d21 | 1955 | struct kvm_shadow_walk_iterator iterator; |
140754bc | 1956 | struct kvm_mmu_page *sp; |
9f652d21 | 1957 | int pt_write = 0; |
140754bc | 1958 | gfn_t pseudo_gfn; |
6aa8b732 | 1959 | |
9f652d21 | 1960 | for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) { |
852e3c19 | 1961 | if (iterator.level == level) { |
9f652d21 AK |
1962 | mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL, |
1963 | 0, write, 1, &pt_write, | |
1403283a | 1964 | level, gfn, pfn, false, true); |
9f652d21 AK |
1965 | ++vcpu->stat.pf_fixed; |
1966 | break; | |
6aa8b732 AK |
1967 | } |
1968 | ||
9f652d21 AK |
1969 | if (*iterator.sptep == shadow_trap_nonpresent_pte) { |
1970 | pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
1971 | sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr, | |
1972 | iterator.level - 1, | |
1973 | 1, ACC_ALL, iterator.sptep); | |
1974 | if (!sp) { | |
1975 | pgprintk("nonpaging_map: ENOMEM\n"); | |
1976 | kvm_release_pfn_clean(pfn); | |
1977 | return -ENOMEM; | |
1978 | } | |
140754bc | 1979 | |
d555c333 AK |
1980 | __set_spte(iterator.sptep, |
1981 | __pa(sp->spt) | |
1982 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
1983 | | shadow_user_mask | shadow_x_mask); | |
9f652d21 AK |
1984 | } |
1985 | } | |
1986 | return pt_write; | |
6aa8b732 AK |
1987 | } |
1988 | ||
10589a46 MT |
1989 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1990 | { | |
1991 | int r; | |
852e3c19 | 1992 | int level; |
35149e21 | 1993 | pfn_t pfn; |
e930bffe | 1994 | unsigned long mmu_seq; |
aaee2c94 | 1995 | |
852e3c19 JR |
1996 | level = mapping_level(vcpu, gfn); |
1997 | ||
1998 | /* | |
1999 | * This path builds a PAE pagetable - so we can map 2mb pages at | |
2000 | * maximum. Therefore check if the level is larger than that. | |
2001 | */ | |
2002 | if (level > PT_DIRECTORY_LEVEL) | |
2003 | level = PT_DIRECTORY_LEVEL; | |
2004 | ||
2005 | gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1); | |
05da4558 | 2006 | |
e930bffe | 2007 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 2008 | smp_rmb(); |
35149e21 | 2009 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
aaee2c94 | 2010 | |
d196e343 | 2011 | /* mmio */ |
35149e21 AL |
2012 | if (is_error_pfn(pfn)) { |
2013 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
2014 | return 1; |
2015 | } | |
2016 | ||
aaee2c94 | 2017 | spin_lock(&vcpu->kvm->mmu_lock); |
e930bffe AA |
2018 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
2019 | goto out_unlock; | |
eb787d10 | 2020 | kvm_mmu_free_some_pages(vcpu); |
852e3c19 | 2021 | r = __direct_map(vcpu, v, write, level, gfn, pfn); |
aaee2c94 MT |
2022 | spin_unlock(&vcpu->kvm->mmu_lock); |
2023 | ||
aaee2c94 | 2024 | |
10589a46 | 2025 | return r; |
e930bffe AA |
2026 | |
2027 | out_unlock: | |
2028 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2029 | kvm_release_pfn_clean(pfn); | |
2030 | return 0; | |
10589a46 MT |
2031 | } |
2032 | ||
2033 | ||
17ac10ad AK |
2034 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
2035 | { | |
2036 | int i; | |
4db35314 | 2037 | struct kvm_mmu_page *sp; |
17ac10ad | 2038 | |
ad312c7c | 2039 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 2040 | return; |
aaee2c94 | 2041 | spin_lock(&vcpu->kvm->mmu_lock); |
ad312c7c ZX |
2042 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
2043 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 2044 | |
4db35314 AK |
2045 | sp = page_header(root); |
2046 | --sp->root_count; | |
2e53d63a MT |
2047 | if (!sp->root_count && sp->role.invalid) |
2048 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 2049 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 2050 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
2051 | return; |
2052 | } | |
17ac10ad | 2053 | for (i = 0; i < 4; ++i) { |
ad312c7c | 2054 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 2055 | |
417726a3 | 2056 | if (root) { |
417726a3 | 2057 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
2058 | sp = page_header(root); |
2059 | --sp->root_count; | |
2e53d63a MT |
2060 | if (!sp->root_count && sp->role.invalid) |
2061 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 2062 | } |
ad312c7c | 2063 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2064 | } |
aaee2c94 | 2065 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 2066 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
2067 | } |
2068 | ||
8986ecc0 MT |
2069 | static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn) |
2070 | { | |
2071 | int ret = 0; | |
2072 | ||
2073 | if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) { | |
2074 | set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests); | |
2075 | ret = 1; | |
2076 | } | |
2077 | ||
2078 | return ret; | |
2079 | } | |
2080 | ||
2081 | static int mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
17ac10ad AK |
2082 | { |
2083 | int i; | |
cea0f0e7 | 2084 | gfn_t root_gfn; |
4db35314 | 2085 | struct kvm_mmu_page *sp; |
f6e2c02b | 2086 | int direct = 0; |
6de4f3ad | 2087 | u64 pdptr; |
3bb65a22 | 2088 | |
ad312c7c | 2089 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad | 2090 | |
ad312c7c ZX |
2091 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
2092 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
2093 | |
2094 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 | 2095 | if (tdp_enabled) |
f6e2c02b | 2096 | direct = 1; |
8986ecc0 MT |
2097 | if (mmu_check_root(vcpu, root_gfn)) |
2098 | return 1; | |
4db35314 | 2099 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
f6e2c02b | 2100 | PT64_ROOT_LEVEL, direct, |
fb72d167 | 2101 | ACC_ALL, NULL); |
4db35314 AK |
2102 | root = __pa(sp->spt); |
2103 | ++sp->root_count; | |
ad312c7c | 2104 | vcpu->arch.mmu.root_hpa = root; |
8986ecc0 | 2105 | return 0; |
17ac10ad | 2106 | } |
f6e2c02b | 2107 | direct = !is_paging(vcpu); |
fb72d167 | 2108 | if (tdp_enabled) |
f6e2c02b | 2109 | direct = 1; |
17ac10ad | 2110 | for (i = 0; i < 4; ++i) { |
ad312c7c | 2111 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
2112 | |
2113 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c | 2114 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
6de4f3ad | 2115 | pdptr = kvm_pdptr_read(vcpu, i); |
43a3795a | 2116 | if (!is_present_gpte(pdptr)) { |
ad312c7c | 2117 | vcpu->arch.mmu.pae_root[i] = 0; |
417726a3 AK |
2118 | continue; |
2119 | } | |
6de4f3ad | 2120 | root_gfn = pdptr >> PAGE_SHIFT; |
ad312c7c | 2121 | } else if (vcpu->arch.mmu.root_level == 0) |
cea0f0e7 | 2122 | root_gfn = 0; |
8986ecc0 MT |
2123 | if (mmu_check_root(vcpu, root_gfn)) |
2124 | return 1; | |
4db35314 | 2125 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
f6e2c02b | 2126 | PT32_ROOT_LEVEL, direct, |
f7d9c7b7 | 2127 | ACC_ALL, NULL); |
4db35314 AK |
2128 | root = __pa(sp->spt); |
2129 | ++sp->root_count; | |
ad312c7c | 2130 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 2131 | } |
ad312c7c | 2132 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
8986ecc0 | 2133 | return 0; |
17ac10ad AK |
2134 | } |
2135 | ||
0ba73cda MT |
2136 | static void mmu_sync_roots(struct kvm_vcpu *vcpu) |
2137 | { | |
2138 | int i; | |
2139 | struct kvm_mmu_page *sp; | |
2140 | ||
2141 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) | |
2142 | return; | |
2143 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
2144 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
2145 | sp = page_header(root); | |
2146 | mmu_sync_children(vcpu, sp); | |
2147 | return; | |
2148 | } | |
2149 | for (i = 0; i < 4; ++i) { | |
2150 | hpa_t root = vcpu->arch.mmu.pae_root[i]; | |
2151 | ||
8986ecc0 | 2152 | if (root && VALID_PAGE(root)) { |
0ba73cda MT |
2153 | root &= PT64_BASE_ADDR_MASK; |
2154 | sp = page_header(root); | |
2155 | mmu_sync_children(vcpu, sp); | |
2156 | } | |
2157 | } | |
2158 | } | |
2159 | ||
2160 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu) | |
2161 | { | |
2162 | spin_lock(&vcpu->kvm->mmu_lock); | |
2163 | mmu_sync_roots(vcpu); | |
6cffe8ca | 2164 | spin_unlock(&vcpu->kvm->mmu_lock); |
0ba73cda MT |
2165 | } |
2166 | ||
6aa8b732 AK |
2167 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
2168 | { | |
2169 | return vaddr; | |
2170 | } | |
2171 | ||
2172 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 2173 | u32 error_code) |
6aa8b732 | 2174 | { |
e833240f | 2175 | gfn_t gfn; |
e2dec939 | 2176 | int r; |
6aa8b732 | 2177 | |
b8688d51 | 2178 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
2179 | r = mmu_topup_memory_caches(vcpu); |
2180 | if (r) | |
2181 | return r; | |
714b93da | 2182 | |
6aa8b732 | 2183 | ASSERT(vcpu); |
ad312c7c | 2184 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2185 | |
e833240f | 2186 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 2187 | |
e833240f AK |
2188 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
2189 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
2190 | } |
2191 | ||
fb72d167 JR |
2192 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
2193 | u32 error_code) | |
2194 | { | |
35149e21 | 2195 | pfn_t pfn; |
fb72d167 | 2196 | int r; |
852e3c19 | 2197 | int level; |
05da4558 | 2198 | gfn_t gfn = gpa >> PAGE_SHIFT; |
e930bffe | 2199 | unsigned long mmu_seq; |
fb72d167 JR |
2200 | |
2201 | ASSERT(vcpu); | |
2202 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
2203 | ||
2204 | r = mmu_topup_memory_caches(vcpu); | |
2205 | if (r) | |
2206 | return r; | |
2207 | ||
852e3c19 JR |
2208 | level = mapping_level(vcpu, gfn); |
2209 | ||
2210 | gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1); | |
2211 | ||
e930bffe | 2212 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 2213 | smp_rmb(); |
35149e21 | 2214 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
35149e21 AL |
2215 | if (is_error_pfn(pfn)) { |
2216 | kvm_release_pfn_clean(pfn); | |
fb72d167 JR |
2217 | return 1; |
2218 | } | |
2219 | spin_lock(&vcpu->kvm->mmu_lock); | |
e930bffe AA |
2220 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
2221 | goto out_unlock; | |
fb72d167 JR |
2222 | kvm_mmu_free_some_pages(vcpu); |
2223 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
852e3c19 | 2224 | level, gfn, pfn); |
fb72d167 | 2225 | spin_unlock(&vcpu->kvm->mmu_lock); |
fb72d167 JR |
2226 | |
2227 | return r; | |
e930bffe AA |
2228 | |
2229 | out_unlock: | |
2230 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2231 | kvm_release_pfn_clean(pfn); | |
2232 | return 0; | |
fb72d167 JR |
2233 | } |
2234 | ||
6aa8b732 AK |
2235 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
2236 | { | |
17ac10ad | 2237 | mmu_free_roots(vcpu); |
6aa8b732 AK |
2238 | } |
2239 | ||
2240 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
2241 | { | |
ad312c7c | 2242 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
2243 | |
2244 | context->new_cr3 = nonpaging_new_cr3; | |
2245 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
2246 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
2247 | context->free = nonpaging_free; | |
c7addb90 | 2248 | context->prefetch_page = nonpaging_prefetch_page; |
e8bc217a | 2249 | context->sync_page = nonpaging_sync_page; |
a7052897 | 2250 | context->invlpg = nonpaging_invlpg; |
cea0f0e7 | 2251 | context->root_level = 0; |
6aa8b732 | 2252 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 2253 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
2254 | return 0; |
2255 | } | |
2256 | ||
d835dfec | 2257 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 2258 | { |
1165f5fe | 2259 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 2260 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
2261 | } |
2262 | ||
2263 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
2264 | { | |
b8688d51 | 2265 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 2266 | mmu_free_roots(vcpu); |
6aa8b732 AK |
2267 | } |
2268 | ||
6aa8b732 AK |
2269 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
2270 | u64 addr, | |
2271 | u32 err_code) | |
2272 | { | |
c3c91fee | 2273 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
2274 | } |
2275 | ||
6aa8b732 AK |
2276 | static void paging_free(struct kvm_vcpu *vcpu) |
2277 | { | |
2278 | nonpaging_free(vcpu); | |
2279 | } | |
2280 | ||
82725b20 DE |
2281 | static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level) |
2282 | { | |
2283 | int bit7; | |
2284 | ||
2285 | bit7 = (gpte >> 7) & 1; | |
2286 | return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0; | |
2287 | } | |
2288 | ||
6aa8b732 AK |
2289 | #define PTTYPE 64 |
2290 | #include "paging_tmpl.h" | |
2291 | #undef PTTYPE | |
2292 | ||
2293 | #define PTTYPE 32 | |
2294 | #include "paging_tmpl.h" | |
2295 | #undef PTTYPE | |
2296 | ||
82725b20 DE |
2297 | static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level) |
2298 | { | |
2299 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
2300 | int maxphyaddr = cpuid_maxphyaddr(vcpu); | |
2301 | u64 exb_bit_rsvd = 0; | |
2302 | ||
2303 | if (!is_nx(vcpu)) | |
2304 | exb_bit_rsvd = rsvd_bits(63, 63); | |
2305 | switch (level) { | |
2306 | case PT32_ROOT_LEVEL: | |
2307 | /* no rsvd bits for 2 level 4K page table entries */ | |
2308 | context->rsvd_bits_mask[0][1] = 0; | |
2309 | context->rsvd_bits_mask[0][0] = 0; | |
2310 | if (is_cpuid_PSE36()) | |
2311 | /* 36bits PSE 4MB page */ | |
2312 | context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21); | |
2313 | else | |
2314 | /* 32 bits PSE 4MB page */ | |
2315 | context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21); | |
29a4b933 | 2316 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; |
82725b20 DE |
2317 | break; |
2318 | case PT32E_ROOT_LEVEL: | |
20c466b5 DE |
2319 | context->rsvd_bits_mask[0][2] = |
2320 | rsvd_bits(maxphyaddr, 63) | | |
2321 | rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */ | |
82725b20 | 2322 | context->rsvd_bits_mask[0][1] = exb_bit_rsvd | |
4c26b4cd | 2323 | rsvd_bits(maxphyaddr, 62); /* PDE */ |
82725b20 DE |
2324 | context->rsvd_bits_mask[0][0] = exb_bit_rsvd | |
2325 | rsvd_bits(maxphyaddr, 62); /* PTE */ | |
2326 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | | |
2327 | rsvd_bits(maxphyaddr, 62) | | |
2328 | rsvd_bits(13, 20); /* large page */ | |
29a4b933 | 2329 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; |
82725b20 DE |
2330 | break; |
2331 | case PT64_ROOT_LEVEL: | |
2332 | context->rsvd_bits_mask[0][3] = exb_bit_rsvd | | |
2333 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); | |
2334 | context->rsvd_bits_mask[0][2] = exb_bit_rsvd | | |
2335 | rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); | |
2336 | context->rsvd_bits_mask[0][1] = exb_bit_rsvd | | |
4c26b4cd | 2337 | rsvd_bits(maxphyaddr, 51); |
82725b20 DE |
2338 | context->rsvd_bits_mask[0][0] = exb_bit_rsvd | |
2339 | rsvd_bits(maxphyaddr, 51); | |
2340 | context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3]; | |
e04da980 JR |
2341 | context->rsvd_bits_mask[1][2] = exb_bit_rsvd | |
2342 | rsvd_bits(maxphyaddr, 51) | | |
2343 | rsvd_bits(13, 29); | |
82725b20 | 2344 | context->rsvd_bits_mask[1][1] = exb_bit_rsvd | |
4c26b4cd SY |
2345 | rsvd_bits(maxphyaddr, 51) | |
2346 | rsvd_bits(13, 20); /* large page */ | |
29a4b933 | 2347 | context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0]; |
82725b20 DE |
2348 | break; |
2349 | } | |
2350 | } | |
2351 | ||
17ac10ad | 2352 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 2353 | { |
ad312c7c | 2354 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
2355 | |
2356 | ASSERT(is_pae(vcpu)); | |
2357 | context->new_cr3 = paging_new_cr3; | |
2358 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 2359 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 2360 | context->prefetch_page = paging64_prefetch_page; |
e8bc217a | 2361 | context->sync_page = paging64_sync_page; |
a7052897 | 2362 | context->invlpg = paging64_invlpg; |
6aa8b732 | 2363 | context->free = paging_free; |
17ac10ad AK |
2364 | context->root_level = level; |
2365 | context->shadow_root_level = level; | |
17c3ba9d | 2366 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
2367 | return 0; |
2368 | } | |
2369 | ||
17ac10ad AK |
2370 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
2371 | { | |
82725b20 | 2372 | reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL); |
17ac10ad AK |
2373 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); |
2374 | } | |
2375 | ||
6aa8b732 AK |
2376 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
2377 | { | |
ad312c7c | 2378 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 | 2379 | |
82725b20 | 2380 | reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL); |
6aa8b732 AK |
2381 | context->new_cr3 = paging_new_cr3; |
2382 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
2383 | context->gva_to_gpa = paging32_gva_to_gpa; |
2384 | context->free = paging_free; | |
c7addb90 | 2385 | context->prefetch_page = paging32_prefetch_page; |
e8bc217a | 2386 | context->sync_page = paging32_sync_page; |
a7052897 | 2387 | context->invlpg = paging32_invlpg; |
6aa8b732 AK |
2388 | context->root_level = PT32_ROOT_LEVEL; |
2389 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 2390 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
2391 | return 0; |
2392 | } | |
2393 | ||
2394 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
2395 | { | |
82725b20 | 2396 | reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL); |
17ac10ad | 2397 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
2398 | } |
2399 | ||
fb72d167 JR |
2400 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
2401 | { | |
2402 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
2403 | ||
2404 | context->new_cr3 = nonpaging_new_cr3; | |
2405 | context->page_fault = tdp_page_fault; | |
2406 | context->free = nonpaging_free; | |
2407 | context->prefetch_page = nonpaging_prefetch_page; | |
e8bc217a | 2408 | context->sync_page = nonpaging_sync_page; |
a7052897 | 2409 | context->invlpg = nonpaging_invlpg; |
67253af5 | 2410 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
fb72d167 JR |
2411 | context->root_hpa = INVALID_PAGE; |
2412 | ||
2413 | if (!is_paging(vcpu)) { | |
2414 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
2415 | context->root_level = 0; | |
2416 | } else if (is_long_mode(vcpu)) { | |
82725b20 | 2417 | reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL); |
fb72d167 JR |
2418 | context->gva_to_gpa = paging64_gva_to_gpa; |
2419 | context->root_level = PT64_ROOT_LEVEL; | |
2420 | } else if (is_pae(vcpu)) { | |
82725b20 | 2421 | reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL); |
fb72d167 JR |
2422 | context->gva_to_gpa = paging64_gva_to_gpa; |
2423 | context->root_level = PT32E_ROOT_LEVEL; | |
2424 | } else { | |
82725b20 | 2425 | reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL); |
fb72d167 JR |
2426 | context->gva_to_gpa = paging32_gva_to_gpa; |
2427 | context->root_level = PT32_ROOT_LEVEL; | |
2428 | } | |
2429 | ||
2430 | return 0; | |
2431 | } | |
2432 | ||
2433 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 | 2434 | { |
a770f6f2 AK |
2435 | int r; |
2436 | ||
6aa8b732 | 2437 | ASSERT(vcpu); |
ad312c7c | 2438 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
2439 | |
2440 | if (!is_paging(vcpu)) | |
a770f6f2 | 2441 | r = nonpaging_init_context(vcpu); |
a9058ecd | 2442 | else if (is_long_mode(vcpu)) |
a770f6f2 | 2443 | r = paging64_init_context(vcpu); |
6aa8b732 | 2444 | else if (is_pae(vcpu)) |
a770f6f2 | 2445 | r = paging32E_init_context(vcpu); |
6aa8b732 | 2446 | else |
a770f6f2 AK |
2447 | r = paging32_init_context(vcpu); |
2448 | ||
2449 | vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level; | |
2450 | ||
2451 | return r; | |
6aa8b732 AK |
2452 | } |
2453 | ||
fb72d167 JR |
2454 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
2455 | { | |
35149e21 AL |
2456 | vcpu->arch.update_pte.pfn = bad_pfn; |
2457 | ||
fb72d167 JR |
2458 | if (tdp_enabled) |
2459 | return init_kvm_tdp_mmu(vcpu); | |
2460 | else | |
2461 | return init_kvm_softmmu(vcpu); | |
2462 | } | |
2463 | ||
6aa8b732 AK |
2464 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
2465 | { | |
2466 | ASSERT(vcpu); | |
ad312c7c ZX |
2467 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
2468 | vcpu->arch.mmu.free(vcpu); | |
2469 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
2470 | } |
2471 | } | |
2472 | ||
2473 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
2474 | { |
2475 | destroy_kvm_mmu(vcpu); | |
2476 | return init_kvm_mmu(vcpu); | |
2477 | } | |
8668a3c4 | 2478 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
2479 | |
2480 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 2481 | { |
714b93da AK |
2482 | int r; |
2483 | ||
e2dec939 | 2484 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
2485 | if (r) |
2486 | goto out; | |
aaee2c94 | 2487 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 2488 | kvm_mmu_free_some_pages(vcpu); |
8986ecc0 | 2489 | r = mmu_alloc_roots(vcpu); |
0ba73cda | 2490 | mmu_sync_roots(vcpu); |
aaee2c94 | 2491 | spin_unlock(&vcpu->kvm->mmu_lock); |
8986ecc0 MT |
2492 | if (r) |
2493 | goto out; | |
3662cb1c | 2494 | /* set_cr3() should ensure TLB has been flushed */ |
ad312c7c | 2495 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
714b93da AK |
2496 | out: |
2497 | return r; | |
6aa8b732 | 2498 | } |
17c3ba9d AK |
2499 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
2500 | ||
2501 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
2502 | { | |
2503 | mmu_free_roots(vcpu); | |
2504 | } | |
6aa8b732 | 2505 | |
09072daf | 2506 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 2507 | struct kvm_mmu_page *sp, |
ac1b714e AK |
2508 | u64 *spte) |
2509 | { | |
2510 | u64 pte; | |
2511 | struct kvm_mmu_page *child; | |
2512 | ||
2513 | pte = *spte; | |
c7addb90 | 2514 | if (is_shadow_present_pte(pte)) { |
776e6633 | 2515 | if (is_last_spte(pte, sp->role.level)) |
290fc38d | 2516 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
2517 | else { |
2518 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 2519 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
2520 | } |
2521 | } | |
d555c333 | 2522 | __set_spte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
2523 | if (is_large_pte(pte)) |
2524 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
2525 | } |
2526 | ||
0028425f | 2527 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 2528 | struct kvm_mmu_page *sp, |
0028425f | 2529 | u64 *spte, |
489f1d65 | 2530 | const void *new) |
0028425f | 2531 | { |
30945387 | 2532 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
7e4e4056 JR |
2533 | ++vcpu->kvm->stat.mmu_pde_zapped; |
2534 | return; | |
30945387 | 2535 | } |
0028425f | 2536 | |
4cee5764 | 2537 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 2538 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 2539 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 2540 | else |
489f1d65 | 2541 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
2542 | } |
2543 | ||
79539cec AK |
2544 | static bool need_remote_flush(u64 old, u64 new) |
2545 | { | |
2546 | if (!is_shadow_present_pte(old)) | |
2547 | return false; | |
2548 | if (!is_shadow_present_pte(new)) | |
2549 | return true; | |
2550 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
2551 | return true; | |
2552 | old ^= PT64_NX_MASK; | |
2553 | new ^= PT64_NX_MASK; | |
2554 | return (old & ~new & PT64_PERM_MASK) != 0; | |
2555 | } | |
2556 | ||
2557 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
2558 | { | |
2559 | if (need_remote_flush(old, new)) | |
2560 | kvm_flush_remote_tlbs(vcpu->kvm); | |
2561 | else | |
2562 | kvm_mmu_flush_tlb(vcpu); | |
2563 | } | |
2564 | ||
12b7d28f AK |
2565 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
2566 | { | |
ad312c7c | 2567 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f | 2568 | |
7b52345e | 2569 | return !!(spte && (*spte & shadow_accessed_mask)); |
12b7d28f AK |
2570 | } |
2571 | ||
d7824fff AK |
2572 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
2573 | const u8 *new, int bytes) | |
2574 | { | |
2575 | gfn_t gfn; | |
2576 | int r; | |
2577 | u64 gpte = 0; | |
35149e21 | 2578 | pfn_t pfn; |
d7824fff AK |
2579 | |
2580 | if (bytes != 4 && bytes != 8) | |
2581 | return; | |
2582 | ||
2583 | /* | |
2584 | * Assume that the pte write on a page table of the same type | |
2585 | * as the current vcpu paging mode. This is nearly always true | |
2586 | * (might be false while changing modes). Note it is verified later | |
2587 | * by update_pte(). | |
2588 | */ | |
2589 | if (is_pae(vcpu)) { | |
2590 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
2591 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
2592 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
2593 | if (r) | |
2594 | return; | |
2595 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
2596 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
2597 | memcpy((void *)&gpte, new, 8); | |
2598 | } | |
2599 | } else { | |
2600 | if ((bytes == 4) && (gpa % 4 == 0)) | |
2601 | memcpy((void *)&gpte, new, 4); | |
2602 | } | |
43a3795a | 2603 | if (!is_present_gpte(gpte)) |
d7824fff AK |
2604 | return; |
2605 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 2606 | |
e930bffe | 2607 | vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; |
4c2155ce | 2608 | smp_rmb(); |
35149e21 | 2609 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
72dc67a6 | 2610 | |
35149e21 AL |
2611 | if (is_error_pfn(pfn)) { |
2612 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
2613 | return; |
2614 | } | |
d7824fff | 2615 | vcpu->arch.update_pte.gfn = gfn; |
35149e21 | 2616 | vcpu->arch.update_pte.pfn = pfn; |
d7824fff AK |
2617 | } |
2618 | ||
1b7fcd32 AK |
2619 | static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn) |
2620 | { | |
2621 | u64 *spte = vcpu->arch.last_pte_updated; | |
2622 | ||
2623 | if (spte | |
2624 | && vcpu->arch.last_pte_gfn == gfn | |
2625 | && shadow_accessed_mask | |
2626 | && !(*spte & shadow_accessed_mask) | |
2627 | && is_shadow_present_pte(*spte)) | |
2628 | set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
2629 | } | |
2630 | ||
09072daf | 2631 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
ad218f85 MT |
2632 | const u8 *new, int bytes, |
2633 | bool guest_initiated) | |
da4a00f0 | 2634 | { |
9b7a0325 | 2635 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 2636 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 2637 | struct hlist_node *node, *n; |
9b7a0325 AK |
2638 | struct hlist_head *bucket; |
2639 | unsigned index; | |
489f1d65 | 2640 | u64 entry, gentry; |
9b7a0325 | 2641 | u64 *spte; |
9b7a0325 | 2642 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 2643 | unsigned pte_size; |
9b7a0325 | 2644 | unsigned page_offset; |
0e7bc4b9 | 2645 | unsigned misaligned; |
fce0657f | 2646 | unsigned quadrant; |
9b7a0325 | 2647 | int level; |
86a5ba02 | 2648 | int flooded = 0; |
ac1b714e | 2649 | int npte; |
489f1d65 | 2650 | int r; |
9b7a0325 | 2651 | |
b8688d51 | 2652 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 2653 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 2654 | spin_lock(&vcpu->kvm->mmu_lock); |
1b7fcd32 | 2655 | kvm_mmu_access_page(vcpu, gfn); |
eb787d10 | 2656 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 2657 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 2658 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad218f85 MT |
2659 | if (guest_initiated) { |
2660 | if (gfn == vcpu->arch.last_pt_write_gfn | |
2661 | && !last_updated_pte_accessed(vcpu)) { | |
2662 | ++vcpu->arch.last_pt_write_count; | |
2663 | if (vcpu->arch.last_pt_write_count >= 3) | |
2664 | flooded = 1; | |
2665 | } else { | |
2666 | vcpu->arch.last_pt_write_gfn = gfn; | |
2667 | vcpu->arch.last_pt_write_count = 1; | |
2668 | vcpu->arch.last_pte_updated = NULL; | |
2669 | } | |
86a5ba02 | 2670 | } |
1ae0a13d | 2671 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 2672 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 | 2673 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
f6e2c02b | 2674 | if (sp->gfn != gfn || sp->role.direct || sp->role.invalid) |
9b7a0325 | 2675 | continue; |
4db35314 | 2676 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 2677 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 2678 | misaligned |= bytes < 4; |
86a5ba02 | 2679 | if (misaligned || flooded) { |
0e7bc4b9 AK |
2680 | /* |
2681 | * Misaligned accesses are too much trouble to fix | |
2682 | * up; also, they usually indicate a page is not used | |
2683 | * as a page table. | |
86a5ba02 AK |
2684 | * |
2685 | * If we're seeing too many writes to a page, | |
2686 | * it may no longer be a page table, or we may be | |
2687 | * forking, in which case it is better to unmap the | |
2688 | * page. | |
0e7bc4b9 AK |
2689 | */ |
2690 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 | 2691 | gpa, bytes, sp->role.word); |
07385413 MT |
2692 | if (kvm_mmu_zap_page(vcpu->kvm, sp)) |
2693 | n = bucket->first; | |
4cee5764 | 2694 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
2695 | continue; |
2696 | } | |
9b7a0325 | 2697 | page_offset = offset; |
4db35314 | 2698 | level = sp->role.level; |
ac1b714e | 2699 | npte = 1; |
4db35314 | 2700 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
2701 | page_offset <<= 1; /* 32->64 */ |
2702 | /* | |
2703 | * A 32-bit pde maps 4MB while the shadow pdes map | |
2704 | * only 2MB. So we need to double the offset again | |
2705 | * and zap two pdes instead of one. | |
2706 | */ | |
2707 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 2708 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
2709 | page_offset <<= 1; |
2710 | npte = 2; | |
2711 | } | |
fce0657f | 2712 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 2713 | page_offset &= ~PAGE_MASK; |
4db35314 | 2714 | if (quadrant != sp->role.quadrant) |
fce0657f | 2715 | continue; |
9b7a0325 | 2716 | } |
4db35314 | 2717 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
2718 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
2719 | gentry = 0; | |
2720 | r = kvm_read_guest_atomic(vcpu->kvm, | |
2721 | gpa & ~(u64)(pte_size - 1), | |
2722 | &gentry, pte_size); | |
2723 | new = (const void *)&gentry; | |
2724 | if (r < 0) | |
2725 | new = NULL; | |
2726 | } | |
ac1b714e | 2727 | while (npte--) { |
79539cec | 2728 | entry = *spte; |
4db35314 | 2729 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
2730 | if (new) |
2731 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 2732 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 2733 | ++spte; |
9b7a0325 | 2734 | } |
9b7a0325 | 2735 | } |
c7addb90 | 2736 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 2737 | spin_unlock(&vcpu->kvm->mmu_lock); |
35149e21 AL |
2738 | if (!is_error_pfn(vcpu->arch.update_pte.pfn)) { |
2739 | kvm_release_pfn_clean(vcpu->arch.update_pte.pfn); | |
2740 | vcpu->arch.update_pte.pfn = bad_pfn; | |
d7824fff | 2741 | } |
da4a00f0 AK |
2742 | } |
2743 | ||
a436036b AK |
2744 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
2745 | { | |
10589a46 MT |
2746 | gpa_t gpa; |
2747 | int r; | |
a436036b | 2748 | |
60f24784 AK |
2749 | if (tdp_enabled) |
2750 | return 0; | |
2751 | ||
10589a46 | 2752 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
10589a46 | 2753 | |
aaee2c94 | 2754 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 2755 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 2756 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 2757 | return r; |
a436036b | 2758 | } |
577bdc49 | 2759 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
a436036b | 2760 | |
22d95b12 | 2761 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 2762 | { |
3b80fffe IE |
2763 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES && |
2764 | !list_empty(&vcpu->kvm->arch.active_mmu_pages)) { | |
4db35314 | 2765 | struct kvm_mmu_page *sp; |
ebeace86 | 2766 | |
f05e70ac | 2767 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
2768 | struct kvm_mmu_page, link); |
2769 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 2770 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
2771 | } |
2772 | } | |
ebeace86 | 2773 | |
3067714c AK |
2774 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
2775 | { | |
2776 | int r; | |
2777 | enum emulation_result er; | |
2778 | ||
ad312c7c | 2779 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
2780 | if (r < 0) |
2781 | goto out; | |
2782 | ||
2783 | if (!r) { | |
2784 | r = 1; | |
2785 | goto out; | |
2786 | } | |
2787 | ||
b733bfb5 AK |
2788 | r = mmu_topup_memory_caches(vcpu); |
2789 | if (r) | |
2790 | goto out; | |
2791 | ||
851ba692 | 2792 | er = emulate_instruction(vcpu, cr2, error_code, 0); |
3067714c AK |
2793 | |
2794 | switch (er) { | |
2795 | case EMULATE_DONE: | |
2796 | return 1; | |
2797 | case EMULATE_DO_MMIO: | |
2798 | ++vcpu->stat.mmio_exits; | |
2799 | return 0; | |
2800 | case EMULATE_FAIL: | |
3f5d18a9 AK |
2801 | vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; |
2802 | vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; | |
a9c7399d | 2803 | vcpu->run->internal.ndata = 0; |
3f5d18a9 | 2804 | return 0; |
3067714c AK |
2805 | default: |
2806 | BUG(); | |
2807 | } | |
2808 | out: | |
3067714c AK |
2809 | return r; |
2810 | } | |
2811 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
2812 | ||
a7052897 MT |
2813 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva) |
2814 | { | |
a7052897 | 2815 | vcpu->arch.mmu.invlpg(vcpu, gva); |
a7052897 MT |
2816 | kvm_mmu_flush_tlb(vcpu); |
2817 | ++vcpu->stat.invlpg; | |
2818 | } | |
2819 | EXPORT_SYMBOL_GPL(kvm_mmu_invlpg); | |
2820 | ||
18552672 JR |
2821 | void kvm_enable_tdp(void) |
2822 | { | |
2823 | tdp_enabled = true; | |
2824 | } | |
2825 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
2826 | ||
5f4cb662 JR |
2827 | void kvm_disable_tdp(void) |
2828 | { | |
2829 | tdp_enabled = false; | |
2830 | } | |
2831 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); | |
2832 | ||
6aa8b732 AK |
2833 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
2834 | { | |
ad312c7c | 2835 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
2836 | } |
2837 | ||
2838 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
2839 | { | |
17ac10ad | 2840 | struct page *page; |
6aa8b732 AK |
2841 | int i; |
2842 | ||
2843 | ASSERT(vcpu); | |
2844 | ||
17ac10ad AK |
2845 | /* |
2846 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
2847 | * Therefore we need to allocate shadow page tables in the first | |
2848 | * 4GB of memory, which happens to fit the DMA32 zone. | |
2849 | */ | |
2850 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
2851 | if (!page) | |
2852 | goto error_1; | |
ad312c7c | 2853 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 2854 | for (i = 0; i < 4; ++i) |
ad312c7c | 2855 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2856 | |
6aa8b732 AK |
2857 | return 0; |
2858 | ||
2859 | error_1: | |
2860 | free_mmu_pages(vcpu); | |
2861 | return -ENOMEM; | |
2862 | } | |
2863 | ||
8018c27b | 2864 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 2865 | { |
6aa8b732 | 2866 | ASSERT(vcpu); |
ad312c7c | 2867 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2868 | |
8018c27b IM |
2869 | return alloc_mmu_pages(vcpu); |
2870 | } | |
6aa8b732 | 2871 | |
8018c27b IM |
2872 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
2873 | { | |
2874 | ASSERT(vcpu); | |
ad312c7c | 2875 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 2876 | |
8018c27b | 2877 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
2878 | } |
2879 | ||
2880 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
2881 | { | |
2882 | ASSERT(vcpu); | |
2883 | ||
2884 | destroy_kvm_mmu(vcpu); | |
2885 | free_mmu_pages(vcpu); | |
714b93da | 2886 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
2887 | } |
2888 | ||
90cb0529 | 2889 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 2890 | { |
4db35314 | 2891 | struct kvm_mmu_page *sp; |
6aa8b732 | 2892 | |
f05e70ac | 2893 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
2894 | int i; |
2895 | u64 *pt; | |
2896 | ||
291f26bc | 2897 | if (!test_bit(slot, sp->slot_bitmap)) |
6aa8b732 AK |
2898 | continue; |
2899 | ||
4db35314 | 2900 | pt = sp->spt; |
6aa8b732 AK |
2901 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
2902 | /* avoid RMW */ | |
9647c14c | 2903 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 2904 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 | 2905 | } |
171d595d | 2906 | kvm_flush_remote_tlbs(kvm); |
6aa8b732 | 2907 | } |
37a7d8b0 | 2908 | |
90cb0529 | 2909 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 2910 | { |
4db35314 | 2911 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 2912 | |
aaee2c94 | 2913 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2914 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
07385413 MT |
2915 | if (kvm_mmu_zap_page(kvm, sp)) |
2916 | node = container_of(kvm->arch.active_mmu_pages.next, | |
2917 | struct kvm_mmu_page, link); | |
aaee2c94 | 2918 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 2919 | |
90cb0529 | 2920 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
2921 | } |
2922 | ||
8b2cf73c | 2923 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) |
3ee16c81 IE |
2924 | { |
2925 | struct kvm_mmu_page *page; | |
2926 | ||
2927 | page = container_of(kvm->arch.active_mmu_pages.prev, | |
2928 | struct kvm_mmu_page, link); | |
2929 | kvm_mmu_zap_page(kvm, page); | |
2930 | } | |
2931 | ||
2932 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |
2933 | { | |
2934 | struct kvm *kvm; | |
2935 | struct kvm *kvm_freed = NULL; | |
2936 | int cache_count = 0; | |
2937 | ||
2938 | spin_lock(&kvm_lock); | |
2939 | ||
2940 | list_for_each_entry(kvm, &vm_list, vm_list) { | |
2941 | int npages; | |
2942 | ||
5a4c9288 MT |
2943 | if (!down_read_trylock(&kvm->slots_lock)) |
2944 | continue; | |
3ee16c81 IE |
2945 | spin_lock(&kvm->mmu_lock); |
2946 | npages = kvm->arch.n_alloc_mmu_pages - | |
2947 | kvm->arch.n_free_mmu_pages; | |
2948 | cache_count += npages; | |
2949 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | |
2950 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | |
2951 | cache_count--; | |
2952 | kvm_freed = kvm; | |
2953 | } | |
2954 | nr_to_scan--; | |
2955 | ||
2956 | spin_unlock(&kvm->mmu_lock); | |
5a4c9288 | 2957 | up_read(&kvm->slots_lock); |
3ee16c81 IE |
2958 | } |
2959 | if (kvm_freed) | |
2960 | list_move_tail(&kvm_freed->vm_list, &vm_list); | |
2961 | ||
2962 | spin_unlock(&kvm_lock); | |
2963 | ||
2964 | return cache_count; | |
2965 | } | |
2966 | ||
2967 | static struct shrinker mmu_shrinker = { | |
2968 | .shrink = mmu_shrink, | |
2969 | .seeks = DEFAULT_SEEKS * 10, | |
2970 | }; | |
2971 | ||
2ddfd20e | 2972 | static void mmu_destroy_caches(void) |
b5a33a75 AK |
2973 | { |
2974 | if (pte_chain_cache) | |
2975 | kmem_cache_destroy(pte_chain_cache); | |
2976 | if (rmap_desc_cache) | |
2977 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
2978 | if (mmu_page_header_cache) |
2979 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
2980 | } |
2981 | ||
3ee16c81 IE |
2982 | void kvm_mmu_module_exit(void) |
2983 | { | |
2984 | mmu_destroy_caches(); | |
2985 | unregister_shrinker(&mmu_shrinker); | |
2986 | } | |
2987 | ||
b5a33a75 AK |
2988 | int kvm_mmu_module_init(void) |
2989 | { | |
2990 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
2991 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 2992 | 0, 0, NULL); |
b5a33a75 AK |
2993 | if (!pte_chain_cache) |
2994 | goto nomem; | |
2995 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
2996 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 2997 | 0, 0, NULL); |
b5a33a75 AK |
2998 | if (!rmap_desc_cache) |
2999 | goto nomem; | |
3000 | ||
d3d25b04 AK |
3001 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
3002 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 3003 | 0, 0, NULL); |
d3d25b04 AK |
3004 | if (!mmu_page_header_cache) |
3005 | goto nomem; | |
3006 | ||
3ee16c81 IE |
3007 | register_shrinker(&mmu_shrinker); |
3008 | ||
b5a33a75 AK |
3009 | return 0; |
3010 | ||
3011 | nomem: | |
3ee16c81 | 3012 | mmu_destroy_caches(); |
b5a33a75 AK |
3013 | return -ENOMEM; |
3014 | } | |
3015 | ||
3ad82a7e ZX |
3016 | /* |
3017 | * Caculate mmu pages needed for kvm. | |
3018 | */ | |
3019 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
3020 | { | |
3021 | int i; | |
3022 | unsigned int nr_mmu_pages; | |
3023 | unsigned int nr_pages = 0; | |
3024 | ||
3025 | for (i = 0; i < kvm->nmemslots; i++) | |
3026 | nr_pages += kvm->memslots[i].npages; | |
3027 | ||
3028 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
3029 | nr_mmu_pages = max(nr_mmu_pages, | |
3030 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
3031 | ||
3032 | return nr_mmu_pages; | |
3033 | } | |
3034 | ||
2f333bcb MT |
3035 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
3036 | unsigned len) | |
3037 | { | |
3038 | if (len > buffer->len) | |
3039 | return NULL; | |
3040 | return buffer->ptr; | |
3041 | } | |
3042 | ||
3043 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
3044 | unsigned len) | |
3045 | { | |
3046 | void *ret; | |
3047 | ||
3048 | ret = pv_mmu_peek_buffer(buffer, len); | |
3049 | if (!ret) | |
3050 | return ret; | |
3051 | buffer->ptr += len; | |
3052 | buffer->len -= len; | |
3053 | buffer->processed += len; | |
3054 | return ret; | |
3055 | } | |
3056 | ||
3057 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
3058 | gpa_t addr, gpa_t value) | |
3059 | { | |
3060 | int bytes = 8; | |
3061 | int r; | |
3062 | ||
3063 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
3064 | bytes = 4; | |
3065 | ||
3066 | r = mmu_topup_memory_caches(vcpu); | |
3067 | if (r) | |
3068 | return r; | |
3069 | ||
3200f405 | 3070 | if (!emulator_write_phys(vcpu, addr, &value, bytes)) |
2f333bcb MT |
3071 | return -EFAULT; |
3072 | ||
3073 | return 1; | |
3074 | } | |
3075 | ||
3076 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
3077 | { | |
a8cd0244 | 3078 | kvm_set_cr3(vcpu, vcpu->arch.cr3); |
2f333bcb MT |
3079 | return 1; |
3080 | } | |
3081 | ||
3082 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
3083 | { | |
3084 | spin_lock(&vcpu->kvm->mmu_lock); | |
3085 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
3086 | spin_unlock(&vcpu->kvm->mmu_lock); | |
3087 | return 1; | |
3088 | } | |
3089 | ||
3090 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
3091 | struct kvm_pv_mmu_op_buffer *buffer) | |
3092 | { | |
3093 | struct kvm_mmu_op_header *header; | |
3094 | ||
3095 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
3096 | if (!header) | |
3097 | return 0; | |
3098 | switch (header->op) { | |
3099 | case KVM_MMU_OP_WRITE_PTE: { | |
3100 | struct kvm_mmu_op_write_pte *wpte; | |
3101 | ||
3102 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
3103 | if (!wpte) | |
3104 | return 0; | |
3105 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
3106 | wpte->pte_val); | |
3107 | } | |
3108 | case KVM_MMU_OP_FLUSH_TLB: { | |
3109 | struct kvm_mmu_op_flush_tlb *ftlb; | |
3110 | ||
3111 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
3112 | if (!ftlb) | |
3113 | return 0; | |
3114 | return kvm_pv_mmu_flush_tlb(vcpu); | |
3115 | } | |
3116 | case KVM_MMU_OP_RELEASE_PT: { | |
3117 | struct kvm_mmu_op_release_pt *rpt; | |
3118 | ||
3119 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
3120 | if (!rpt) | |
3121 | return 0; | |
3122 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
3123 | } | |
3124 | default: return 0; | |
3125 | } | |
3126 | } | |
3127 | ||
3128 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
3129 | gpa_t addr, unsigned long *ret) | |
3130 | { | |
3131 | int r; | |
6ad18fba | 3132 | struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer; |
2f333bcb | 3133 | |
6ad18fba DH |
3134 | buffer->ptr = buffer->buf; |
3135 | buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf); | |
3136 | buffer->processed = 0; | |
2f333bcb | 3137 | |
6ad18fba | 3138 | r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len); |
2f333bcb MT |
3139 | if (r) |
3140 | goto out; | |
3141 | ||
6ad18fba DH |
3142 | while (buffer->len) { |
3143 | r = kvm_pv_mmu_op_one(vcpu, buffer); | |
2f333bcb MT |
3144 | if (r < 0) |
3145 | goto out; | |
3146 | if (r == 0) | |
3147 | break; | |
3148 | } | |
3149 | ||
3150 | r = 1; | |
3151 | out: | |
6ad18fba | 3152 | *ret = buffer->processed; |
2f333bcb MT |
3153 | return r; |
3154 | } | |
3155 | ||
94d8b056 MT |
3156 | int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]) |
3157 | { | |
3158 | struct kvm_shadow_walk_iterator iterator; | |
3159 | int nr_sptes = 0; | |
3160 | ||
3161 | spin_lock(&vcpu->kvm->mmu_lock); | |
3162 | for_each_shadow_entry(vcpu, addr, iterator) { | |
3163 | sptes[iterator.level-1] = *iterator.sptep; | |
3164 | nr_sptes++; | |
3165 | if (!is_shadow_present_pte(*iterator.sptep)) | |
3166 | break; | |
3167 | } | |
3168 | spin_unlock(&vcpu->kvm->mmu_lock); | |
3169 | ||
3170 | return nr_sptes; | |
3171 | } | |
3172 | EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy); | |
3173 | ||
37a7d8b0 AK |
3174 | #ifdef AUDIT |
3175 | ||
3176 | static const char *audit_msg; | |
3177 | ||
3178 | static gva_t canonicalize(gva_t gva) | |
3179 | { | |
3180 | #ifdef CONFIG_X86_64 | |
3181 | gva = (long long)(gva << 16) >> 16; | |
3182 | #endif | |
3183 | return gva; | |
3184 | } | |
3185 | ||
08a3732b MT |
3186 | |
3187 | typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp, | |
3188 | u64 *sptep); | |
3189 | ||
3190 | static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp, | |
3191 | inspect_spte_fn fn) | |
3192 | { | |
3193 | int i; | |
3194 | ||
3195 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
3196 | u64 ent = sp->spt[i]; | |
3197 | ||
3198 | if (is_shadow_present_pte(ent)) { | |
2920d728 | 3199 | if (!is_last_spte(ent, sp->role.level)) { |
08a3732b MT |
3200 | struct kvm_mmu_page *child; |
3201 | child = page_header(ent & PT64_BASE_ADDR_MASK); | |
3202 | __mmu_spte_walk(kvm, child, fn); | |
2920d728 | 3203 | } else |
08a3732b MT |
3204 | fn(kvm, sp, &sp->spt[i]); |
3205 | } | |
3206 | } | |
3207 | } | |
3208 | ||
3209 | static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn) | |
3210 | { | |
3211 | int i; | |
3212 | struct kvm_mmu_page *sp; | |
3213 | ||
3214 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) | |
3215 | return; | |
3216 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
3217 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
3218 | sp = page_header(root); | |
3219 | __mmu_spte_walk(vcpu->kvm, sp, fn); | |
3220 | return; | |
3221 | } | |
3222 | for (i = 0; i < 4; ++i) { | |
3223 | hpa_t root = vcpu->arch.mmu.pae_root[i]; | |
3224 | ||
3225 | if (root && VALID_PAGE(root)) { | |
3226 | root &= PT64_BASE_ADDR_MASK; | |
3227 | sp = page_header(root); | |
3228 | __mmu_spte_walk(vcpu->kvm, sp, fn); | |
3229 | } | |
3230 | } | |
3231 | return; | |
3232 | } | |
3233 | ||
37a7d8b0 AK |
3234 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, |
3235 | gva_t va, int level) | |
3236 | { | |
3237 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
3238 | int i; | |
3239 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
3240 | ||
3241 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
3242 | u64 ent = pt[i]; | |
3243 | ||
c7addb90 | 3244 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
3245 | continue; |
3246 | ||
3247 | va = canonicalize(va); | |
2920d728 MT |
3248 | if (is_shadow_present_pte(ent) && !is_last_spte(ent, level)) |
3249 | audit_mappings_page(vcpu, ent, va, level - 1); | |
3250 | else { | |
ad312c7c | 3251 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
34382539 JK |
3252 | gfn_t gfn = gpa >> PAGE_SHIFT; |
3253 | pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn); | |
3254 | hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT; | |
37a7d8b0 | 3255 | |
2aaf65e8 MT |
3256 | if (is_error_pfn(pfn)) { |
3257 | kvm_release_pfn_clean(pfn); | |
3258 | continue; | |
3259 | } | |
3260 | ||
c7addb90 | 3261 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 3262 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
3263 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
3264 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 3265 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
3266 | va, gpa, hpa, ent, |
3267 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
3268 | else if (ent == shadow_notrap_nonpresent_pte |
3269 | && !is_error_hpa(hpa)) | |
3270 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
3271 | " valid guest gva %lx\n", audit_msg, va); | |
35149e21 | 3272 | kvm_release_pfn_clean(pfn); |
c7addb90 | 3273 | |
37a7d8b0 AK |
3274 | } |
3275 | } | |
3276 | } | |
3277 | ||
3278 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
3279 | { | |
1ea252af | 3280 | unsigned i; |
37a7d8b0 | 3281 | |
ad312c7c ZX |
3282 | if (vcpu->arch.mmu.root_level == 4) |
3283 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
3284 | else |
3285 | for (i = 0; i < 4; ++i) | |
ad312c7c | 3286 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 3287 | audit_mappings_page(vcpu, |
ad312c7c | 3288 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
3289 | i << 30, |
3290 | 2); | |
3291 | } | |
3292 | ||
3293 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
3294 | { | |
3295 | int nmaps = 0; | |
3296 | int i, j, k; | |
3297 | ||
3298 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
3299 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
3300 | struct kvm_rmap_desc *d; | |
3301 | ||
3302 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 3303 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 3304 | |
290fc38d | 3305 | if (!*rmapp) |
37a7d8b0 | 3306 | continue; |
290fc38d | 3307 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
3308 | ++nmaps; |
3309 | continue; | |
3310 | } | |
290fc38d | 3311 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
3312 | while (d) { |
3313 | for (k = 0; k < RMAP_EXT; ++k) | |
d555c333 | 3314 | if (d->sptes[k]) |
37a7d8b0 AK |
3315 | ++nmaps; |
3316 | else | |
3317 | break; | |
3318 | d = d->more; | |
3319 | } | |
3320 | } | |
3321 | } | |
3322 | return nmaps; | |
3323 | } | |
3324 | ||
08a3732b MT |
3325 | void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep) |
3326 | { | |
3327 | unsigned long *rmapp; | |
3328 | struct kvm_mmu_page *rev_sp; | |
3329 | gfn_t gfn; | |
3330 | ||
3331 | if (*sptep & PT_WRITABLE_MASK) { | |
3332 | rev_sp = page_header(__pa(sptep)); | |
3333 | gfn = rev_sp->gfns[sptep - rev_sp->spt]; | |
3334 | ||
3335 | if (!gfn_to_memslot(kvm, gfn)) { | |
3336 | if (!printk_ratelimit()) | |
3337 | return; | |
3338 | printk(KERN_ERR "%s: no memslot for gfn %ld\n", | |
3339 | audit_msg, gfn); | |
3340 | printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n", | |
3341 | audit_msg, sptep - rev_sp->spt, | |
3342 | rev_sp->gfn); | |
3343 | dump_stack(); | |
3344 | return; | |
3345 | } | |
3346 | ||
2920d728 MT |
3347 | rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt], |
3348 | is_large_pte(*sptep)); | |
08a3732b MT |
3349 | if (!*rmapp) { |
3350 | if (!printk_ratelimit()) | |
3351 | return; | |
3352 | printk(KERN_ERR "%s: no rmap for writable spte %llx\n", | |
3353 | audit_msg, *sptep); | |
3354 | dump_stack(); | |
3355 | } | |
3356 | } | |
3357 | ||
3358 | } | |
3359 | ||
3360 | void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu) | |
3361 | { | |
3362 | mmu_spte_walk(vcpu, inspect_spte_has_rmap); | |
3363 | } | |
3364 | ||
3365 | static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu) | |
37a7d8b0 | 3366 | { |
4db35314 | 3367 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
3368 | int i; |
3369 | ||
f05e70ac | 3370 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 3371 | u64 *pt = sp->spt; |
37a7d8b0 | 3372 | |
4db35314 | 3373 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
3374 | continue; |
3375 | ||
3376 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
3377 | u64 ent = pt[i]; | |
3378 | ||
3379 | if (!(ent & PT_PRESENT_MASK)) | |
3380 | continue; | |
3381 | if (!(ent & PT_WRITABLE_MASK)) | |
3382 | continue; | |
08a3732b | 3383 | inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]); |
37a7d8b0 AK |
3384 | } |
3385 | } | |
08a3732b | 3386 | return; |
37a7d8b0 AK |
3387 | } |
3388 | ||
3389 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
3390 | { | |
08a3732b MT |
3391 | check_writable_mappings_rmap(vcpu); |
3392 | count_rmaps(vcpu); | |
37a7d8b0 AK |
3393 | } |
3394 | ||
3395 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
3396 | { | |
4db35314 | 3397 | struct kvm_mmu_page *sp; |
290fc38d IE |
3398 | struct kvm_memory_slot *slot; |
3399 | unsigned long *rmapp; | |
e58b0f9e | 3400 | u64 *spte; |
290fc38d | 3401 | gfn_t gfn; |
37a7d8b0 | 3402 | |
f05e70ac | 3403 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
f6e2c02b | 3404 | if (sp->role.direct) |
37a7d8b0 | 3405 | continue; |
e58b0f9e MT |
3406 | if (sp->unsync) |
3407 | continue; | |
37a7d8b0 | 3408 | |
4db35314 | 3409 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); |
2843099f | 3410 | slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn); |
290fc38d | 3411 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
e58b0f9e MT |
3412 | |
3413 | spte = rmap_next(vcpu->kvm, rmapp, NULL); | |
3414 | while (spte) { | |
3415 | if (*spte & PT_WRITABLE_MASK) | |
3416 | printk(KERN_ERR "%s: (%s) shadow page has " | |
3417 | "writable mappings: gfn %lx role %x\n", | |
b8688d51 | 3418 | __func__, audit_msg, sp->gfn, |
4db35314 | 3419 | sp->role.word); |
e58b0f9e MT |
3420 | spte = rmap_next(vcpu->kvm, rmapp, spte); |
3421 | } | |
37a7d8b0 AK |
3422 | } |
3423 | } | |
3424 | ||
3425 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
3426 | { | |
3427 | int olddbg = dbg; | |
3428 | ||
3429 | dbg = 0; | |
3430 | audit_msg = msg; | |
3431 | audit_rmap(vcpu); | |
3432 | audit_write_protection(vcpu); | |
2aaf65e8 MT |
3433 | if (strcmp("pre pte write", audit_msg) != 0) |
3434 | audit_mappings(vcpu); | |
08a3732b | 3435 | audit_writable_sptes_have_rmaps(vcpu); |
37a7d8b0 AK |
3436 | dbg = olddbg; |
3437 | } | |
3438 | ||
3439 | #endif |