Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1995 Linus Torvalds |
2d4a7167 | 3 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
f8eeb2e6 | 4 | * Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar |
1da177e4 | 5 | */ |
1da177e4 | 6 | #include <linux/interrupt.h> |
2d4a7167 IM |
7 | #include <linux/mmiotrace.h> |
8 | #include <linux/bootmem.h> | |
1da177e4 | 9 | #include <linux/compiler.h> |
c61e211d | 10 | #include <linux/highmem.h> |
0f2fbdcb | 11 | #include <linux/kprobes.h> |
ab2bf0c1 | 12 | #include <linux/uaccess.h> |
2d4a7167 IM |
13 | #include <linux/vmalloc.h> |
14 | #include <linux/vt_kern.h> | |
15 | #include <linux/signal.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/ptrace.h> | |
18 | #include <linux/string.h> | |
19 | #include <linux/module.h> | |
1eeb66a1 | 20 | #include <linux/kdebug.h> |
2d4a7167 | 21 | #include <linux/errno.h> |
7c9f8861 | 22 | #include <linux/magic.h> |
2d4a7167 IM |
23 | #include <linux/sched.h> |
24 | #include <linux/types.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/mman.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/mm.h> | |
30 | ||
31 | #include <asm-generic/sections.h> | |
1da177e4 | 32 | |
1da177e4 | 33 | #include <asm/tlbflush.h> |
2d4a7167 IM |
34 | #include <asm/pgalloc.h> |
35 | #include <asm/segment.h> | |
36 | #include <asm/system.h> | |
1da177e4 | 37 | #include <asm/proto.h> |
70ef5641 | 38 | #include <asm/traps.h> |
2d4a7167 | 39 | #include <asm/desc.h> |
1da177e4 | 40 | |
33cb5243 | 41 | /* |
2d4a7167 IM |
42 | * Page fault error code bits: |
43 | * | |
44 | * bit 0 == 0: no page found 1: protection fault | |
45 | * bit 1 == 0: read access 1: write access | |
46 | * bit 2 == 0: kernel-mode access 1: user-mode access | |
47 | * bit 3 == 1: use of reserved bit detected | |
48 | * bit 4 == 1: fault was an instruction fetch | |
33cb5243 | 49 | */ |
2d4a7167 IM |
50 | enum x86_pf_error_code { |
51 | ||
52 | PF_PROT = 1 << 0, | |
53 | PF_WRITE = 1 << 1, | |
54 | PF_USER = 1 << 2, | |
55 | PF_RSVD = 1 << 3, | |
56 | PF_INSTR = 1 << 4, | |
57 | }; | |
66c58156 | 58 | |
b814d41f | 59 | /* |
b319eed0 IM |
60 | * Returns 0 if mmiotrace is disabled, or if the fault is not |
61 | * handled by mmiotrace: | |
b814d41f | 62 | */ |
0fd0e3da | 63 | static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) |
86069782 | 64 | { |
0fd0e3da PP |
65 | if (unlikely(is_kmmio_active())) |
66 | if (kmmio_handler(regs, addr) == 1) | |
67 | return -1; | |
0fd0e3da | 68 | return 0; |
86069782 PP |
69 | } |
70 | ||
74a0b576 | 71 | static inline int notify_page_fault(struct pt_regs *regs) |
1bd858a5 | 72 | { |
74a0b576 CH |
73 | int ret = 0; |
74 | ||
75 | /* kprobe_running() needs smp_processor_id() */ | |
b1801812 | 76 | if (kprobes_built_in() && !user_mode_vm(regs)) { |
74a0b576 CH |
77 | preempt_disable(); |
78 | if (kprobe_running() && kprobe_fault_handler(regs, 14)) | |
79 | ret = 1; | |
80 | preempt_enable(); | |
81 | } | |
1bd858a5 | 82 | |
74a0b576 | 83 | return ret; |
33cb5243 | 84 | } |
1bd858a5 | 85 | |
1dc85be0 | 86 | /* |
2d4a7167 IM |
87 | * Prefetch quirks: |
88 | * | |
89 | * 32-bit mode: | |
90 | * | |
91 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | |
92 | * Check that here and ignore it. | |
1dc85be0 | 93 | * |
2d4a7167 | 94 | * 64-bit mode: |
1dc85be0 | 95 | * |
2d4a7167 IM |
96 | * Sometimes the CPU reports invalid exceptions on prefetch. |
97 | * Check that here and ignore it. | |
98 | * | |
99 | * Opcode checker based on code by Richard Brunner. | |
1dc85be0 | 100 | */ |
107a0367 IM |
101 | static inline int |
102 | check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr, | |
103 | unsigned char opcode, int *prefetch) | |
104 | { | |
105 | unsigned char instr_hi = opcode & 0xf0; | |
106 | unsigned char instr_lo = opcode & 0x0f; | |
107 | ||
108 | switch (instr_hi) { | |
109 | case 0x20: | |
110 | case 0x30: | |
111 | /* | |
112 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | |
113 | * In X86_64 long mode, the CPU will signal invalid | |
114 | * opcode if some of these prefixes are present so | |
115 | * X86_64 will never get here anyway | |
116 | */ | |
117 | return ((instr_lo & 7) == 0x6); | |
118 | #ifdef CONFIG_X86_64 | |
119 | case 0x40: | |
120 | /* | |
121 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | |
122 | * Need to figure out under what instruction mode the | |
123 | * instruction was issued. Could check the LDT for lm, | |
124 | * but for now it's good enough to assume that long | |
125 | * mode only uses well known segments or kernel. | |
126 | */ | |
127 | return (!user_mode(regs)) || (regs->cs == __USER_CS); | |
128 | #endif | |
129 | case 0x60: | |
130 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | |
131 | return (instr_lo & 0xC) == 0x4; | |
132 | case 0xF0: | |
133 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ | |
134 | return !instr_lo || (instr_lo>>1) == 1; | |
135 | case 0x00: | |
136 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | |
137 | if (probe_kernel_address(instr, opcode)) | |
138 | return 0; | |
139 | ||
140 | *prefetch = (instr_lo == 0xF) && | |
141 | (opcode == 0x0D || opcode == 0x18); | |
142 | return 0; | |
143 | default: | |
144 | return 0; | |
145 | } | |
146 | } | |
147 | ||
2d4a7167 IM |
148 | static int |
149 | is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) | |
33cb5243 | 150 | { |
2d4a7167 | 151 | unsigned char *max_instr; |
ab2bf0c1 | 152 | unsigned char *instr; |
33cb5243 | 153 | int prefetch = 0; |
1da177e4 | 154 | |
3085354d IM |
155 | /* |
156 | * If it was a exec (instruction fetch) fault on NX page, then | |
157 | * do not ignore the fault: | |
158 | */ | |
66c58156 | 159 | if (error_code & PF_INSTR) |
1da177e4 | 160 | return 0; |
1dc85be0 | 161 | |
107a0367 | 162 | instr = (void *)convert_ip_to_linear(current, regs); |
f1290ec9 | 163 | max_instr = instr + 15; |
1da177e4 | 164 | |
76381fee | 165 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) |
1da177e4 LT |
166 | return 0; |
167 | ||
107a0367 | 168 | while (instr < max_instr) { |
2d4a7167 | 169 | unsigned char opcode; |
1da177e4 | 170 | |
ab2bf0c1 | 171 | if (probe_kernel_address(instr, opcode)) |
33cb5243 | 172 | break; |
1da177e4 | 173 | |
1da177e4 LT |
174 | instr++; |
175 | ||
107a0367 | 176 | if (!check_prefetch_opcode(regs, instr, opcode, &prefetch)) |
1da177e4 | 177 | break; |
1da177e4 LT |
178 | } |
179 | return prefetch; | |
180 | } | |
181 | ||
2d4a7167 IM |
182 | static void |
183 | force_sig_info_fault(int si_signo, int si_code, unsigned long address, | |
184 | struct task_struct *tsk) | |
c4aba4a8 HH |
185 | { |
186 | siginfo_t info; | |
187 | ||
2d4a7167 IM |
188 | info.si_signo = si_signo; |
189 | info.si_errno = 0; | |
190 | info.si_code = si_code; | |
191 | info.si_addr = (void __user *)address; | |
192 | ||
c4aba4a8 HH |
193 | force_sig_info(si_signo, &info, tsk); |
194 | } | |
195 | ||
f2f13a85 IM |
196 | DEFINE_SPINLOCK(pgd_lock); |
197 | LIST_HEAD(pgd_list); | |
198 | ||
199 | #ifdef CONFIG_X86_32 | |
200 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |
33cb5243 | 201 | { |
f2f13a85 IM |
202 | unsigned index = pgd_index(address); |
203 | pgd_t *pgd_k; | |
204 | pud_t *pud, *pud_k; | |
205 | pmd_t *pmd, *pmd_k; | |
2d4a7167 | 206 | |
f2f13a85 IM |
207 | pgd += index; |
208 | pgd_k = init_mm.pgd + index; | |
209 | ||
210 | if (!pgd_present(*pgd_k)) | |
211 | return NULL; | |
212 | ||
213 | /* | |
214 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | |
215 | * and redundant with the set_pmd() on non-PAE. As would | |
216 | * set_pud. | |
217 | */ | |
218 | pud = pud_offset(pgd, address); | |
219 | pud_k = pud_offset(pgd_k, address); | |
220 | if (!pud_present(*pud_k)) | |
221 | return NULL; | |
222 | ||
223 | pmd = pmd_offset(pud, address); | |
224 | pmd_k = pmd_offset(pud_k, address); | |
225 | if (!pmd_present(*pmd_k)) | |
226 | return NULL; | |
227 | ||
228 | if (!pmd_present(*pmd)) { | |
229 | set_pmd(pmd, *pmd_k); | |
230 | arch_flush_lazy_mmu_mode(); | |
231 | } else { | |
232 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | |
233 | } | |
234 | ||
235 | return pmd_k; | |
236 | } | |
237 | ||
238 | void vmalloc_sync_all(void) | |
239 | { | |
240 | unsigned long address; | |
241 | ||
242 | if (SHARED_KERNEL_PMD) | |
243 | return; | |
244 | ||
245 | for (address = VMALLOC_START & PMD_MASK; | |
246 | address >= TASK_SIZE && address < FIXADDR_TOP; | |
247 | address += PMD_SIZE) { | |
248 | ||
249 | unsigned long flags; | |
250 | struct page *page; | |
251 | ||
252 | spin_lock_irqsave(&pgd_lock, flags); | |
253 | list_for_each_entry(page, &pgd_list, lru) { | |
254 | if (!vmalloc_sync_one(page_address(page), address)) | |
255 | break; | |
256 | } | |
257 | spin_unlock_irqrestore(&pgd_lock, flags); | |
258 | } | |
259 | } | |
260 | ||
261 | /* | |
262 | * 32-bit: | |
263 | * | |
264 | * Handle a fault on the vmalloc or module mapping area | |
265 | */ | |
266 | static noinline int vmalloc_fault(unsigned long address) | |
267 | { | |
268 | unsigned long pgd_paddr; | |
269 | pmd_t *pmd_k; | |
270 | pte_t *pte_k; | |
271 | ||
272 | /* Make sure we are in vmalloc area: */ | |
273 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
274 | return -1; | |
275 | ||
276 | /* | |
277 | * Synchronize this task's top level page-table | |
278 | * with the 'reference' page table. | |
279 | * | |
280 | * Do _not_ use "current" here. We might be inside | |
281 | * an interrupt in the middle of a task switch.. | |
282 | */ | |
283 | pgd_paddr = read_cr3(); | |
284 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | |
285 | if (!pmd_k) | |
286 | return -1; | |
287 | ||
288 | pte_k = pte_offset_kernel(pmd_k, address); | |
289 | if (!pte_present(*pte_k)) | |
290 | return -1; | |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
295 | /* | |
296 | * Did it hit the DOS screen memory VA from vm86 mode? | |
297 | */ | |
298 | static inline void | |
299 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
300 | struct task_struct *tsk) | |
301 | { | |
302 | unsigned long bit; | |
303 | ||
304 | if (!v8086_mode(regs)) | |
305 | return; | |
306 | ||
307 | bit = (address - 0xA0000) >> PAGE_SHIFT; | |
308 | if (bit < 32) | |
309 | tsk->thread.screen_bitmap |= 1 << bit; | |
33cb5243 | 310 | } |
1da177e4 | 311 | |
cae30f82 | 312 | static void dump_pagetable(unsigned long address) |
1da177e4 | 313 | { |
1156e098 HH |
314 | __typeof__(pte_val(__pte(0))) page; |
315 | ||
316 | page = read_cr3(); | |
317 | page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT]; | |
2d4a7167 | 318 | |
1156e098 HH |
319 | #ifdef CONFIG_X86_PAE |
320 | printk("*pdpt = %016Lx ", page); | |
321 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
322 | && page & _PAGE_PRESENT) { | |
323 | page &= PAGE_MASK; | |
324 | page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT) | |
2d4a7167 | 325 | & (PTRS_PER_PMD - 1)]; |
1156e098 HH |
326 | printk(KERN_CONT "*pde = %016Lx ", page); |
327 | page &= ~_PAGE_NX; | |
328 | } | |
329 | #else | |
330 | printk("*pde = %08lx ", page); | |
331 | #endif | |
332 | ||
333 | /* | |
334 | * We must not directly access the pte in the highpte | |
335 | * case if the page table is located in highmem. | |
336 | * And let's rather not kmap-atomic the pte, just in case | |
2d4a7167 | 337 | * it's allocated already: |
1156e098 HH |
338 | */ |
339 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
340 | && (page & _PAGE_PRESENT) | |
341 | && !(page & _PAGE_PSE)) { | |
2d4a7167 | 342 | |
1156e098 HH |
343 | page &= PAGE_MASK; |
344 | page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT) | |
2d4a7167 | 345 | & (PTRS_PER_PTE - 1)]; |
1156e098 HH |
346 | printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page); |
347 | } | |
348 | ||
349 | printk("\n"); | |
f2f13a85 IM |
350 | } |
351 | ||
352 | #else /* CONFIG_X86_64: */ | |
353 | ||
354 | void vmalloc_sync_all(void) | |
355 | { | |
356 | unsigned long address; | |
357 | ||
358 | for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END; | |
359 | address += PGDIR_SIZE) { | |
360 | ||
361 | const pgd_t *pgd_ref = pgd_offset_k(address); | |
362 | unsigned long flags; | |
363 | struct page *page; | |
364 | ||
365 | if (pgd_none(*pgd_ref)) | |
366 | continue; | |
367 | ||
368 | spin_lock_irqsave(&pgd_lock, flags); | |
369 | list_for_each_entry(page, &pgd_list, lru) { | |
370 | pgd_t *pgd; | |
371 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | |
372 | if (pgd_none(*pgd)) | |
373 | set_pgd(pgd, *pgd_ref); | |
374 | else | |
375 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
376 | } | |
377 | spin_unlock_irqrestore(&pgd_lock, flags); | |
378 | } | |
379 | } | |
380 | ||
381 | /* | |
382 | * 64-bit: | |
383 | * | |
384 | * Handle a fault on the vmalloc area | |
385 | * | |
386 | * This assumes no large pages in there. | |
387 | */ | |
388 | static noinline int vmalloc_fault(unsigned long address) | |
389 | { | |
390 | pgd_t *pgd, *pgd_ref; | |
391 | pud_t *pud, *pud_ref; | |
392 | pmd_t *pmd, *pmd_ref; | |
393 | pte_t *pte, *pte_ref; | |
394 | ||
395 | /* Make sure we are in vmalloc area: */ | |
396 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
397 | return -1; | |
398 | ||
399 | /* | |
400 | * Copy kernel mappings over when needed. This can also | |
401 | * happen within a race in page table update. In the later | |
402 | * case just flush: | |
403 | */ | |
404 | pgd = pgd_offset(current->active_mm, address); | |
405 | pgd_ref = pgd_offset_k(address); | |
406 | if (pgd_none(*pgd_ref)) | |
407 | return -1; | |
408 | ||
409 | if (pgd_none(*pgd)) | |
410 | set_pgd(pgd, *pgd_ref); | |
411 | else | |
412 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
413 | ||
414 | /* | |
415 | * Below here mismatches are bugs because these lower tables | |
416 | * are shared: | |
417 | */ | |
418 | ||
419 | pud = pud_offset(pgd, address); | |
420 | pud_ref = pud_offset(pgd_ref, address); | |
421 | if (pud_none(*pud_ref)) | |
422 | return -1; | |
423 | ||
424 | if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref)) | |
425 | BUG(); | |
426 | ||
427 | pmd = pmd_offset(pud, address); | |
428 | pmd_ref = pmd_offset(pud_ref, address); | |
429 | if (pmd_none(*pmd_ref)) | |
430 | return -1; | |
431 | ||
432 | if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref)) | |
433 | BUG(); | |
434 | ||
435 | pte_ref = pte_offset_kernel(pmd_ref, address); | |
436 | if (!pte_present(*pte_ref)) | |
437 | return -1; | |
438 | ||
439 | pte = pte_offset_kernel(pmd, address); | |
440 | ||
441 | /* | |
442 | * Don't use pte_page here, because the mappings can point | |
443 | * outside mem_map, and the NUMA hash lookup cannot handle | |
444 | * that: | |
445 | */ | |
446 | if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref)) | |
447 | BUG(); | |
448 | ||
449 | return 0; | |
450 | } | |
451 | ||
452 | static const char errata93_warning[] = | |
453 | KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n" | |
454 | KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n" | |
455 | KERN_ERR "******* Please consider a BIOS update.\n" | |
456 | KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n"; | |
457 | ||
458 | /* | |
459 | * No vm86 mode in 64-bit mode: | |
460 | */ | |
461 | static inline void | |
462 | check_v8086_mode(struct pt_regs *regs, unsigned long address, | |
463 | struct task_struct *tsk) | |
464 | { | |
465 | } | |
466 | ||
467 | static int bad_address(void *p) | |
468 | { | |
469 | unsigned long dummy; | |
470 | ||
471 | return probe_kernel_address((unsigned long *)p, dummy); | |
472 | } | |
473 | ||
474 | static void dump_pagetable(unsigned long address) | |
475 | { | |
1da177e4 LT |
476 | pgd_t *pgd; |
477 | pud_t *pud; | |
478 | pmd_t *pmd; | |
479 | pte_t *pte; | |
480 | ||
f51c9452 | 481 | pgd = (pgd_t *)read_cr3(); |
1da177e4 | 482 | |
33cb5243 | 483 | pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); |
2d4a7167 | 484 | |
1da177e4 | 485 | pgd += pgd_index(address); |
2d4a7167 IM |
486 | if (bad_address(pgd)) |
487 | goto bad; | |
488 | ||
d646bce4 | 489 | printk("PGD %lx ", pgd_val(*pgd)); |
2d4a7167 IM |
490 | |
491 | if (!pgd_present(*pgd)) | |
492 | goto out; | |
1da177e4 | 493 | |
d2ae5b5f | 494 | pud = pud_offset(pgd, address); |
2d4a7167 IM |
495 | if (bad_address(pud)) |
496 | goto bad; | |
497 | ||
1da177e4 | 498 | printk("PUD %lx ", pud_val(*pud)); |
b5360222 | 499 | if (!pud_present(*pud) || pud_large(*pud)) |
2d4a7167 | 500 | goto out; |
1da177e4 LT |
501 | |
502 | pmd = pmd_offset(pud, address); | |
2d4a7167 IM |
503 | if (bad_address(pmd)) |
504 | goto bad; | |
505 | ||
1da177e4 | 506 | printk("PMD %lx ", pmd_val(*pmd)); |
2d4a7167 IM |
507 | if (!pmd_present(*pmd) || pmd_large(*pmd)) |
508 | goto out; | |
1da177e4 LT |
509 | |
510 | pte = pte_offset_kernel(pmd, address); | |
2d4a7167 IM |
511 | if (bad_address(pte)) |
512 | goto bad; | |
513 | ||
33cb5243 | 514 | printk("PTE %lx", pte_val(*pte)); |
2d4a7167 | 515 | out: |
1da177e4 LT |
516 | printk("\n"); |
517 | return; | |
518 | bad: | |
519 | printk("BAD\n"); | |
8c938f9f IM |
520 | } |
521 | ||
f2f13a85 | 522 | #endif /* CONFIG_X86_64 */ |
1da177e4 | 523 | |
2d4a7167 IM |
524 | /* |
525 | * Workaround for K8 erratum #93 & buggy BIOS. | |
526 | * | |
527 | * BIOS SMM functions are required to use a specific workaround | |
528 | * to avoid corruption of the 64bit RIP register on C stepping K8. | |
529 | * | |
530 | * A lot of BIOS that didn't get tested properly miss this. | |
531 | * | |
532 | * The OS sees this as a page fault with the upper 32bits of RIP cleared. | |
533 | * Try to work around it here. | |
534 | * | |
535 | * Note we only handle faults in kernel here. | |
536 | * Does nothing on 32-bit. | |
fdfe8aa8 | 537 | */ |
33cb5243 | 538 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
1da177e4 | 539 | { |
fdfe8aa8 | 540 | #ifdef CONFIG_X86_64 |
2d4a7167 IM |
541 | static int once; |
542 | ||
65ea5b03 | 543 | if (address != regs->ip) |
1da177e4 | 544 | return 0; |
2d4a7167 | 545 | |
33cb5243 | 546 | if ((address >> 32) != 0) |
1da177e4 | 547 | return 0; |
2d4a7167 | 548 | |
1da177e4 | 549 | address |= 0xffffffffUL << 32; |
33cb5243 HH |
550 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
551 | (address >= MODULES_VADDR && address <= MODULES_END)) { | |
2d4a7167 | 552 | if (!once) { |
33cb5243 | 553 | printk(errata93_warning); |
2d4a7167 | 554 | once = 1; |
1da177e4 | 555 | } |
65ea5b03 | 556 | regs->ip = address; |
1da177e4 LT |
557 | return 1; |
558 | } | |
fdfe8aa8 | 559 | #endif |
1da177e4 | 560 | return 0; |
33cb5243 | 561 | } |
1da177e4 | 562 | |
35f3266f | 563 | /* |
2d4a7167 IM |
564 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps |
565 | * to illegal addresses >4GB. | |
566 | * | |
567 | * We catch this in the page fault handler because these addresses | |
568 | * are not reachable. Just detect this case and return. Any code | |
35f3266f HH |
569 | * segment in LDT is compatibility mode. |
570 | */ | |
571 | static int is_errata100(struct pt_regs *regs, unsigned long address) | |
572 | { | |
573 | #ifdef CONFIG_X86_64 | |
2d4a7167 | 574 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32)) |
35f3266f HH |
575 | return 1; |
576 | #endif | |
577 | return 0; | |
578 | } | |
579 | ||
29caf2f9 HH |
580 | static int is_f00f_bug(struct pt_regs *regs, unsigned long address) |
581 | { | |
582 | #ifdef CONFIG_X86_F00F_BUG | |
583 | unsigned long nr; | |
2d4a7167 | 584 | |
29caf2f9 | 585 | /* |
2d4a7167 | 586 | * Pentium F0 0F C7 C8 bug workaround: |
29caf2f9 HH |
587 | */ |
588 | if (boot_cpu_data.f00f_bug) { | |
589 | nr = (address - idt_descr.address) >> 3; | |
590 | ||
591 | if (nr == 6) { | |
592 | do_invalid_op(regs, 0); | |
593 | return 1; | |
594 | } | |
595 | } | |
596 | #endif | |
597 | return 0; | |
598 | } | |
599 | ||
8f766149 IM |
600 | static const char nx_warning[] = KERN_CRIT |
601 | "kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n"; | |
602 | ||
2d4a7167 IM |
603 | static void |
604 | show_fault_oops(struct pt_regs *regs, unsigned long error_code, | |
605 | unsigned long address) | |
b3279c7f | 606 | { |
1156e098 HH |
607 | if (!oops_may_print()) |
608 | return; | |
609 | ||
1156e098 | 610 | if (error_code & PF_INSTR) { |
93809be8 | 611 | unsigned int level; |
2d4a7167 | 612 | |
1156e098 HH |
613 | pte_t *pte = lookup_address(address, &level); |
614 | ||
8f766149 IM |
615 | if (pte && pte_present(*pte) && !pte_exec(*pte)) |
616 | printk(nx_warning, current_uid()); | |
1156e098 | 617 | } |
1156e098 | 618 | |
19f0dda9 | 619 | printk(KERN_ALERT "BUG: unable to handle kernel "); |
b3279c7f | 620 | if (address < PAGE_SIZE) |
19f0dda9 | 621 | printk(KERN_CONT "NULL pointer dereference"); |
b3279c7f | 622 | else |
19f0dda9 | 623 | printk(KERN_CONT "paging request"); |
2d4a7167 | 624 | |
f294a8ce | 625 | printk(KERN_CONT " at %p\n", (void *) address); |
19f0dda9 | 626 | printk(KERN_ALERT "IP:"); |
b3279c7f | 627 | printk_address(regs->ip, 1); |
2d4a7167 | 628 | |
b3279c7f HH |
629 | dump_pagetable(address); |
630 | } | |
631 | ||
2d4a7167 IM |
632 | static noinline void |
633 | pgtable_bad(struct pt_regs *regs, unsigned long error_code, | |
634 | unsigned long address) | |
1da177e4 | 635 | { |
2d4a7167 IM |
636 | struct task_struct *tsk; |
637 | unsigned long flags; | |
638 | int sig; | |
639 | ||
640 | flags = oops_begin(); | |
641 | tsk = current; | |
642 | sig = SIGKILL; | |
1209140c | 643 | |
1da177e4 | 644 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
92181f19 | 645 | tsk->comm, address); |
1da177e4 | 646 | dump_pagetable(address); |
2d4a7167 IM |
647 | |
648 | tsk->thread.cr2 = address; | |
649 | tsk->thread.trap_no = 14; | |
650 | tsk->thread.error_code = error_code; | |
651 | ||
22f5991c | 652 | if (__die("Bad pagetable", regs, error_code)) |
874d93d1 | 653 | sig = 0; |
2d4a7167 | 654 | |
874d93d1 | 655 | oops_end(flags, regs, sig); |
1da177e4 LT |
656 | } |
657 | ||
2d4a7167 IM |
658 | static noinline void |
659 | no_context(struct pt_regs *regs, unsigned long error_code, | |
660 | unsigned long address) | |
92181f19 NP |
661 | { |
662 | struct task_struct *tsk = current; | |
19803078 | 663 | unsigned long *stackend; |
92181f19 NP |
664 | unsigned long flags; |
665 | int sig; | |
92181f19 | 666 | |
2d4a7167 | 667 | /* Are we prepared to handle this kernel fault? */ |
92181f19 NP |
668 | if (fixup_exception(regs)) |
669 | return; | |
670 | ||
671 | /* | |
2d4a7167 IM |
672 | * 32-bit: |
673 | * | |
674 | * Valid to do another page fault here, because if this fault | |
675 | * had been triggered by is_prefetch fixup_exception would have | |
676 | * handled it. | |
677 | * | |
678 | * 64-bit: | |
92181f19 | 679 | * |
2d4a7167 | 680 | * Hall of shame of CPU/BIOS bugs. |
92181f19 NP |
681 | */ |
682 | if (is_prefetch(regs, error_code, address)) | |
683 | return; | |
684 | ||
685 | if (is_errata93(regs, address)) | |
686 | return; | |
687 | ||
688 | /* | |
689 | * Oops. The kernel tried to access some bad page. We'll have to | |
2d4a7167 | 690 | * terminate things with extreme prejudice: |
92181f19 | 691 | */ |
92181f19 | 692 | flags = oops_begin(); |
92181f19 NP |
693 | |
694 | show_fault_oops(regs, error_code, address); | |
695 | ||
2d4a7167 | 696 | stackend = end_of_stack(tsk); |
19803078 IM |
697 | if (*stackend != STACK_END_MAGIC) |
698 | printk(KERN_ALERT "Thread overran stack, or stack corrupted\n"); | |
699 | ||
1cc99544 IM |
700 | tsk->thread.cr2 = address; |
701 | tsk->thread.trap_no = 14; | |
702 | tsk->thread.error_code = error_code; | |
92181f19 | 703 | |
92181f19 NP |
704 | sig = SIGKILL; |
705 | if (__die("Oops", regs, error_code)) | |
706 | sig = 0; | |
2d4a7167 | 707 | |
92181f19 NP |
708 | /* Executive summary in case the body of the oops scrolled away */ |
709 | printk(KERN_EMERG "CR2: %016lx\n", address); | |
2d4a7167 | 710 | |
92181f19 | 711 | oops_end(flags, regs, sig); |
92181f19 NP |
712 | } |
713 | ||
2d4a7167 IM |
714 | /* |
715 | * Print out info about fatal segfaults, if the show_unhandled_signals | |
716 | * sysctl is set: | |
717 | */ | |
718 | static inline void | |
719 | show_signal_msg(struct pt_regs *regs, unsigned long error_code, | |
720 | unsigned long address, struct task_struct *tsk) | |
721 | { | |
722 | if (!unhandled_signal(tsk, SIGSEGV)) | |
723 | return; | |
724 | ||
725 | if (!printk_ratelimit()) | |
726 | return; | |
727 | ||
728 | printk(KERN_CONT "%s%s[%d]: segfault at %lx ip %p sp %p error %lx", | |
729 | task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, | |
730 | tsk->comm, task_pid_nr(tsk), address, | |
731 | (void *)regs->ip, (void *)regs->sp, error_code); | |
732 | ||
733 | print_vma_addr(KERN_CONT " in ", regs->ip); | |
734 | ||
735 | printk(KERN_CONT "\n"); | |
736 | } | |
737 | ||
738 | static void | |
739 | __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
740 | unsigned long address, int si_code) | |
92181f19 NP |
741 | { |
742 | struct task_struct *tsk = current; | |
743 | ||
744 | /* User mode accesses just cause a SIGSEGV */ | |
745 | if (error_code & PF_USER) { | |
746 | /* | |
2d4a7167 | 747 | * It's possible to have interrupts off here: |
92181f19 NP |
748 | */ |
749 | local_irq_enable(); | |
750 | ||
751 | /* | |
752 | * Valid to do another page fault here because this one came | |
2d4a7167 | 753 | * from user space: |
92181f19 NP |
754 | */ |
755 | if (is_prefetch(regs, error_code, address)) | |
756 | return; | |
757 | ||
758 | if (is_errata100(regs, address)) | |
759 | return; | |
760 | ||
2d4a7167 IM |
761 | if (unlikely(show_unhandled_signals)) |
762 | show_signal_msg(regs, error_code, address, tsk); | |
763 | ||
764 | /* Kernel addresses are always protection faults: */ | |
765 | tsk->thread.cr2 = address; | |
766 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | |
767 | tsk->thread.trap_no = 14; | |
92181f19 | 768 | |
92181f19 | 769 | force_sig_info_fault(SIGSEGV, si_code, address, tsk); |
2d4a7167 | 770 | |
92181f19 NP |
771 | return; |
772 | } | |
773 | ||
774 | if (is_f00f_bug(regs, address)) | |
775 | return; | |
776 | ||
777 | no_context(regs, error_code, address); | |
778 | } | |
779 | ||
2d4a7167 IM |
780 | static noinline void |
781 | bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
782 | unsigned long address) | |
92181f19 NP |
783 | { |
784 | __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR); | |
785 | } | |
786 | ||
2d4a7167 IM |
787 | static void |
788 | __bad_area(struct pt_regs *regs, unsigned long error_code, | |
789 | unsigned long address, int si_code) | |
92181f19 NP |
790 | { |
791 | struct mm_struct *mm = current->mm; | |
792 | ||
793 | /* | |
794 | * Something tried to access memory that isn't in our memory map.. | |
795 | * Fix it, but check if it's kernel or user first.. | |
796 | */ | |
797 | up_read(&mm->mmap_sem); | |
798 | ||
799 | __bad_area_nosemaphore(regs, error_code, address, si_code); | |
800 | } | |
801 | ||
2d4a7167 IM |
802 | static noinline void |
803 | bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
804 | { |
805 | __bad_area(regs, error_code, address, SEGV_MAPERR); | |
806 | } | |
807 | ||
2d4a7167 IM |
808 | static noinline void |
809 | bad_area_access_error(struct pt_regs *regs, unsigned long error_code, | |
810 | unsigned long address) | |
92181f19 NP |
811 | { |
812 | __bad_area(regs, error_code, address, SEGV_ACCERR); | |
813 | } | |
814 | ||
815 | /* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */ | |
2d4a7167 IM |
816 | static void |
817 | out_of_memory(struct pt_regs *regs, unsigned long error_code, | |
818 | unsigned long address) | |
92181f19 NP |
819 | { |
820 | /* | |
821 | * We ran out of memory, call the OOM killer, and return the userspace | |
2d4a7167 | 822 | * (which will retry the fault, or kill us if we got oom-killed): |
92181f19 NP |
823 | */ |
824 | up_read(¤t->mm->mmap_sem); | |
2d4a7167 | 825 | |
92181f19 NP |
826 | pagefault_out_of_memory(); |
827 | } | |
828 | ||
2d4a7167 IM |
829 | static void |
830 | do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
831 | { |
832 | struct task_struct *tsk = current; | |
833 | struct mm_struct *mm = tsk->mm; | |
834 | ||
835 | up_read(&mm->mmap_sem); | |
836 | ||
2d4a7167 | 837 | /* Kernel mode? Handle exceptions or die: */ |
92181f19 NP |
838 | if (!(error_code & PF_USER)) |
839 | no_context(regs, error_code, address); | |
2d4a7167 | 840 | |
cd1b68f0 | 841 | /* User-space => ok to do another page fault: */ |
92181f19 NP |
842 | if (is_prefetch(regs, error_code, address)) |
843 | return; | |
2d4a7167 IM |
844 | |
845 | tsk->thread.cr2 = address; | |
846 | tsk->thread.error_code = error_code; | |
847 | tsk->thread.trap_no = 14; | |
848 | ||
92181f19 NP |
849 | force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); |
850 | } | |
851 | ||
2d4a7167 IM |
852 | static noinline void |
853 | mm_fault_error(struct pt_regs *regs, unsigned long error_code, | |
854 | unsigned long address, unsigned int fault) | |
92181f19 | 855 | { |
2d4a7167 | 856 | if (fault & VM_FAULT_OOM) { |
92181f19 | 857 | out_of_memory(regs, error_code, address); |
2d4a7167 IM |
858 | } else { |
859 | if (fault & VM_FAULT_SIGBUS) | |
860 | do_sigbus(regs, error_code, address); | |
861 | else | |
862 | BUG(); | |
863 | } | |
92181f19 NP |
864 | } |
865 | ||
d8b57bb7 TG |
866 | static int spurious_fault_check(unsigned long error_code, pte_t *pte) |
867 | { | |
868 | if ((error_code & PF_WRITE) && !pte_write(*pte)) | |
869 | return 0; | |
2d4a7167 | 870 | |
d8b57bb7 TG |
871 | if ((error_code & PF_INSTR) && !pte_exec(*pte)) |
872 | return 0; | |
873 | ||
874 | return 1; | |
875 | } | |
876 | ||
5b727a3b | 877 | /* |
2d4a7167 IM |
878 | * Handle a spurious fault caused by a stale TLB entry. |
879 | * | |
880 | * This allows us to lazily refresh the TLB when increasing the | |
881 | * permissions of a kernel page (RO -> RW or NX -> X). Doing it | |
882 | * eagerly is very expensive since that implies doing a full | |
883 | * cross-processor TLB flush, even if no stale TLB entries exist | |
884 | * on other processors. | |
885 | * | |
5b727a3b JF |
886 | * There are no security implications to leaving a stale TLB when |
887 | * increasing the permissions on a page. | |
888 | */ | |
2d4a7167 IM |
889 | static noinline int |
890 | spurious_fault(unsigned long error_code, unsigned long address) | |
5b727a3b JF |
891 | { |
892 | pgd_t *pgd; | |
893 | pud_t *pud; | |
894 | pmd_t *pmd; | |
895 | pte_t *pte; | |
3c3e5694 | 896 | int ret; |
5b727a3b JF |
897 | |
898 | /* Reserved-bit violation or user access to kernel space? */ | |
899 | if (error_code & (PF_USER | PF_RSVD)) | |
900 | return 0; | |
901 | ||
902 | pgd = init_mm.pgd + pgd_index(address); | |
903 | if (!pgd_present(*pgd)) | |
904 | return 0; | |
905 | ||
906 | pud = pud_offset(pgd, address); | |
907 | if (!pud_present(*pud)) | |
908 | return 0; | |
909 | ||
d8b57bb7 TG |
910 | if (pud_large(*pud)) |
911 | return spurious_fault_check(error_code, (pte_t *) pud); | |
912 | ||
5b727a3b JF |
913 | pmd = pmd_offset(pud, address); |
914 | if (!pmd_present(*pmd)) | |
915 | return 0; | |
916 | ||
d8b57bb7 TG |
917 | if (pmd_large(*pmd)) |
918 | return spurious_fault_check(error_code, (pte_t *) pmd); | |
919 | ||
5b727a3b JF |
920 | pte = pte_offset_kernel(pmd, address); |
921 | if (!pte_present(*pte)) | |
922 | return 0; | |
923 | ||
3c3e5694 SR |
924 | ret = spurious_fault_check(error_code, pte); |
925 | if (!ret) | |
926 | return 0; | |
927 | ||
928 | /* | |
2d4a7167 IM |
929 | * Make sure we have permissions in PMD. |
930 | * If not, then there's a bug in the page tables: | |
3c3e5694 SR |
931 | */ |
932 | ret = spurious_fault_check(error_code, (pte_t *) pmd); | |
933 | WARN_ONCE(!ret, "PMD has incorrect permission bits\n"); | |
2d4a7167 | 934 | |
3c3e5694 | 935 | return ret; |
5b727a3b JF |
936 | } |
937 | ||
abd4f750 | 938 | int show_unhandled_signals = 1; |
1da177e4 | 939 | |
2d4a7167 IM |
940 | static inline int |
941 | access_error(unsigned long error_code, int write, struct vm_area_struct *vma) | |
92181f19 NP |
942 | { |
943 | if (write) { | |
2d4a7167 | 944 | /* write, present and write, not present: */ |
92181f19 NP |
945 | if (unlikely(!(vma->vm_flags & VM_WRITE))) |
946 | return 1; | |
2d4a7167 | 947 | return 0; |
92181f19 NP |
948 | } |
949 | ||
2d4a7167 IM |
950 | /* read, present: */ |
951 | if (unlikely(error_code & PF_PROT)) | |
952 | return 1; | |
953 | ||
954 | /* read, not present: */ | |
955 | if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))) | |
956 | return 1; | |
957 | ||
92181f19 NP |
958 | return 0; |
959 | } | |
960 | ||
0973a06c HS |
961 | static int fault_in_kernel_space(unsigned long address) |
962 | { | |
d9517346 | 963 | return address >= TASK_SIZE_MAX; |
0973a06c HS |
964 | } |
965 | ||
1da177e4 LT |
966 | /* |
967 | * This routine handles page faults. It determines the address, | |
968 | * and the problem, and then passes it off to one of the appropriate | |
969 | * routines. | |
1da177e4 | 970 | */ |
c3731c68 IM |
971 | dotraplinkage void __kprobes |
972 | do_page_fault(struct pt_regs *regs, unsigned long error_code) | |
1da177e4 | 973 | { |
2d4a7167 | 974 | struct vm_area_struct *vma; |
1da177e4 | 975 | struct task_struct *tsk; |
2d4a7167 | 976 | unsigned long address; |
1da177e4 | 977 | struct mm_struct *mm; |
92181f19 | 978 | int write; |
f8c2ee22 | 979 | int fault; |
1da177e4 | 980 | |
a9ba9a3b AV |
981 | tsk = current; |
982 | mm = tsk->mm; | |
2d4a7167 | 983 | |
a9ba9a3b AV |
984 | prefetchw(&mm->mmap_sem); |
985 | ||
2d4a7167 | 986 | /* Get the faulting address: */ |
f51c9452 | 987 | address = read_cr2(); |
1da177e4 | 988 | |
0fd0e3da | 989 | if (unlikely(kmmio_fault(regs, address))) |
86069782 | 990 | return; |
1da177e4 LT |
991 | |
992 | /* | |
993 | * We fault-in kernel-space virtual memory on-demand. The | |
994 | * 'reference' page table is init_mm.pgd. | |
995 | * | |
996 | * NOTE! We MUST NOT take any locks for this case. We may | |
997 | * be in an interrupt or a critical region, and should | |
998 | * only copy the information from the master page table, | |
999 | * nothing more. | |
1000 | * | |
1001 | * This verifies that the fault happens in kernel space | |
1002 | * (error_code & 4) == 0, and that the fault was not a | |
8b1bde93 | 1003 | * protection error (error_code & 9) == 0. |
1da177e4 | 1004 | */ |
0973a06c | 1005 | if (unlikely(fault_in_kernel_space(address))) { |
f8c2ee22 HH |
1006 | if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) && |
1007 | vmalloc_fault(address) >= 0) | |
1008 | return; | |
5b727a3b | 1009 | |
2d4a7167 | 1010 | /* Can handle a stale RO->RW TLB: */ |
92181f19 | 1011 | if (spurious_fault(error_code, address)) |
5b727a3b JF |
1012 | return; |
1013 | ||
2d4a7167 | 1014 | /* kprobes don't want to hook the spurious faults: */ |
9be260a6 MH |
1015 | if (notify_page_fault(regs)) |
1016 | return; | |
f8c2ee22 HH |
1017 | /* |
1018 | * Don't take the mm semaphore here. If we fixup a prefetch | |
2d4a7167 | 1019 | * fault we could otherwise deadlock: |
f8c2ee22 | 1020 | */ |
92181f19 | 1021 | bad_area_nosemaphore(regs, error_code, address); |
2d4a7167 | 1022 | |
92181f19 | 1023 | return; |
f8c2ee22 HH |
1024 | } |
1025 | ||
2d4a7167 | 1026 | /* kprobes don't want to hook the spurious faults: */ |
f8a6b2b9 | 1027 | if (unlikely(notify_page_fault(regs))) |
9be260a6 | 1028 | return; |
f8c2ee22 | 1029 | /* |
891cffbd LT |
1030 | * It's safe to allow irq's after cr2 has been saved and the |
1031 | * vmalloc fault has been handled. | |
1032 | * | |
1033 | * User-mode registers count as a user access even for any | |
2d4a7167 | 1034 | * potential system fault or CPU buglet: |
f8c2ee22 | 1035 | */ |
891cffbd LT |
1036 | if (user_mode_vm(regs)) { |
1037 | local_irq_enable(); | |
1038 | error_code |= PF_USER; | |
2d4a7167 IM |
1039 | } else { |
1040 | if (regs->flags & X86_EFLAGS_IF) | |
1041 | local_irq_enable(); | |
1042 | } | |
8c914cb7 | 1043 | |
66c58156 | 1044 | if (unlikely(error_code & PF_RSVD)) |
92181f19 | 1045 | pgtable_bad(regs, error_code, address); |
1da177e4 LT |
1046 | |
1047 | /* | |
2d4a7167 IM |
1048 | * If we're in an interrupt, have no user context or are running |
1049 | * in an atomic region then we must not take the fault: | |
1da177e4 | 1050 | */ |
92181f19 NP |
1051 | if (unlikely(in_atomic() || !mm)) { |
1052 | bad_area_nosemaphore(regs, error_code, address); | |
1053 | return; | |
1054 | } | |
1da177e4 | 1055 | |
3a1dfe6e IM |
1056 | /* |
1057 | * When running in the kernel we expect faults to occur only to | |
2d4a7167 IM |
1058 | * addresses in user space. All other faults represent errors in |
1059 | * the kernel and should generate an OOPS. Unfortunately, in the | |
1060 | * case of an erroneous fault occurring in a code path which already | |
1061 | * holds mmap_sem we will deadlock attempting to validate the fault | |
1062 | * against the address space. Luckily the kernel only validly | |
1063 | * references user space from well defined areas of code, which are | |
1064 | * listed in the exceptions table. | |
1da177e4 LT |
1065 | * |
1066 | * As the vast majority of faults will be valid we will only perform | |
2d4a7167 IM |
1067 | * the source reference check when there is a possibility of a |
1068 | * deadlock. Attempt to lock the address space, if we cannot we then | |
1069 | * validate the source. If this is invalid we can skip the address | |
1070 | * space check, thus avoiding the deadlock: | |
1da177e4 | 1071 | */ |
92181f19 | 1072 | if (unlikely(!down_read_trylock(&mm->mmap_sem))) { |
66c58156 | 1073 | if ((error_code & PF_USER) == 0 && |
92181f19 NP |
1074 | !search_exception_tables(regs->ip)) { |
1075 | bad_area_nosemaphore(regs, error_code, address); | |
1076 | return; | |
1077 | } | |
1da177e4 | 1078 | down_read(&mm->mmap_sem); |
01006074 PZ |
1079 | } else { |
1080 | /* | |
2d4a7167 IM |
1081 | * The above down_read_trylock() might have succeeded in |
1082 | * which case we'll have missed the might_sleep() from | |
1083 | * down_read(): | |
01006074 PZ |
1084 | */ |
1085 | might_sleep(); | |
1da177e4 LT |
1086 | } |
1087 | ||
1088 | vma = find_vma(mm, address); | |
92181f19 NP |
1089 | if (unlikely(!vma)) { |
1090 | bad_area(regs, error_code, address); | |
1091 | return; | |
1092 | } | |
1093 | if (likely(vma->vm_start <= address)) | |
1da177e4 | 1094 | goto good_area; |
92181f19 NP |
1095 | if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) { |
1096 | bad_area(regs, error_code, address); | |
1097 | return; | |
1098 | } | |
33cb5243 | 1099 | if (error_code & PF_USER) { |
6f4d368e HH |
1100 | /* |
1101 | * Accessing the stack below %sp is always a bug. | |
1102 | * The large cushion allows instructions like enter | |
2d4a7167 | 1103 | * and pusha to work. ("enter $65535, $31" pushes |
6f4d368e | 1104 | * 32 pointers and then decrements %sp by 65535.) |
03fdc2c2 | 1105 | */ |
92181f19 NP |
1106 | if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) { |
1107 | bad_area(regs, error_code, address); | |
1108 | return; | |
1109 | } | |
1da177e4 | 1110 | } |
92181f19 NP |
1111 | if (unlikely(expand_stack(vma, address))) { |
1112 | bad_area(regs, error_code, address); | |
1113 | return; | |
1114 | } | |
1115 | ||
1116 | /* | |
1117 | * Ok, we have a good vm_area for this memory access, so | |
1118 | * we can handle it.. | |
1119 | */ | |
1da177e4 | 1120 | good_area: |
92181f19 | 1121 | write = error_code & PF_WRITE; |
2d4a7167 | 1122 | |
92181f19 NP |
1123 | if (unlikely(access_error(error_code, write, vma))) { |
1124 | bad_area_access_error(regs, error_code, address); | |
1125 | return; | |
1da177e4 LT |
1126 | } |
1127 | ||
1128 | /* | |
1129 | * If for any reason at all we couldn't handle the fault, | |
1130 | * make sure we exit gracefully rather than endlessly redo | |
2d4a7167 | 1131 | * the fault: |
1da177e4 | 1132 | */ |
83c54070 | 1133 | fault = handle_mm_fault(mm, vma, address, write); |
2d4a7167 | 1134 | |
83c54070 | 1135 | if (unlikely(fault & VM_FAULT_ERROR)) { |
92181f19 NP |
1136 | mm_fault_error(regs, error_code, address, fault); |
1137 | return; | |
1da177e4 | 1138 | } |
2d4a7167 | 1139 | |
83c54070 NP |
1140 | if (fault & VM_FAULT_MAJOR) |
1141 | tsk->maj_flt++; | |
1142 | else | |
1143 | tsk->min_flt++; | |
d729ab35 | 1144 | |
8c938f9f IM |
1145 | check_v8086_mode(regs, address, tsk); |
1146 | ||
1da177e4 | 1147 | up_read(&mm->mmap_sem); |
1da177e4 | 1148 | } |