Linux 2.6.39
[deliverable/linux.git] / arch / x86 / xen / enlighten.c
CommitLineData
5ead97c8
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
5ead97c8
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15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
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20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
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25#include <linux/bootmem.h>
26#include <linux/module.h>
f4f97b3e
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27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
5ead97c8 34
1ccbf534 35#include <xen/xen.h>
5ead97c8 36#include <xen/interface/xen.h>
ecbf29cd 37#include <xen/interface/version.h>
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38#include <xen/interface/physdev.h>
39#include <xen/interface/vcpu.h>
bee6ab53 40#include <xen/interface/memory.h>
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41#include <xen/features.h>
42#include <xen/page.h>
38e20b07 43#include <xen/hvm.h>
084a2a4e 44#include <xen/hvc-console.h>
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45
46#include <asm/paravirt.h>
7b6aa335 47#include <asm/apic.h>
5ead97c8 48#include <asm/page.h>
b5401a96 49#include <asm/xen/pci.h>
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50#include <asm/xen/hypercall.h>
51#include <asm/xen/hypervisor.h>
52#include <asm/fixmap.h>
53#include <asm/processor.h>
707ebbc8 54#include <asm/proto.h>
1153968a 55#include <asm/msr-index.h>
6cac5a92 56#include <asm/traps.h>
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57#include <asm/setup.h>
58#include <asm/desc.h>
817a824b 59#include <asm/pgalloc.h>
5ead97c8 60#include <asm/pgtable.h>
f87e4cac 61#include <asm/tlbflush.h>
fefa629a 62#include <asm/reboot.h>
577eebea 63#include <asm/stackprotector.h>
bee6ab53 64#include <asm/hypervisor.h>
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65
66#include "xen-ops.h"
3b827c1b 67#include "mmu.h"
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68#include "multicalls.h"
69
70EXPORT_SYMBOL_GPL(hypercall_page);
71
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72DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
73DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 74
6e833587
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75enum xen_domain_type xen_domain_type = XEN_NATIVE;
76EXPORT_SYMBOL_GPL(xen_domain_type);
77
7e77506a
IC
78unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
79EXPORT_SYMBOL(machine_to_phys_mapping);
80unsigned int machine_to_phys_order;
81EXPORT_SYMBOL(machine_to_phys_order);
82
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83struct start_info *xen_start_info;
84EXPORT_SYMBOL_GPL(xen_start_info);
85
a0d695c8 86struct shared_info xen_dummy_shared_info;
60223a32 87
38341432
JF
88void *xen_initial_gdt;
89
bee6ab53 90RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
38e20b07
SY
91__read_mostly int xen_have_vector_callback;
92EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 93
60223a32
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94/*
95 * Point at some empty memory to start with. We map the real shared_info
96 * page as soon as fixmap is up and running.
97 */
a0d695c8 98struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
60223a32
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99
100/*
101 * Flag to determine whether vcpu info placement is available on all
102 * VCPUs. We assume it is to start with, and then set it to zero on
103 * the first failure. This is because it can succeed on some VCPUs
104 * and not others, since it can involve hypervisor memory allocation,
105 * or because the guest failed to guarantee all the appropriate
106 * constraints on all VCPUs (ie buffer can't cross a page boundary).
107 *
108 * Note that any particular CPU may be using a placed vcpu structure,
109 * but we can only optimise if the all are.
110 *
111 * 0: not available, 1: available
112 */
e4d04071 113static int have_vcpu_info_placement = 1;
60223a32 114
c06ee78d
MR
115static void clamp_max_cpus(void)
116{
117#ifdef CONFIG_SMP
118 if (setup_max_cpus > MAX_VIRT_CPUS)
119 setup_max_cpus = MAX_VIRT_CPUS;
120#endif
121}
122
9c7a7942 123static void xen_vcpu_setup(int cpu)
5ead97c8 124{
60223a32
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125 struct vcpu_register_vcpu_info info;
126 int err;
127 struct vcpu_info *vcpup;
128
a0d695c8 129 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 130
c06ee78d
MR
131 if (cpu < MAX_VIRT_CPUS)
132 per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
60223a32 133
c06ee78d
MR
134 if (!have_vcpu_info_placement) {
135 if (cpu >= MAX_VIRT_CPUS)
136 clamp_max_cpus();
137 return;
138 }
60223a32 139
c06ee78d 140 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 141 info.mfn = arbitrary_virt_to_mfn(vcpup);
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142 info.offset = offset_in_page(vcpup);
143
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144 /* Check to see if the hypervisor will put the vcpu_info
145 structure where we want it, which allows direct access via
146 a percpu-variable. */
147 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
148
149 if (err) {
150 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
151 have_vcpu_info_placement = 0;
c06ee78d 152 clamp_max_cpus();
60223a32
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153 } else {
154 /* This cpu is using the registered vcpu info, even if
155 later ones fail to. */
156 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 157 }
5ead97c8
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158}
159
9c7a7942
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160/*
161 * On restore, set the vcpu placement up again.
162 * If it fails, then we're in a bad state, since
163 * we can't back out from using it...
164 */
165void xen_vcpu_restore(void)
166{
3905bb2a 167 int cpu;
9c7a7942 168
3905bb2a
JF
169 for_each_online_cpu(cpu) {
170 bool other_cpu = (cpu != smp_processor_id());
9c7a7942 171
3905bb2a
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172 if (other_cpu &&
173 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
174 BUG();
9c7a7942 175
3905bb2a 176 xen_setup_runstate_info(cpu);
9c7a7942 177
3905bb2a 178 if (have_vcpu_info_placement)
9c7a7942 179 xen_vcpu_setup(cpu);
9c7a7942 180
3905bb2a
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181 if (other_cpu &&
182 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
183 BUG();
9c7a7942
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184 }
185}
186
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187static void __init xen_banner(void)
188{
95c7c23b
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189 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
190 struct xen_extraversion extra;
191 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
192
5ead97c8 193 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 194 pv_info.name);
95c7c23b
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195 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
196 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 197 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8
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198}
199
e826fe1b
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200static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
201static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
202
65ea5b03
PA
203static void xen_cpuid(unsigned int *ax, unsigned int *bx,
204 unsigned int *cx, unsigned int *dx)
5ead97c8 205{
82d64699 206 unsigned maskebx = ~0;
e826fe1b 207 unsigned maskecx = ~0;
5ead97c8
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208 unsigned maskedx = ~0;
209
210 /*
211 * Mask out inconvenient features, to try and disable as many
212 * unsupported kernel subsystems as possible.
213 */
82d64699
JF
214 switch (*ax) {
215 case 1:
e826fe1b
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216 maskecx = cpuid_leaf1_ecx_mask;
217 maskedx = cpuid_leaf1_edx_mask;
82d64699
JF
218 break;
219
220 case 0xb:
221 /* Suppress extended topology stuff */
222 maskebx = 0;
223 break;
e826fe1b 224 }
5ead97c8
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225
226 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
227 : "=a" (*ax),
228 "=b" (*bx),
229 "=c" (*cx),
230 "=d" (*dx)
231 : "0" (*ax), "2" (*cx));
e826fe1b 232
82d64699 233 *bx &= maskebx;
e826fe1b 234 *cx &= maskecx;
65ea5b03 235 *dx &= maskedx;
5ead97c8
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236}
237
e826fe1b
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238static __init void xen_init_cpuid_mask(void)
239{
240 unsigned int ax, bx, cx, dx;
947ccf9c 241 unsigned int xsave_mask;
e826fe1b
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242
243 cpuid_leaf1_edx_mask =
244 ~((1 << X86_FEATURE_MCE) | /* disable MCE */
245 (1 << X86_FEATURE_MCA) | /* disable MCA */
ff12849a 246 (1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
247 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
248
249 if (!xen_initial_domain())
250 cpuid_leaf1_edx_mask &=
251 ~((1 << X86_FEATURE_APIC) | /* disable local APIC */
252 (1 << X86_FEATURE_ACPI)); /* disable ACPI */
947ccf9c
SH
253 ax = 1;
254 xen_cpuid(&ax, &bx, &cx, &dx);
e826fe1b 255
947ccf9c
SH
256 xsave_mask =
257 (1 << (X86_FEATURE_XSAVE % 32)) |
258 (1 << (X86_FEATURE_OSXSAVE % 32));
259
260 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
261 if ((cx & xsave_mask) != xsave_mask)
262 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
e826fe1b
JF
263}
264
5ead97c8
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265static void xen_set_debugreg(int reg, unsigned long val)
266{
267 HYPERVISOR_set_debugreg(reg, val);
268}
269
270static unsigned long xen_get_debugreg(int reg)
271{
272 return HYPERVISOR_get_debugreg(reg);
273}
274
224101ed 275static void xen_end_context_switch(struct task_struct *next)
5ead97c8 276{
5ead97c8 277 xen_mc_flush();
224101ed 278 paravirt_end_context_switch(next);
5ead97c8
JF
279}
280
281static unsigned long xen_store_tr(void)
282{
283 return 0;
284}
285
a05d2eba 286/*
cef43bf6
JF
287 * Set the page permissions for a particular virtual address. If the
288 * address is a vmalloc mapping (or other non-linear mapping), then
289 * find the linear mapping of the page and also set its protections to
290 * match.
a05d2eba
JF
291 */
292static void set_aliased_prot(void *v, pgprot_t prot)
293{
294 int level;
295 pte_t *ptep;
296 pte_t pte;
297 unsigned long pfn;
298 struct page *page;
299
300 ptep = lookup_address((unsigned long)v, &level);
301 BUG_ON(ptep == NULL);
302
303 pfn = pte_pfn(*ptep);
304 page = pfn_to_page(pfn);
305
306 pte = pfn_pte(pfn, prot);
307
308 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
309 BUG();
310
311 if (!PageHighMem(page)) {
312 void *av = __va(PFN_PHYS(pfn));
313
314 if (av != v)
315 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
316 BUG();
317 } else
318 kmap_flush_unused();
319}
320
38ffbe66
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321static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
322{
a05d2eba 323 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
324 int i;
325
a05d2eba
JF
326 for(i = 0; i < entries; i += entries_per_page)
327 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
328}
329
330static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
331{
a05d2eba 332 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
333 int i;
334
a05d2eba
JF
335 for(i = 0; i < entries; i += entries_per_page)
336 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
337}
338
5ead97c8
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339static void xen_set_ldt(const void *addr, unsigned entries)
340{
5ead97c8
JF
341 struct mmuext_op *op;
342 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
343
344 op = mcs.args;
345 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 346 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
347 op->arg2.nr_ents = entries;
348
349 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
350
351 xen_mc_issue(PARAVIRT_LAZY_CPU);
352}
353
6b68f01b 354static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 355{
5ead97c8
JF
356 unsigned long va = dtr->address;
357 unsigned int size = dtr->size + 1;
358 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
3ce5fa7e 359 unsigned long frames[pages];
5ead97c8 360 int f;
5ead97c8 361
577eebea
JF
362 /*
363 * A GDT can be up to 64k in size, which corresponds to 8192
364 * 8-byte entries, or 16 4k pages..
365 */
5ead97c8
JF
366
367 BUG_ON(size > 65536);
368 BUG_ON(va & ~PAGE_MASK);
369
5ead97c8 370 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 371 int level;
577eebea 372 pte_t *ptep;
6ed6bf42
JF
373 unsigned long pfn, mfn;
374 void *virt;
375
577eebea
JF
376 /*
377 * The GDT is per-cpu and is in the percpu data area.
378 * That can be virtually mapped, so we need to do a
379 * page-walk to get the underlying MFN for the
380 * hypercall. The page can also be in the kernel's
381 * linear range, so we need to RO that mapping too.
382 */
383 ptep = lookup_address(va, &level);
6ed6bf42
JF
384 BUG_ON(ptep == NULL);
385
386 pfn = pte_pfn(*ptep);
387 mfn = pfn_to_mfn(pfn);
388 virt = __va(PFN_PHYS(pfn));
389
390 frames[f] = mfn;
9976b39b 391
5ead97c8 392 make_lowmem_page_readonly((void *)va);
6ed6bf42 393 make_lowmem_page_readonly(virt);
5ead97c8
JF
394 }
395
3ce5fa7e
JF
396 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
397 BUG();
5ead97c8
JF
398}
399
577eebea
JF
400/*
401 * load_gdt for early boot, when the gdt is only mapped once
402 */
403static __init void xen_load_gdt_boot(const struct desc_ptr *dtr)
404{
405 unsigned long va = dtr->address;
406 unsigned int size = dtr->size + 1;
407 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
408 unsigned long frames[pages];
409 int f;
410
411 /*
412 * A GDT can be up to 64k in size, which corresponds to 8192
413 * 8-byte entries, or 16 4k pages..
414 */
415
416 BUG_ON(size > 65536);
417 BUG_ON(va & ~PAGE_MASK);
418
419 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
420 pte_t pte;
421 unsigned long pfn, mfn;
422
423 pfn = virt_to_pfn(va);
424 mfn = pfn_to_mfn(pfn);
425
426 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
427
428 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
429 BUG();
430
431 frames[f] = mfn;
432 }
433
434 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
435 BUG();
436}
437
5ead97c8
JF
438static void load_TLS_descriptor(struct thread_struct *t,
439 unsigned int cpu, unsigned int i)
440{
441 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
9976b39b 442 xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
5ead97c8
JF
443 struct multicall_space mc = __xen_mc_entry(0);
444
445 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
446}
447
448static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
449{
8b84ad94 450 /*
ccbeed3a
TH
451 * XXX sleazy hack: If we're being called in a lazy-cpu zone
452 * and lazy gs handling is enabled, it means we're in a
453 * context switch, and %gs has just been saved. This means we
454 * can zero it out to prevent faults on exit from the
455 * hypervisor if the next process has no %gs. Either way, it
456 * has been saved, and the new value will get loaded properly.
457 * This will go away as soon as Xen has been modified to not
458 * save/restore %gs for normal hypercalls.
8a95408e
EH
459 *
460 * On x86_64, this hack is not used for %gs, because gs points
461 * to KERNEL_GS_BASE (and uses it for PDA references), so we
462 * must not zero %gs on x86_64
463 *
464 * For x86_64, we need to zero %fs, otherwise we may get an
465 * exception between the new %fs descriptor being loaded and
466 * %fs being effectively cleared at __switch_to().
8b84ad94 467 */
8a95408e
EH
468 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
469#ifdef CONFIG_X86_32
ccbeed3a 470 lazy_load_gs(0);
8a95408e
EH
471#else
472 loadsegment(fs, 0);
473#endif
474 }
475
476 xen_mc_batch();
477
478 load_TLS_descriptor(t, cpu, 0);
479 load_TLS_descriptor(t, cpu, 1);
480 load_TLS_descriptor(t, cpu, 2);
481
482 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
483}
484
a8fc1089
EH
485#ifdef CONFIG_X86_64
486static void xen_load_gs_index(unsigned int idx)
487{
488 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
489 BUG();
5ead97c8 490}
a8fc1089 491#endif
5ead97c8
JF
492
493static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 494 const void *ptr)
5ead97c8 495{
cef43bf6 496 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 497 u64 entry = *(u64 *)ptr;
5ead97c8 498
f120f13e
JF
499 preempt_disable();
500
5ead97c8
JF
501 xen_mc_flush();
502 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
503 BUG();
f120f13e
JF
504
505 preempt_enable();
5ead97c8
JF
506}
507
e176d367 508static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
509 struct trap_info *info)
510{
6cac5a92
JF
511 unsigned long addr;
512
6d02c426 513 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
514 return 0;
515
516 info->vector = vector;
6cac5a92
JF
517
518 addr = gate_offset(*val);
519#ifdef CONFIG_X86_64
b80119bb
JF
520 /*
521 * Look for known traps using IST, and substitute them
522 * appropriately. The debugger ones are the only ones we care
523 * about. Xen will handle faults like double_fault and
524 * machine_check, so we should never see them. Warn if
525 * there's an unexpected IST-using fault handler.
526 */
6cac5a92
JF
527 if (addr == (unsigned long)debug)
528 addr = (unsigned long)xen_debug;
529 else if (addr == (unsigned long)int3)
530 addr = (unsigned long)xen_int3;
531 else if (addr == (unsigned long)stack_segment)
532 addr = (unsigned long)xen_stack_segment;
b80119bb
JF
533 else if (addr == (unsigned long)double_fault ||
534 addr == (unsigned long)nmi) {
535 /* Don't need to handle these */
536 return 0;
537#ifdef CONFIG_X86_MCE
538 } else if (addr == (unsigned long)machine_check) {
539 return 0;
540#endif
541 } else {
542 /* Some other trap using IST? */
543 if (WARN_ON(val->ist != 0))
544 return 0;
545 }
6cac5a92
JF
546#endif /* CONFIG_X86_64 */
547 info->address = addr;
548
e176d367
EH
549 info->cs = gate_segment(*val);
550 info->flags = val->dpl;
5ead97c8 551 /* interrupt gates clear IF */
6d02c426
JF
552 if (val->type == GATE_INTERRUPT)
553 info->flags |= 1 << 2;
5ead97c8
JF
554
555 return 1;
556}
557
558/* Locations of each CPU's IDT */
6b68f01b 559static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
560
561/* Set an IDT entry. If the entry is part of the current IDT, then
562 also update Xen. */
8d947344 563static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 564{
5ead97c8 565 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
566 unsigned long start, end;
567
568 preempt_disable();
569
780f36d8
CL
570 start = __this_cpu_read(idt_desc.address);
571 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
572
573 xen_mc_flush();
574
8d947344 575 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
576
577 if (p >= start && (p + 8) <= end) {
578 struct trap_info info[2];
579
580 info[1].address = 0;
581
e176d367 582 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
583 if (HYPERVISOR_set_trap_table(info))
584 BUG();
585 }
f120f13e
JF
586
587 preempt_enable();
5ead97c8
JF
588}
589
6b68f01b 590static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 591 struct trap_info *traps)
5ead97c8 592{
5ead97c8
JF
593 unsigned in, out, count;
594
e176d367 595 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
596 BUG_ON(count > 256);
597
5ead97c8 598 for (in = out = 0; in < count; in++) {
e176d367 599 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 600
e176d367 601 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
602 out++;
603 }
604 traps[out].address = 0;
f87e4cac
JF
605}
606
607void xen_copy_trap_info(struct trap_info *traps)
608{
6b68f01b 609 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
f87e4cac
JF
610
611 xen_convert_trap_info(desc, traps);
f87e4cac
JF
612}
613
614/* Load a new IDT into Xen. In principle this can be per-CPU, so we
615 hold a spinlock to protect the static traps[] array (static because
616 it avoids allocation, and saves stack space). */
6b68f01b 617static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
618{
619 static DEFINE_SPINLOCK(lock);
620 static struct trap_info traps[257];
f87e4cac
JF
621
622 spin_lock(&lock);
623
f120f13e
JF
624 __get_cpu_var(idt_desc) = *desc;
625
f87e4cac 626 xen_convert_trap_info(desc, traps);
5ead97c8
JF
627
628 xen_mc_flush();
629 if (HYPERVISOR_set_trap_table(traps))
630 BUG();
631
632 spin_unlock(&lock);
633}
634
635/* Write a GDT descriptor entry. Ignore LDT descriptors, since
636 they're handled differently. */
637static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 638 const void *desc, int type)
5ead97c8 639{
f120f13e
JF
640 preempt_disable();
641
014b15be
GOC
642 switch (type) {
643 case DESC_LDT:
644 case DESC_TSS:
5ead97c8
JF
645 /* ignore */
646 break;
647
648 default: {
9976b39b 649 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
650
651 xen_mc_flush();
014b15be 652 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
653 BUG();
654 }
655
656 }
f120f13e
JF
657
658 preempt_enable();
5ead97c8
JF
659}
660
577eebea
JF
661/*
662 * Version of write_gdt_entry for use at early boot-time needed to
663 * update an entry as simply as possible.
664 */
665static __init void xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
666 const void *desc, int type)
667{
668 switch (type) {
669 case DESC_LDT:
670 case DESC_TSS:
671 /* ignore */
672 break;
673
674 default: {
675 xmaddr_t maddr = virt_to_machine(&dt[entry]);
676
677 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
678 dt[entry] = *(struct desc_struct *)desc;
679 }
680
681 }
682}
683
faca6227 684static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 685 struct thread_struct *thread)
5ead97c8
JF
686{
687 struct multicall_space mcs = xen_mc_entry(0);
faca6227 688 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
689 xen_mc_issue(PARAVIRT_LAZY_CPU);
690}
691
692static void xen_set_iopl_mask(unsigned mask)
693{
694 struct physdev_set_iopl set_iopl;
695
696 /* Force the change at ring 0. */
697 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
698 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
699}
700
701static void xen_io_delay(void)
702{
703}
704
705#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 706static u32 xen_apic_read(u32 reg)
5ead97c8
JF
707{
708 return 0;
709}
f87e4cac 710
ad66dd34 711static void xen_apic_write(u32 reg, u32 val)
f87e4cac
JF
712{
713 /* Warn to see if there's any stray references */
714 WARN_ON(1);
715}
ad66dd34 716
ad66dd34
SS
717static u64 xen_apic_icr_read(void)
718{
719 return 0;
720}
721
722static void xen_apic_icr_write(u32 low, u32 id)
723{
724 /* Warn to see if there's any stray references */
725 WARN_ON(1);
726}
727
728static void xen_apic_wait_icr_idle(void)
729{
730 return;
731}
732
94a8c3c2
YL
733static u32 xen_safe_apic_wait_icr_idle(void)
734{
735 return 0;
736}
737
c1eeb2de
YL
738static void set_xen_basic_apic_ops(void)
739{
740 apic->read = xen_apic_read;
741 apic->write = xen_apic_write;
742 apic->icr_read = xen_apic_icr_read;
743 apic->icr_write = xen_apic_icr_write;
744 apic->wait_icr_idle = xen_apic_wait_icr_idle;
745 apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
746}
ad66dd34 747
5ead97c8
JF
748#endif
749
7b1333aa
JF
750static void xen_clts(void)
751{
752 struct multicall_space mcs;
753
754 mcs = xen_mc_entry(0);
755
756 MULTI_fpu_taskswitch(mcs.mc, 0);
757
758 xen_mc_issue(PARAVIRT_LAZY_CPU);
759}
760
a789ed5f
JF
761static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
762
763static unsigned long xen_read_cr0(void)
764{
765 unsigned long cr0 = percpu_read(xen_cr0_value);
766
767 if (unlikely(cr0 == 0)) {
768 cr0 = native_read_cr0();
769 percpu_write(xen_cr0_value, cr0);
770 }
771
772 return cr0;
773}
774
7b1333aa
JF
775static void xen_write_cr0(unsigned long cr0)
776{
777 struct multicall_space mcs;
778
a789ed5f
JF
779 percpu_write(xen_cr0_value, cr0);
780
7b1333aa
JF
781 /* Only pay attention to cr0.TS; everything else is
782 ignored. */
783 mcs = xen_mc_entry(0);
784
785 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
786
787 xen_mc_issue(PARAVIRT_LAZY_CPU);
788}
789
5ead97c8
JF
790static void xen_write_cr4(unsigned long cr4)
791{
2956a351
JF
792 cr4 &= ~X86_CR4_PGE;
793 cr4 &= ~X86_CR4_PSE;
794
795 native_write_cr4(cr4);
5ead97c8
JF
796}
797
1153968a
JF
798static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
799{
800 int ret;
801
802 ret = 0;
803
f63c2f24 804 switch (msr) {
1153968a
JF
805#ifdef CONFIG_X86_64
806 unsigned which;
807 u64 base;
808
809 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
810 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
811 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
812
813 set:
814 base = ((u64)high << 32) | low;
815 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 816 ret = -EIO;
1153968a
JF
817 break;
818#endif
d89961e2
JF
819
820 case MSR_STAR:
821 case MSR_CSTAR:
822 case MSR_LSTAR:
823 case MSR_SYSCALL_MASK:
824 case MSR_IA32_SYSENTER_CS:
825 case MSR_IA32_SYSENTER_ESP:
826 case MSR_IA32_SYSENTER_EIP:
827 /* Fast syscall setup is all done in hypercalls, so
828 these are all ignored. Stub them out here to stop
829 Xen console noise. */
830 break;
831
41f2e477
JF
832 case MSR_IA32_CR_PAT:
833 if (smp_processor_id() == 0)
834 xen_set_pat(((u64)high << 32) | low);
835 break;
836
1153968a
JF
837 default:
838 ret = native_write_msr_safe(msr, low, high);
839 }
840
841 return ret;
842}
843
0e91398f 844void xen_setup_shared_info(void)
5ead97c8
JF
845{
846 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
847 set_fixmap(FIX_PARAVIRT_BOOTMAP,
848 xen_start_info->shared_info);
849
850 HYPERVISOR_shared_info =
851 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
852 } else
853 HYPERVISOR_shared_info =
854 (struct shared_info *)__va(xen_start_info->shared_info);
855
2e8fe719
JF
856#ifndef CONFIG_SMP
857 /* In UP this is as good a place as any to set up shared info */
858 xen_setup_vcpu_info_placement();
859#endif
d5edbc1f
JF
860
861 xen_setup_mfn_list_list();
2e8fe719
JF
862}
863
60223a32 864/* This is called once we have the cpu_possible_map */
0e91398f 865void xen_setup_vcpu_info_placement(void)
60223a32
JF
866{
867 int cpu;
868
869 for_each_possible_cpu(cpu)
870 xen_vcpu_setup(cpu);
871
872 /* xen_vcpu_setup managed to place the vcpu_info within the
873 percpu area for all cpus, so make use of it */
874 if (have_vcpu_info_placement) {
ecb93d1c
JF
875 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
876 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
877 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
878 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 879 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 880 }
5ead97c8
JF
881}
882
ab144f5e
AK
883static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
884 unsigned long addr, unsigned len)
6487673b
JF
885{
886 char *start, *end, *reloc;
887 unsigned ret;
888
889 start = end = reloc = NULL;
890
93b1eab3
JF
891#define SITE(op, x) \
892 case PARAVIRT_PATCH(op.x): \
6487673b
JF
893 if (have_vcpu_info_placement) { \
894 start = (char *)xen_##x##_direct; \
895 end = xen_##x##_direct_end; \
896 reloc = xen_##x##_direct_reloc; \
897 } \
898 goto patch_site
899
900 switch (type) {
93b1eab3
JF
901 SITE(pv_irq_ops, irq_enable);
902 SITE(pv_irq_ops, irq_disable);
903 SITE(pv_irq_ops, save_fl);
904 SITE(pv_irq_ops, restore_fl);
6487673b
JF
905#undef SITE
906
907 patch_site:
908 if (start == NULL || (end-start) > len)
909 goto default_patch;
910
ab144f5e 911 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
912
913 /* Note: because reloc is assigned from something that
914 appears to be an array, gcc assumes it's non-null,
915 but doesn't know its relationship with start and
916 end. */
917 if (reloc > start && reloc < end) {
918 int reloc_off = reloc - start;
ab144f5e
AK
919 long *relocp = (long *)(insnbuf + reloc_off);
920 long delta = start - (char *)addr;
6487673b
JF
921
922 *relocp += delta;
923 }
924 break;
925
926 default_patch:
927 default:
ab144f5e
AK
928 ret = paravirt_patch_default(type, clobbers, insnbuf,
929 addr, len);
6487673b
JF
930 break;
931 }
932
933 return ret;
934}
935
93b1eab3 936static const struct pv_info xen_info __initdata = {
5ead97c8
JF
937 .paravirt_enabled = 1,
938 .shared_kernel_pmd = 0,
939
940 .name = "Xen",
93b1eab3 941};
5ead97c8 942
93b1eab3 943static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 944 .patch = xen_patch,
93b1eab3 945};
5ead97c8 946
93b1eab3 947static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
948 .cpuid = xen_cpuid,
949
950 .set_debugreg = xen_set_debugreg,
951 .get_debugreg = xen_get_debugreg,
952
7b1333aa 953 .clts = xen_clts,
5ead97c8 954
a789ed5f 955 .read_cr0 = xen_read_cr0,
7b1333aa 956 .write_cr0 = xen_write_cr0,
5ead97c8 957
5ead97c8
JF
958 .read_cr4 = native_read_cr4,
959 .read_cr4_safe = native_read_cr4_safe,
960 .write_cr4 = xen_write_cr4,
961
5ead97c8
JF
962 .wbinvd = native_wbinvd,
963
964 .read_msr = native_read_msr_safe,
1153968a 965 .write_msr = xen_write_msr_safe,
5ead97c8
JF
966 .read_tsc = native_read_tsc,
967 .read_pmc = native_read_pmc,
968
81e103f1 969 .iret = xen_iret,
d75cd22f 970 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
971#ifdef CONFIG_X86_64
972 .usergs_sysret32 = xen_sysret32,
973 .usergs_sysret64 = xen_sysret64,
974#endif
5ead97c8
JF
975
976 .load_tr_desc = paravirt_nop,
977 .set_ldt = xen_set_ldt,
978 .load_gdt = xen_load_gdt,
979 .load_idt = xen_load_idt,
980 .load_tls = xen_load_tls,
a8fc1089
EH
981#ifdef CONFIG_X86_64
982 .load_gs_index = xen_load_gs_index,
983#endif
5ead97c8 984
38ffbe66
JF
985 .alloc_ldt = xen_alloc_ldt,
986 .free_ldt = xen_free_ldt,
987
5ead97c8
JF
988 .store_gdt = native_store_gdt,
989 .store_idt = native_store_idt,
990 .store_tr = xen_store_tr,
991
992 .write_ldt_entry = xen_write_ldt_entry,
993 .write_gdt_entry = xen_write_gdt_entry,
994 .write_idt_entry = xen_write_idt_entry,
faca6227 995 .load_sp0 = xen_load_sp0,
5ead97c8
JF
996
997 .set_iopl_mask = xen_set_iopl_mask,
998 .io_delay = xen_io_delay,
999
952d1d70
JF
1000 /* Xen takes care of %gs when switching to usermode for us */
1001 .swapgs = paravirt_nop,
1002
224101ed
JF
1003 .start_context_switch = paravirt_start_context_switch,
1004 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1005};
1006
93b1eab3 1007static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1008#ifdef CONFIG_X86_LOCAL_APIC
5ead97c8
JF
1009 .startup_ipi_hook = paravirt_nop,
1010#endif
93b1eab3
JF
1011};
1012
fefa629a
JF
1013static void xen_reboot(int reason)
1014{
349c709f
JF
1015 struct sched_shutdown r = { .reason = reason };
1016
349c709f 1017 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1018 BUG();
1019}
1020
1021static void xen_restart(char *msg)
1022{
1023 xen_reboot(SHUTDOWN_reboot);
1024}
1025
1026static void xen_emergency_restart(void)
1027{
1028 xen_reboot(SHUTDOWN_reboot);
1029}
1030
1031static void xen_machine_halt(void)
1032{
1033 xen_reboot(SHUTDOWN_poweroff);
1034}
1035
1036static void xen_crash_shutdown(struct pt_regs *regs)
1037{
1038 xen_reboot(SHUTDOWN_crash);
1039}
1040
f09f6d19
DD
1041static int
1042xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1043{
086748e5 1044 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1045 return NOTIFY_DONE;
1046}
1047
1048static struct notifier_block xen_panic_block = {
1049 .notifier_call= xen_panic_event,
1050};
1051
1052int xen_panic_handler_init(void)
1053{
1054 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1055 return 0;
1056}
1057
fefa629a
JF
1058static const struct machine_ops __initdata xen_machine_ops = {
1059 .restart = xen_restart,
1060 .halt = xen_machine_halt,
1061 .power_off = xen_machine_halt,
1062 .shutdown = xen_machine_halt,
1063 .crash_shutdown = xen_crash_shutdown,
1064 .emergency_restart = xen_emergency_restart,
1065};
1066
577eebea
JF
1067/*
1068 * Set up the GDT and segment registers for -fstack-protector. Until
1069 * we do this, we have to be careful not to call any stack-protected
1070 * function, which is most of the kernel.
1071 */
1072static void __init xen_setup_stackprotector(void)
1073{
1074 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1075 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1076
1077 setup_stack_canary_segment(0);
1078 switch_to_new_gdt(0);
1079
1080 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1081 pv_cpu_ops.load_gdt = xen_load_gdt;
1082}
1083
5ead97c8
JF
1084/* First C function to be called on Xen boot */
1085asmlinkage void __init xen_start_kernel(void)
1086{
ec35a69c
KRW
1087 struct physdev_set_iopl set_iopl;
1088 int rc;
5ead97c8
JF
1089 pgd_t *pgd;
1090
1091 if (!xen_start_info)
1092 return;
1093
6e833587
JF
1094 xen_domain_type = XEN_PV_DOMAIN;
1095
7e77506a
IC
1096 xen_setup_machphys_mapping();
1097
5ead97c8 1098 /* Install Xen paravirt ops */
93b1eab3
JF
1099 pv_info = xen_info;
1100 pv_init_ops = xen_init_ops;
93b1eab3 1101 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1102 pv_apic_ops = xen_apic_ops;
93b1eab3 1103
6b18ae3e 1104 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1105 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1106 x86_init.oem.banner = xen_banner;
845b3944 1107
409771d2 1108 xen_init_time_ops();
93b1eab3 1109
ce2eef33 1110 /*
577eebea 1111 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1112 */
577eebea 1113
973df35e
JF
1114 xen_init_mmu_ops();
1115
577eebea
JF
1116 /* Prevent unwanted bits from being set in PTEs. */
1117 __supported_pte_mask &= ~_PAGE_GLOBAL;
1118 if (!xen_initial_domain())
1119 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1120
1121 __supported_pte_mask |= _PAGE_IOMAP;
1122
817a824b
IC
1123 /*
1124 * Prevent page tables from being allocated in highmem, even
1125 * if CONFIG_HIGHPTE is enabled.
1126 */
1127 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1128
b75fe4e5 1129 /* Work out if we support NX */
4763ed4d 1130 x86_configure_nx();
b75fe4e5 1131
577eebea
JF
1132 xen_setup_features();
1133
1134 /* Get mfn list */
1135 if (!xen_feature(XENFEAT_auto_translated_physmap))
1136 xen_build_dynamic_phys_to_machine();
1137
1138 /*
1139 * Set up kernel GDT and segment registers, mainly so that
1140 * -fstack-protector code can be executed.
1141 */
1142 xen_setup_stackprotector();
0d1edf46 1143
ce2eef33 1144 xen_init_irq_ops();
e826fe1b
JF
1145 xen_init_cpuid_mask();
1146
94a8c3c2 1147#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1148 /*
94a8c3c2 1149 * set up the basic apic ops.
ad66dd34 1150 */
c1eeb2de 1151 set_xen_basic_apic_ops();
ad66dd34 1152#endif
93b1eab3 1153
e57778a1
JF
1154 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1155 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1156 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1157 }
1158
fefa629a
JF
1159 machine_ops = xen_machine_ops;
1160
38341432
JF
1161 /*
1162 * The only reliable way to retain the initial address of the
1163 * percpu gdt_page is to remember it here, so we can go and
1164 * mark it RW later, when the initial percpu area is freed.
1165 */
1166 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1167
a9e7062d 1168 xen_smp_init();
5ead97c8 1169
c1f5db1a
IC
1170#ifdef CONFIG_ACPI_NUMA
1171 /*
1172 * The pages we from Xen are not related to machine pages, so
1173 * any NUMA information the kernel tries to get from ACPI will
1174 * be meaningless. Prevent it from trying.
1175 */
1176 acpi_numa = -1;
1177#endif
1178
5ead97c8
JF
1179 pgd = (pgd_t *)xen_start_info->pt_base;
1180
7347b408
AN
1181 if (!xen_initial_domain())
1182 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1183
1184 __supported_pte_mask |= _PAGE_IOMAP;
60223a32 1185 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1186 possible map and a non-dummy shared_info. */
60223a32 1187 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1188
55d80856 1189 local_irq_disable();
2ce802f6 1190 early_boot_irqs_disabled = true;
55d80856 1191
236260b9
JF
1192 memblock_init();
1193
084a2a4e 1194 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1195 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
4ec5387c 1196 xen_ident_map_ISA();
5ead97c8 1197
33a84750
JF
1198 /* Allocate and initialize top and mid mfn levels for p2m structure */
1199 xen_build_mfn_list_list();
1200
5ead97c8
JF
1201 /* keep using Xen gdt for now; no urgent need to change it */
1202
e68266b7 1203#ifdef CONFIG_X86_32
93b1eab3 1204 pv_info.kernel_rpl = 1;
5ead97c8 1205 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1206 pv_info.kernel_rpl = 0;
e68266b7
IC
1207#else
1208 pv_info.kernel_rpl = 0;
1209#endif
5ead97c8 1210 /* set the limit of our address space */
fb1d8404 1211 xen_reserve_top();
5ead97c8 1212
ec35a69c
KRW
1213 /* We used to do this in xen_arch_setup, but that is too late on AMD
1214 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1215 * which pokes 0xcf8 port.
1216 */
1217 set_iopl.iopl = 1;
1218 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1219 if (rc != 0)
1220 xen_raw_printk("physdev_op failed %d\n", rc);
1221
7d087b68 1222#ifdef CONFIG_X86_32
5ead97c8
JF
1223 /* set up basic CPUID stuff */
1224 cpu_detect(&new_cpu_data);
1225 new_cpu_data.hard_math = 1;
d560bc61 1226 new_cpu_data.wp_works_ok = 1;
5ead97c8 1227 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1228#endif
5ead97c8
JF
1229
1230 /* Poke various useful things into boot_params */
30c82645
PA
1231 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1232 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1233 ? __pa(xen_start_info->mod_start) : 0;
1234 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1235 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1236
6e833587 1237 if (!xen_initial_domain()) {
83abc70a 1238 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1239 add_preferred_console("tty", 0, NULL);
b8c2d3df 1240 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1241 if (pci_xen)
1242 x86_init.pci.arch_init = pci_xen_init;
5d990b62
CW
1243 } else {
1244 /* Make sure ACS will be enabled */
1245 pci_request_acs();
9e124fe1 1246 }
5d990b62 1247
b8c2d3df 1248
084a2a4e
JF
1249 xen_raw_console_write("about to get started...\n");
1250
499d19b8
JF
1251 xen_setup_runstate_info(0);
1252
5ead97c8 1253 /* Start the world */
f5d36de0 1254#ifdef CONFIG_X86_32
f0d43100 1255 i386_start_kernel();
f5d36de0 1256#else
084a2a4e 1257 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1258#endif
5ead97c8 1259}
bee6ab53 1260
bee6ab53
SY
1261static int init_hvm_pv_info(int *major, int *minor)
1262{
1263 uint32_t eax, ebx, ecx, edx, pages, msr, base;
1264 u64 pfn;
1265
1266 base = xen_cpuid_base();
1267 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1268
1269 *major = eax >> 16;
1270 *minor = eax & 0xffff;
1271 printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor);
1272
1273 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1274
1275 pfn = __pa(hypercall_page);
1276 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1277
1278 xen_setup_features();
1279
cff520b9 1280 pv_info.name = "Xen HVM";
bee6ab53
SY
1281
1282 xen_domain_type = XEN_HVM_DOMAIN;
1283
1284 return 0;
1285}
1286
44b46c3e 1287void __ref xen_hvm_init_shared_info(void)
bee6ab53 1288{
016b6f5f 1289 int cpu;
bee6ab53 1290 struct xen_add_to_physmap xatp;
016b6f5f 1291 static struct shared_info *shared_info_page = 0;
bee6ab53 1292
016b6f5f
SS
1293 if (!shared_info_page)
1294 shared_info_page = (struct shared_info *)
1295 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1296 xatp.domid = DOMID_SELF;
1297 xatp.idx = 0;
1298 xatp.space = XENMAPSPACE_shared_info;
1299 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1300 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1301 BUG();
1302
1303 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1304
016b6f5f
SS
1305 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1306 * page, we use it in the event channel upcall and in some pvclock
1307 * related functions. We don't need the vcpu_info placement
1308 * optimizations because we don't use any pv_mmu or pv_irq op on
1309 * HVM.
1310 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1311 * online but xen_hvm_init_shared_info is run at resume time too and
1312 * in that case multiple vcpus might be online. */
1313 for_each_online_cpu(cpu) {
1314 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1315 }
bee6ab53
SY
1316}
1317
ca65f9fc 1318#ifdef CONFIG_XEN_PVHVM
38e20b07
SY
1319static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1320 unsigned long action, void *hcpu)
1321{
1322 int cpu = (long)hcpu;
1323 switch (action) {
1324 case CPU_UP_PREPARE:
1325 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
99bbb3a8
SS
1326 if (xen_have_vector_callback)
1327 xen_init_lock_cpu(cpu);
38e20b07
SY
1328 break;
1329 default:
1330 break;
1331 }
1332 return NOTIFY_OK;
1333}
1334
1335static struct notifier_block __cpuinitdata xen_hvm_cpu_notifier = {
1336 .notifier_call = xen_hvm_cpu_notify,
1337};
1338
bee6ab53
SY
1339static void __init xen_hvm_guest_init(void)
1340{
1341 int r;
1342 int major, minor;
1343
1344 r = init_hvm_pv_info(&major, &minor);
1345 if (r < 0)
1346 return;
1347
016b6f5f 1348 xen_hvm_init_shared_info();
38e20b07
SY
1349
1350 if (xen_feature(XENFEAT_hvm_callback_vector))
1351 xen_have_vector_callback = 1;
99bbb3a8 1352 xen_hvm_smp_init();
38e20b07 1353 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1354 xen_unplug_emulated_devices();
38e20b07
SY
1355 have_vcpu_info_placement = 0;
1356 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1357 xen_hvm_init_time_ops();
59151001 1358 xen_hvm_init_mmu_ops();
bee6ab53
SY
1359}
1360
1361static bool __init xen_hvm_platform(void)
1362{
1363 if (xen_pv_domain())
1364 return false;
1365
1366 if (!xen_cpuid_base())
1367 return false;
1368
1369 return true;
1370}
1371
d9b8ca84
SY
1372bool xen_hvm_need_lapic(void)
1373{
1374 if (xen_pv_domain())
1375 return false;
1376 if (!xen_hvm_domain())
1377 return false;
1378 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1379 return false;
1380 return true;
1381}
1382EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1383
bee6ab53
SY
1384const __refconst struct hypervisor_x86 x86_hyper_xen_hvm = {
1385 .name = "Xen HVM",
1386 .detect = xen_hvm_platform,
1387 .init_platform = xen_hvm_guest_init,
1388};
1389EXPORT_SYMBOL(x86_hyper_xen_hvm);
ca65f9fc 1390#endif
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