x86: Fix common misspellings
[deliverable/linux.git] / arch / x86 / xen / mmu.c
CommitLineData
3b827c1b
JF
1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
d2cb2145 45#include <linux/vmalloc.h>
44408ad7 46#include <linux/module.h>
5a0e3ad6 47#include <linux/gfp.h>
a9ce6bc1 48#include <linux/memblock.h>
2222e71b 49#include <linux/seq_file.h>
3b827c1b
JF
50
51#include <asm/pgtable.h>
52#include <asm/tlbflush.h>
5deb30d1 53#include <asm/fixmap.h>
3b827c1b 54#include <asm/mmu_context.h>
319f3ba5 55#include <asm/setup.h>
f4f97b3e 56#include <asm/paravirt.h>
7347b408 57#include <asm/e820.h>
cbcd79c2 58#include <asm/linkage.h>
08bbc9da 59#include <asm/page.h>
fef5ba79 60#include <asm/init.h>
41f2e477 61#include <asm/pat.h>
3b827c1b
JF
62
63#include <asm/xen/hypercall.h>
f4f97b3e 64#include <asm/xen/hypervisor.h>
3b827c1b 65
c0011dbf 66#include <xen/xen.h>
3b827c1b
JF
67#include <xen/page.h>
68#include <xen/interface/xen.h>
59151001 69#include <xen/interface/hvm/hvm_op.h>
319f3ba5 70#include <xen/interface/version.h>
c0011dbf 71#include <xen/interface/memory.h>
319f3ba5 72#include <xen/hvc-console.h>
3b827c1b 73
f4f97b3e 74#include "multicalls.h"
3b827c1b 75#include "mmu.h"
994025ca
JF
76#include "debugfs.h"
77
78#define MMU_UPDATE_HISTO 30
79
19001c8c
AN
80/*
81 * Protects atomic reservation decrease/increase against concurrent increases.
82 * Also protects non-atomic updates of current_pages and driver_pages, and
83 * balloon lists.
84 */
85DEFINE_SPINLOCK(xen_reservation_lock);
86
994025ca
JF
87#ifdef CONFIG_XEN_DEBUG_FS
88
89static struct {
90 u32 pgd_update;
91 u32 pgd_update_pinned;
92 u32 pgd_update_batched;
93
94 u32 pud_update;
95 u32 pud_update_pinned;
96 u32 pud_update_batched;
97
98 u32 pmd_update;
99 u32 pmd_update_pinned;
100 u32 pmd_update_batched;
101
102 u32 pte_update;
103 u32 pte_update_pinned;
104 u32 pte_update_batched;
105
106 u32 mmu_update;
107 u32 mmu_update_extended;
108 u32 mmu_update_histo[MMU_UPDATE_HISTO];
109
110 u32 prot_commit;
111 u32 prot_commit_batched;
112
113 u32 set_pte_at;
114 u32 set_pte_at_batched;
115 u32 set_pte_at_pinned;
116 u32 set_pte_at_current;
117 u32 set_pte_at_kernel;
118} mmu_stats;
119
120static u8 zero_stats;
121
122static inline void check_zero(void)
123{
124 if (unlikely(zero_stats)) {
125 memset(&mmu_stats, 0, sizeof(mmu_stats));
126 zero_stats = 0;
127 }
128}
129
130#define ADD_STATS(elem, val) \
131 do { check_zero(); mmu_stats.elem += (val); } while(0)
132
133#else /* !CONFIG_XEN_DEBUG_FS */
134
135#define ADD_STATS(elem, val) do { (void)(val); } while(0)
136
137#endif /* CONFIG_XEN_DEBUG_FS */
3b827c1b 138
319f3ba5
JF
139
140/*
141 * Identity map, in addition to plain kernel map. This needs to be
142 * large enough to allocate page table pages to allocate the rest.
143 * Each page can map 2MB.
144 */
764f0138
JF
145#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
146static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
319f3ba5
JF
147
148#ifdef CONFIG_X86_64
149/* l3 pud for userspace vsyscall mapping */
150static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
151#endif /* CONFIG_X86_64 */
152
153/*
154 * Note about cr3 (pagetable base) values:
155 *
156 * xen_cr3 contains the current logical cr3 value; it contains the
157 * last set cr3. This may not be the current effective cr3, because
158 * its update may be being lazily deferred. However, a vcpu looking
159 * at its own cr3 can use this value knowing that it everything will
160 * be self-consistent.
161 *
162 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
163 * hypercall to set the vcpu cr3 is complete (so it may be a little
164 * out of date, but it will never be set early). If one vcpu is
165 * looking at another vcpu's cr3 value, it should use this variable.
166 */
167DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
168DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
169
170
d6182fbf
JF
171/*
172 * Just beyond the highest usermode address. STACK_TOP_MAX has a
173 * redzone above it, so round it up to a PGD boundary.
174 */
175#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
176
9976b39b
JF
177unsigned long arbitrary_virt_to_mfn(void *vaddr)
178{
179 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
180
181 return PFN_DOWN(maddr.maddr);
182}
183
ce803e70 184xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 185{
ce803e70 186 unsigned long address = (unsigned long)vaddr;
da7bfc50 187 unsigned int level;
9f32d21c
CL
188 pte_t *pte;
189 unsigned offset;
3b827c1b 190
9f32d21c
CL
191 /*
192 * if the PFN is in the linear mapped vaddr range, we can just use
193 * the (quick) virt_to_machine() p2m lookup
194 */
195 if (virt_addr_valid(vaddr))
196 return virt_to_machine(vaddr);
197
198 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 199
9f32d21c
CL
200 pte = lookup_address(address, &level);
201 BUG_ON(pte == NULL);
202 offset = address & ~PAGE_MASK;
ebd879e3 203 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b 204}
de23be5f 205EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
3b827c1b
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206
207void make_lowmem_page_readonly(void *vaddr)
208{
209 pte_t *pte, ptev;
210 unsigned long address = (unsigned long)vaddr;
da7bfc50 211 unsigned int level;
3b827c1b 212
f0646e43 213 pte = lookup_address(address, &level);
fef5ba79
JF
214 if (pte == NULL)
215 return; /* vaddr missing */
3b827c1b
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216
217 ptev = pte_wrprotect(*pte);
218
219 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
220 BUG();
221}
222
223void make_lowmem_page_readwrite(void *vaddr)
224{
225 pte_t *pte, ptev;
226 unsigned long address = (unsigned long)vaddr;
da7bfc50 227 unsigned int level;
3b827c1b 228
f0646e43 229 pte = lookup_address(address, &level);
fef5ba79
JF
230 if (pte == NULL)
231 return; /* vaddr missing */
3b827c1b
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232
233 ptev = pte_mkwrite(*pte);
234
235 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
236 BUG();
237}
238
239
7708ad64 240static bool xen_page_pinned(void *ptr)
e2426cf8
JF
241{
242 struct page *page = virt_to_page(ptr);
243
244 return PagePinned(page);
245}
246
c0011dbf
JF
247static bool xen_iomap_pte(pte_t pte)
248{
7347b408 249 return pte_flags(pte) & _PAGE_IOMAP;
c0011dbf
JF
250}
251
eba3ff8b 252void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
c0011dbf
JF
253{
254 struct multicall_space mcs;
255 struct mmu_update *u;
256
257 mcs = xen_mc_entry(sizeof(*u));
258 u = mcs.args;
259
260 /* ptep might be kmapped when using 32-bit HIGHPTE */
261 u->ptr = arbitrary_virt_to_machine(ptep).maddr;
262 u->val = pte_val_ma(pteval);
263
eba3ff8b 264 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
c0011dbf
JF
265
266 xen_mc_issue(PARAVIRT_LAZY_MMU);
267}
eba3ff8b
JF
268EXPORT_SYMBOL_GPL(xen_set_domain_pte);
269
270static void xen_set_iomap_pte(pte_t *ptep, pte_t pteval)
271{
272 xen_set_domain_pte(ptep, pteval, DOMID_IO);
273}
c0011dbf 274
7708ad64 275static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 276{
d66bf8fc
JF
277 struct multicall_space mcs;
278 struct mmu_update *u;
3b827c1b 279
400d3494
JF
280 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
281
994025ca
JF
282 if (mcs.mc != NULL) {
283 ADD_STATS(mmu_update_extended, 1);
284 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
285
400d3494 286 mcs.mc->args[1]++;
994025ca
JF
287
288 if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
289 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
290 else
291 ADD_STATS(mmu_update_histo[0], 1);
292 } else {
293 ADD_STATS(mmu_update, 1);
400d3494
JF
294 mcs = __xen_mc_entry(sizeof(*u));
295 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
994025ca 296 ADD_STATS(mmu_update_histo[1], 1);
400d3494 297 }
d66bf8fc 298
d66bf8fc 299 u = mcs.args;
400d3494
JF
300 *u = *update;
301}
302
303void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
304{
305 struct mmu_update u;
306
307 preempt_disable();
308
309 xen_mc_batch();
310
ce803e70
JF
311 /* ptr may be ioremapped for 64-bit pagetable setup */
312 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 313 u.val = pmd_val_ma(val);
7708ad64 314 xen_extend_mmu_update(&u);
d66bf8fc 315
994025ca
JF
316 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
317
d66bf8fc
JF
318 xen_mc_issue(PARAVIRT_LAZY_MMU);
319
320 preempt_enable();
3b827c1b
JF
321}
322
e2426cf8
JF
323void xen_set_pmd(pmd_t *ptr, pmd_t val)
324{
994025ca
JF
325 ADD_STATS(pmd_update, 1);
326
e2426cf8
JF
327 /* If page is not pinned, we can just update the entry
328 directly */
7708ad64 329 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
330 *ptr = val;
331 return;
332 }
333
994025ca
JF
334 ADD_STATS(pmd_update_pinned, 1);
335
e2426cf8
JF
336 xen_set_pmd_hyper(ptr, val);
337}
338
3b827c1b
JF
339/*
340 * Associate a virtual page frame with a given physical page frame
341 * and protection flags for that frame.
342 */
343void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
344{
836fe2f2 345 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
346}
347
348void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
349 pte_t *ptep, pte_t pteval)
350{
c0011dbf
JF
351 if (xen_iomap_pte(pteval)) {
352 xen_set_iomap_pte(ptep, pteval);
353 goto out;
354 }
355
994025ca
JF
356 ADD_STATS(set_pte_at, 1);
357// ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
358 ADD_STATS(set_pte_at_current, mm == current->mm);
359 ADD_STATS(set_pte_at_kernel, mm == &init_mm);
360
d66bf8fc 361 if (mm == current->mm || mm == &init_mm) {
8965c1c0 362 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
d66bf8fc
JF
363 struct multicall_space mcs;
364 mcs = xen_mc_entry(0);
365
366 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
994025ca 367 ADD_STATS(set_pte_at_batched, 1);
d66bf8fc 368 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 369 goto out;
d66bf8fc
JF
370 } else
371 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
2bd50036 372 goto out;
d66bf8fc
JF
373 }
374 xen_set_pte(ptep, pteval);
2bd50036 375
2829b449 376out: return;
3b827c1b
JF
377}
378
f63c2f24
T
379pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
380 unsigned long addr, pte_t *ptep)
947a69c9 381{
e57778a1
JF
382 /* Just return the pte as-is. We preserve the bits on commit */
383 return *ptep;
384}
385
386void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
387 pte_t *ptep, pte_t pte)
388{
400d3494 389 struct mmu_update u;
e57778a1 390
400d3494 391 xen_mc_batch();
947a69c9 392
9f32d21c 393 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 394 u.val = pte_val_ma(pte);
7708ad64 395 xen_extend_mmu_update(&u);
947a69c9 396
994025ca
JF
397 ADD_STATS(prot_commit, 1);
398 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
399
e57778a1 400 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
401}
402
ebb9cfe2
JF
403/* Assume pteval_t is equivalent to all the other *val_t types. */
404static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 405{
ebb9cfe2 406 if (val & _PAGE_PRESENT) {
59438c9f 407 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 408 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 409 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
ebb9cfe2 410 }
947a69c9 411
ebb9cfe2 412 return val;
947a69c9
JF
413}
414
ebb9cfe2 415static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 416{
ebb9cfe2 417 if (val & _PAGE_PRESENT) {
59438c9f 418 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 419 pteval_t flags = val & PTE_FLAGS_MASK;
fb38923e 420 unsigned long mfn;
cfd8951e 421
fb38923e
KRW
422 if (!xen_feature(XENFEAT_auto_translated_physmap))
423 mfn = get_phys_to_machine(pfn);
424 else
425 mfn = pfn;
cfd8951e
JF
426 /*
427 * If there's no mfn for the pfn, then just create an
428 * empty non-present pte. Unfortunately this loses
429 * information about the original pfn, so
430 * pte_mfn_to_pfn is asymmetric.
431 */
432 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
433 mfn = 0;
434 flags = 0;
fb38923e
KRW
435 } else {
436 /*
437 * Paramount to do this test _after_ the
438 * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY &
439 * IDENTITY_FRAME_BIT resolves to true.
440 */
441 mfn &= ~FOREIGN_FRAME_BIT;
442 if (mfn & IDENTITY_FRAME_BIT) {
443 mfn &= ~IDENTITY_FRAME_BIT;
444 flags |= _PAGE_IOMAP;
445 }
cfd8951e 446 }
cfd8951e 447 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
947a69c9
JF
448 }
449
ebb9cfe2 450 return val;
947a69c9
JF
451}
452
c0011dbf
JF
453static pteval_t iomap_pte(pteval_t val)
454{
455 if (val & _PAGE_PRESENT) {
456 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
457 pteval_t flags = val & PTE_FLAGS_MASK;
458
459 /* We assume the pte frame number is a MFN, so
460 just use it as-is. */
461 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
462 }
463
464 return val;
465}
466
ebb9cfe2 467pteval_t xen_pte_val(pte_t pte)
947a69c9 468{
41f2e477 469 pteval_t pteval = pte.pte;
c0011dbf 470
41f2e477
JF
471 /* If this is a WC pte, convert back from Xen WC to Linux WC */
472 if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
473 WARN_ON(!pat_enabled);
474 pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
475 }
c0011dbf 476
41f2e477
JF
477 if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
478 return pteval;
479
480 return pte_mfn_to_pfn(pteval);
947a69c9 481}
da5de7c2 482PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 483
947a69c9
JF
484pgdval_t xen_pgd_val(pgd_t pgd)
485{
ebb9cfe2 486 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 487}
da5de7c2 488PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9 489
41f2e477
JF
490/*
491 * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7
492 * are reserved for now, to correspond to the Intel-reserved PAT
493 * types.
494 *
495 * We expect Linux's PAT set as follows:
496 *
497 * Idx PTE flags Linux Xen Default
498 * 0 WB WB WB
499 * 1 PWT WC WT WT
500 * 2 PCD UC- UC- UC-
501 * 3 PCD PWT UC UC UC
502 * 4 PAT WB WC WB
503 * 5 PAT PWT WC WP WT
504 * 6 PAT PCD UC- UC UC-
505 * 7 PAT PCD PWT UC UC UC
506 */
507
508void xen_set_pat(u64 pat)
509{
510 /* We expect Linux to use a PAT setting of
511 * UC UC- WC WB (ignoring the PAT flag) */
512 WARN_ON(pat != 0x0007010600070106ull);
513}
514
947a69c9
JF
515pte_t xen_make_pte(pteval_t pte)
516{
7347b408
AN
517 phys_addr_t addr = (pte & PTE_PFN_MASK);
518
41f2e477
JF
519 /* If Linux is trying to set a WC pte, then map to the Xen WC.
520 * If _PAGE_PAT is set, then it probably means it is really
521 * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
522 * things work out OK...
523 *
524 * (We should never see kernel mappings with _PAGE_PSE set,
525 * but we could see hugetlbfs mappings, I think.).
526 */
527 if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
528 if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
529 pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
530 }
531
7347b408
AN
532 /*
533 * Unprivileged domains are allowed to do IOMAPpings for
534 * PCI passthrough, but not map ISA space. The ISA
535 * mappings are just dummy local mappings to keep other
536 * parts of the kernel happy.
537 */
538 if (unlikely(pte & _PAGE_IOMAP) &&
539 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
c0011dbf 540 pte = iomap_pte(pte);
7347b408
AN
541 } else {
542 pte &= ~_PAGE_IOMAP;
c0011dbf 543 pte = pte_pfn_to_mfn(pte);
7347b408 544 }
c0011dbf 545
ebb9cfe2 546 return native_make_pte(pte);
947a69c9 547}
da5de7c2 548PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9 549
fc25151d
KRW
550#ifdef CONFIG_XEN_DEBUG
551pte_t xen_make_pte_debug(pteval_t pte)
552{
553 phys_addr_t addr = (pte & PTE_PFN_MASK);
554 phys_addr_t other_addr;
555 bool io_page = false;
556 pte_t _pte;
557
558 if (pte & _PAGE_IOMAP)
559 io_page = true;
560
561 _pte = xen_make_pte(pte);
562
563 if (!addr)
564 return _pte;
565
566 if (io_page &&
567 (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
568 other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT;
569 WARN(addr != other_addr,
570 "0x%lx is using VM_IO, but it is 0x%lx!\n",
571 (unsigned long)addr, (unsigned long)other_addr);
572 } else {
573 pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP;
574 other_addr = (_pte.pte & PTE_PFN_MASK);
575 WARN((addr == other_addr) && (!io_page) && (!iomap_set),
576 "0x%lx is missing VM_IO (and wasn't fixed)!\n",
577 (unsigned long)addr);
578 }
579
580 return _pte;
581}
582PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug);
583#endif
584
947a69c9
JF
585pgd_t xen_make_pgd(pgdval_t pgd)
586{
ebb9cfe2
JF
587 pgd = pte_pfn_to_mfn(pgd);
588 return native_make_pgd(pgd);
947a69c9 589}
da5de7c2 590PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9
JF
591
592pmdval_t xen_pmd_val(pmd_t pmd)
593{
ebb9cfe2 594 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 595}
da5de7c2 596PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 597
e2426cf8 598void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 599{
400d3494 600 struct mmu_update u;
f4f97b3e 601
d66bf8fc
JF
602 preempt_disable();
603
400d3494
JF
604 xen_mc_batch();
605
ce803e70
JF
606 /* ptr may be ioremapped for 64-bit pagetable setup */
607 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 608 u.val = pud_val_ma(val);
7708ad64 609 xen_extend_mmu_update(&u);
d66bf8fc 610
994025ca
JF
611 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
612
d66bf8fc
JF
613 xen_mc_issue(PARAVIRT_LAZY_MMU);
614
615 preempt_enable();
f4f97b3e
JF
616}
617
e2426cf8
JF
618void xen_set_pud(pud_t *ptr, pud_t val)
619{
994025ca
JF
620 ADD_STATS(pud_update, 1);
621
e2426cf8
JF
622 /* If page is not pinned, we can just update the entry
623 directly */
7708ad64 624 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
625 *ptr = val;
626 return;
627 }
628
994025ca
JF
629 ADD_STATS(pud_update_pinned, 1);
630
e2426cf8
JF
631 xen_set_pud_hyper(ptr, val);
632}
633
f4f97b3e
JF
634void xen_set_pte(pte_t *ptep, pte_t pte)
635{
c0011dbf
JF
636 if (xen_iomap_pte(pte)) {
637 xen_set_iomap_pte(ptep, pte);
638 return;
639 }
640
994025ca
JF
641 ADD_STATS(pte_update, 1);
642// ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
643 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
644
f6e58732 645#ifdef CONFIG_X86_PAE
f4f97b3e
JF
646 ptep->pte_high = pte.pte_high;
647 smp_wmb();
648 ptep->pte_low = pte.pte_low;
f6e58732
JF
649#else
650 *ptep = pte;
651#endif
f4f97b3e
JF
652}
653
f6e58732 654#ifdef CONFIG_X86_PAE
3b827c1b
JF
655void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
656{
c0011dbf
JF
657 if (xen_iomap_pte(pte)) {
658 xen_set_iomap_pte(ptep, pte);
659 return;
660 }
661
f6e58732 662 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
663}
664
665void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
666{
667 ptep->pte_low = 0;
668 smp_wmb(); /* make sure low gets written first */
669 ptep->pte_high = 0;
670}
671
672void xen_pmd_clear(pmd_t *pmdp)
673{
e2426cf8 674 set_pmd(pmdp, __pmd(0));
3b827c1b 675}
f6e58732 676#endif /* CONFIG_X86_PAE */
3b827c1b 677
abf33038 678pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 679{
ebb9cfe2 680 pmd = pte_pfn_to_mfn(pmd);
947a69c9 681 return native_make_pmd(pmd);
3b827c1b 682}
da5de7c2 683PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 684
f6e58732
JF
685#if PAGETABLE_LEVELS == 4
686pudval_t xen_pud_val(pud_t pud)
687{
688 return pte_mfn_to_pfn(pud.pud);
689}
da5de7c2 690PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732
JF
691
692pud_t xen_make_pud(pudval_t pud)
693{
694 pud = pte_pfn_to_mfn(pud);
695
696 return native_make_pud(pud);
697}
da5de7c2 698PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 699
d6182fbf 700pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 701{
d6182fbf
JF
702 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
703 unsigned offset = pgd - pgd_page;
704 pgd_t *user_ptr = NULL;
f6e58732 705
d6182fbf
JF
706 if (offset < pgd_index(USER_LIMIT)) {
707 struct page *page = virt_to_page(pgd_page);
708 user_ptr = (pgd_t *)page->private;
709 if (user_ptr)
710 user_ptr += offset;
711 }
f6e58732 712
d6182fbf
JF
713 return user_ptr;
714}
715
716static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
717{
718 struct mmu_update u;
f6e58732
JF
719
720 u.ptr = virt_to_machine(ptr).maddr;
721 u.val = pgd_val_ma(val);
7708ad64 722 xen_extend_mmu_update(&u);
d6182fbf
JF
723}
724
725/*
726 * Raw hypercall-based set_pgd, intended for in early boot before
727 * there's a page structure. This implies:
728 * 1. The only existing pagetable is the kernel's
729 * 2. It is always pinned
730 * 3. It has no user pagetable attached to it
731 */
732void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
733{
734 preempt_disable();
735
736 xen_mc_batch();
737
738 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
739
740 xen_mc_issue(PARAVIRT_LAZY_MMU);
741
742 preempt_enable();
743}
744
745void xen_set_pgd(pgd_t *ptr, pgd_t val)
746{
d6182fbf
JF
747 pgd_t *user_ptr = xen_get_user_pgd(ptr);
748
994025ca
JF
749 ADD_STATS(pgd_update, 1);
750
f6e58732
JF
751 /* If page is not pinned, we can just update the entry
752 directly */
7708ad64 753 if (!xen_page_pinned(ptr)) {
f6e58732 754 *ptr = val;
d6182fbf 755 if (user_ptr) {
7708ad64 756 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
757 *user_ptr = val;
758 }
f6e58732
JF
759 return;
760 }
761
994025ca
JF
762 ADD_STATS(pgd_update_pinned, 1);
763 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
764
d6182fbf
JF
765 /* If it's pinned, then we can at least batch the kernel and
766 user updates together. */
767 xen_mc_batch();
768
769 __xen_set_pgd_hyper(ptr, val);
770 if (user_ptr)
771 __xen_set_pgd_hyper(user_ptr, val);
772
773 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
774}
775#endif /* PAGETABLE_LEVELS == 4 */
776
f4f97b3e 777/*
5deb30d1
JF
778 * (Yet another) pagetable walker. This one is intended for pinning a
779 * pagetable. This means that it walks a pagetable and calls the
780 * callback function on each page it finds making up the page table,
781 * at every level. It walks the entire pagetable, but it only bothers
782 * pinning pte pages which are below limit. In the normal case this
783 * will be STACK_TOP_MAX, but at boot we need to pin up to
784 * FIXADDR_TOP.
785 *
786 * For 32-bit the important bit is that we don't pin beyond there,
787 * because then we start getting into Xen's ptes.
788 *
789 * For 64-bit, we must skip the Xen hole in the middle of the address
790 * space, just after the big x86-64 virtual hole.
791 */
86bbc2c2
IC
792static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
793 int (*func)(struct mm_struct *mm, struct page *,
794 enum pt_level),
795 unsigned long limit)
3b827c1b 796{
f4f97b3e 797 int flush = 0;
5deb30d1
JF
798 unsigned hole_low, hole_high;
799 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
800 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 801
5deb30d1
JF
802 /* The limit is the last byte to be touched */
803 limit--;
804 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
805
806 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
807 return 0;
808
5deb30d1
JF
809 /*
810 * 64-bit has a great big hole in the middle of the address
811 * space, which contains the Xen mappings. On 32-bit these
812 * will end up making a zero-sized hole and so is a no-op.
813 */
d6182fbf 814 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
815 hole_high = pgd_index(PAGE_OFFSET);
816
817 pgdidx_limit = pgd_index(limit);
818#if PTRS_PER_PUD > 1
819 pudidx_limit = pud_index(limit);
820#else
821 pudidx_limit = 0;
822#endif
823#if PTRS_PER_PMD > 1
824 pmdidx_limit = pmd_index(limit);
825#else
826 pmdidx_limit = 0;
827#endif
828
5deb30d1 829 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 830 pud_t *pud;
3b827c1b 831
5deb30d1
JF
832 if (pgdidx >= hole_low && pgdidx < hole_high)
833 continue;
f4f97b3e 834
5deb30d1 835 if (!pgd_val(pgd[pgdidx]))
3b827c1b 836 continue;
f4f97b3e 837
5deb30d1 838 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
839
840 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 841 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 842
5deb30d1 843 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 844 pmd_t *pmd;
f4f97b3e 845
5deb30d1
JF
846 if (pgdidx == pgdidx_limit &&
847 pudidx > pudidx_limit)
848 goto out;
3b827c1b 849
5deb30d1 850 if (pud_none(pud[pudidx]))
3b827c1b 851 continue;
f4f97b3e 852
5deb30d1 853 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
854
855 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 856 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 857
5deb30d1
JF
858 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
859 struct page *pte;
860
861 if (pgdidx == pgdidx_limit &&
862 pudidx == pudidx_limit &&
863 pmdidx > pmdidx_limit)
864 goto out;
3b827c1b 865
5deb30d1 866 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
867 continue;
868
5deb30d1 869 pte = pmd_page(pmd[pmdidx]);
eefb47f6 870 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
871 }
872 }
873 }
11ad93e5 874
5deb30d1 875out:
11ad93e5
JF
876 /* Do the top level last, so that the callbacks can use it as
877 a cue to do final things like tlb flushes. */
eefb47f6 878 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
879
880 return flush;
3b827c1b
JF
881}
882
86bbc2c2
IC
883static int xen_pgd_walk(struct mm_struct *mm,
884 int (*func)(struct mm_struct *mm, struct page *,
885 enum pt_level),
886 unsigned long limit)
887{
888 return __xen_pgd_walk(mm, mm->pgd, func, limit);
889}
890
7708ad64
JF
891/* If we're using split pte locks, then take the page's lock and
892 return a pointer to it. Otherwise return NULL. */
eefb47f6 893static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
894{
895 spinlock_t *ptl = NULL;
896
f7d0b926 897#if USE_SPLIT_PTLOCKS
74260714 898 ptl = __pte_lockptr(page);
eefb47f6 899 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
900#endif
901
902 return ptl;
903}
904
7708ad64 905static void xen_pte_unlock(void *v)
74260714
JF
906{
907 spinlock_t *ptl = v;
908 spin_unlock(ptl);
909}
910
911static void xen_do_pin(unsigned level, unsigned long pfn)
912{
913 struct mmuext_op *op;
914 struct multicall_space mcs;
915
916 mcs = __xen_mc_entry(sizeof(*op));
917 op = mcs.args;
918 op->cmd = level;
919 op->arg1.mfn = pfn_to_mfn(pfn);
920 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
921}
922
eefb47f6
JF
923static int xen_pin_page(struct mm_struct *mm, struct page *page,
924 enum pt_level level)
f4f97b3e 925{
d60cd46b 926 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
927 int flush;
928
929 if (pgfl)
930 flush = 0; /* already pinned */
931 else if (PageHighMem(page))
932 /* kmaps need flushing if we found an unpinned
933 highpage */
934 flush = 1;
935 else {
936 void *pt = lowmem_page_address(page);
937 unsigned long pfn = page_to_pfn(page);
938 struct multicall_space mcs = __xen_mc_entry(0);
74260714 939 spinlock_t *ptl;
f4f97b3e
JF
940
941 flush = 0;
942
11ad93e5
JF
943 /*
944 * We need to hold the pagetable lock between the time
945 * we make the pagetable RO and when we actually pin
946 * it. If we don't, then other users may come in and
947 * attempt to update the pagetable by writing it,
948 * which will fail because the memory is RO but not
949 * pinned, so Xen won't do the trap'n'emulate.
950 *
951 * If we're using split pte locks, we can't hold the
952 * entire pagetable's worth of locks during the
953 * traverse, because we may wrap the preempt count (8
954 * bits). The solution is to mark RO and pin each PTE
955 * page while holding the lock. This means the number
956 * of locks we end up holding is never more than a
957 * batch size (~32 entries, at present).
958 *
959 * If we're not using split pte locks, we needn't pin
960 * the PTE pages independently, because we're
961 * protected by the overall pagetable lock.
962 */
74260714
JF
963 ptl = NULL;
964 if (level == PT_PTE)
eefb47f6 965 ptl = xen_pte_lock(page, mm);
74260714 966
f4f97b3e
JF
967 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
968 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
969 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
970
11ad93e5 971 if (ptl) {
74260714
JF
972 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
973
74260714
JF
974 /* Queue a deferred unlock for when this batch
975 is completed. */
7708ad64 976 xen_mc_callback(xen_pte_unlock, ptl);
74260714 977 }
f4f97b3e
JF
978 }
979
980 return flush;
981}
3b827c1b 982
f4f97b3e
JF
983/* This is called just after a mm has been created, but it has not
984 been used yet. We need to make sure that its pagetable is all
985 read-only, and can be pinned. */
eefb47f6 986static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 987{
f4f97b3e 988 xen_mc_batch();
3b827c1b 989
86bbc2c2 990 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 991 /* re-enable interrupts for flushing */
f87e4cac 992 xen_mc_issue(0);
d05fdf31 993
f4f97b3e 994 kmap_flush_unused();
d05fdf31 995
f87e4cac
JF
996 xen_mc_batch();
997 }
f4f97b3e 998
d6182fbf
JF
999#ifdef CONFIG_X86_64
1000 {
1001 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1002
1003 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
1004
1005 if (user_pgd) {
eefb47f6 1006 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
1007 xen_do_pin(MMUEXT_PIN_L4_TABLE,
1008 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
1009 }
1010 }
1011#else /* CONFIG_X86_32 */
5deb30d1
JF
1012#ifdef CONFIG_X86_PAE
1013 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 1014 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 1015 PT_PMD);
5deb30d1 1016#endif
28499143 1017 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 1018#endif /* CONFIG_X86_64 */
f4f97b3e 1019 xen_mc_issue(0);
3b827c1b
JF
1020}
1021
eefb47f6
JF
1022static void xen_pgd_pin(struct mm_struct *mm)
1023{
1024 __xen_pgd_pin(mm, mm->pgd);
1025}
1026
0e91398f
JF
1027/*
1028 * On save, we need to pin all pagetables to make sure they get their
1029 * mfns turned into pfns. Search the list for any unpinned pgds and pin
1030 * them (unpinned pgds are not currently in use, probably because the
1031 * process is under construction or destruction).
eefb47f6
JF
1032 *
1033 * Expected to be called in stop_machine() ("equivalent to taking
1034 * every spinlock in the system"), so the locking doesn't really
1035 * matter all that much.
0e91398f
JF
1036 */
1037void xen_mm_pin_all(void)
1038{
0e91398f 1039 struct page *page;
74260714 1040
a79e53d8 1041 spin_lock(&pgd_lock);
f4f97b3e 1042
0e91398f
JF
1043 list_for_each_entry(page, &pgd_list, lru) {
1044 if (!PagePinned(page)) {
eefb47f6 1045 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
1046 SetPageSavePinned(page);
1047 }
1048 }
1049
a79e53d8 1050 spin_unlock(&pgd_lock);
3b827c1b
JF
1051}
1052
c1f2f09e
EH
1053/*
1054 * The init_mm pagetable is really pinned as soon as its created, but
1055 * that's before we have page structures to store the bits. So do all
1056 * the book-keeping now.
1057 */
eefb47f6
JF
1058static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
1059 enum pt_level level)
3b827c1b 1060{
f4f97b3e
JF
1061 SetPagePinned(page);
1062 return 0;
1063}
3b827c1b 1064
b96229b5 1065static void __init xen_mark_init_mm_pinned(void)
f4f97b3e 1066{
eefb47f6 1067 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 1068}
3b827c1b 1069
eefb47f6
JF
1070static int xen_unpin_page(struct mm_struct *mm, struct page *page,
1071 enum pt_level level)
f4f97b3e 1072{
d60cd46b 1073 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 1074
f4f97b3e
JF
1075 if (pgfl && !PageHighMem(page)) {
1076 void *pt = lowmem_page_address(page);
1077 unsigned long pfn = page_to_pfn(page);
74260714
JF
1078 spinlock_t *ptl = NULL;
1079 struct multicall_space mcs;
1080
11ad93e5
JF
1081 /*
1082 * Do the converse to pin_page. If we're using split
1083 * pte locks, we must be holding the lock for while
1084 * the pte page is unpinned but still RO to prevent
1085 * concurrent updates from seeing it in this
1086 * partially-pinned state.
1087 */
74260714 1088 if (level == PT_PTE) {
eefb47f6 1089 ptl = xen_pte_lock(page, mm);
74260714 1090
11ad93e5
JF
1091 if (ptl)
1092 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
1093 }
1094
1095 mcs = __xen_mc_entry(0);
f4f97b3e
JF
1096
1097 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1098 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
1099 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1100
1101 if (ptl) {
1102 /* unlock when batch completed */
7708ad64 1103 xen_mc_callback(xen_pte_unlock, ptl);
74260714 1104 }
f4f97b3e
JF
1105 }
1106
1107 return 0; /* never need to flush on unpin */
3b827c1b
JF
1108}
1109
f4f97b3e 1110/* Release a pagetables pages back as normal RW */
eefb47f6 1111static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 1112{
f4f97b3e
JF
1113 xen_mc_batch();
1114
74260714 1115 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 1116
d6182fbf
JF
1117#ifdef CONFIG_X86_64
1118 {
1119 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1120
1121 if (user_pgd) {
f63c2f24
T
1122 xen_do_pin(MMUEXT_UNPIN_TABLE,
1123 PFN_DOWN(__pa(user_pgd)));
eefb47f6 1124 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
1125 }
1126 }
1127#endif
1128
5deb30d1
JF
1129#ifdef CONFIG_X86_PAE
1130 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 1131 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 1132 PT_PMD);
5deb30d1 1133#endif
d6182fbf 1134
86bbc2c2 1135 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
f4f97b3e
JF
1136
1137 xen_mc_issue(0);
1138}
3b827c1b 1139
eefb47f6
JF
1140static void xen_pgd_unpin(struct mm_struct *mm)
1141{
1142 __xen_pgd_unpin(mm, mm->pgd);
1143}
1144
0e91398f
JF
1145/*
1146 * On resume, undo any pinning done at save, so that the rest of the
1147 * kernel doesn't see any unexpected pinned pagetables.
1148 */
1149void xen_mm_unpin_all(void)
1150{
0e91398f
JF
1151 struct page *page;
1152
a79e53d8 1153 spin_lock(&pgd_lock);
0e91398f
JF
1154
1155 list_for_each_entry(page, &pgd_list, lru) {
1156 if (PageSavePinned(page)) {
1157 BUG_ON(!PagePinned(page));
eefb47f6 1158 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
1159 ClearPageSavePinned(page);
1160 }
1161 }
1162
a79e53d8 1163 spin_unlock(&pgd_lock);
0e91398f
JF
1164}
1165
3b827c1b
JF
1166void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1167{
f4f97b3e 1168 spin_lock(&next->page_table_lock);
eefb47f6 1169 xen_pgd_pin(next);
f4f97b3e 1170 spin_unlock(&next->page_table_lock);
3b827c1b
JF
1171}
1172
1173void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1174{
f4f97b3e 1175 spin_lock(&mm->page_table_lock);
eefb47f6 1176 xen_pgd_pin(mm);
f4f97b3e 1177 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
1178}
1179
3b827c1b 1180
f87e4cac
JF
1181#ifdef CONFIG_SMP
1182/* Another cpu may still have their %cr3 pointing at the pagetable, so
1183 we need to repoint it somewhere else before we can unpin it. */
1184static void drop_other_mm_ref(void *info)
1185{
1186 struct mm_struct *mm = info;
ce87b3d3 1187 struct mm_struct *active_mm;
3b827c1b 1188
9eb912d1 1189 active_mm = percpu_read(cpu_tlbstate.active_mm);
ce87b3d3
JF
1190
1191 if (active_mm == mm)
f87e4cac 1192 leave_mm(smp_processor_id());
9f79991d
JF
1193
1194 /* If this cpu still has a stale cr3 reference, then make sure
1195 it has been flushed. */
7fd7d83d 1196 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1197 load_cr3(swapper_pg_dir);
f87e4cac 1198}
3b827c1b 1199
7708ad64 1200static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1201{
e4d98207 1202 cpumask_var_t mask;
9f79991d
JF
1203 unsigned cpu;
1204
f87e4cac
JF
1205 if (current->active_mm == mm) {
1206 if (current->mm == mm)
1207 load_cr3(swapper_pg_dir);
1208 else
1209 leave_mm(smp_processor_id());
9f79991d
JF
1210 }
1211
1212 /* Get the "official" set of cpus referring to our pagetable. */
e4d98207
MT
1213 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1214 for_each_online_cpu(cpu) {
78f1c4d6 1215 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
e4d98207
MT
1216 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1217 continue;
1218 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1219 }
1220 return;
1221 }
78f1c4d6 1222 cpumask_copy(mask, mm_cpumask(mm));
9f79991d
JF
1223
1224 /* It's possible that a vcpu may have a stale reference to our
1225 cr3, because its in lazy mode, and it hasn't yet flushed
1226 its set of pending hypercalls yet. In this case, we can
1227 look at its actual current cr3 value, and force it to flush
1228 if needed. */
1229 for_each_online_cpu(cpu) {
1230 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1231 cpumask_set_cpu(cpu, mask);
3b827c1b
JF
1232 }
1233
e4d98207
MT
1234 if (!cpumask_empty(mask))
1235 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1236 free_cpumask_var(mask);
f87e4cac
JF
1237}
1238#else
7708ad64 1239static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac
JF
1240{
1241 if (current->active_mm == mm)
1242 load_cr3(swapper_pg_dir);
1243}
1244#endif
1245
1246/*
1247 * While a process runs, Xen pins its pagetables, which means that the
1248 * hypervisor forces it to be read-only, and it controls all updates
1249 * to it. This means that all pagetable updates have to go via the
1250 * hypervisor, which is moderately expensive.
1251 *
1252 * Since we're pulling the pagetable down, we switch to use init_mm,
1253 * unpin old process pagetable and mark it all read-write, which
1254 * allows further operations on it to be simple memory accesses.
1255 *
1256 * The only subtle point is that another CPU may be still using the
1257 * pagetable because of lazy tlb flushing. This means we need need to
1258 * switch all CPUs off this pagetable before we can unpin it.
1259 */
1260void xen_exit_mmap(struct mm_struct *mm)
1261{
1262 get_cpu(); /* make sure we don't move around */
7708ad64 1263 xen_drop_mm_ref(mm);
f87e4cac 1264 put_cpu();
3b827c1b 1265
f120f13e 1266 spin_lock(&mm->page_table_lock);
df912ea4
JF
1267
1268 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1269 if (xen_page_pinned(mm->pgd))
eefb47f6 1270 xen_pgd_unpin(mm);
74260714 1271
f120f13e 1272 spin_unlock(&mm->page_table_lock);
3b827c1b 1273}
994025ca 1274
319f3ba5
JF
1275static __init void xen_pagetable_setup_start(pgd_t *base)
1276{
1277}
1278
f1d7062a
TG
1279static void xen_post_allocator_init(void);
1280
319f3ba5
JF
1281static __init void xen_pagetable_setup_done(pgd_t *base)
1282{
1283 xen_setup_shared_info();
f1d7062a 1284 xen_post_allocator_init();
319f3ba5
JF
1285}
1286
1287static void xen_write_cr2(unsigned long cr2)
1288{
1289 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1290}
1291
1292static unsigned long xen_read_cr2(void)
1293{
1294 return percpu_read(xen_vcpu)->arch.cr2;
1295}
1296
1297unsigned long xen_read_cr2_direct(void)
1298{
1299 return percpu_read(xen_vcpu_info.arch.cr2);
1300}
1301
1302static void xen_flush_tlb(void)
1303{
1304 struct mmuext_op *op;
1305 struct multicall_space mcs;
1306
1307 preempt_disable();
1308
1309 mcs = xen_mc_entry(sizeof(*op));
1310
1311 op = mcs.args;
1312 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1313 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1314
1315 xen_mc_issue(PARAVIRT_LAZY_MMU);
1316
1317 preempt_enable();
1318}
1319
1320static void xen_flush_tlb_single(unsigned long addr)
1321{
1322 struct mmuext_op *op;
1323 struct multicall_space mcs;
1324
1325 preempt_disable();
1326
1327 mcs = xen_mc_entry(sizeof(*op));
1328 op = mcs.args;
1329 op->cmd = MMUEXT_INVLPG_LOCAL;
1330 op->arg1.linear_addr = addr & PAGE_MASK;
1331 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1332
1333 xen_mc_issue(PARAVIRT_LAZY_MMU);
1334
1335 preempt_enable();
1336}
1337
1338static void xen_flush_tlb_others(const struct cpumask *cpus,
1339 struct mm_struct *mm, unsigned long va)
1340{
1341 struct {
1342 struct mmuext_op op;
1343 DECLARE_BITMAP(mask, NR_CPUS);
1344 } *args;
1345 struct multicall_space mcs;
1346
e3f8a74e
JF
1347 if (cpumask_empty(cpus))
1348 return; /* nothing to do */
319f3ba5
JF
1349
1350 mcs = xen_mc_entry(sizeof(*args));
1351 args = mcs.args;
1352 args->op.arg2.vcpumask = to_cpumask(args->mask);
1353
1354 /* Remove us, and any offline CPUS. */
1355 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1356 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
319f3ba5
JF
1357
1358 if (va == TLB_FLUSH_ALL) {
1359 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1360 } else {
1361 args->op.cmd = MMUEXT_INVLPG_MULTI;
1362 args->op.arg1.linear_addr = va;
1363 }
1364
1365 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1366
319f3ba5
JF
1367 xen_mc_issue(PARAVIRT_LAZY_MMU);
1368}
1369
1370static unsigned long xen_read_cr3(void)
1371{
1372 return percpu_read(xen_cr3);
1373}
1374
1375static void set_current_cr3(void *v)
1376{
1377 percpu_write(xen_current_cr3, (unsigned long)v);
1378}
1379
1380static void __xen_write_cr3(bool kernel, unsigned long cr3)
1381{
1382 struct mmuext_op *op;
1383 struct multicall_space mcs;
1384 unsigned long mfn;
1385
1386 if (cr3)
1387 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1388 else
1389 mfn = 0;
1390
1391 WARN_ON(mfn == 0 && kernel);
1392
1393 mcs = __xen_mc_entry(sizeof(*op));
1394
1395 op = mcs.args;
1396 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1397 op->arg1.mfn = mfn;
1398
1399 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1400
1401 if (kernel) {
1402 percpu_write(xen_cr3, cr3);
1403
1404 /* Update xen_current_cr3 once the batch has actually
1405 been submitted. */
1406 xen_mc_callback(set_current_cr3, (void *)cr3);
1407 }
1408}
1409
1410static void xen_write_cr3(unsigned long cr3)
1411{
1412 BUG_ON(preemptible());
1413
1414 xen_mc_batch(); /* disables interrupts */
1415
1416 /* Update while interrupts are disabled, so its atomic with
1417 respect to ipis */
1418 percpu_write(xen_cr3, cr3);
1419
1420 __xen_write_cr3(true, cr3);
1421
1422#ifdef CONFIG_X86_64
1423 {
1424 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1425 if (user_pgd)
1426 __xen_write_cr3(false, __pa(user_pgd));
1427 else
1428 __xen_write_cr3(false, 0);
1429 }
1430#endif
1431
1432 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1433}
1434
1435static int xen_pgd_alloc(struct mm_struct *mm)
1436{
1437 pgd_t *pgd = mm->pgd;
1438 int ret = 0;
1439
1440 BUG_ON(PagePinned(virt_to_page(pgd)));
1441
1442#ifdef CONFIG_X86_64
1443 {
1444 struct page *page = virt_to_page(pgd);
1445 pgd_t *user_pgd;
1446
1447 BUG_ON(page->private != 0);
1448
1449 ret = -ENOMEM;
1450
1451 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1452 page->private = (unsigned long)user_pgd;
1453
1454 if (user_pgd != NULL) {
1455 user_pgd[pgd_index(VSYSCALL_START)] =
1456 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1457 ret = 0;
1458 }
1459
1460 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1461 }
1462#endif
1463
1464 return ret;
1465}
1466
1467static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1468{
1469#ifdef CONFIG_X86_64
1470 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1471
1472 if (user_pgd)
1473 free_page((unsigned long)user_pgd);
1474#endif
1475}
1476
1f4f9315
JF
1477static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1478{
fef5ba79
JF
1479 unsigned long pfn = pte_pfn(pte);
1480
1481#ifdef CONFIG_X86_32
1f4f9315
JF
1482 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1483 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1484 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1485 pte_val_ma(pte));
fef5ba79
JF
1486#endif
1487
1488 /*
1489 * If the new pfn is within the range of the newly allocated
1490 * kernel pagetable, and it isn't being mapped into an
1491 * early_ioremap fixmap slot, make sure it is RO.
1492 */
1493 if (!is_early_ioremap_ptep(ptep) &&
d1b19426 1494 pfn >= pgt_buf_start && pfn < pgt_buf_end)
fef5ba79 1495 pte = pte_wrprotect(pte);
1f4f9315
JF
1496
1497 return pte;
1498}
1499
1500/* Init-time set_pte while constructing initial pagetables, which
1501 doesn't allow RO pagetable pages to be remapped RW */
1502static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1503{
1504 pte = mask_rw_pte(ptep, pte);
1505
1506 xen_set_pte(ptep, pte);
1507}
319f3ba5 1508
b96229b5
JF
1509static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1510{
1511 struct mmuext_op op;
1512 op.cmd = cmd;
1513 op.arg1.mfn = pfn_to_mfn(pfn);
1514 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1515 BUG();
1516}
1517
319f3ba5
JF
1518/* Early in boot, while setting up the initial pagetable, assume
1519 everything is pinned. */
1520static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1521{
b96229b5
JF
1522#ifdef CONFIG_FLATMEM
1523 BUG_ON(mem_map); /* should only be used early */
1524#endif
1525 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1526 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1527}
1528
1529/* Used for pmd and pud */
1530static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1531{
319f3ba5
JF
1532#ifdef CONFIG_FLATMEM
1533 BUG_ON(mem_map); /* should only be used early */
1534#endif
1535 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1536}
1537
1538/* Early release_pte assumes that all pts are pinned, since there's
1539 only init_mm and anything attached to that is pinned. */
b96229b5 1540static __init void xen_release_pte_init(unsigned long pfn)
319f3ba5 1541{
b96229b5 1542 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
319f3ba5
JF
1543 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1544}
1545
b96229b5 1546static __init void xen_release_pmd_init(unsigned long pfn)
319f3ba5 1547{
b96229b5 1548 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
319f3ba5
JF
1549}
1550
1551/* This needs to make sure the new pte page is pinned iff its being
1552 attached to a pinned pagetable. */
1553static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1554{
1555 struct page *page = pfn_to_page(pfn);
1556
1557 if (PagePinned(virt_to_page(mm->pgd))) {
1558 SetPagePinned(page);
1559
319f3ba5
JF
1560 if (!PageHighMem(page)) {
1561 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1562 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1563 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1564 } else {
1565 /* make sure there are no stray mappings of
1566 this page */
1567 kmap_flush_unused();
1568 }
1569 }
1570}
1571
1572static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1573{
1574 xen_alloc_ptpage(mm, pfn, PT_PTE);
1575}
1576
1577static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1578{
1579 xen_alloc_ptpage(mm, pfn, PT_PMD);
1580}
1581
1582/* This should never happen until we're OK to use struct page */
1583static void xen_release_ptpage(unsigned long pfn, unsigned level)
1584{
1585 struct page *page = pfn_to_page(pfn);
1586
1587 if (PagePinned(page)) {
1588 if (!PageHighMem(page)) {
1589 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1590 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1591 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1592 }
1593 ClearPagePinned(page);
1594 }
1595}
1596
1597static void xen_release_pte(unsigned long pfn)
1598{
1599 xen_release_ptpage(pfn, PT_PTE);
1600}
1601
1602static void xen_release_pmd(unsigned long pfn)
1603{
1604 xen_release_ptpage(pfn, PT_PMD);
1605}
1606
1607#if PAGETABLE_LEVELS == 4
1608static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1609{
1610 xen_alloc_ptpage(mm, pfn, PT_PUD);
1611}
1612
1613static void xen_release_pud(unsigned long pfn)
1614{
1615 xen_release_ptpage(pfn, PT_PUD);
1616}
1617#endif
1618
1619void __init xen_reserve_top(void)
1620{
1621#ifdef CONFIG_X86_32
1622 unsigned long top = HYPERVISOR_VIRT_START;
1623 struct xen_platform_parameters pp;
1624
1625 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1626 top = pp.virt_start;
1627
1628 reserve_top_address(-top);
1629#endif /* CONFIG_X86_32 */
1630}
1631
1632/*
1633 * Like __va(), but returns address in the kernel mapping (which is
1634 * all we have until the physical memory mapping has been set up.
1635 */
1636static void *__ka(phys_addr_t paddr)
1637{
1638#ifdef CONFIG_X86_64
1639 return (void *)(paddr + __START_KERNEL_map);
1640#else
1641 return __va(paddr);
1642#endif
1643}
1644
1645/* Convert a machine address to physical address */
1646static unsigned long m2p(phys_addr_t maddr)
1647{
1648 phys_addr_t paddr;
1649
1650 maddr &= PTE_PFN_MASK;
1651 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1652
1653 return paddr;
1654}
1655
1656/* Convert a machine address to kernel virtual */
1657static void *m2v(phys_addr_t maddr)
1658{
1659 return __ka(m2p(maddr));
1660}
1661
4ec5387c 1662/* Set the page permissions on an identity-mapped pages */
319f3ba5
JF
1663static void set_page_prot(void *addr, pgprot_t prot)
1664{
1665 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1666 pte_t pte = pfn_pte(pfn, prot);
1667
1668 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1669 BUG();
1670}
1671
1672static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1673{
1674 unsigned pmdidx, pteidx;
1675 unsigned ident_pte;
1676 unsigned long pfn;
1677
764f0138
JF
1678 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1679 PAGE_SIZE);
1680
319f3ba5
JF
1681 ident_pte = 0;
1682 pfn = 0;
1683 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1684 pte_t *pte_page;
1685
1686 /* Reuse or allocate a page of ptes */
1687 if (pmd_present(pmd[pmdidx]))
1688 pte_page = m2v(pmd[pmdidx].pmd);
1689 else {
1690 /* Check for free pte pages */
764f0138 1691 if (ident_pte == LEVEL1_IDENT_ENTRIES)
319f3ba5
JF
1692 break;
1693
1694 pte_page = &level1_ident_pgt[ident_pte];
1695 ident_pte += PTRS_PER_PTE;
1696
1697 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1698 }
1699
1700 /* Install mappings */
1701 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1702 pte_t pte;
1703
1704 if (pfn > max_pfn_mapped)
1705 max_pfn_mapped = pfn;
1706
1707 if (!pte_none(pte_page[pteidx]))
1708 continue;
1709
1710 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1711 pte_page[pteidx] = pte;
1712 }
1713 }
1714
1715 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1716 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1717
1718 set_page_prot(pmd, PAGE_KERNEL_RO);
1719}
1720
7e77506a
IC
1721void __init xen_setup_machphys_mapping(void)
1722{
1723 struct xen_machphys_mapping mapping;
1724 unsigned long machine_to_phys_nr_ents;
1725
1726 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1727 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1728 machine_to_phys_nr_ents = mapping.max_mfn + 1;
1729 } else {
1730 machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES;
1731 }
1732 machine_to_phys_order = fls(machine_to_phys_nr_ents - 1);
1733}
1734
319f3ba5
JF
1735#ifdef CONFIG_X86_64
1736static void convert_pfn_mfn(void *v)
1737{
1738 pte_t *pte = v;
1739 int i;
1740
1741 /* All levels are converted the same way, so just treat them
1742 as ptes. */
1743 for (i = 0; i < PTRS_PER_PTE; i++)
1744 pte[i] = xen_make_pte(pte[i].pte);
1745}
1746
1747/*
0d2eb44f 1748 * Set up the initial kernel pagetable.
319f3ba5
JF
1749 *
1750 * We can construct this by grafting the Xen provided pagetable into
1751 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1752 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1753 * means that only the kernel has a physical mapping to start with -
1754 * but that's enough to get __va working. We need to fill in the rest
1755 * of the physical mapping once some sort of allocator has been set
1756 * up.
1757 */
1758__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1759 unsigned long max_pfn)
1760{
1761 pud_t *l3;
1762 pmd_t *l2;
1763
1764 /* Zap identity mapping */
1765 init_level4_pgt[0] = __pgd(0);
1766
1767 /* Pre-constructed entries are in pfn, so convert to mfn */
1768 convert_pfn_mfn(init_level4_pgt);
1769 convert_pfn_mfn(level3_ident_pgt);
1770 convert_pfn_mfn(level3_kernel_pgt);
1771
1772 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1773 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1774
1775 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1776 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1777
1778 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1779 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1780 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1781
1782 /* Set up identity map */
1783 xen_map_identity_early(level2_ident_pgt, max_pfn);
1784
1785 /* Make pagetable pieces RO */
1786 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1787 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1788 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1789 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1790 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1791 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1792
1793 /* Pin down new L4 */
1794 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1795 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1796
1797 /* Unpin Xen-provided one */
1798 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1799
1800 /* Switch over */
1801 pgd = init_level4_pgt;
1802
1803 /*
1804 * At this stage there can be no user pgd, and no page
1805 * structure to attach it to, so make sure we just set kernel
1806 * pgd.
1807 */
1808 xen_mc_batch();
1809 __xen_write_cr3(true, __pa(pgd));
1810 xen_mc_issue(PARAVIRT_LAZY_CPU);
1811
a9ce6bc1 1812 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
319f3ba5
JF
1813 __pa(xen_start_info->pt_base +
1814 xen_start_info->nr_pt_frames * PAGE_SIZE),
1815 "XEN PAGETABLES");
1816
1817 return pgd;
1818}
1819#else /* !CONFIG_X86_64 */
5b5c1af1
IC
1820static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1821static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1822
1823static __init void xen_write_cr3_init(unsigned long cr3)
1824{
1825 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1826
1827 BUG_ON(read_cr3() != __pa(initial_page_table));
1828 BUG_ON(cr3 != __pa(swapper_pg_dir));
1829
1830 /*
1831 * We are switching to swapper_pg_dir for the first time (from
1832 * initial_page_table) and therefore need to mark that page
1833 * read-only and then pin it.
1834 *
1835 * Xen disallows sharing of kernel PMDs for PAE
1836 * guests. Therefore we must copy the kernel PMD from
1837 * initial_page_table into a new kernel PMD to be used in
1838 * swapper_pg_dir.
1839 */
1840 swapper_kernel_pmd =
1841 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1842 memcpy(swapper_kernel_pmd, initial_kernel_pmd,
1843 sizeof(pmd_t) * PTRS_PER_PMD);
1844 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1845 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1846 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1847
1848 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1849 xen_write_cr3(cr3);
1850 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1851
1852 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1853 PFN_DOWN(__pa(initial_page_table)));
1854 set_page_prot(initial_page_table, PAGE_KERNEL);
1855 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1856
1857 pv_mmu_ops.write_cr3 = &xen_write_cr3;
1858}
319f3ba5
JF
1859
1860__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1861 unsigned long max_pfn)
1862{
1863 pmd_t *kernel_pmd;
1864
5b5c1af1
IC
1865 initial_kernel_pmd =
1866 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
f0991802 1867
93dbda7c
JF
1868 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1869 xen_start_info->nr_pt_frames * PAGE_SIZE +
1870 512*1024);
319f3ba5
JF
1871
1872 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
5b5c1af1 1873 memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
319f3ba5 1874
5b5c1af1 1875 xen_map_identity_early(initial_kernel_pmd, max_pfn);
319f3ba5 1876
5b5c1af1
IC
1877 memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1878 initial_page_table[KERNEL_PGD_BOUNDARY] =
1879 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
319f3ba5 1880
5b5c1af1
IC
1881 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1882 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
319f3ba5
JF
1883 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1884
1885 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1886
5b5c1af1
IC
1887 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1888 PFN_DOWN(__pa(initial_page_table)));
1889 xen_write_cr3(__pa(initial_page_table));
319f3ba5 1890
a9ce6bc1 1891 memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
33df4db0
JF
1892 __pa(xen_start_info->pt_base +
1893 xen_start_info->nr_pt_frames * PAGE_SIZE),
1894 "XEN PAGETABLES");
1895
5b5c1af1 1896 return initial_page_table;
319f3ba5
JF
1897}
1898#endif /* CONFIG_X86_64 */
1899
98511f35
JF
1900static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1901
3b3809ac 1902static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
319f3ba5
JF
1903{
1904 pte_t pte;
1905
1906 phys >>= PAGE_SHIFT;
1907
1908 switch (idx) {
1909 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1910#ifdef CONFIG_X86_F00F_BUG
1911 case FIX_F00F_IDT:
1912#endif
1913#ifdef CONFIG_X86_32
1914 case FIX_WP_TEST:
1915 case FIX_VDSO:
1916# ifdef CONFIG_HIGHMEM
1917 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1918# endif
1919#else
1920 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
319f3ba5 1921#endif
3ecb1b7d
JF
1922 case FIX_TEXT_POKE0:
1923 case FIX_TEXT_POKE1:
1924 /* All local page mappings */
319f3ba5
JF
1925 pte = pfn_pte(phys, prot);
1926 break;
1927
98511f35
JF
1928#ifdef CONFIG_X86_LOCAL_APIC
1929 case FIX_APIC_BASE: /* maps dummy local APIC */
1930 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1931 break;
1932#endif
1933
1934#ifdef CONFIG_X86_IO_APIC
1935 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1936 /*
1937 * We just don't map the IO APIC - all access is via
1938 * hypercalls. Keep the address in the pte for reference.
1939 */
1940 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1941 break;
1942#endif
1943
c0011dbf
JF
1944 case FIX_PARAVIRT_BOOTMAP:
1945 /* This is an MFN, but it isn't an IO mapping from the
1946 IO domain */
319f3ba5
JF
1947 pte = mfn_pte(phys, prot);
1948 break;
c0011dbf
JF
1949
1950 default:
1951 /* By default, set_fixmap is used for hardware mappings */
1952 pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
1953 break;
319f3ba5
JF
1954 }
1955
1956 __native_set_fixmap(idx, pte);
1957
1958#ifdef CONFIG_X86_64
1959 /* Replicate changes to map the vsyscall page into the user
1960 pagetable vsyscall mapping. */
1961 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1962 unsigned long vaddr = __fix_to_virt(idx);
1963 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1964 }
1965#endif
1966}
1967
4ec5387c
JQ
1968__init void xen_ident_map_ISA(void)
1969{
1970 unsigned long pa;
1971
1972 /*
1973 * If we're dom0, then linear map the ISA machine addresses into
1974 * the kernel's address space.
1975 */
1976 if (!xen_initial_domain())
1977 return;
1978
1979 xen_raw_printk("Xen: setup ISA identity maps\n");
1980
1981 for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) {
1982 pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);
1983
1984 if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))
1985 BUG();
1986 }
1987
1988 xen_flush_tlb();
1989}
1990
f1d7062a 1991static __init void xen_post_allocator_init(void)
319f3ba5 1992{
fc25151d
KRW
1993#ifdef CONFIG_XEN_DEBUG
1994 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug);
1995#endif
319f3ba5
JF
1996 pv_mmu_ops.set_pte = xen_set_pte;
1997 pv_mmu_ops.set_pmd = xen_set_pmd;
1998 pv_mmu_ops.set_pud = xen_set_pud;
1999#if PAGETABLE_LEVELS == 4
2000 pv_mmu_ops.set_pgd = xen_set_pgd;
2001#endif
2002
2003 /* This will work as long as patching hasn't happened yet
2004 (which it hasn't) */
2005 pv_mmu_ops.alloc_pte = xen_alloc_pte;
2006 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
2007 pv_mmu_ops.release_pte = xen_release_pte;
2008 pv_mmu_ops.release_pmd = xen_release_pmd;
2009#if PAGETABLE_LEVELS == 4
2010 pv_mmu_ops.alloc_pud = xen_alloc_pud;
2011 pv_mmu_ops.release_pud = xen_release_pud;
2012#endif
2013
2014#ifdef CONFIG_X86_64
2015 SetPagePinned(virt_to_page(level3_user_vsyscall));
2016#endif
2017 xen_mark_init_mm_pinned();
2018}
2019
b407fc57
JF
2020static void xen_leave_lazy_mmu(void)
2021{
5caecb94 2022 preempt_disable();
b407fc57
JF
2023 xen_mc_flush();
2024 paravirt_leave_lazy_mmu();
5caecb94 2025 preempt_enable();
b407fc57 2026}
319f3ba5 2027
030cb6c0 2028static const struct pv_mmu_ops xen_mmu_ops __initdata = {
319f3ba5
JF
2029 .read_cr2 = xen_read_cr2,
2030 .write_cr2 = xen_write_cr2,
2031
2032 .read_cr3 = xen_read_cr3,
5b5c1af1
IC
2033#ifdef CONFIG_X86_32
2034 .write_cr3 = xen_write_cr3_init,
2035#else
319f3ba5 2036 .write_cr3 = xen_write_cr3,
5b5c1af1 2037#endif
319f3ba5
JF
2038
2039 .flush_tlb_user = xen_flush_tlb,
2040 .flush_tlb_kernel = xen_flush_tlb,
2041 .flush_tlb_single = xen_flush_tlb_single,
2042 .flush_tlb_others = xen_flush_tlb_others,
2043
2044 .pte_update = paravirt_nop,
2045 .pte_update_defer = paravirt_nop,
2046
2047 .pgd_alloc = xen_pgd_alloc,
2048 .pgd_free = xen_pgd_free,
2049
2050 .alloc_pte = xen_alloc_pte_init,
2051 .release_pte = xen_release_pte_init,
b96229b5 2052 .alloc_pmd = xen_alloc_pmd_init,
b96229b5 2053 .release_pmd = xen_release_pmd_init,
319f3ba5 2054
319f3ba5 2055 .set_pte = xen_set_pte_init,
319f3ba5
JF
2056 .set_pte_at = xen_set_pte_at,
2057 .set_pmd = xen_set_pmd_hyper,
2058
2059 .ptep_modify_prot_start = __ptep_modify_prot_start,
2060 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2061
da5de7c2
JF
2062 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2063 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 2064
da5de7c2
JF
2065 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
2066 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
2067
2068#ifdef CONFIG_X86_PAE
2069 .set_pte_atomic = xen_set_pte_atomic,
319f3ba5
JF
2070 .pte_clear = xen_pte_clear,
2071 .pmd_clear = xen_pmd_clear,
2072#endif /* CONFIG_X86_PAE */
2073 .set_pud = xen_set_pud_hyper,
2074
da5de7c2
JF
2075 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2076 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
319f3ba5
JF
2077
2078#if PAGETABLE_LEVELS == 4
da5de7c2
JF
2079 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2080 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
2081 .set_pgd = xen_set_pgd_hyper,
2082
b96229b5
JF
2083 .alloc_pud = xen_alloc_pmd_init,
2084 .release_pud = xen_release_pmd_init,
319f3ba5
JF
2085#endif /* PAGETABLE_LEVELS == 4 */
2086
2087 .activate_mm = xen_activate_mm,
2088 .dup_mmap = xen_dup_mmap,
2089 .exit_mmap = xen_exit_mmap,
2090
2091 .lazy_mode = {
2092 .enter = paravirt_enter_lazy_mmu,
b407fc57 2093 .leave = xen_leave_lazy_mmu,
319f3ba5
JF
2094 },
2095
2096 .set_fixmap = xen_set_fixmap,
2097};
2098
030cb6c0
TG
2099void __init xen_init_mmu_ops(void)
2100{
2101 x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
2102 x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2103 pv_mmu_ops = xen_mmu_ops;
d2cb2145 2104
98511f35 2105 memset(dummy_mapping, 0xff, PAGE_SIZE);
030cb6c0 2106}
319f3ba5 2107
08bbc9da
AN
2108/* Protected by xen_reservation_lock. */
2109#define MAX_CONTIG_ORDER 9 /* 2MB */
2110static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2111
2112#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2113static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2114 unsigned long *in_frames,
2115 unsigned long *out_frames)
2116{
2117 int i;
2118 struct multicall_space mcs;
2119
2120 xen_mc_batch();
2121 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2122 mcs = __xen_mc_entry(0);
2123
2124 if (in_frames)
2125 in_frames[i] = virt_to_mfn(vaddr);
2126
2127 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
6eaa412f 2128 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
08bbc9da
AN
2129
2130 if (out_frames)
2131 out_frames[i] = virt_to_pfn(vaddr);
2132 }
2133 xen_mc_issue(0);
2134}
2135
2136/*
2137 * Update the pfn-to-mfn mappings for a virtual address range, either to
2138 * point to an array of mfns, or contiguously from a single starting
2139 * mfn.
2140 */
2141static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2142 unsigned long *mfns,
2143 unsigned long first_mfn)
2144{
2145 unsigned i, limit;
2146 unsigned long mfn;
2147
2148 xen_mc_batch();
2149
2150 limit = 1u << order;
2151 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2152 struct multicall_space mcs;
2153 unsigned flags;
2154
2155 mcs = __xen_mc_entry(0);
2156 if (mfns)
2157 mfn = mfns[i];
2158 else
2159 mfn = first_mfn + i;
2160
2161 if (i < (limit - 1))
2162 flags = 0;
2163 else {
2164 if (order == 0)
2165 flags = UVMF_INVLPG | UVMF_ALL;
2166 else
2167 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2168 }
2169
2170 MULTI_update_va_mapping(mcs.mc, vaddr,
2171 mfn_pte(mfn, PAGE_KERNEL), flags);
2172
2173 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2174 }
2175
2176 xen_mc_issue(0);
2177}
2178
2179/*
2180 * Perform the hypercall to exchange a region of our pfns to point to
2181 * memory with the required contiguous alignment. Takes the pfns as
2182 * input, and populates mfns as output.
2183 *
2184 * Returns a success code indicating whether the hypervisor was able to
2185 * satisfy the request or not.
2186 */
2187static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2188 unsigned long *pfns_in,
2189 unsigned long extents_out,
2190 unsigned int order_out,
2191 unsigned long *mfns_out,
2192 unsigned int address_bits)
2193{
2194 long rc;
2195 int success;
2196
2197 struct xen_memory_exchange exchange = {
2198 .in = {
2199 .nr_extents = extents_in,
2200 .extent_order = order_in,
2201 .extent_start = pfns_in,
2202 .domid = DOMID_SELF
2203 },
2204 .out = {
2205 .nr_extents = extents_out,
2206 .extent_order = order_out,
2207 .extent_start = mfns_out,
2208 .address_bits = address_bits,
2209 .domid = DOMID_SELF
2210 }
2211 };
2212
2213 BUG_ON(extents_in << order_in != extents_out << order_out);
2214
2215 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2216 success = (exchange.nr_exchanged == extents_in);
2217
2218 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2219 BUG_ON(success && (rc != 0));
2220
2221 return success;
2222}
2223
2224int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
2225 unsigned int address_bits)
2226{
2227 unsigned long *in_frames = discontig_frames, out_frame;
2228 unsigned long flags;
2229 int success;
2230
2231 /*
2232 * Currently an auto-translated guest will not perform I/O, nor will
2233 * it require PAE page directories below 4GB. Therefore any calls to
2234 * this function are redundant and can be ignored.
2235 */
2236
2237 if (xen_feature(XENFEAT_auto_translated_physmap))
2238 return 0;
2239
2240 if (unlikely(order > MAX_CONTIG_ORDER))
2241 return -ENOMEM;
2242
2243 memset((void *) vstart, 0, PAGE_SIZE << order);
2244
08bbc9da
AN
2245 spin_lock_irqsave(&xen_reservation_lock, flags);
2246
2247 /* 1. Zap current PTEs, remembering MFNs. */
2248 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2249
2250 /* 2. Get a new contiguous memory extent. */
2251 out_frame = virt_to_pfn(vstart);
2252 success = xen_exchange_memory(1UL << order, 0, in_frames,
2253 1, order, &out_frame,
2254 address_bits);
2255
2256 /* 3. Map the new extent in place of old pages. */
2257 if (success)
2258 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2259 else
2260 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2261
2262 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2263
2264 return success ? 0 : -ENOMEM;
2265}
2266EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2267
2268void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
2269{
2270 unsigned long *out_frames = discontig_frames, in_frame;
2271 unsigned long flags;
2272 int success;
2273
2274 if (xen_feature(XENFEAT_auto_translated_physmap))
2275 return;
2276
2277 if (unlikely(order > MAX_CONTIG_ORDER))
2278 return;
2279
2280 memset((void *) vstart, 0, PAGE_SIZE << order);
2281
08bbc9da
AN
2282 spin_lock_irqsave(&xen_reservation_lock, flags);
2283
2284 /* 1. Find start MFN of contiguous extent. */
2285 in_frame = virt_to_mfn(vstart);
2286
2287 /* 2. Zap current PTEs. */
2288 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2289
2290 /* 3. Do the exchange for non-contiguous MFNs. */
2291 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2292 0, out_frames, 0);
2293
2294 /* 4. Map new pages in place of old pages. */
2295 if (success)
2296 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2297 else
2298 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2299
2300 spin_unlock_irqrestore(&xen_reservation_lock, flags);
030cb6c0 2301}
08bbc9da 2302EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
319f3ba5 2303
ca65f9fc 2304#ifdef CONFIG_XEN_PVHVM
59151001
SS
2305static void xen_hvm_exit_mmap(struct mm_struct *mm)
2306{
2307 struct xen_hvm_pagetable_dying a;
2308 int rc;
2309
2310 a.domid = DOMID_SELF;
2311 a.gpa = __pa(mm->pgd);
2312 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2313 WARN_ON_ONCE(rc < 0);
2314}
2315
2316static int is_pagetable_dying_supported(void)
2317{
2318 struct xen_hvm_pagetable_dying a;
2319 int rc = 0;
2320
2321 a.domid = DOMID_SELF;
2322 a.gpa = 0x00;
2323 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2324 if (rc < 0) {
2325 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2326 return 0;
2327 }
2328 return 1;
2329}
2330
2331void __init xen_hvm_init_mmu_ops(void)
2332{
2333 if (is_pagetable_dying_supported())
2334 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2335}
ca65f9fc 2336#endif
59151001 2337
de1ef206
IC
2338#define REMAP_BATCH_SIZE 16
2339
2340struct remap_data {
2341 unsigned long mfn;
2342 pgprot_t prot;
2343 struct mmu_update *mmu_update;
2344};
2345
2346static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2347 unsigned long addr, void *data)
2348{
2349 struct remap_data *rmd = data;
2350 pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
2351
2352 rmd->mmu_update->ptr = arbitrary_virt_to_machine(ptep).maddr;
2353 rmd->mmu_update->val = pte_val_ma(pte);
2354 rmd->mmu_update++;
2355
2356 return 0;
2357}
2358
2359int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2360 unsigned long addr,
2361 unsigned long mfn, int nr,
2362 pgprot_t prot, unsigned domid)
2363{
2364 struct remap_data rmd;
2365 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2366 int batch;
2367 unsigned long range;
2368 int err = 0;
2369
2370 prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
2371
e060e7af
SS
2372 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
2373 (VM_PFNMAP | VM_RESERVED | VM_IO)));
de1ef206
IC
2374
2375 rmd.mfn = mfn;
2376 rmd.prot = prot;
2377
2378 while (nr) {
2379 batch = min(REMAP_BATCH_SIZE, nr);
2380 range = (unsigned long)batch << PAGE_SHIFT;
2381
2382 rmd.mmu_update = mmu_update;
2383 err = apply_to_page_range(vma->vm_mm, addr, range,
2384 remap_area_mfn_pte_fn, &rmd);
2385 if (err)
2386 goto out;
2387
2388 err = -EFAULT;
2389 if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
2390 goto out;
2391
2392 nr -= batch;
2393 addr += range;
2394 }
2395
2396 err = 0;
2397out:
2398
2399 flush_tlb_all();
2400
2401 return err;
2402}
2403EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
2404
994025ca
JF
2405#ifdef CONFIG_XEN_DEBUG_FS
2406
2222e71b
KRW
2407static int p2m_dump_open(struct inode *inode, struct file *filp)
2408{
2409 return single_open(filp, p2m_dump_show, NULL);
2410}
2411
2412static const struct file_operations p2m_dump_fops = {
2413 .open = p2m_dump_open,
2414 .read = seq_read,
2415 .llseek = seq_lseek,
2416 .release = single_release,
2417};
2418
994025ca
JF
2419static struct dentry *d_mmu_debug;
2420
2421static int __init xen_mmu_debugfs(void)
2422{
2423 struct dentry *d_xen = xen_init_debugfs();
2424
2425 if (d_xen == NULL)
2426 return -ENOMEM;
2427
2428 d_mmu_debug = debugfs_create_dir("mmu", d_xen);
2429
2430 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
2431
2432 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
2433 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
2434 &mmu_stats.pgd_update_pinned);
2435 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
2436 &mmu_stats.pgd_update_pinned);
2437
2438 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
2439 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
2440 &mmu_stats.pud_update_pinned);
2441 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
2442 &mmu_stats.pud_update_pinned);
2443
2444 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
2445 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
2446 &mmu_stats.pmd_update_pinned);
2447 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
2448 &mmu_stats.pmd_update_pinned);
2449
2450 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
2451// debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
2452// &mmu_stats.pte_update_pinned);
2453 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
2454 &mmu_stats.pte_update_pinned);
2455
2456 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
2457 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
2458 &mmu_stats.mmu_update_extended);
2459 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
2460 mmu_stats.mmu_update_histo, 20);
2461
2462 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
2463 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
2464 &mmu_stats.set_pte_at_batched);
2465 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
2466 &mmu_stats.set_pte_at_current);
2467 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
2468 &mmu_stats.set_pte_at_kernel);
2469
2470 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
2471 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
2472 &mmu_stats.prot_commit_batched);
2473
2222e71b 2474 debugfs_create_file("p2m", 0600, d_mmu_debug, NULL, &p2m_dump_fops);
994025ca
JF
2475 return 0;
2476}
2477fs_initcall(xen_mmu_debugfs);
2478
2479#endif /* CONFIG_XEN_DEBUG_FS */
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