x86/paravirt: use percpu_ rather than __get_cpu_var
[deliverable/linux.git] / arch / x86 / xen / mmu.c
CommitLineData
3b827c1b
JF
1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
3b827c1b
JF
45
46#include <asm/pgtable.h>
47#include <asm/tlbflush.h>
5deb30d1 48#include <asm/fixmap.h>
3b827c1b 49#include <asm/mmu_context.h>
319f3ba5 50#include <asm/setup.h>
f4f97b3e 51#include <asm/paravirt.h>
cbcd79c2 52#include <asm/linkage.h>
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53
54#include <asm/xen/hypercall.h>
f4f97b3e 55#include <asm/xen/hypervisor.h>
3b827c1b
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56
57#include <xen/page.h>
58#include <xen/interface/xen.h>
319f3ba5
JF
59#include <xen/interface/version.h>
60#include <xen/hvc-console.h>
3b827c1b 61
f4f97b3e 62#include "multicalls.h"
3b827c1b 63#include "mmu.h"
994025ca
JF
64#include "debugfs.h"
65
66#define MMU_UPDATE_HISTO 30
67
68#ifdef CONFIG_XEN_DEBUG_FS
69
70static struct {
71 u32 pgd_update;
72 u32 pgd_update_pinned;
73 u32 pgd_update_batched;
74
75 u32 pud_update;
76 u32 pud_update_pinned;
77 u32 pud_update_batched;
78
79 u32 pmd_update;
80 u32 pmd_update_pinned;
81 u32 pmd_update_batched;
82
83 u32 pte_update;
84 u32 pte_update_pinned;
85 u32 pte_update_batched;
86
87 u32 mmu_update;
88 u32 mmu_update_extended;
89 u32 mmu_update_histo[MMU_UPDATE_HISTO];
90
91 u32 prot_commit;
92 u32 prot_commit_batched;
93
94 u32 set_pte_at;
95 u32 set_pte_at_batched;
96 u32 set_pte_at_pinned;
97 u32 set_pte_at_current;
98 u32 set_pte_at_kernel;
99} mmu_stats;
100
101static u8 zero_stats;
102
103static inline void check_zero(void)
104{
105 if (unlikely(zero_stats)) {
106 memset(&mmu_stats, 0, sizeof(mmu_stats));
107 zero_stats = 0;
108 }
109}
110
111#define ADD_STATS(elem, val) \
112 do { check_zero(); mmu_stats.elem += (val); } while(0)
113
114#else /* !CONFIG_XEN_DEBUG_FS */
115
116#define ADD_STATS(elem, val) do { (void)(val); } while(0)
117
118#endif /* CONFIG_XEN_DEBUG_FS */
3b827c1b 119
319f3ba5
JF
120
121/*
122 * Identity map, in addition to plain kernel map. This needs to be
123 * large enough to allocate page table pages to allocate the rest.
124 * Each page can map 2MB.
125 */
126static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
127
128#ifdef CONFIG_X86_64
129/* l3 pud for userspace vsyscall mapping */
130static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
131#endif /* CONFIG_X86_64 */
132
133/*
134 * Note about cr3 (pagetable base) values:
135 *
136 * xen_cr3 contains the current logical cr3 value; it contains the
137 * last set cr3. This may not be the current effective cr3, because
138 * its update may be being lazily deferred. However, a vcpu looking
139 * at its own cr3 can use this value knowing that it everything will
140 * be self-consistent.
141 *
142 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
143 * hypercall to set the vcpu cr3 is complete (so it may be a little
144 * out of date, but it will never be set early). If one vcpu is
145 * looking at another vcpu's cr3 value, it should use this variable.
146 */
147DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
148DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
149
150
d6182fbf
JF
151/*
152 * Just beyond the highest usermode address. STACK_TOP_MAX has a
153 * redzone above it, so round it up to a PGD boundary.
154 */
155#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
156
157
d451bb7a 158#define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
cf0923ea 159#define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
d451bb7a 160
cf0923ea 161/* Placeholder for holes in the address space */
cbcd79c2 162static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
cf0923ea
JF
163 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
164
165 /* Array of pointers to pages containing p2m entries */
cbcd79c2 166static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
cf0923ea 167 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
d451bb7a 168
d5edbc1f 169/* Arrays of p2m arrays expressed in mfns used for save/restore */
cbcd79c2 170static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
d5edbc1f 171
cbcd79c2
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172static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
173 __page_aligned_bss;
d5edbc1f 174
d451bb7a
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175static inline unsigned p2m_top_index(unsigned long pfn)
176{
8006ec3e 177 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
d451bb7a
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178 return pfn / P2M_ENTRIES_PER_PAGE;
179}
180
181static inline unsigned p2m_index(unsigned long pfn)
182{
183 return pfn % P2M_ENTRIES_PER_PAGE;
184}
185
d5edbc1f
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186/* Build the parallel p2m_top_mfn structures */
187void xen_setup_mfn_list_list(void)
188{
189 unsigned pfn, idx;
190
f63c2f24 191 for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
d5edbc1f
JF
192 unsigned topidx = p2m_top_index(pfn);
193
194 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
195 }
196
f63c2f24 197 for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
d5edbc1f
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198 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
199 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
200 }
201
202 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
203
204 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
205 virt_to_mfn(p2m_top_mfn_list);
206 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
207}
208
209/* Set up p2m_top to point to the domain-builder provided p2m pages */
d451bb7a
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210void __init xen_build_dynamic_phys_to_machine(void)
211{
d451bb7a 212 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
8006ec3e 213 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
d5edbc1f 214 unsigned pfn;
d451bb7a 215
f63c2f24 216 for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
d451bb7a
JF
217 unsigned topidx = p2m_top_index(pfn);
218
219 p2m_top[topidx] = &mfn_list[pfn];
220 }
221}
222
223unsigned long get_phys_to_machine(unsigned long pfn)
224{
225 unsigned topidx, idx;
226
8006ec3e
JF
227 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
228 return INVALID_P2M_ENTRY;
229
d451bb7a 230 topidx = p2m_top_index(pfn);
d451bb7a
JF
231 idx = p2m_index(pfn);
232 return p2m_top[topidx][idx];
233}
15ce6005 234EXPORT_SYMBOL_GPL(get_phys_to_machine);
d451bb7a 235
d5edbc1f 236static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
d451bb7a
JF
237{
238 unsigned long *p;
239 unsigned i;
240
241 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
242 BUG_ON(p == NULL);
243
f63c2f24 244 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
d451bb7a
JF
245 p[i] = INVALID_P2M_ENTRY;
246
cf0923ea 247 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
d451bb7a 248 free_page((unsigned long)p);
d5edbc1f
JF
249 else
250 *mfnp = virt_to_mfn(p);
d451bb7a
JF
251}
252
253void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
254{
255 unsigned topidx, idx;
256
257 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
258 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
8006ec3e
JF
259 return;
260 }
261
262 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
263 BUG_ON(mfn != INVALID_P2M_ENTRY);
d451bb7a
JF
264 return;
265 }
266
267 topidx = p2m_top_index(pfn);
cf0923ea 268 if (p2m_top[topidx] == p2m_missing) {
d451bb7a
JF
269 /* no need to allocate a page to store an invalid entry */
270 if (mfn == INVALID_P2M_ENTRY)
271 return;
d5edbc1f 272 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
d451bb7a
JF
273 }
274
275 idx = p2m_index(pfn);
276 p2m_top[topidx][idx] = mfn;
277}
278
9976b39b
JF
279unsigned long arbitrary_virt_to_mfn(void *vaddr)
280{
281 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
282
283 return PFN_DOWN(maddr.maddr);
284}
285
ce803e70 286xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 287{
ce803e70 288 unsigned long address = (unsigned long)vaddr;
da7bfc50 289 unsigned int level;
9f32d21c
CL
290 pte_t *pte;
291 unsigned offset;
3b827c1b 292
9f32d21c
CL
293 /*
294 * if the PFN is in the linear mapped vaddr range, we can just use
295 * the (quick) virt_to_machine() p2m lookup
296 */
297 if (virt_addr_valid(vaddr))
298 return virt_to_machine(vaddr);
299
300 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 301
9f32d21c
CL
302 pte = lookup_address(address, &level);
303 BUG_ON(pte == NULL);
304 offset = address & ~PAGE_MASK;
ebd879e3 305 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b
JF
306}
307
308void make_lowmem_page_readonly(void *vaddr)
309{
310 pte_t *pte, ptev;
311 unsigned long address = (unsigned long)vaddr;
da7bfc50 312 unsigned int level;
3b827c1b 313
f0646e43 314 pte = lookup_address(address, &level);
3b827c1b
JF
315 BUG_ON(pte == NULL);
316
317 ptev = pte_wrprotect(*pte);
318
319 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
320 BUG();
321}
322
323void make_lowmem_page_readwrite(void *vaddr)
324{
325 pte_t *pte, ptev;
326 unsigned long address = (unsigned long)vaddr;
da7bfc50 327 unsigned int level;
3b827c1b 328
f0646e43 329 pte = lookup_address(address, &level);
3b827c1b
JF
330 BUG_ON(pte == NULL);
331
332 ptev = pte_mkwrite(*pte);
333
334 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
335 BUG();
336}
337
338
7708ad64 339static bool xen_page_pinned(void *ptr)
e2426cf8
JF
340{
341 struct page *page = virt_to_page(ptr);
342
343 return PagePinned(page);
344}
345
7708ad64 346static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 347{
d66bf8fc
JF
348 struct multicall_space mcs;
349 struct mmu_update *u;
3b827c1b 350
400d3494
JF
351 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
352
994025ca
JF
353 if (mcs.mc != NULL) {
354 ADD_STATS(mmu_update_extended, 1);
355 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
356
400d3494 357 mcs.mc->args[1]++;
994025ca
JF
358
359 if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
360 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
361 else
362 ADD_STATS(mmu_update_histo[0], 1);
363 } else {
364 ADD_STATS(mmu_update, 1);
400d3494
JF
365 mcs = __xen_mc_entry(sizeof(*u));
366 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
994025ca 367 ADD_STATS(mmu_update_histo[1], 1);
400d3494 368 }
d66bf8fc 369
d66bf8fc 370 u = mcs.args;
400d3494
JF
371 *u = *update;
372}
373
374void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
375{
376 struct mmu_update u;
377
378 preempt_disable();
379
380 xen_mc_batch();
381
ce803e70
JF
382 /* ptr may be ioremapped for 64-bit pagetable setup */
383 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 384 u.val = pmd_val_ma(val);
7708ad64 385 xen_extend_mmu_update(&u);
d66bf8fc 386
994025ca
JF
387 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
388
d66bf8fc
JF
389 xen_mc_issue(PARAVIRT_LAZY_MMU);
390
391 preempt_enable();
3b827c1b
JF
392}
393
e2426cf8
JF
394void xen_set_pmd(pmd_t *ptr, pmd_t val)
395{
994025ca
JF
396 ADD_STATS(pmd_update, 1);
397
e2426cf8
JF
398 /* If page is not pinned, we can just update the entry
399 directly */
7708ad64 400 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
401 *ptr = val;
402 return;
403 }
404
994025ca
JF
405 ADD_STATS(pmd_update_pinned, 1);
406
e2426cf8
JF
407 xen_set_pmd_hyper(ptr, val);
408}
409
3b827c1b
JF
410/*
411 * Associate a virtual page frame with a given physical page frame
412 * and protection flags for that frame.
413 */
414void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
415{
836fe2f2 416 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
417}
418
419void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
420 pte_t *ptep, pte_t pteval)
421{
994025ca
JF
422 ADD_STATS(set_pte_at, 1);
423// ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
424 ADD_STATS(set_pte_at_current, mm == current->mm);
425 ADD_STATS(set_pte_at_kernel, mm == &init_mm);
426
d66bf8fc 427 if (mm == current->mm || mm == &init_mm) {
8965c1c0 428 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
d66bf8fc
JF
429 struct multicall_space mcs;
430 mcs = xen_mc_entry(0);
431
432 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
994025ca 433 ADD_STATS(set_pte_at_batched, 1);
d66bf8fc 434 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 435 goto out;
d66bf8fc
JF
436 } else
437 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
2bd50036 438 goto out;
d66bf8fc
JF
439 }
440 xen_set_pte(ptep, pteval);
2bd50036 441
2829b449 442out: return;
3b827c1b
JF
443}
444
f63c2f24
T
445pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
446 unsigned long addr, pte_t *ptep)
947a69c9 447{
e57778a1
JF
448 /* Just return the pte as-is. We preserve the bits on commit */
449 return *ptep;
450}
451
452void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
453 pte_t *ptep, pte_t pte)
454{
400d3494 455 struct mmu_update u;
e57778a1 456
400d3494 457 xen_mc_batch();
947a69c9 458
9f32d21c 459 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 460 u.val = pte_val_ma(pte);
7708ad64 461 xen_extend_mmu_update(&u);
947a69c9 462
994025ca
JF
463 ADD_STATS(prot_commit, 1);
464 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
465
e57778a1 466 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
467}
468
ebb9cfe2
JF
469/* Assume pteval_t is equivalent to all the other *val_t types. */
470static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 471{
ebb9cfe2 472 if (val & _PAGE_PRESENT) {
59438c9f 473 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 474 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 475 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
ebb9cfe2 476 }
947a69c9 477
ebb9cfe2 478 return val;
947a69c9
JF
479}
480
ebb9cfe2 481static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 482{
ebb9cfe2 483 if (val & _PAGE_PRESENT) {
59438c9f 484 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 485 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 486 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
947a69c9
JF
487 }
488
ebb9cfe2 489 return val;
947a69c9
JF
490}
491
ebb9cfe2 492pteval_t xen_pte_val(pte_t pte)
947a69c9 493{
ebb9cfe2 494 return pte_mfn_to_pfn(pte.pte);
947a69c9 495}
da5de7c2 496PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 497
947a69c9
JF
498pgdval_t xen_pgd_val(pgd_t pgd)
499{
ebb9cfe2 500 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 501}
da5de7c2 502PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9
JF
503
504pte_t xen_make_pte(pteval_t pte)
505{
ebb9cfe2
JF
506 pte = pte_pfn_to_mfn(pte);
507 return native_make_pte(pte);
947a69c9 508}
da5de7c2 509PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9
JF
510
511pgd_t xen_make_pgd(pgdval_t pgd)
512{
ebb9cfe2
JF
513 pgd = pte_pfn_to_mfn(pgd);
514 return native_make_pgd(pgd);
947a69c9 515}
da5de7c2 516PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9
JF
517
518pmdval_t xen_pmd_val(pmd_t pmd)
519{
ebb9cfe2 520 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 521}
da5de7c2 522PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 523
e2426cf8 524void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 525{
400d3494 526 struct mmu_update u;
f4f97b3e 527
d66bf8fc
JF
528 preempt_disable();
529
400d3494
JF
530 xen_mc_batch();
531
ce803e70
JF
532 /* ptr may be ioremapped for 64-bit pagetable setup */
533 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 534 u.val = pud_val_ma(val);
7708ad64 535 xen_extend_mmu_update(&u);
d66bf8fc 536
994025ca
JF
537 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
538
d66bf8fc
JF
539 xen_mc_issue(PARAVIRT_LAZY_MMU);
540
541 preempt_enable();
f4f97b3e
JF
542}
543
e2426cf8
JF
544void xen_set_pud(pud_t *ptr, pud_t val)
545{
994025ca
JF
546 ADD_STATS(pud_update, 1);
547
e2426cf8
JF
548 /* If page is not pinned, we can just update the entry
549 directly */
7708ad64 550 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
551 *ptr = val;
552 return;
553 }
554
994025ca
JF
555 ADD_STATS(pud_update_pinned, 1);
556
e2426cf8
JF
557 xen_set_pud_hyper(ptr, val);
558}
559
f4f97b3e
JF
560void xen_set_pte(pte_t *ptep, pte_t pte)
561{
994025ca
JF
562 ADD_STATS(pte_update, 1);
563// ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
564 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
565
f6e58732 566#ifdef CONFIG_X86_PAE
f4f97b3e
JF
567 ptep->pte_high = pte.pte_high;
568 smp_wmb();
569 ptep->pte_low = pte.pte_low;
f6e58732
JF
570#else
571 *ptep = pte;
572#endif
f4f97b3e
JF
573}
574
f6e58732 575#ifdef CONFIG_X86_PAE
3b827c1b
JF
576void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
577{
f6e58732 578 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
579}
580
581void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
582{
583 ptep->pte_low = 0;
584 smp_wmb(); /* make sure low gets written first */
585 ptep->pte_high = 0;
586}
587
588void xen_pmd_clear(pmd_t *pmdp)
589{
e2426cf8 590 set_pmd(pmdp, __pmd(0));
3b827c1b 591}
f6e58732 592#endif /* CONFIG_X86_PAE */
3b827c1b 593
abf33038 594pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 595{
ebb9cfe2 596 pmd = pte_pfn_to_mfn(pmd);
947a69c9 597 return native_make_pmd(pmd);
3b827c1b 598}
da5de7c2 599PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 600
f6e58732
JF
601#if PAGETABLE_LEVELS == 4
602pudval_t xen_pud_val(pud_t pud)
603{
604 return pte_mfn_to_pfn(pud.pud);
605}
da5de7c2 606PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732
JF
607
608pud_t xen_make_pud(pudval_t pud)
609{
610 pud = pte_pfn_to_mfn(pud);
611
612 return native_make_pud(pud);
613}
da5de7c2 614PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 615
d6182fbf 616pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 617{
d6182fbf
JF
618 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
619 unsigned offset = pgd - pgd_page;
620 pgd_t *user_ptr = NULL;
f6e58732 621
d6182fbf
JF
622 if (offset < pgd_index(USER_LIMIT)) {
623 struct page *page = virt_to_page(pgd_page);
624 user_ptr = (pgd_t *)page->private;
625 if (user_ptr)
626 user_ptr += offset;
627 }
f6e58732 628
d6182fbf
JF
629 return user_ptr;
630}
631
632static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
633{
634 struct mmu_update u;
f6e58732
JF
635
636 u.ptr = virt_to_machine(ptr).maddr;
637 u.val = pgd_val_ma(val);
7708ad64 638 xen_extend_mmu_update(&u);
d6182fbf
JF
639}
640
641/*
642 * Raw hypercall-based set_pgd, intended for in early boot before
643 * there's a page structure. This implies:
644 * 1. The only existing pagetable is the kernel's
645 * 2. It is always pinned
646 * 3. It has no user pagetable attached to it
647 */
648void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
649{
650 preempt_disable();
651
652 xen_mc_batch();
653
654 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
655
656 xen_mc_issue(PARAVIRT_LAZY_MMU);
657
658 preempt_enable();
659}
660
661void xen_set_pgd(pgd_t *ptr, pgd_t val)
662{
d6182fbf
JF
663 pgd_t *user_ptr = xen_get_user_pgd(ptr);
664
994025ca
JF
665 ADD_STATS(pgd_update, 1);
666
f6e58732
JF
667 /* If page is not pinned, we can just update the entry
668 directly */
7708ad64 669 if (!xen_page_pinned(ptr)) {
f6e58732 670 *ptr = val;
d6182fbf 671 if (user_ptr) {
7708ad64 672 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
673 *user_ptr = val;
674 }
f6e58732
JF
675 return;
676 }
677
994025ca
JF
678 ADD_STATS(pgd_update_pinned, 1);
679 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
680
d6182fbf
JF
681 /* If it's pinned, then we can at least batch the kernel and
682 user updates together. */
683 xen_mc_batch();
684
685 __xen_set_pgd_hyper(ptr, val);
686 if (user_ptr)
687 __xen_set_pgd_hyper(user_ptr, val);
688
689 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
690}
691#endif /* PAGETABLE_LEVELS == 4 */
692
f4f97b3e 693/*
5deb30d1
JF
694 * (Yet another) pagetable walker. This one is intended for pinning a
695 * pagetable. This means that it walks a pagetable and calls the
696 * callback function on each page it finds making up the page table,
697 * at every level. It walks the entire pagetable, but it only bothers
698 * pinning pte pages which are below limit. In the normal case this
699 * will be STACK_TOP_MAX, but at boot we need to pin up to
700 * FIXADDR_TOP.
701 *
702 * For 32-bit the important bit is that we don't pin beyond there,
703 * because then we start getting into Xen's ptes.
704 *
705 * For 64-bit, we must skip the Xen hole in the middle of the address
706 * space, just after the big x86-64 virtual hole.
707 */
86bbc2c2
IC
708static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
709 int (*func)(struct mm_struct *mm, struct page *,
710 enum pt_level),
711 unsigned long limit)
3b827c1b 712{
f4f97b3e 713 int flush = 0;
5deb30d1
JF
714 unsigned hole_low, hole_high;
715 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
716 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 717
5deb30d1
JF
718 /* The limit is the last byte to be touched */
719 limit--;
720 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
721
722 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
723 return 0;
724
5deb30d1
JF
725 /*
726 * 64-bit has a great big hole in the middle of the address
727 * space, which contains the Xen mappings. On 32-bit these
728 * will end up making a zero-sized hole and so is a no-op.
729 */
d6182fbf 730 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
731 hole_high = pgd_index(PAGE_OFFSET);
732
733 pgdidx_limit = pgd_index(limit);
734#if PTRS_PER_PUD > 1
735 pudidx_limit = pud_index(limit);
736#else
737 pudidx_limit = 0;
738#endif
739#if PTRS_PER_PMD > 1
740 pmdidx_limit = pmd_index(limit);
741#else
742 pmdidx_limit = 0;
743#endif
744
5deb30d1 745 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 746 pud_t *pud;
3b827c1b 747
5deb30d1
JF
748 if (pgdidx >= hole_low && pgdidx < hole_high)
749 continue;
f4f97b3e 750
5deb30d1 751 if (!pgd_val(pgd[pgdidx]))
3b827c1b 752 continue;
f4f97b3e 753
5deb30d1 754 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
755
756 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 757 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 758
5deb30d1 759 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 760 pmd_t *pmd;
f4f97b3e 761
5deb30d1
JF
762 if (pgdidx == pgdidx_limit &&
763 pudidx > pudidx_limit)
764 goto out;
3b827c1b 765
5deb30d1 766 if (pud_none(pud[pudidx]))
3b827c1b 767 continue;
f4f97b3e 768
5deb30d1 769 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
770
771 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 772 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 773
5deb30d1
JF
774 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
775 struct page *pte;
776
777 if (pgdidx == pgdidx_limit &&
778 pudidx == pudidx_limit &&
779 pmdidx > pmdidx_limit)
780 goto out;
3b827c1b 781
5deb30d1 782 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
783 continue;
784
5deb30d1 785 pte = pmd_page(pmd[pmdidx]);
eefb47f6 786 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
787 }
788 }
789 }
11ad93e5 790
5deb30d1 791out:
11ad93e5
JF
792 /* Do the top level last, so that the callbacks can use it as
793 a cue to do final things like tlb flushes. */
eefb47f6 794 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
795
796 return flush;
3b827c1b
JF
797}
798
86bbc2c2
IC
799static int xen_pgd_walk(struct mm_struct *mm,
800 int (*func)(struct mm_struct *mm, struct page *,
801 enum pt_level),
802 unsigned long limit)
803{
804 return __xen_pgd_walk(mm, mm->pgd, func, limit);
805}
806
7708ad64
JF
807/* If we're using split pte locks, then take the page's lock and
808 return a pointer to it. Otherwise return NULL. */
eefb47f6 809static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
810{
811 spinlock_t *ptl = NULL;
812
f7d0b926 813#if USE_SPLIT_PTLOCKS
74260714 814 ptl = __pte_lockptr(page);
eefb47f6 815 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
816#endif
817
818 return ptl;
819}
820
7708ad64 821static void xen_pte_unlock(void *v)
74260714
JF
822{
823 spinlock_t *ptl = v;
824 spin_unlock(ptl);
825}
826
827static void xen_do_pin(unsigned level, unsigned long pfn)
828{
829 struct mmuext_op *op;
830 struct multicall_space mcs;
831
832 mcs = __xen_mc_entry(sizeof(*op));
833 op = mcs.args;
834 op->cmd = level;
835 op->arg1.mfn = pfn_to_mfn(pfn);
836 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
837}
838
eefb47f6
JF
839static int xen_pin_page(struct mm_struct *mm, struct page *page,
840 enum pt_level level)
f4f97b3e 841{
d60cd46b 842 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
843 int flush;
844
845 if (pgfl)
846 flush = 0; /* already pinned */
847 else if (PageHighMem(page))
848 /* kmaps need flushing if we found an unpinned
849 highpage */
850 flush = 1;
851 else {
852 void *pt = lowmem_page_address(page);
853 unsigned long pfn = page_to_pfn(page);
854 struct multicall_space mcs = __xen_mc_entry(0);
74260714 855 spinlock_t *ptl;
f4f97b3e
JF
856
857 flush = 0;
858
11ad93e5
JF
859 /*
860 * We need to hold the pagetable lock between the time
861 * we make the pagetable RO and when we actually pin
862 * it. If we don't, then other users may come in and
863 * attempt to update the pagetable by writing it,
864 * which will fail because the memory is RO but not
865 * pinned, so Xen won't do the trap'n'emulate.
866 *
867 * If we're using split pte locks, we can't hold the
868 * entire pagetable's worth of locks during the
869 * traverse, because we may wrap the preempt count (8
870 * bits). The solution is to mark RO and pin each PTE
871 * page while holding the lock. This means the number
872 * of locks we end up holding is never more than a
873 * batch size (~32 entries, at present).
874 *
875 * If we're not using split pte locks, we needn't pin
876 * the PTE pages independently, because we're
877 * protected by the overall pagetable lock.
878 */
74260714
JF
879 ptl = NULL;
880 if (level == PT_PTE)
eefb47f6 881 ptl = xen_pte_lock(page, mm);
74260714 882
f4f97b3e
JF
883 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
884 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
885 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
886
11ad93e5 887 if (ptl) {
74260714
JF
888 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
889
74260714
JF
890 /* Queue a deferred unlock for when this batch
891 is completed. */
7708ad64 892 xen_mc_callback(xen_pte_unlock, ptl);
74260714 893 }
f4f97b3e
JF
894 }
895
896 return flush;
897}
3b827c1b 898
f4f97b3e
JF
899/* This is called just after a mm has been created, but it has not
900 been used yet. We need to make sure that its pagetable is all
901 read-only, and can be pinned. */
eefb47f6 902static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 903{
d05fdf31
JF
904 vm_unmap_aliases();
905
f4f97b3e 906 xen_mc_batch();
3b827c1b 907
86bbc2c2 908 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 909 /* re-enable interrupts for flushing */
f87e4cac 910 xen_mc_issue(0);
d05fdf31 911
f4f97b3e 912 kmap_flush_unused();
d05fdf31 913
f87e4cac
JF
914 xen_mc_batch();
915 }
f4f97b3e 916
d6182fbf
JF
917#ifdef CONFIG_X86_64
918 {
919 pgd_t *user_pgd = xen_get_user_pgd(pgd);
920
921 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
922
923 if (user_pgd) {
eefb47f6 924 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
925 xen_do_pin(MMUEXT_PIN_L4_TABLE,
926 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
927 }
928 }
929#else /* CONFIG_X86_32 */
5deb30d1
JF
930#ifdef CONFIG_X86_PAE
931 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 932 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 933 PT_PMD);
5deb30d1 934#endif
28499143 935 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 936#endif /* CONFIG_X86_64 */
f4f97b3e 937 xen_mc_issue(0);
3b827c1b
JF
938}
939
eefb47f6
JF
940static void xen_pgd_pin(struct mm_struct *mm)
941{
942 __xen_pgd_pin(mm, mm->pgd);
943}
944
0e91398f
JF
945/*
946 * On save, we need to pin all pagetables to make sure they get their
947 * mfns turned into pfns. Search the list for any unpinned pgds and pin
948 * them (unpinned pgds are not currently in use, probably because the
949 * process is under construction or destruction).
eefb47f6
JF
950 *
951 * Expected to be called in stop_machine() ("equivalent to taking
952 * every spinlock in the system"), so the locking doesn't really
953 * matter all that much.
0e91398f
JF
954 */
955void xen_mm_pin_all(void)
956{
957 unsigned long flags;
958 struct page *page;
74260714 959
0e91398f 960 spin_lock_irqsave(&pgd_lock, flags);
f4f97b3e 961
0e91398f
JF
962 list_for_each_entry(page, &pgd_list, lru) {
963 if (!PagePinned(page)) {
eefb47f6 964 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
965 SetPageSavePinned(page);
966 }
967 }
968
969 spin_unlock_irqrestore(&pgd_lock, flags);
3b827c1b
JF
970}
971
c1f2f09e
EH
972/*
973 * The init_mm pagetable is really pinned as soon as its created, but
974 * that's before we have page structures to store the bits. So do all
975 * the book-keeping now.
976 */
eefb47f6
JF
977static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
978 enum pt_level level)
3b827c1b 979{
f4f97b3e
JF
980 SetPagePinned(page);
981 return 0;
982}
3b827c1b 983
f4f97b3e
JF
984void __init xen_mark_init_mm_pinned(void)
985{
eefb47f6 986 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 987}
3b827c1b 988
eefb47f6
JF
989static int xen_unpin_page(struct mm_struct *mm, struct page *page,
990 enum pt_level level)
f4f97b3e 991{
d60cd46b 992 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 993
f4f97b3e
JF
994 if (pgfl && !PageHighMem(page)) {
995 void *pt = lowmem_page_address(page);
996 unsigned long pfn = page_to_pfn(page);
74260714
JF
997 spinlock_t *ptl = NULL;
998 struct multicall_space mcs;
999
11ad93e5
JF
1000 /*
1001 * Do the converse to pin_page. If we're using split
1002 * pte locks, we must be holding the lock for while
1003 * the pte page is unpinned but still RO to prevent
1004 * concurrent updates from seeing it in this
1005 * partially-pinned state.
1006 */
74260714 1007 if (level == PT_PTE) {
eefb47f6 1008 ptl = xen_pte_lock(page, mm);
74260714 1009
11ad93e5
JF
1010 if (ptl)
1011 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
1012 }
1013
1014 mcs = __xen_mc_entry(0);
f4f97b3e
JF
1015
1016 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1017 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
1018 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1019
1020 if (ptl) {
1021 /* unlock when batch completed */
7708ad64 1022 xen_mc_callback(xen_pte_unlock, ptl);
74260714 1023 }
f4f97b3e
JF
1024 }
1025
1026 return 0; /* never need to flush on unpin */
3b827c1b
JF
1027}
1028
f4f97b3e 1029/* Release a pagetables pages back as normal RW */
eefb47f6 1030static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 1031{
f4f97b3e
JF
1032 xen_mc_batch();
1033
74260714 1034 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 1035
d6182fbf
JF
1036#ifdef CONFIG_X86_64
1037 {
1038 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1039
1040 if (user_pgd) {
f63c2f24
T
1041 xen_do_pin(MMUEXT_UNPIN_TABLE,
1042 PFN_DOWN(__pa(user_pgd)));
eefb47f6 1043 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
1044 }
1045 }
1046#endif
1047
5deb30d1
JF
1048#ifdef CONFIG_X86_PAE
1049 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 1050 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 1051 PT_PMD);
5deb30d1 1052#endif
d6182fbf 1053
86bbc2c2 1054 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
f4f97b3e
JF
1055
1056 xen_mc_issue(0);
1057}
3b827c1b 1058
eefb47f6
JF
1059static void xen_pgd_unpin(struct mm_struct *mm)
1060{
1061 __xen_pgd_unpin(mm, mm->pgd);
1062}
1063
0e91398f
JF
1064/*
1065 * On resume, undo any pinning done at save, so that the rest of the
1066 * kernel doesn't see any unexpected pinned pagetables.
1067 */
1068void xen_mm_unpin_all(void)
1069{
1070 unsigned long flags;
1071 struct page *page;
1072
1073 spin_lock_irqsave(&pgd_lock, flags);
1074
1075 list_for_each_entry(page, &pgd_list, lru) {
1076 if (PageSavePinned(page)) {
1077 BUG_ON(!PagePinned(page));
eefb47f6 1078 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
1079 ClearPageSavePinned(page);
1080 }
1081 }
1082
1083 spin_unlock_irqrestore(&pgd_lock, flags);
1084}
1085
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1086void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1087{
f4f97b3e 1088 spin_lock(&next->page_table_lock);
eefb47f6 1089 xen_pgd_pin(next);
f4f97b3e 1090 spin_unlock(&next->page_table_lock);
3b827c1b
JF
1091}
1092
1093void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1094{
f4f97b3e 1095 spin_lock(&mm->page_table_lock);
eefb47f6 1096 xen_pgd_pin(mm);
f4f97b3e 1097 spin_unlock(&mm->page_table_lock);
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JF
1098}
1099
3b827c1b 1100
f87e4cac
JF
1101#ifdef CONFIG_SMP
1102/* Another cpu may still have their %cr3 pointing at the pagetable, so
1103 we need to repoint it somewhere else before we can unpin it. */
1104static void drop_other_mm_ref(void *info)
1105{
1106 struct mm_struct *mm = info;
ce87b3d3 1107 struct mm_struct *active_mm;
3b827c1b 1108
9eb912d1 1109 active_mm = percpu_read(cpu_tlbstate.active_mm);
ce87b3d3
JF
1110
1111 if (active_mm == mm)
f87e4cac 1112 leave_mm(smp_processor_id());
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JF
1113
1114 /* If this cpu still has a stale cr3 reference, then make sure
1115 it has been flushed. */
7fd7d83d 1116 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1117 load_cr3(swapper_pg_dir);
f87e4cac 1118}
3b827c1b 1119
7708ad64 1120static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1121{
e4d98207 1122 cpumask_var_t mask;
9f79991d
JF
1123 unsigned cpu;
1124
f87e4cac
JF
1125 if (current->active_mm == mm) {
1126 if (current->mm == mm)
1127 load_cr3(swapper_pg_dir);
1128 else
1129 leave_mm(smp_processor_id());
9f79991d
JF
1130 }
1131
1132 /* Get the "official" set of cpus referring to our pagetable. */
e4d98207
MT
1133 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1134 for_each_online_cpu(cpu) {
1135 if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
1136 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1137 continue;
1138 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1139 }
1140 return;
1141 }
1142 cpumask_copy(mask, &mm->cpu_vm_mask);
9f79991d
JF
1143
1144 /* It's possible that a vcpu may have a stale reference to our
1145 cr3, because its in lazy mode, and it hasn't yet flushed
1146 its set of pending hypercalls yet. In this case, we can
1147 look at its actual current cr3 value, and force it to flush
1148 if needed. */
1149 for_each_online_cpu(cpu) {
1150 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1151 cpumask_set_cpu(cpu, mask);
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JF
1152 }
1153
e4d98207
MT
1154 if (!cpumask_empty(mask))
1155 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1156 free_cpumask_var(mask);
f87e4cac
JF
1157}
1158#else
7708ad64 1159static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac
JF
1160{
1161 if (current->active_mm == mm)
1162 load_cr3(swapper_pg_dir);
1163}
1164#endif
1165
1166/*
1167 * While a process runs, Xen pins its pagetables, which means that the
1168 * hypervisor forces it to be read-only, and it controls all updates
1169 * to it. This means that all pagetable updates have to go via the
1170 * hypervisor, which is moderately expensive.
1171 *
1172 * Since we're pulling the pagetable down, we switch to use init_mm,
1173 * unpin old process pagetable and mark it all read-write, which
1174 * allows further operations on it to be simple memory accesses.
1175 *
1176 * The only subtle point is that another CPU may be still using the
1177 * pagetable because of lazy tlb flushing. This means we need need to
1178 * switch all CPUs off this pagetable before we can unpin it.
1179 */
1180void xen_exit_mmap(struct mm_struct *mm)
1181{
1182 get_cpu(); /* make sure we don't move around */
7708ad64 1183 xen_drop_mm_ref(mm);
f87e4cac 1184 put_cpu();
3b827c1b 1185
f120f13e 1186 spin_lock(&mm->page_table_lock);
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JF
1187
1188 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1189 if (xen_page_pinned(mm->pgd))
eefb47f6 1190 xen_pgd_unpin(mm);
74260714 1191
f120f13e 1192 spin_unlock(&mm->page_table_lock);
3b827c1b 1193}
994025ca 1194
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JF
1195static __init void xen_pagetable_setup_start(pgd_t *base)
1196{
1197}
1198
1199static __init void xen_pagetable_setup_done(pgd_t *base)
1200{
1201 xen_setup_shared_info();
1202}
1203
1204static void xen_write_cr2(unsigned long cr2)
1205{
1206 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1207}
1208
1209static unsigned long xen_read_cr2(void)
1210{
1211 return percpu_read(xen_vcpu)->arch.cr2;
1212}
1213
1214unsigned long xen_read_cr2_direct(void)
1215{
1216 return percpu_read(xen_vcpu_info.arch.cr2);
1217}
1218
1219static void xen_flush_tlb(void)
1220{
1221 struct mmuext_op *op;
1222 struct multicall_space mcs;
1223
1224 preempt_disable();
1225
1226 mcs = xen_mc_entry(sizeof(*op));
1227
1228 op = mcs.args;
1229 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1230 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1231
1232 xen_mc_issue(PARAVIRT_LAZY_MMU);
1233
1234 preempt_enable();
1235}
1236
1237static void xen_flush_tlb_single(unsigned long addr)
1238{
1239 struct mmuext_op *op;
1240 struct multicall_space mcs;
1241
1242 preempt_disable();
1243
1244 mcs = xen_mc_entry(sizeof(*op));
1245 op = mcs.args;
1246 op->cmd = MMUEXT_INVLPG_LOCAL;
1247 op->arg1.linear_addr = addr & PAGE_MASK;
1248 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1249
1250 xen_mc_issue(PARAVIRT_LAZY_MMU);
1251
1252 preempt_enable();
1253}
1254
1255static void xen_flush_tlb_others(const struct cpumask *cpus,
1256 struct mm_struct *mm, unsigned long va)
1257{
1258 struct {
1259 struct mmuext_op op;
1260 DECLARE_BITMAP(mask, NR_CPUS);
1261 } *args;
1262 struct multicall_space mcs;
1263
1264 BUG_ON(cpumask_empty(cpus));
1265 BUG_ON(!mm);
1266
1267 mcs = xen_mc_entry(sizeof(*args));
1268 args = mcs.args;
1269 args->op.arg2.vcpumask = to_cpumask(args->mask);
1270
1271 /* Remove us, and any offline CPUS. */
1272 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1273 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
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1274
1275 if (va == TLB_FLUSH_ALL) {
1276 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1277 } else {
1278 args->op.cmd = MMUEXT_INVLPG_MULTI;
1279 args->op.arg1.linear_addr = va;
1280 }
1281
1282 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1283
319f3ba5
JF
1284 xen_mc_issue(PARAVIRT_LAZY_MMU);
1285}
1286
1287static unsigned long xen_read_cr3(void)
1288{
1289 return percpu_read(xen_cr3);
1290}
1291
1292static void set_current_cr3(void *v)
1293{
1294 percpu_write(xen_current_cr3, (unsigned long)v);
1295}
1296
1297static void __xen_write_cr3(bool kernel, unsigned long cr3)
1298{
1299 struct mmuext_op *op;
1300 struct multicall_space mcs;
1301 unsigned long mfn;
1302
1303 if (cr3)
1304 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1305 else
1306 mfn = 0;
1307
1308 WARN_ON(mfn == 0 && kernel);
1309
1310 mcs = __xen_mc_entry(sizeof(*op));
1311
1312 op = mcs.args;
1313 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1314 op->arg1.mfn = mfn;
1315
1316 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1317
1318 if (kernel) {
1319 percpu_write(xen_cr3, cr3);
1320
1321 /* Update xen_current_cr3 once the batch has actually
1322 been submitted. */
1323 xen_mc_callback(set_current_cr3, (void *)cr3);
1324 }
1325}
1326
1327static void xen_write_cr3(unsigned long cr3)
1328{
1329 BUG_ON(preemptible());
1330
1331 xen_mc_batch(); /* disables interrupts */
1332
1333 /* Update while interrupts are disabled, so its atomic with
1334 respect to ipis */
1335 percpu_write(xen_cr3, cr3);
1336
1337 __xen_write_cr3(true, cr3);
1338
1339#ifdef CONFIG_X86_64
1340 {
1341 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1342 if (user_pgd)
1343 __xen_write_cr3(false, __pa(user_pgd));
1344 else
1345 __xen_write_cr3(false, 0);
1346 }
1347#endif
1348
1349 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1350}
1351
1352static int xen_pgd_alloc(struct mm_struct *mm)
1353{
1354 pgd_t *pgd = mm->pgd;
1355 int ret = 0;
1356
1357 BUG_ON(PagePinned(virt_to_page(pgd)));
1358
1359#ifdef CONFIG_X86_64
1360 {
1361 struct page *page = virt_to_page(pgd);
1362 pgd_t *user_pgd;
1363
1364 BUG_ON(page->private != 0);
1365
1366 ret = -ENOMEM;
1367
1368 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1369 page->private = (unsigned long)user_pgd;
1370
1371 if (user_pgd != NULL) {
1372 user_pgd[pgd_index(VSYSCALL_START)] =
1373 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1374 ret = 0;
1375 }
1376
1377 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1378 }
1379#endif
1380
1381 return ret;
1382}
1383
1384static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1385{
1386#ifdef CONFIG_X86_64
1387 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1388
1389 if (user_pgd)
1390 free_page((unsigned long)user_pgd);
1391#endif
1392}
1393
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JF
1394#ifdef CONFIG_HIGHPTE
1395static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
1396{
1397 pgprot_t prot = PAGE_KERNEL;
1398
1399 if (PagePinned(page))
1400 prot = PAGE_KERNEL_RO;
1401
1402 if (0 && PageHighMem(page))
1403 printk("mapping highpte %lx type %d prot %s\n",
1404 page_to_pfn(page), type,
1405 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1406
1407 return kmap_atomic_prot(page, type, prot);
1408}
1409#endif
1410
1411#ifdef CONFIG_X86_32
1412static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1413{
1414 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1415 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1416 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1417 pte_val_ma(pte));
1418
1419 return pte;
1420}
1421
1422/* Init-time set_pte while constructing initial pagetables, which
1423 doesn't allow RO pagetable pages to be remapped RW */
1424static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1425{
1426 pte = mask_rw_pte(ptep, pte);
1427
1428 xen_set_pte(ptep, pte);
1429}
1430#endif
319f3ba5
JF
1431
1432/* Early in boot, while setting up the initial pagetable, assume
1433 everything is pinned. */
1434static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1435{
1436#ifdef CONFIG_FLATMEM
1437 BUG_ON(mem_map); /* should only be used early */
1438#endif
1439 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1440}
1441
1442/* Early release_pte assumes that all pts are pinned, since there's
1443 only init_mm and anything attached to that is pinned. */
1444static void xen_release_pte_init(unsigned long pfn)
1445{
1446 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1447}
1448
1449static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1450{
1451 struct mmuext_op op;
1452 op.cmd = cmd;
1453 op.arg1.mfn = pfn_to_mfn(pfn);
1454 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1455 BUG();
1456}
1457
1458/* This needs to make sure the new pte page is pinned iff its being
1459 attached to a pinned pagetable. */
1460static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1461{
1462 struct page *page = pfn_to_page(pfn);
1463
1464 if (PagePinned(virt_to_page(mm->pgd))) {
1465 SetPagePinned(page);
1466
1467 vm_unmap_aliases();
1468 if (!PageHighMem(page)) {
1469 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1470 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1471 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1472 } else {
1473 /* make sure there are no stray mappings of
1474 this page */
1475 kmap_flush_unused();
1476 }
1477 }
1478}
1479
1480static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1481{
1482 xen_alloc_ptpage(mm, pfn, PT_PTE);
1483}
1484
1485static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1486{
1487 xen_alloc_ptpage(mm, pfn, PT_PMD);
1488}
1489
1490/* This should never happen until we're OK to use struct page */
1491static void xen_release_ptpage(unsigned long pfn, unsigned level)
1492{
1493 struct page *page = pfn_to_page(pfn);
1494
1495 if (PagePinned(page)) {
1496 if (!PageHighMem(page)) {
1497 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1498 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1499 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1500 }
1501 ClearPagePinned(page);
1502 }
1503}
1504
1505static void xen_release_pte(unsigned long pfn)
1506{
1507 xen_release_ptpage(pfn, PT_PTE);
1508}
1509
1510static void xen_release_pmd(unsigned long pfn)
1511{
1512 xen_release_ptpage(pfn, PT_PMD);
1513}
1514
1515#if PAGETABLE_LEVELS == 4
1516static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1517{
1518 xen_alloc_ptpage(mm, pfn, PT_PUD);
1519}
1520
1521static void xen_release_pud(unsigned long pfn)
1522{
1523 xen_release_ptpage(pfn, PT_PUD);
1524}
1525#endif
1526
1527void __init xen_reserve_top(void)
1528{
1529#ifdef CONFIG_X86_32
1530 unsigned long top = HYPERVISOR_VIRT_START;
1531 struct xen_platform_parameters pp;
1532
1533 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1534 top = pp.virt_start;
1535
1536 reserve_top_address(-top);
1537#endif /* CONFIG_X86_32 */
1538}
1539
1540/*
1541 * Like __va(), but returns address in the kernel mapping (which is
1542 * all we have until the physical memory mapping has been set up.
1543 */
1544static void *__ka(phys_addr_t paddr)
1545{
1546#ifdef CONFIG_X86_64
1547 return (void *)(paddr + __START_KERNEL_map);
1548#else
1549 return __va(paddr);
1550#endif
1551}
1552
1553/* Convert a machine address to physical address */
1554static unsigned long m2p(phys_addr_t maddr)
1555{
1556 phys_addr_t paddr;
1557
1558 maddr &= PTE_PFN_MASK;
1559 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1560
1561 return paddr;
1562}
1563
1564/* Convert a machine address to kernel virtual */
1565static void *m2v(phys_addr_t maddr)
1566{
1567 return __ka(m2p(maddr));
1568}
1569
1570static void set_page_prot(void *addr, pgprot_t prot)
1571{
1572 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1573 pte_t pte = pfn_pte(pfn, prot);
1574
1575 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1576 BUG();
1577}
1578
1579static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1580{
1581 unsigned pmdidx, pteidx;
1582 unsigned ident_pte;
1583 unsigned long pfn;
1584
1585 ident_pte = 0;
1586 pfn = 0;
1587 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1588 pte_t *pte_page;
1589
1590 /* Reuse or allocate a page of ptes */
1591 if (pmd_present(pmd[pmdidx]))
1592 pte_page = m2v(pmd[pmdidx].pmd);
1593 else {
1594 /* Check for free pte pages */
1595 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1596 break;
1597
1598 pte_page = &level1_ident_pgt[ident_pte];
1599 ident_pte += PTRS_PER_PTE;
1600
1601 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1602 }
1603
1604 /* Install mappings */
1605 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1606 pte_t pte;
1607
1608 if (pfn > max_pfn_mapped)
1609 max_pfn_mapped = pfn;
1610
1611 if (!pte_none(pte_page[pteidx]))
1612 continue;
1613
1614 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1615 pte_page[pteidx] = pte;
1616 }
1617 }
1618
1619 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1620 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1621
1622 set_page_prot(pmd, PAGE_KERNEL_RO);
1623}
1624
1625#ifdef CONFIG_X86_64
1626static void convert_pfn_mfn(void *v)
1627{
1628 pte_t *pte = v;
1629 int i;
1630
1631 /* All levels are converted the same way, so just treat them
1632 as ptes. */
1633 for (i = 0; i < PTRS_PER_PTE; i++)
1634 pte[i] = xen_make_pte(pte[i].pte);
1635}
1636
1637/*
1638 * Set up the inital kernel pagetable.
1639 *
1640 * We can construct this by grafting the Xen provided pagetable into
1641 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1642 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1643 * means that only the kernel has a physical mapping to start with -
1644 * but that's enough to get __va working. We need to fill in the rest
1645 * of the physical mapping once some sort of allocator has been set
1646 * up.
1647 */
1648__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1649 unsigned long max_pfn)
1650{
1651 pud_t *l3;
1652 pmd_t *l2;
1653
1654 /* Zap identity mapping */
1655 init_level4_pgt[0] = __pgd(0);
1656
1657 /* Pre-constructed entries are in pfn, so convert to mfn */
1658 convert_pfn_mfn(init_level4_pgt);
1659 convert_pfn_mfn(level3_ident_pgt);
1660 convert_pfn_mfn(level3_kernel_pgt);
1661
1662 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1663 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1664
1665 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1666 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1667
1668 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1669 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1670 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1671
1672 /* Set up identity map */
1673 xen_map_identity_early(level2_ident_pgt, max_pfn);
1674
1675 /* Make pagetable pieces RO */
1676 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1677 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1678 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1679 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1680 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1681 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1682
1683 /* Pin down new L4 */
1684 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1685 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1686
1687 /* Unpin Xen-provided one */
1688 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1689
1690 /* Switch over */
1691 pgd = init_level4_pgt;
1692
1693 /*
1694 * At this stage there can be no user pgd, and no page
1695 * structure to attach it to, so make sure we just set kernel
1696 * pgd.
1697 */
1698 xen_mc_batch();
1699 __xen_write_cr3(true, __pa(pgd));
1700 xen_mc_issue(PARAVIRT_LAZY_CPU);
1701
1702 reserve_early(__pa(xen_start_info->pt_base),
1703 __pa(xen_start_info->pt_base +
1704 xen_start_info->nr_pt_frames * PAGE_SIZE),
1705 "XEN PAGETABLES");
1706
1707 return pgd;
1708}
1709#else /* !CONFIG_X86_64 */
1710static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1711
1712__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1713 unsigned long max_pfn)
1714{
1715 pmd_t *kernel_pmd;
1716
1717 init_pg_tables_start = __pa(pgd);
1718 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1719 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1720
1721 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1722 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1723
1724 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1725
1726 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1727 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1728 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1729
1730 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1731 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1732 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1733
1734 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1735
1736 xen_write_cr3(__pa(swapper_pg_dir));
1737
1738 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1739
1740 return swapper_pg_dir;
1741}
1742#endif /* CONFIG_X86_64 */
1743
1744static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1745{
1746 pte_t pte;
1747
1748 phys >>= PAGE_SHIFT;
1749
1750 switch (idx) {
1751 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1752#ifdef CONFIG_X86_F00F_BUG
1753 case FIX_F00F_IDT:
1754#endif
1755#ifdef CONFIG_X86_32
1756 case FIX_WP_TEST:
1757 case FIX_VDSO:
1758# ifdef CONFIG_HIGHMEM
1759 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1760# endif
1761#else
1762 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1763#endif
1764#ifdef CONFIG_X86_LOCAL_APIC
1765 case FIX_APIC_BASE: /* maps dummy local APIC */
1766#endif
1767 pte = pfn_pte(phys, prot);
1768 break;
1769
1770 default:
1771 pte = mfn_pte(phys, prot);
1772 break;
1773 }
1774
1775 __native_set_fixmap(idx, pte);
1776
1777#ifdef CONFIG_X86_64
1778 /* Replicate changes to map the vsyscall page into the user
1779 pagetable vsyscall mapping. */
1780 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1781 unsigned long vaddr = __fix_to_virt(idx);
1782 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1783 }
1784#endif
1785}
1786
1787__init void xen_post_allocator_init(void)
1788{
1789 pv_mmu_ops.set_pte = xen_set_pte;
1790 pv_mmu_ops.set_pmd = xen_set_pmd;
1791 pv_mmu_ops.set_pud = xen_set_pud;
1792#if PAGETABLE_LEVELS == 4
1793 pv_mmu_ops.set_pgd = xen_set_pgd;
1794#endif
1795
1796 /* This will work as long as patching hasn't happened yet
1797 (which it hasn't) */
1798 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1799 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1800 pv_mmu_ops.release_pte = xen_release_pte;
1801 pv_mmu_ops.release_pmd = xen_release_pmd;
1802#if PAGETABLE_LEVELS == 4
1803 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1804 pv_mmu_ops.release_pud = xen_release_pud;
1805#endif
1806
1807#ifdef CONFIG_X86_64
1808 SetPagePinned(virt_to_page(level3_user_vsyscall));
1809#endif
1810 xen_mark_init_mm_pinned();
1811}
1812
b407fc57
JF
1813static void xen_leave_lazy_mmu(void)
1814{
1815 xen_mc_flush();
1816 paravirt_leave_lazy_mmu();
1817}
319f3ba5
JF
1818
1819const struct pv_mmu_ops xen_mmu_ops __initdata = {
1820 .pagetable_setup_start = xen_pagetable_setup_start,
1821 .pagetable_setup_done = xen_pagetable_setup_done,
1822
1823 .read_cr2 = xen_read_cr2,
1824 .write_cr2 = xen_write_cr2,
1825
1826 .read_cr3 = xen_read_cr3,
1827 .write_cr3 = xen_write_cr3,
1828
1829 .flush_tlb_user = xen_flush_tlb,
1830 .flush_tlb_kernel = xen_flush_tlb,
1831 .flush_tlb_single = xen_flush_tlb_single,
1832 .flush_tlb_others = xen_flush_tlb_others,
1833
1834 .pte_update = paravirt_nop,
1835 .pte_update_defer = paravirt_nop,
1836
1837 .pgd_alloc = xen_pgd_alloc,
1838 .pgd_free = xen_pgd_free,
1839
1840 .alloc_pte = xen_alloc_pte_init,
1841 .release_pte = xen_release_pte_init,
1842 .alloc_pmd = xen_alloc_pte_init,
1843 .alloc_pmd_clone = paravirt_nop,
1844 .release_pmd = xen_release_pte_init,
1845
1846#ifdef CONFIG_HIGHPTE
1847 .kmap_atomic_pte = xen_kmap_atomic_pte,
1848#endif
1849
1850#ifdef CONFIG_X86_64
1851 .set_pte = xen_set_pte,
1852#else
1853 .set_pte = xen_set_pte_init,
1854#endif
1855 .set_pte_at = xen_set_pte_at,
1856 .set_pmd = xen_set_pmd_hyper,
1857
1858 .ptep_modify_prot_start = __ptep_modify_prot_start,
1859 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1860
da5de7c2
JF
1861 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1862 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 1863
da5de7c2
JF
1864 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1865 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
1866
1867#ifdef CONFIG_X86_PAE
1868 .set_pte_atomic = xen_set_pte_atomic,
1869 .set_pte_present = xen_set_pte_at,
1870 .pte_clear = xen_pte_clear,
1871 .pmd_clear = xen_pmd_clear,
1872#endif /* CONFIG_X86_PAE */
1873 .set_pud = xen_set_pud_hyper,
1874
da5de7c2
JF
1875 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1876 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
319f3ba5
JF
1877
1878#if PAGETABLE_LEVELS == 4
da5de7c2
JF
1879 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1880 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
1881 .set_pgd = xen_set_pgd_hyper,
1882
1883 .alloc_pud = xen_alloc_pte_init,
1884 .release_pud = xen_release_pte_init,
1885#endif /* PAGETABLE_LEVELS == 4 */
1886
1887 .activate_mm = xen_activate_mm,
1888 .dup_mmap = xen_dup_mmap,
1889 .exit_mmap = xen_exit_mmap,
1890
1891 .lazy_mode = {
1892 .enter = paravirt_enter_lazy_mmu,
b407fc57 1893 .leave = xen_leave_lazy_mmu,
319f3ba5
JF
1894 },
1895
1896 .set_fixmap = xen_set_fixmap,
1897};
1898
1899
994025ca
JF
1900#ifdef CONFIG_XEN_DEBUG_FS
1901
1902static struct dentry *d_mmu_debug;
1903
1904static int __init xen_mmu_debugfs(void)
1905{
1906 struct dentry *d_xen = xen_init_debugfs();
1907
1908 if (d_xen == NULL)
1909 return -ENOMEM;
1910
1911 d_mmu_debug = debugfs_create_dir("mmu", d_xen);
1912
1913 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
1914
1915 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
1916 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
1917 &mmu_stats.pgd_update_pinned);
1918 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
1919 &mmu_stats.pgd_update_pinned);
1920
1921 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
1922 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
1923 &mmu_stats.pud_update_pinned);
1924 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
1925 &mmu_stats.pud_update_pinned);
1926
1927 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
1928 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
1929 &mmu_stats.pmd_update_pinned);
1930 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
1931 &mmu_stats.pmd_update_pinned);
1932
1933 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
1934// debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
1935// &mmu_stats.pte_update_pinned);
1936 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
1937 &mmu_stats.pte_update_pinned);
1938
1939 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
1940 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
1941 &mmu_stats.mmu_update_extended);
1942 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
1943 mmu_stats.mmu_update_histo, 20);
1944
1945 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
1946 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
1947 &mmu_stats.set_pte_at_batched);
1948 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
1949 &mmu_stats.set_pte_at_current);
1950 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
1951 &mmu_stats.set_pte_at_kernel);
1952
1953 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
1954 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
1955 &mmu_stats.prot_commit_batched);
1956
1957 return 0;
1958}
1959fs_initcall(xen_mmu_debugfs);
1960
1961#endif /* CONFIG_XEN_DEBUG_FS */
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