[deliverable/linux.git] / arch / x86_64 / kernel / mce_amd.c

/*
 *  (c) 2005, 2006 Advanced Micro Devices, Inc.
 *  Your use of this code is subject to the terms and conditions of the
 *  GNU general public license version 2. See "COPYING" or
 *  http://www.gnu.org/licenses/gpl.html
 *
 *  Written by Jacob Shin - AMD, Inc.
 *
 *  Support : jacob.shin@amd.com
 *
 *  April 2006
 *     - added support for AMD Family 0x10 processors
 *
 *  All MC4_MISCi registers are shared between multi-cores
 */

#include <linux/cpu.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kobject.h>
#include <linux/notifier.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/sysdev.h>
#include <linux/sysfs.h>
#include <asm/apic.h>
#include <asm/mce.h>
#include <asm/msr.h>
#include <asm/percpu.h>
#include <asm/idle.h>

#define PFX               "mce_threshold: "
#define VERSION           "version 1.1.1"
#define NR_BANKS          6
#define NR_BLOCKS         9
#define THRESHOLD_MAX     0xFFF
#define INT_TYPE_APIC     0x00020000
#define MASK_VALID_HI     0x80000000
#define MASK_CNTP_HI      0x40000000
#define MASK_LOCKED_HI    0x20000000
#define MASK_LVTOFF_HI    0x00F00000
#define MASK_COUNT_EN_HI  0x00080000
#define MASK_INT_TYPE_HI  0x00060000
#define MASK_OVERFLOW_HI  0x00010000
#define MASK_ERR_COUNT_HI 0x00000FFF
#define MASK_BLKPTR_LO    0xFF000000
#define MCG_XBLK_ADDR     0xC0000400

struct threshold_block {
	unsigned int block;
	unsigned int bank;
	unsigned int cpu;
	u32 address;
	u16 interrupt_enable;
	u16 threshold_limit;
	struct kobject kobj;
	struct list_head miscj;
};

/* defaults used early on boot */
static struct threshold_block threshold_defaults = {
	.interrupt_enable = 0,
	.threshold_limit = THRESHOLD_MAX,
};

struct threshold_bank {
	struct kobject kobj;
	struct threshold_block *blocks;
	cpumask_t cpus;
};
static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);

#ifdef CONFIG_SMP
static unsigned char shared_bank[NR_BANKS] = {
	0, 0, 0, 0, 1
};
#endif

static DEFINE_PER_CPU(unsigned char, bank_map);	/* see which banks are on */

/*
 * CPU Initialization
 */

/* must be called with correct cpu affinity */
static void threshold_restart_bank(struct threshold_block *b,
				   int reset, u16 old_limit)
{
	u32 mci_misc_hi, mci_misc_lo;

	rdmsr(b->address, mci_misc_lo, mci_misc_hi);

	if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
		reset = 1;	/* limit cannot be lower than err count */

	if (reset) {		/* reset err count and overflow bit */
		mci_misc_hi =
		    (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
		    (THRESHOLD_MAX - b->threshold_limit);
	} else if (old_limit) {	/* change limit w/o reset */
		int new_count = (mci_misc_hi & THRESHOLD_MAX) +
		    (old_limit - b->threshold_limit);
		mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
		    (new_count & THRESHOLD_MAX);
	}

	b->interrupt_enable ?
	    (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
	    (mci_misc_hi &= ~MASK_INT_TYPE_HI);

	mci_misc_hi |= MASK_COUNT_EN_HI;
	wrmsr(b->address, mci_misc_lo, mci_misc_hi);
}

/* cpu init entry point, called from mce.c with preempt off */
void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
{
	unsigned int bank, block;
	unsigned int cpu = smp_processor_id();
	u32 low = 0, high = 0, address = 0;

	for (bank = 0; bank < NR_BANKS; ++bank) {
		for (block = 0; block < NR_BLOCKS; ++block) {
			if (block == 0)
				address = MSR_IA32_MC0_MISC + bank * 4;
			else if (block == 1) {
				address = (low & MASK_BLKPTR_LO) >> 21;
				if (!address)
					break;
				address += MCG_XBLK_ADDR;
			}
			else
				++address;

			if (rdmsr_safe(address, &low, &high))
				break;

			if (!(high & MASK_VALID_HI)) {
				if (block)
					continue;
				else
					break;
			}

			if (!(high & MASK_CNTP_HI)  ||
			     (high & MASK_LOCKED_HI))
				continue;

			if (!block)
				per_cpu(bank_map, cpu) |= (1 << bank);
#ifdef CONFIG_SMP
			if (shared_bank[bank] && c->cpu_core_id)
				break;
#endif
			high &= ~MASK_LVTOFF_HI;
			high |= K8_APIC_EXT_LVT_ENTRY_THRESHOLD << 20;
			wrmsr(address, low, high);

			setup_APIC_extened_lvt(K8_APIC_EXT_LVT_ENTRY_THRESHOLD,
					       THRESHOLD_APIC_VECTOR,
					       K8_APIC_EXT_INT_MSG_FIX, 0);

			threshold_defaults.address = address;
			threshold_restart_bank(&threshold_defaults, 0, 0);
		}
	}
}

/*
 * APIC Interrupt Handler
 */

/*
 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
 * the interrupt goes off when error_count reaches threshold_limit.
 * the handler will simply log mcelog w/ software defined bank number.
 */
asmlinkage void mce_threshold_interrupt(void)
{
	unsigned int bank, block;
	struct mce m;
	u32 low = 0, high = 0, address = 0;

	ack_APIC_irq();
	exit_idle();
	irq_enter();

	memset(&m, 0, sizeof(m));
	rdtscll(m.tsc);
	m.cpu = smp_processor_id();

	/* assume first bank caused it */
	for (bank = 0; bank < NR_BANKS; ++bank) {
		if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
			continue;
		for (block = 0; block < NR_BLOCKS; ++block) {
			if (block == 0)
				address = MSR_IA32_MC0_MISC + bank * 4;
			else if (block == 1) {
				address = (low & MASK_BLKPTR_LO) >> 21;
				if (!address)
					break;
				address += MCG_XBLK_ADDR;
			}
			else
				++address;

			if (rdmsr_safe(address, &low, &high))
				break;

			if (!(high & MASK_VALID_HI)) {
				if (block)
					continue;
				else
					break;
			}

			if (!(high & MASK_CNTP_HI)  ||
			     (high & MASK_LOCKED_HI))
				continue;

			/* Log the machine check that caused the threshold
			   event. */
			do_machine_check(NULL, 0);

			if (high & MASK_OVERFLOW_HI) {
				rdmsrl(address, m.misc);
				rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
				       m.status);
				m.bank = K8_MCE_THRESHOLD_BASE
				       + bank * NR_BLOCKS
				       + block;
				mce_log(&m);
				goto out;
			}
		}
	}
out:
	irq_exit();
}

/*
 * Sysfs Interface
 */

struct threshold_attr {
	struct attribute attr;
	ssize_t(*show) (struct threshold_block *, char *);
	ssize_t(*store) (struct threshold_block *, const char *, size_t count);
};

static cpumask_t affinity_set(unsigned int cpu)
{
	cpumask_t oldmask = current->cpus_allowed;
	cpumask_t newmask = CPU_MASK_NONE;
	cpu_set(cpu, newmask);
	set_cpus_allowed(current, newmask);
	return oldmask;
}

static void affinity_restore(cpumask_t oldmask)
{
	set_cpus_allowed(current, oldmask);
}

#define SHOW_FIELDS(name)                                           \
static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
{                                                                   \
        return sprintf(buf, "%lx\n", (unsigned long) b->name);      \
}
SHOW_FIELDS(interrupt_enable)
SHOW_FIELDS(threshold_limit)

static ssize_t store_interrupt_enable(struct threshold_block *b,
				      const char *buf, size_t count)
{
	char *end;
	cpumask_t oldmask;
	unsigned long new = simple_strtoul(buf, &end, 0);
	if (end == buf)
		return -EINVAL;
	b->interrupt_enable = !!new;

	oldmask = affinity_set(b->cpu);
	threshold_restart_bank(b, 0, 0);
	affinity_restore(oldmask);

	return end - buf;
}

static ssize_t store_threshold_limit(struct threshold_block *b,
				     const char *buf, size_t count)
{
	char *end;
	cpumask_t oldmask;
	u16 old;
	unsigned long new = simple_strtoul(buf, &end, 0);
	if (end == buf)
		return -EINVAL;
	if (new > THRESHOLD_MAX)
		new = THRESHOLD_MAX;
	if (new < 1)
		new = 1;
	old = b->threshold_limit;
	b->threshold_limit = new;

	oldmask = affinity_set(b->cpu);
	threshold_restart_bank(b, 0, old);
	affinity_restore(oldmask);

	return end - buf;
}

static ssize_t show_error_count(struct threshold_block *b, char *buf)
{
	u32 high, low;
	cpumask_t oldmask;
	oldmask = affinity_set(b->cpu);
	rdmsr(b->address, low, high);
	affinity_restore(oldmask);
	return sprintf(buf, "%x\n",
		       (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit));
}

static ssize_t store_error_count(struct threshold_block *b,
				 const char *buf, size_t count)
{
	cpumask_t oldmask;
	oldmask = affinity_set(b->cpu);
	threshold_restart_bank(b, 1, 0);
	affinity_restore(oldmask);
	return 1;
}

#define THRESHOLD_ATTR(_name,_mode,_show,_store) {            \
        .attr = {.name = __stringify(_name), .mode = _mode }, \
        .show = _show,                                        \
        .store = _store,                                      \
};

#define RW_ATTR(name)                                           \
static struct threshold_attr name =                             \
        THRESHOLD_ATTR(name, 0644, show_## name, store_## name)

RW_ATTR(interrupt_enable);
RW_ATTR(threshold_limit);
RW_ATTR(error_count);

static struct attribute *default_attrs[] = {
	&interrupt_enable.attr,
	&threshold_limit.attr,
	&error_count.attr,
	NULL
};

#define to_block(k) container_of(k, struct threshold_block, kobj)
#define to_attr(a) container_of(a, struct threshold_attr, attr)

static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
{
	struct threshold_block *b = to_block(kobj);
	struct threshold_attr *a = to_attr(attr);
	ssize_t ret;
	ret = a->show ? a->show(b, buf) : -EIO;
	return ret;
}

static ssize_t store(struct kobject *kobj, struct attribute *attr,
		     const char *buf, size_t count)
{
	struct threshold_block *b = to_block(kobj);
	struct threshold_attr *a = to_attr(attr);
	ssize_t ret;
	ret = a->store ? a->store(b, buf, count) : -EIO;
	return ret;
}

static struct sysfs_ops threshold_ops = {
	.show = show,
	.store = store,
};

static struct kobj_type threshold_ktype = {
	.sysfs_ops = &threshold_ops,
	.default_attrs = default_attrs,
};

static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
					       unsigned int bank,
					       unsigned int block,
					       u32 address)
{
	int err;
	u32 low, high;
	struct threshold_block *b = NULL;

	if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
		return 0;

	if (rdmsr_safe(address, &low, &high))
		return 0;

	if (!(high & MASK_VALID_HI)) {
		if (block)
			goto recurse;
		else
			return 0;
	}

	if (!(high & MASK_CNTP_HI)  ||
	     (high & MASK_LOCKED_HI))
		goto recurse;

	b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
	if (!b)
		return -ENOMEM;

	b->block = block;
	b->bank = bank;
	b->cpu = cpu;
	b->address = address;
	b->interrupt_enable = 0;
	b->threshold_limit = THRESHOLD_MAX;

	INIT_LIST_HEAD(&b->miscj);

	if (per_cpu(threshold_banks, cpu)[bank]->blocks)
		list_add(&b->miscj,
			 &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
	else
		per_cpu(threshold_banks, cpu)[bank]->blocks = b;

	kobject_set_name(&b->kobj, "misc%i", block);
	b->kobj.parent = &per_cpu(threshold_banks, cpu)[bank]->kobj;
	b->kobj.ktype = &threshold_ktype;
	err = kobject_register(&b->kobj);
	if (err)
		goto out_free;
recurse:
	if (!block) {
		address = (low & MASK_BLKPTR_LO) >> 21;
		if (!address)
			return 0;
		address += MCG_XBLK_ADDR;
	} else
		++address;

	err = allocate_threshold_blocks(cpu, bank, ++block, address);
	if (err)
		goto out_free;

	return err;

out_free:
	if (b) {
		kobject_unregister(&b->kobj);
		kfree(b);
	}
	return err;
}

/* symlinks sibling shared banks to first core.  first core owns dir/files. */
static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
{
	int i, err = 0;
	struct threshold_bank *b = NULL;
	cpumask_t oldmask = CPU_MASK_NONE;
	char name[32];

	sprintf(name, "threshold_bank%i", bank);

#ifdef CONFIG_SMP
	if (cpu_data[cpu].cpu_core_id && shared_bank[bank]) {	/* symlink */
		i = first_cpu(cpu_core_map[cpu]);

		/* first core not up yet */
		if (cpu_data[i].cpu_core_id)
			goto out;

		/* already linked */
		if (per_cpu(threshold_banks, cpu)[bank])
			goto out;

		b = per_cpu(threshold_banks, i)[bank];

		if (!b)
			goto out;

		err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
					&b->kobj, name);
		if (err)
			goto out;

		b->cpus = cpu_core_map[cpu];
		per_cpu(threshold_banks, cpu)[bank] = b;
		goto out;
	}
#endif

	b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
	if (!b) {
		err = -ENOMEM;
		goto out;
	}

	kobject_set_name(&b->kobj, "threshold_bank%i", bank);
	b->kobj.parent = &per_cpu(device_mce, cpu).kobj;
#ifndef CONFIG_SMP
	b->cpus = CPU_MASK_ALL;
#else
	b->cpus = cpu_core_map[cpu];
#endif
	err = kobject_register(&b->kobj);
	if (err)
		goto out_free;

	per_cpu(threshold_banks, cpu)[bank] = b;

	oldmask = affinity_set(cpu);
	err = allocate_threshold_blocks(cpu, bank, 0,
					MSR_IA32_MC0_MISC + bank * 4);
	affinity_restore(oldmask);

	if (err)
		goto out_free;

	for_each_cpu_mask(i, b->cpus) {
		if (i == cpu)
			continue;

		err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
					&b->kobj, name);
		if (err)
			goto out;

		per_cpu(threshold_banks, i)[bank] = b;
	}

	goto out;

out_free:
	per_cpu(threshold_banks, cpu)[bank] = NULL;
	kfree(b);
out:
	return err;
}

/* create dir/files for all valid threshold banks */
static __cpuinit int threshold_create_device(unsigned int cpu)
{
	unsigned int bank;
	int err = 0;

	for (bank = 0; bank < NR_BANKS; ++bank) {
		if (!(per_cpu(bank_map, cpu) & 1 << bank))
			continue;
		err = threshold_create_bank(cpu, bank);
		if (err)
			goto out;
	}
out:
	return err;
}

/*
 * let's be hotplug friendly.
 * in case of multiple core processors, the first core always takes ownership
 *   of shared sysfs dir/files, and rest of the cores will be symlinked to it.
 */

static void deallocate_threshold_block(unsigned int cpu,
						 unsigned int bank)
{
	struct threshold_block *pos = NULL;
	struct threshold_block *tmp = NULL;
	struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];

	if (!head)
		return;

	list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
		kobject_unregister(&pos->kobj);
		list_del(&pos->miscj);
		kfree(pos);
	}

	kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
	per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
}

static void threshold_remove_bank(unsigned int cpu, int bank)
{
	int i = 0;
	struct threshold_bank *b;
	char name[32];

	b = per_cpu(threshold_banks, cpu)[bank];

	if (!b)
		return;

	if (!b->blocks)
		goto free_out;

	sprintf(name, "threshold_bank%i", bank);

#ifdef CONFIG_SMP
	/* sibling symlink */
	if (shared_bank[bank] && b->blocks->cpu != cpu) {
		sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
		per_cpu(threshold_banks, cpu)[bank] = NULL;
		return;
	}
#endif

	/* remove all sibling symlinks before unregistering */
	for_each_cpu_mask(i, b->cpus) {
		if (i == cpu)
			continue;

		sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
		per_cpu(threshold_banks, i)[bank] = NULL;
	}

	deallocate_threshold_block(cpu, bank);

free_out:
	kobject_unregister(&b->kobj);
	kfree(b);
	per_cpu(threshold_banks, cpu)[bank] = NULL;
}

static void threshold_remove_device(unsigned int cpu)
{
	unsigned int bank;

	for (bank = 0; bank < NR_BANKS; ++bank) {
		if (!(per_cpu(bank_map, cpu) & 1 << bank))
			continue;
		threshold_remove_bank(cpu, bank);
	}
}

/* get notified when a cpu comes on/off */
static int threshold_cpu_callback(struct notifier_block *nfb,
					    unsigned long action, void *hcpu)
{
	/* cpu was unsigned int to begin with */
	unsigned int cpu = (unsigned long)hcpu;

	if (cpu >= NR_CPUS)
		goto out;

	switch (action) {
	case CPU_ONLINE:
		threshold_create_device(cpu);
		break;
	case CPU_DEAD:
		threshold_remove_device(cpu);
		break;
	default:
		break;
	}
      out:
	return NOTIFY_OK;
}

static struct notifier_block threshold_cpu_notifier = {
	.notifier_call = threshold_cpu_callback,
};

static __init int threshold_init_device(void)
{
	unsigned lcpu = 0;

	/* to hit CPUs online before the notifier is up */
	for_each_online_cpu(lcpu) {
		int err = threshold_create_device(lcpu);
		if (err)
			return err;
	}
	register_hotcpu_notifier(&threshold_cpu_notifier);
	return 0;
}

device_initcall(threshold_init_device);
Commit	Line	Data
89b831ef	1	/*
95268664	2	* (c) 2005, 2006 Advanced Micro Devices, Inc.
89b831ef JS	3	* Your use of this code is subject to the terms and conditions of the
	4	* GNU general public license version 2. See "COPYING" or
	5	* http://www.gnu.org/licenses/gpl.html
	6	*
	7	* Written by Jacob Shin - AMD, Inc.
	8	*
	9	* Support : jacob.shin@amd.com
	10	*
95268664 JS	11	* April 2006
95268664 JS	12	* - added support for AMD Family 0x10 processors
89b831ef	13	*
95268664	14	* All MC4_MISCi registers are shared between multi-cores
89b831ef JS	15	*/
	16
	17	#include <linux/cpu.h>
	18	#include <linux/errno.h>
	19	#include <linux/init.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/kobject.h>
	22	#include <linux/notifier.h>
	23	#include <linux/sched.h>
	24	#include <linux/smp.h>
	25	#include <linux/sysdev.h>
	26	#include <linux/sysfs.h>
	27	#include <asm/apic.h>
	28	#include <asm/mce.h>
	29	#include <asm/msr.h>
	30	#include <asm/percpu.h>
95833c83	31	#include <asm/idle.h>
89b831ef	32
2903ee85 JS	33	#define PFX "mce_threshold: "
	34	#define VERSION "version 1.1.1"
	35	#define NR_BANKS 6
	36	#define NR_BLOCKS 9
	37	#define THRESHOLD_MAX 0xFFF
	38	#define INT_TYPE_APIC 0x00020000
	39	#define MASK_VALID_HI 0x80000000
24ce0e96 JB	40	#define MASK_CNTP_HI 0x40000000
24ce0e96 JB	41	#define MASK_LOCKED_HI 0x20000000
2903ee85 JS	42	#define MASK_LVTOFF_HI 0x00F00000
	43	#define MASK_COUNT_EN_HI 0x00080000
	44	#define MASK_INT_TYPE_HI 0x00060000
	45	#define MASK_OVERFLOW_HI 0x00010000
89b831ef	46	#define MASK_ERR_COUNT_HI 0x00000FFF
95268664 JS	47	#define MASK_BLKPTR_LO 0xFF000000
95268664 JS	48	#define MCG_XBLK_ADDR 0xC0000400
89b831ef	49
95268664 JS	50	struct threshold_block {
	51	unsigned int block;
	52	unsigned int bank;
89b831ef	53	unsigned int cpu;
95268664 JS	54	u32 address;
95268664 JS	55	u16 interrupt_enable;
89b831ef JS	56	u16 threshold_limit;
89b831ef JS	57	struct kobject kobj;
95268664	58	struct list_head miscj;
89b831ef JS	59	};
89b831ef JS	60
95268664 JS	61	/* defaults used early on boot */
95268664 JS	62	static struct threshold_block threshold_defaults = {
89b831ef JS	63	.interrupt_enable = 0,
	64	.threshold_limit = THRESHOLD_MAX,
	65	};
	66
95268664 JS	67	struct threshold_bank {
	68	struct kobject kobj;
	69	struct threshold_block *blocks;
	70	cpumask_t cpus;
	71	};
	72	static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
	73
89b831ef JS	74	#ifdef CONFIG_SMP
	75	static unsigned char shared_bank[NR_BANKS] = {
	76	0, 0, 0, 0, 1
	77	};
	78	#endif
	79
	80	static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
	81
	82	/*
	83	* CPU Initialization
	84	*/
	85
	86	/* must be called with correct cpu affinity */
95268664	87	static void threshold_restart_bank(struct threshold_block *b,
89b831ef JS	88	int reset, u16 old_limit)
	89	{
	90	u32 mci_misc_hi, mci_misc_lo;
	91
95268664	92	rdmsr(b->address, mci_misc_lo, mci_misc_hi);
89b831ef JS	93
	94	if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
	95	reset = 1; /* limit cannot be lower than err count */
	96
	97	if (reset) { /* reset err count and overflow bit */
	98	mci_misc_hi =
	99	(mci_misc_hi & ~(MASK_ERR_COUNT_HI \| MASK_OVERFLOW_HI)) \|
	100	(THRESHOLD_MAX - b->threshold_limit);
	101	} else if (old_limit) { /* change limit w/o reset */
	102	int new_count = (mci_misc_hi & THRESHOLD_MAX) +
	103	(old_limit - b->threshold_limit);
	104	mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) \|
	105	(new_count & THRESHOLD_MAX);
	106	}
	107
	108	b->interrupt_enable ?
	109	(mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) \| INT_TYPE_APIC) :
	110	(mci_misc_hi &= ~MASK_INT_TYPE_HI);
	111
	112	mci_misc_hi \|= MASK_COUNT_EN_HI;
95268664	113	wrmsr(b->address, mci_misc_lo, mci_misc_hi);
89b831ef JS	114	}
89b831ef JS	115
95268664	116	/* cpu init entry point, called from mce.c with preempt off */
89b831ef JS	117	void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
89b831ef JS	118	{
95268664	119	unsigned int bank, block;
89b831ef	120	unsigned int cpu = smp_processor_id();
95268664	121	u32 low = 0, high = 0, address = 0;
89b831ef JS	122
89b831ef JS	123	for (bank = 0; bank < NR_BANKS; ++bank) {
95268664 JS	124	for (block = 0; block < NR_BLOCKS; ++block) {
	125	if (block == 0)
	126	address = MSR_IA32_MC0_MISC + bank * 4;
24ce0e96 JB	127	else if (block == 1) {
	128	address = (low & MASK_BLKPTR_LO) >> 21;
	129	if (!address)
	130	break;
	131	address += MCG_XBLK_ADDR;
	132	}
95268664 JS	133	else
	134	++address;
	135
	136	if (rdmsr_safe(address, &low, &high))
24ce0e96	137	break;
95268664 JS	138
	139	if (!(high & MASK_VALID_HI)) {
	140	if (block)
	141	continue;
	142	else
	143	break;
	144	}
	145
24ce0e96 JB	146	if (!(high & MASK_CNTP_HI) \|\|
24ce0e96 JB	147	(high & MASK_LOCKED_HI))
95268664 JS	148	continue;
	149
	150	if (!block)
	151	per_cpu(bank_map, cpu) \|= (1 << bank);
89b831ef	152	#ifdef CONFIG_SMP
95268664 JS	153	if (shared_bank[bank] && c->cpu_core_id)
95268664 JS	154	break;
89b831ef	155	#endif
95268664 JS	156	high &= ~MASK_LVTOFF_HI;
	157	high \|= K8_APIC_EXT_LVT_ENTRY_THRESHOLD << 20;
	158	wrmsr(address, low, high);
	159
	160	setup_APIC_extened_lvt(K8_APIC_EXT_LVT_ENTRY_THRESHOLD,
	161	THRESHOLD_APIC_VECTOR,
	162	K8_APIC_EXT_INT_MSG_FIX, 0);
89b831ef	163
95268664 JS	164	threshold_defaults.address = address;
	165	threshold_restart_bank(&threshold_defaults, 0, 0);
	166	}
89b831ef JS	167	}
	168	}
	169
	170	/*
	171	* APIC Interrupt Handler
	172	*/
	173
	174	/*
	175	* threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
	176	* the interrupt goes off when error_count reaches threshold_limit.
	177	* the handler will simply log mcelog w/ software defined bank number.
	178	*/
	179	asmlinkage void mce_threshold_interrupt(void)
	180	{
95268664	181	unsigned int bank, block;
89b831ef	182	struct mce m;
95268664	183	u32 low = 0, high = 0, address = 0;
89b831ef JS	184
89b831ef JS	185	ack_APIC_irq();
95833c83	186	exit_idle();
89b831ef JS	187	irq_enter();
	188
	189	memset(&m, 0, sizeof(m));
	190	rdtscll(m.tsc);
	191	m.cpu = smp_processor_id();
	192
	193	/* assume first bank caused it */
	194	for (bank = 0; bank < NR_BANKS; ++bank) {
24ce0e96 JB	195	if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
24ce0e96 JB	196	continue;
95268664 JS	197	for (block = 0; block < NR_BLOCKS; ++block) {
	198	if (block == 0)
	199	address = MSR_IA32_MC0_MISC + bank * 4;
24ce0e96 JB	200	else if (block == 1) {
	201	address = (low & MASK_BLKPTR_LO) >> 21;
	202	if (!address)
	203	break;
	204	address += MCG_XBLK_ADDR;
	205	}
95268664 JS	206	else
	207	++address;
	208
	209	if (rdmsr_safe(address, &low, &high))
24ce0e96	210	break;
95268664 JS	211
	212	if (!(high & MASK_VALID_HI)) {
	213	if (block)
	214	continue;
	215	else
	216	break;
	217	}
	218
24ce0e96 JB	219	if (!(high & MASK_CNTP_HI) \|\|
24ce0e96 JB	220	(high & MASK_LOCKED_HI))
95268664 JS	221	continue;
95268664 JS	222
a98f0dd3 AK	223	/* Log the machine check that caused the threshold
	224	event. */
	225	do_machine_check(NULL, 0);
	226
95268664 JS	227	if (high & MASK_OVERFLOW_HI) {
	228	rdmsrl(address, m.misc);
	229	rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
	230	m.status);
	231	m.bank = K8_MCE_THRESHOLD_BASE
	232	+ bank * NR_BLOCKS
	233	+ block;
	234	mce_log(&m);
	235	goto out;
	236	}
89b831ef JS	237	}
89b831ef JS	238	}
2903ee85	239	out:
89b831ef JS	240	irq_exit();
	241	}
	242
	243	/*
	244	* Sysfs Interface
	245	*/
	246
89b831ef	247	struct threshold_attr {
2903ee85	248	struct attribute attr;
95268664 JS	249	ssize_t(show) (struct threshold_block , char *);
95268664 JS	250	ssize_t(store) (struct threshold_block , const char *, size_t count);
89b831ef JS	251	};
89b831ef JS	252
89b831ef JS	253	static cpumask_t affinity_set(unsigned int cpu)
	254	{
	255	cpumask_t oldmask = current->cpus_allowed;
	256	cpumask_t newmask = CPU_MASK_NONE;
	257	cpu_set(cpu, newmask);
	258	set_cpus_allowed(current, newmask);
	259	return oldmask;
	260	}
	261
	262	static void affinity_restore(cpumask_t oldmask)
	263	{
	264	set_cpus_allowed(current, oldmask);
	265	}
	266
2903ee85 JS	267	#define SHOW_FIELDS(name) \
	268	static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
	269	{ \
	270	return sprintf(buf, "%lx\n", (unsigned long) b->name); \
	271	}
89b831ef JS	272	SHOW_FIELDS(interrupt_enable)
	273	SHOW_FIELDS(threshold_limit)
	274
95268664	275	static ssize_t store_interrupt_enable(struct threshold_block *b,
89b831ef JS	276	const char *buf, size_t count)
	277	{
	278	char *end;
	279	cpumask_t oldmask;
	280	unsigned long new = simple_strtoul(buf, &end, 0);
	281	if (end == buf)
	282	return -EINVAL;
	283	b->interrupt_enable = !!new;
	284
	285	oldmask = affinity_set(b->cpu);
	286	threshold_restart_bank(b, 0, 0);
	287	affinity_restore(oldmask);
	288
	289	return end - buf;
	290	}
	291
95268664	292	static ssize_t store_threshold_limit(struct threshold_block *b,
89b831ef JS	293	const char *buf, size_t count)
	294	{
	295	char *end;
	296	cpumask_t oldmask;
	297	u16 old;
	298	unsigned long new = simple_strtoul(buf, &end, 0);
	299	if (end == buf)
	300	return -EINVAL;
	301	if (new > THRESHOLD_MAX)
	302	new = THRESHOLD_MAX;
	303	if (new < 1)
	304	new = 1;
	305	old = b->threshold_limit;
	306	b->threshold_limit = new;
	307
	308	oldmask = affinity_set(b->cpu);
	309	threshold_restart_bank(b, 0, old);
	310	affinity_restore(oldmask);
	311
	312	return end - buf;
	313	}
	314
95268664	315	static ssize_t show_error_count(struct threshold_block b, char buf)
89b831ef JS	316	{
	317	u32 high, low;
	318	cpumask_t oldmask;
	319	oldmask = affinity_set(b->cpu);
95268664	320	rdmsr(b->address, low, high);
89b831ef JS	321	affinity_restore(oldmask);
	322	return sprintf(buf, "%x\n",
	323	(high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit));
	324	}
	325
95268664	326	static ssize_t store_error_count(struct threshold_block *b,
89b831ef JS	327	const char *buf, size_t count)
	328	{
	329	cpumask_t oldmask;
	330	oldmask = affinity_set(b->cpu);
	331	threshold_restart_bank(b, 1, 0);
	332	affinity_restore(oldmask);
	333	return 1;
	334	}
	335
	336	#define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
	337	.attr = {.name = __stringify(_name), .mode = _mode }, \
	338	.show = _show, \
	339	.store = _store, \
	340	};
	341
2903ee85 JS	342	#define RW_ATTR(name) \
2903ee85 JS	343	static struct threshold_attr name = \
89b831ef JS	344	THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
89b831ef JS	345
2903ee85 JS	346	RW_ATTR(interrupt_enable);
	347	RW_ATTR(threshold_limit);
	348	RW_ATTR(error_count);
89b831ef JS	349
	350	static struct attribute *default_attrs[] = {
	351	&interrupt_enable.attr,
	352	&threshold_limit.attr,
	353	&error_count.attr,
	354	NULL
	355	};
	356
95268664	357	#define to_block(k) container_of(k, struct threshold_block, kobj)
2903ee85	358	#define to_attr(a) container_of(a, struct threshold_attr, attr)
89b831ef JS	359
	360	static ssize_t show(struct kobject kobj, struct attribute attr, char *buf)
	361	{
95268664	362	struct threshold_block *b = to_block(kobj);
89b831ef JS	363	struct threshold_attr *a = to_attr(attr);
	364	ssize_t ret;
	365	ret = a->show ? a->show(b, buf) : -EIO;
	366	return ret;
	367	}
	368
	369	static ssize_t store(struct kobject kobj, struct attribute attr,
	370	const char *buf, size_t count)
	371	{
95268664	372	struct threshold_block *b = to_block(kobj);
89b831ef JS	373	struct threshold_attr *a = to_attr(attr);
	374	ssize_t ret;
	375	ret = a->store ? a->store(b, buf, count) : -EIO;
	376	return ret;
	377	}
	378
	379	static struct sysfs_ops threshold_ops = {
	380	.show = show,
	381	.store = store,
	382	};
	383
	384	static struct kobj_type threshold_ktype = {
	385	.sysfs_ops = &threshold_ops,
	386	.default_attrs = default_attrs,
	387	};
	388
95268664 JS	389	static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
	390	unsigned int bank,
	391	unsigned int block,
	392	u32 address)
	393	{
	394	int err;
	395	u32 low, high;
	396	struct threshold_block *b = NULL;
	397
	398	if ((bank >= NR_BANKS) \|\| (block >= NR_BLOCKS))
	399	return 0;
	400
	401	if (rdmsr_safe(address, &low, &high))
24ce0e96	402	return 0;
95268664 JS	403
	404	if (!(high & MASK_VALID_HI)) {
	405	if (block)
	406	goto recurse;
	407	else
	408	return 0;
	409	}
	410
24ce0e96 JB	411	if (!(high & MASK_CNTP_HI) \|\|
24ce0e96 JB	412	(high & MASK_LOCKED_HI))
95268664 JS	413	goto recurse;
	414
	415	b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
	416	if (!b)
	417	return -ENOMEM;
95268664 JS	418
	419	b->block = block;
	420	b->bank = bank;
	421	b->cpu = cpu;
	422	b->address = address;
	423	b->interrupt_enable = 0;
	424	b->threshold_limit = THRESHOLD_MAX;
	425
	426	INIT_LIST_HEAD(&b->miscj);
	427
	428	if (per_cpu(threshold_banks, cpu)[bank]->blocks)
	429	list_add(&b->miscj,
	430	&per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
	431	else
	432	per_cpu(threshold_banks, cpu)[bank]->blocks = b;
	433
	434	kobject_set_name(&b->kobj, "misc%i", block);
	435	b->kobj.parent = &per_cpu(threshold_banks, cpu)[bank]->kobj;
	436	b->kobj.ktype = &threshold_ktype;
	437	err = kobject_register(&b->kobj);
	438	if (err)
	439	goto out_free;
	440	recurse:
	441	if (!block) {
	442	address = (low & MASK_BLKPTR_LO) >> 21;
	443	if (!address)
	444	return 0;
	445	address += MCG_XBLK_ADDR;
	446	} else
	447	++address;
	448
	449	err = allocate_threshold_blocks(cpu, bank, ++block, address);
	450	if (err)
	451	goto out_free;
	452
	453	return err;
	454
	455	out_free:
	456	if (b) {
	457	kobject_unregister(&b->kobj);
	458	kfree(b);
	459	}
	460	return err;
	461	}
	462
89b831ef	463	/* symlinks sibling shared banks to first core. first core owns dir/files. */
95268664	464	static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
89b831ef	465	{
95268664	466	int i, err = 0;
68209407	467	struct threshold_bank *b = NULL;
95268664 JS	468	cpumask_t oldmask = CPU_MASK_NONE;
	469	char name[32];
	470
	471	sprintf(name, "threshold_bank%i", bank);
89b831ef JS	472
89b831ef JS	473	#ifdef CONFIG_SMP
f3fa8ebc	474	if (cpu_data[cpu].cpu_core_id && shared_bank[bank]) { /* symlink */
95268664 JS	475	i = first_cpu(cpu_core_map[cpu]);
	476
	477	/* first core not up yet */
	478	if (cpu_data[i].cpu_core_id)
	479	goto out;
	480
	481	/* already linked */
	482	if (per_cpu(threshold_banks, cpu)[bank])
	483	goto out;
	484
	485	b = per_cpu(threshold_banks, i)[bank];
89b831ef	486
89b831ef JS	487	if (!b)
89b831ef JS	488	goto out;
95268664	489
fff2e89f	490	err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
89b831ef JS	491	&b->kobj, name);
	492	if (err)
	493	goto out;
95268664 JS	494
95268664 JS	495	b->cpus = cpu_core_map[cpu];
89b831ef JS	496	per_cpu(threshold_banks, cpu)[bank] = b;
	497	goto out;
	498	}
	499	#endif
	500
95268664	501	b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
89b831ef JS	502	if (!b) {
	503	err = -ENOMEM;
	504	goto out;
	505	}
89b831ef	506
fff2e89f JS	507	kobject_set_name(&b->kobj, "threshold_bank%i", bank);
fff2e89f JS	508	b->kobj.parent = &per_cpu(device_mce, cpu).kobj;
95268664 JS	509	#ifndef CONFIG_SMP
	510	b->cpus = CPU_MASK_ALL;
	511	#else
	512	b->cpus = cpu_core_map[cpu];
	513	#endif
89b831ef	514	err = kobject_register(&b->kobj);
95268664 JS	515	if (err)
	516	goto out_free;
	517
89b831ef	518	per_cpu(threshold_banks, cpu)[bank] = b;
95268664 JS	519
	520	oldmask = affinity_set(cpu);
	521	err = allocate_threshold_blocks(cpu, bank, 0,
	522	MSR_IA32_MC0_MISC + bank * 4);
	523	affinity_restore(oldmask);
	524
	525	if (err)
	526	goto out_free;
	527
	528	for_each_cpu_mask(i, b->cpus) {
	529	if (i == cpu)
	530	continue;
	531
	532	err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
	533	&b->kobj, name);
	534	if (err)
	535	goto out;
	536
	537	per_cpu(threshold_banks, i)[bank] = b;
	538	}
	539
	540	goto out;
	541
	542	out_free:
	543	per_cpu(threshold_banks, cpu)[bank] = NULL;
	544	kfree(b);
2903ee85	545	out:
89b831ef JS	546	return err;
	547	}
	548
	549	/* create dir/files for all valid threshold banks */
	550	static __cpuinit int threshold_create_device(unsigned int cpu)
	551	{
2903ee85	552	unsigned int bank;
89b831ef JS	553	int err = 0;
89b831ef JS	554
89b831ef JS	555	for (bank = 0; bank < NR_BANKS; ++bank) {
	556	if (!(per_cpu(bank_map, cpu) & 1 << bank))
	557	continue;
	558	err = threshold_create_bank(cpu, bank);
	559	if (err)
	560	goto out;
	561	}
2903ee85	562	out:
89b831ef JS	563	return err;
	564	}
	565
89b831ef JS	566	/*
	567	* let's be hotplug friendly.
	568	* in case of multiple core processors, the first core always takes ownership
	569	* of shared sysfs dir/files, and rest of the cores will be symlinked to it.
	570	*/
	571
be6b5a35	572	static void deallocate_threshold_block(unsigned int cpu,
95268664 JS	573	unsigned int bank)
	574	{
	575	struct threshold_block *pos = NULL;
	576	struct threshold_block *tmp = NULL;
	577	struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
	578
	579	if (!head)
	580	return;
	581
	582	list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
	583	kobject_unregister(&pos->kobj);
	584	list_del(&pos->miscj);
	585	kfree(pos);
	586	}
	587
	588	kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
	589	per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
	590	}
	591
be6b5a35	592	static void threshold_remove_bank(unsigned int cpu, int bank)
89b831ef	593	{
95268664	594	int i = 0;
89b831ef	595	struct threshold_bank *b;
95268664	596	char name[32];
89b831ef JS	597
89b831ef JS	598	b = per_cpu(threshold_banks, cpu)[bank];
95268664	599
89b831ef JS	600	if (!b)
89b831ef JS	601	return;
95268664 JS	602
	603	if (!b->blocks)
	604	goto free_out;
	605
	606	sprintf(name, "threshold_bank%i", bank);
	607
02316067	608	#ifdef CONFIG_SMP
95268664 JS	609	/* sibling symlink */
95268664 JS	610	if (shared_bank[bank] && b->blocks->cpu != cpu) {
fff2e89f	611	sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
0d2caebd	612	per_cpu(threshold_banks, cpu)[bank] = NULL;
95268664	613	return;
89b831ef	614	}
02316067	615	#endif
95268664 JS	616
	617	/* remove all sibling symlinks before unregistering */
	618	for_each_cpu_mask(i, b->cpus) {
	619	if (i == cpu)
	620	continue;
	621
	622	sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
	623	per_cpu(threshold_banks, i)[bank] = NULL;
	624	}
	625
	626	deallocate_threshold_block(cpu, bank);
	627
	628	free_out:
	629	kobject_unregister(&b->kobj);
	630	kfree(b);
	631	per_cpu(threshold_banks, cpu)[bank] = NULL;
89b831ef JS	632	}
89b831ef JS	633
be6b5a35	634	static void threshold_remove_device(unsigned int cpu)
89b831ef	635	{
2903ee85	636	unsigned int bank;
89b831ef JS	637
	638	for (bank = 0; bank < NR_BANKS; ++bank) {
	639	if (!(per_cpu(bank_map, cpu) & 1 << bank))
	640	continue;
	641	threshold_remove_bank(cpu, bank);
	642	}
89b831ef JS	643	}
89b831ef JS	644
89b831ef	645	/* get notified when a cpu comes on/off */
be6b5a35	646	static int threshold_cpu_callback(struct notifier_block *nfb,
89b831ef JS	647	unsigned long action, void *hcpu)
	648	{
	649	/* cpu was unsigned int to begin with */
	650	unsigned int cpu = (unsigned long)hcpu;
	651
	652	if (cpu >= NR_CPUS)
	653	goto out;
	654
	655	switch (action) {
	656	case CPU_ONLINE:
	657	threshold_create_device(cpu);
89b831ef JS	658	break;
	659	case CPU_DEAD:
	660	threshold_remove_device(cpu);
	661	break;
	662	default:
	663	break;
	664	}
	665	out:
	666	return NOTIFY_OK;
	667	}
	668
be6b5a35	669	static struct notifier_block threshold_cpu_notifier = {
89b831ef JS	670	.notifier_call = threshold_cpu_callback,
	671	};
	672
	673	static __init int threshold_init_device(void)
	674	{
2903ee85	675	unsigned lcpu = 0;
89b831ef	676
89b831ef JS	677	/* to hit CPUs online before the notifier is up */
89b831ef JS	678	for_each_online_cpu(lcpu) {
fff2e89f	679	int err = threshold_create_device(lcpu);
89b831ef	680	if (err)
fff2e89f	681	return err;
89b831ef	682	}
be6b5a35	683	register_hotcpu_notifier(&threshold_cpu_notifier);
fff2e89f	684	return 0;
89b831ef JS	685	}
	686
	687	device_initcall(threshold_init_device);