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[PATCH] Remove obsolete CVS $Id$ from assembler files in arch/x86_64/kernel/*
[deliverable/linux.git] / arch / x86_64 / kernel / setup.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
1da177e4
LT		 8 */
9
10/*
11 * This file handles the architecture-dependent parts of initialization
12 */
13
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/stddef.h>
19#include <linux/unistd.h>
20#include <linux/ptrace.h>
21#include <linux/slab.h>
22#include <linux/user.h>
23#include <linux/a.out.h>
894673ee 24#include <linux/screen_info.h>
1da177e4
LT		 25#include <linux/ioport.h>
26#include <linux/delay.h>
1da177e4
LT		 27#include <linux/init.h>
28#include <linux/initrd.h>
29#include <linux/highmem.h>
30#include <linux/bootmem.h>
31#include <linux/module.h>
32#include <asm/processor.h>
33#include <linux/console.h>
34#include <linux/seq_file.h>
aac04b32 35#include <linux/crash_dump.h>
1da177e4
LT		 36#include <linux/root_dev.h>
37#include <linux/pci.h>
38#include <linux/acpi.h>
39#include <linux/kallsyms.h>
40#include <linux/edd.h>
bbfceef4 41#include <linux/mmzone.h>
5f5609df 42#include <linux/kexec.h>
95235ca2 43#include <linux/cpufreq.h>
e9928674 44#include <linux/dmi.h>
17a941d8 45#include <linux/dma-mapping.h>
681558fd 46#include <linux/ctype.h>
bbfceef4 47
1da177e4
LT		 48#include <asm/mtrr.h>
49#include <asm/uaccess.h>
50#include <asm/system.h>
51#include <asm/io.h>
52#include <asm/smp.h>
53#include <asm/msr.h>
54#include <asm/desc.h>
55#include <video/edid.h>
56#include <asm/e820.h>
57#include <asm/dma.h>
58#include <asm/mpspec.h>
59#include <asm/mmu_context.h>
60#include <asm/bootsetup.h>
61#include <asm/proto.h>
62#include <asm/setup.h>
63#include <asm/mach_apic.h>
64#include <asm/numa.h>
2bc0414e 65#include <asm/sections.h>
f2d3efed 66#include <asm/dmi.h>
1da177e4
LT		 67
68/*
69 * Machine setup..
70 */
71
6c231b7b 72struct cpuinfo_x86 boot_cpu_data __read_mostly;
2ee60e17 73EXPORT_SYMBOL(boot_cpu_data);
1da177e4
LT		 74
75unsigned long mmu_cr4_features;
76
77int acpi_disabled;
78EXPORT_SYMBOL(acpi_disabled);
888ba6c6 79#ifdef CONFIG_ACPI
1da177e4
LT		 80extern int __initdata acpi_ht;
81extern acpi_interrupt_flags acpi_sci_flags;
82int __initdata acpi_force = 0;
83#endif
84
85int acpi_numa __initdata;
86
1da177e4
LT		 87/* Boot loader ID as an integer, for the benefit of proc_dointvec */
88int bootloader_type;
89
90unsigned long saved_video_mode;
91
f2d3efed
AK		 92/*
93 * Early DMI memory
94 */
95int dmi_alloc_index;
96char dmi_alloc_data[DMI_MAX_DATA];
97
1da177e4
LT		 98/*
99 * Setup options
100 */
1da177e4 101struct screen_info screen_info;
2ee60e17 102EXPORT_SYMBOL(screen_info);
1da177e4
LT		 103struct sys_desc_table_struct {
104 unsigned short length;
105 unsigned char table[0];
106};
107
108struct edid_info edid_info;
ba70710e 109EXPORT_SYMBOL_GPL(edid_info);
1da177e4
LT		 110struct e820map e820;
111
112extern int root_mountflags;
1da177e4
LT		 113
114char command_line[COMMAND_LINE_SIZE];
115
116struct resource standard_io_resources[] = {
117 { .name = "dma1", .start = 0x00, .end = 0x1f,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "pic1", .start = 0x20, .end = 0x21,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "timer0", .start = 0x40, .end = 0x43,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "timer1", .start = 0x50, .end = 0x53,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "keyboard", .start = 0x60, .end = 0x6f,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "pic2", .start = 0xa0, .end = 0xa1,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "dma2", .start = 0xc0, .end = 0xdf,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 { .name = "fpu", .start = 0xf0, .end = 0xff,
134 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
135};
136
137#define STANDARD_IO_RESOURCES \
138 (sizeof standard_io_resources / sizeof standard_io_resources[0])
139
140#define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
141
142struct resource data_resource = {
143 .name = "Kernel data",
144 .start = 0,
145 .end = 0,
146 .flags = IORESOURCE_RAM,
147};
148struct resource code_resource = {
149 .name = "Kernel code",
150 .start = 0,
151 .end = 0,
152 .flags = IORESOURCE_RAM,
153};
154
155#define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
156
157static struct resource system_rom_resource = {
158 .name = "System ROM",
159 .start = 0xf0000,
160 .end = 0xfffff,
161 .flags = IORESOURCE_ROM,
162};
163
164static struct resource extension_rom_resource = {
165 .name = "Extension ROM",
166 .start = 0xe0000,
167 .end = 0xeffff,
168 .flags = IORESOURCE_ROM,
169};
170
171static struct resource adapter_rom_resources[] = {
172 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM },
178 { .name = "Adapter ROM", .start = 0, .end = 0,
179 .flags = IORESOURCE_ROM },
180 { .name = "Adapter ROM", .start = 0, .end = 0,
181 .flags = IORESOURCE_ROM },
182 { .name = "Adapter ROM", .start = 0, .end = 0,
183 .flags = IORESOURCE_ROM }
184};
185
186#define ADAPTER_ROM_RESOURCES \
187 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
188
189static struct resource video_rom_resource = {
190 .name = "Video ROM",
191 .start = 0xc0000,
192 .end = 0xc7fff,
193 .flags = IORESOURCE_ROM,
194};
195
196static struct resource video_ram_resource = {
197 .name = "Video RAM area",
198 .start = 0xa0000,
199 .end = 0xbffff,
200 .flags = IORESOURCE_RAM,
201};
202
203#define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
204
205static int __init romchecksum(unsigned char *rom, unsigned long length)
206{
207 unsigned char *p, sum = 0;
208
209 for (p = rom; p < rom + length; p++)
210 sum += *p;
211 return sum == 0;
212}
213
214static void __init probe_roms(void)
215{
216 unsigned long start, length, upper;
217 unsigned char *rom;
218 int i;
219
220 /* video rom */
221 upper = adapter_rom_resources[0].start;
222 for (start = video_rom_resource.start; start < upper; start += 2048) {
223 rom = isa_bus_to_virt(start);
224 if (!romsignature(rom))
225 continue;
226
227 video_rom_resource.start = start;
228
229 /* 0 < length <= 0x7f * 512, historically */
230 length = rom[2] * 512;
231
232 /* if checksum okay, trust length byte */
233 if (length && romchecksum(rom, length))
234 video_rom_resource.end = start + length - 1;
235
236 request_resource(&iomem_resource, &video_rom_resource);
237 break;
238 }
239
240 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
241 if (start < upper)
242 start = upper;
243
244 /* system rom */
245 request_resource(&iomem_resource, &system_rom_resource);
246 upper = system_rom_resource.start;
247
248 /* check for extension rom (ignore length byte!) */
249 rom = isa_bus_to_virt(extension_rom_resource.start);
250 if (romsignature(rom)) {
251 length = extension_rom_resource.end - extension_rom_resource.start + 1;
252 if (romchecksum(rom, length)) {
253 request_resource(&iomem_resource, &extension_rom_resource);
254 upper = extension_rom_resource.start;
255 }
256 }
257
258 /* check for adapter roms on 2k boundaries */
259 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
260 rom = isa_bus_to_virt(start);
261 if (!romsignature(rom))
262 continue;
263
264 /* 0 < length <= 0x7f * 512, historically */
265 length = rom[2] * 512;
266
267 /* but accept any length that fits if checksum okay */
268 if (!length || start + length > upper || !romchecksum(rom, length))
269 continue;
270
271 adapter_rom_resources[i].start = start;
272 adapter_rom_resources[i].end = start + length - 1;
273 request_resource(&iomem_resource, &adapter_rom_resources[i]);
274
275 start = adapter_rom_resources[i++].end & ~2047UL;
276 }
277}
278
681558fd
AK		 279/* Check for full argument with no trailing characters */
280static int fullarg(char *p, char *arg)
281{
282 int l = strlen(arg);
283 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
284}
285
1da177e4
LT		 286static __init void parse_cmdline_early (char ** cmdline_p)
287{
288 char c = ' ', *to = command_line, *from = COMMAND_LINE;
289 int len = 0;
69cda7b1 290 int userdef = 0;
1da177e4 291
1da177e4
LT		 292 for (;;) {
293 if (c != ' ')
294 goto next_char;
295
296#ifdef CONFIG_SMP
297 /*
298 * If the BIOS enumerates physical processors before logical,
299 * maxcpus=N at enumeration-time can be used to disable HT.
300 */
301 else if (!memcmp(from, "maxcpus=", 8)) {
302 extern unsigned int maxcpus;
303
304 maxcpus = simple_strtoul(from + 8, NULL, 0);
305 }
306#endif
888ba6c6 307#ifdef CONFIG_ACPI
1da177e4 308 /* "acpi=off" disables both ACPI table parsing and interpreter init */
681558fd 309 if (fullarg(from,"acpi=off"))
1da177e4
LT		 310 disable_acpi();
311
681558fd 312 if (fullarg(from, "acpi=force")) {
1da177e4
LT		 313 /* add later when we do DMI horrors: */
314 acpi_force = 1;
315 acpi_disabled = 0;
316 }
317
318 /* acpi=ht just means: do ACPI MADT parsing
319 at bootup, but don't enable the full ACPI interpreter */
681558fd 320 if (fullarg(from, "acpi=ht")) {
1da177e4
LT		 321 if (!acpi_force)
322 disable_acpi();
323 acpi_ht = 1;
324 }
681558fd 325 else if (fullarg(from, "pci=noacpi"))
1da177e4 326 acpi_disable_pci();
681558fd 327 else if (fullarg(from, "acpi=noirq"))
1da177e4
LT		 328 acpi_noirq_set();
329
681558fd 330 else if (fullarg(from, "acpi_sci=edge"))
1da177e4 331 acpi_sci_flags.trigger = 1;
681558fd 332 else if (fullarg(from, "acpi_sci=level"))
1da177e4 333 acpi_sci_flags.trigger = 3;
681558fd 334 else if (fullarg(from, "acpi_sci=high"))
1da177e4 335 acpi_sci_flags.polarity = 1;
681558fd 336 else if (fullarg(from, "acpi_sci=low"))
1da177e4
LT		 337 acpi_sci_flags.polarity = 3;
338
339 /* acpi=strict disables out-of-spec workarounds */
681558fd 340 else if (fullarg(from, "acpi=strict")) {
1da177e4
LT		 341 acpi_strict = 1;
342 }
681558fd 343 else if (fullarg(from, "acpi_skip_timer_override"))
22999244 344 acpi_skip_timer_override = 1;
1da177e4
LT		 345#endif
346
681558fd 347 if (fullarg(from, "disable_timer_pin_1"))
66759a01 348 disable_timer_pin_1 = 1;
681558fd 349 if (fullarg(from, "enable_timer_pin_1"))
66759a01
CE		 350 disable_timer_pin_1 = -1;
351
d1530d82
AK		 352 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
353 clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
1da177e4 354 disable_apic = 1;
d1530d82 355 }
1da177e4 356
681558fd 357 if (fullarg(from, "noapic"))
1da177e4
LT		 358 skip_ioapic_setup = 1;
359
681558fd 360 if (fullarg(from,"apic")) {
1da177e4
LT		 361 skip_ioapic_setup = 0;
362 ioapic_force = 1;
363 }
364
365 if (!memcmp(from, "mem=", 4))
366 parse_memopt(from+4, &from);
367
69cda7b1 368 if (!memcmp(from, "memmap=", 7)) {
369 /* exactmap option is for used defined memory */
370 if (!memcmp(from+7, "exactmap", 8)) {
371#ifdef CONFIG_CRASH_DUMP
372 /* If we are doing a crash dump, we
373 * still need to know the real mem
374 * size before original memory map is
375 * reset.
376 */
377 saved_max_pfn = e820_end_of_ram();
378#endif
379 from += 8+7;
380 end_pfn_map = 0;
381 e820.nr_map = 0;
382 userdef = 1;
383 }
384 else {
385 parse_memmapopt(from+7, &from);
386 userdef = 1;
387 }
388 }
389
2b97690f 390#ifdef CONFIG_NUMA
1da177e4
LT		 391 if (!memcmp(from, "numa=", 5))
392 numa_setup(from+5);
393#endif
394
1da177e4
LT		 395 if (!memcmp(from,"iommu=",6)) {
396 iommu_setup(from+6);
397 }
1da177e4 398
681558fd 399 if (fullarg(from,"oops=panic"))
1da177e4
LT		 400 panic_on_oops = 1;
401
402 if (!memcmp(from, "noexec=", 7))
403 nonx_setup(from + 7);
404
5f5609df
EB		 405#ifdef CONFIG_KEXEC
406 /* crashkernel=size@addr specifies the location to reserve for
407 * a crash kernel. By reserving this memory we guarantee
408 * that linux never set's it up as a DMA target.
409 * Useful for holding code to do something appropriate
410 * after a kernel panic.
411 */
412 else if (!memcmp(from, "crashkernel=", 12)) {
413 unsigned long size, base;
414 size = memparse(from+12, &from);
415 if (*from == '@') {
416 base = memparse(from+1, &from);
417 /* FIXME: Do I want a sanity check
418 * to validate the memory range?
419 */
420 crashk_res.start = base;
421 crashk_res.end = base + size - 1;
422 }
423 }
424#endif
425
aac04b32
VG		 426#ifdef CONFIG_PROC_VMCORE
427 /* elfcorehdr= specifies the location of elf core header
428 * stored by the crashed kernel. This option will be passed
429 * by kexec loader to the capture kernel.
430 */
431 else if(!memcmp(from, "elfcorehdr=", 11))
432 elfcorehdr_addr = memparse(from+11, &from);
433#endif
e2c03888 434
d5176123 435#ifdef CONFIG_HOTPLUG_CPU
e2c03888
AK		 436 else if (!memcmp(from, "additional_cpus=", 16))
437 setup_additional_cpus(from+16);
438#endif
439
1da177e4
LT		 440 next_char:
441 c = *(from++);
442 if (!c)
443 break;
444 if (COMMAND_LINE_SIZE <= ++len)
445 break;
446 *(to++) = c;
447 }
69cda7b1 448 if (userdef) {
449 printk(KERN_INFO "user-defined physical RAM map:\n");
450 e820_print_map("user");
451 }
1da177e4
LT		 452 *to = '\0';
453 *cmdline_p = command_line;
454}
455
2b97690f 456#ifndef CONFIG_NUMA
bbfceef4
MT		 457static void __init
458contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
1da177e4 459{
bbfceef4
MT		 460 unsigned long bootmap_size, bootmap;
461
bbfceef4
MT		 462 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
463 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
464 if (bootmap == -1L)
465 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
466 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
467 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
468 reserve_bootmem(bootmap, bootmap_size);
1da177e4
LT		 469}
470#endif
471
1da177e4
LT		 472#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
473struct edd edd;
474#ifdef CONFIG_EDD_MODULE
475EXPORT_SYMBOL(edd);
476#endif
477/**
478 * copy_edd() - Copy the BIOS EDD information
479 * from boot_params into a safe place.
480 *
481 */
482static inline void copy_edd(void)
483{
484 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
485 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
486 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
487 edd.edd_info_nr = EDD_NR;
488}
489#else
490static inline void copy_edd(void)
491{
492}
493#endif
494
495#define EBDA_ADDR_POINTER 0x40E
ac71d12c
AK		 496
497unsigned __initdata ebda_addr;
498unsigned __initdata ebda_size;
499
500static void discover_ebda(void)
1da177e4 501{
ac71d12c 502 /*
1da177e4
LT		 503 * there is a real-mode segmented pointer pointing to the
504 * 4K EBDA area at 0x40E
505 */
ac71d12c
AK		 506 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
507 ebda_addr <<= 4;
508
509 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
510
511 /* Round EBDA up to pages */
512 if (ebda_size == 0)
513 ebda_size = 1;
514 ebda_size <<= 10;
515 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
516 if (ebda_size > 64*1024)
517 ebda_size = 64*1024;
1da177e4
LT		 518}
519
520void __init setup_arch(char **cmdline_p)
521{
1da177e4 522 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
1da177e4
LT		 523 screen_info = SCREEN_INFO;
524 edid_info = EDID_INFO;
525 saved_video_mode = SAVED_VIDEO_MODE;
526 bootloader_type = LOADER_TYPE;
527
528#ifdef CONFIG_BLK_DEV_RAM
529 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
530 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
531 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
532#endif
533 setup_memory_region();
534 copy_edd();
535
536 if (!MOUNT_ROOT_RDONLY)
537 root_mountflags &= ~MS_RDONLY;
538 init_mm.start_code = (unsigned long) &_text;
539 init_mm.end_code = (unsigned long) &_etext;
540 init_mm.end_data = (unsigned long) &_edata;
541 init_mm.brk = (unsigned long) &_end;
542
543 code_resource.start = virt_to_phys(&_text);
544 code_resource.end = virt_to_phys(&_etext)-1;
545 data_resource.start = virt_to_phys(&_etext);
546 data_resource.end = virt_to_phys(&_edata)-1;
547
548 parse_cmdline_early(cmdline_p);
549
550 early_identify_cpu(&boot_cpu_data);
551
552 /*
553 * partially used pages are not usable - thus
554 * we are rounding upwards:
555 */
556 end_pfn = e820_end_of_ram();
1f50249e 557 num_physpages = end_pfn; /* for pfn_valid */
1da177e4
LT		 558
559 check_efer();
560
ac71d12c
AK		 561 discover_ebda();
562
1da177e4
LT		 563 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
564
f2d3efed
AK		 565 dmi_scan_machine();
566
f6c2e333
SS		 567 zap_low_mappings(0);
568
888ba6c6 569#ifdef CONFIG_ACPI
1da177e4
LT		 570 /*
571 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
572 * Call this early for SRAT node setup.
573 */
574 acpi_boot_table_init();
575#endif
576
577#ifdef CONFIG_ACPI_NUMA
578 /*
579 * Parse SRAT to discover nodes.
580 */
581 acpi_numa_init();
582#endif
583
2b97690f 584#ifdef CONFIG_NUMA
1da177e4
LT		 585 numa_initmem_init(0, end_pfn);
586#else
bbfceef4 587 contig_initmem_init(0, end_pfn);
1da177e4
LT		 588#endif
589
590 /* Reserve direct mapping */
591 reserve_bootmem_generic(table_start << PAGE_SHIFT,
592 (table_end - table_start) << PAGE_SHIFT);
593
594 /* reserve kernel */
ceee8822
AK		 595 reserve_bootmem_generic(__pa_symbol(&_text),
596 __pa_symbol(&_end) - __pa_symbol(&_text));
1da177e4
LT		 597
598 /*
599 * reserve physical page 0 - it's a special BIOS page on many boxes,
600 * enabling clean reboots, SMP operation, laptop functions.
601 */
602 reserve_bootmem_generic(0, PAGE_SIZE);
603
604 /* reserve ebda region */
ac71d12c
AK		 605 if (ebda_addr)
606 reserve_bootmem_generic(ebda_addr, ebda_size);
1da177e4
LT		 607
608#ifdef CONFIG_SMP
609 /*
610 * But first pinch a few for the stack/trampoline stuff
611 * FIXME: Don't need the extra page at 4K, but need to fix
612 * trampoline before removing it. (see the GDT stuff)
613 */
614 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
615
616 /* Reserve SMP trampoline */
617 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
618#endif
619
620#ifdef CONFIG_ACPI_SLEEP
621 /*
622 * Reserve low memory region for sleep support.
623 */
624 acpi_reserve_bootmem();
625#endif
1da177e4
LT		 626 /*
627 * Find and reserve possible boot-time SMP configuration:
628 */
629 find_smp_config();
1da177e4
LT		 630#ifdef CONFIG_BLK_DEV_INITRD
631 if (LOADER_TYPE && INITRD_START) {
632 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
633 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
634 initrd_start =
635 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
636 initrd_end = initrd_start+INITRD_SIZE;
637 }
638 else {
639 printk(KERN_ERR "initrd extends beyond end of memory "
640 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
641 (unsigned long)(INITRD_START + INITRD_SIZE),
642 (unsigned long)(end_pfn << PAGE_SHIFT));
643 initrd_start = 0;
644 }
645 }
646#endif
5f5609df
EB		 647#ifdef CONFIG_KEXEC
648 if (crashk_res.start != crashk_res.end) {
00212fef 649 reserve_bootmem_generic(crashk_res.start,
5f5609df
EB		 650 crashk_res.end - crashk_res.start + 1);
651 }
652#endif
0d317fb7 653
1da177e4
LT		 654 paging_init();
655
dfa4698c 656 early_quirks();
1da177e4 657
51f62e18
AR		 658 /*
659 * set this early, so we dont allocate cpu0
660 * if MADT list doesnt list BSP first
661 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
662 */
663 cpu_set(0, cpu_present_map);
888ba6c6 664#ifdef CONFIG_ACPI
1da177e4
LT		 665 /*
666 * Read APIC and some other early information from ACPI tables.
667 */
668 acpi_boot_init();
669#endif
670
05b3cbd8
RT		 671 init_cpu_to_node();
672
1da177e4
LT		 673 /*
674 * get boot-time SMP configuration:
675 */
676 if (smp_found_config)
677 get_smp_config();
678 init_apic_mappings();
1da177e4
LT		 679
680 /*
681 * Request address space for all standard RAM and ROM resources
682 * and also for regions reported as reserved by the e820.
683 */
684 probe_roms();
685 e820_reserve_resources();
686
687 request_resource(&iomem_resource, &video_ram_resource);
688
689 {
690 unsigned i;
691 /* request I/O space for devices used on all i[345]86 PCs */
692 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
693 request_resource(&ioport_resource, &standard_io_resources[i]);
694 }
695
a1e97782 696 e820_setup_gap();
1da177e4 697
1da177e4
LT		 698#ifdef CONFIG_VT
699#if defined(CONFIG_VGA_CONSOLE)
700 conswitchp = &vga_con;
701#elif defined(CONFIG_DUMMY_CONSOLE)
702 conswitchp = &dummy_con;
703#endif
704#endif
705}
706
e6982c67 707static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
1da177e4
LT		 708{
709 unsigned int *v;
710
ebfcaa96 711 if (c->extended_cpuid_level < 0x80000004)
1da177e4
LT		 712 return 0;
713
714 v = (unsigned int *) c->x86_model_id;
715 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
716 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
717 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
718 c->x86_model_id[48] = 0;
719 return 1;
720}
721
722
e6982c67 723static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
1da177e4
LT		 724{
725 unsigned int n, dummy, eax, ebx, ecx, edx;
726
ebfcaa96 727 n = c->extended_cpuid_level;
1da177e4
LT		 728
729 if (n >= 0x80000005) {
730 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
731 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
732 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
733 c->x86_cache_size=(ecx>>24)+(edx>>24);
734 /* On K8 L1 TLB is inclusive, so don't count it */
735 c->x86_tlbsize = 0;
736 }
737
738 if (n >= 0x80000006) {
739 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
740 ecx = cpuid_ecx(0x80000006);
741 c->x86_cache_size = ecx >> 16;
742 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
743
744 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
745 c->x86_cache_size, ecx & 0xFF);
746 }
747
748 if (n >= 0x80000007)
749 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
750 if (n >= 0x80000008) {
751 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
752 c->x86_virt_bits = (eax >> 8) & 0xff;
753 c->x86_phys_bits = eax & 0xff;
754 }
755}
756
3f098c26
AK		 757#ifdef CONFIG_NUMA
758static int nearby_node(int apicid)
759{
760 int i;
761 for (i = apicid - 1; i >= 0; i--) {
762 int node = apicid_to_node[i];
763 if (node != NUMA_NO_NODE && node_online(node))
764 return node;
765 }
766 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
767 int node = apicid_to_node[i];
768 if (node != NUMA_NO_NODE && node_online(node))
769 return node;
770 }
771 return first_node(node_online_map); /* Shouldn't happen */
772}
773#endif
774
63518644
AK		 775/*
776 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
777 * Assumes number of cores is a power of two.
778 */
779static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
780{
781#ifdef CONFIG_SMP
b41e2939 782 unsigned bits;
3f098c26 783#ifdef CONFIG_NUMA
f3fa8ebc 784 int cpu = smp_processor_id();
3f098c26 785 int node = 0;
60c1bc82 786 unsigned apicid = hard_smp_processor_id();
3f098c26 787#endif
faee9a5d 788 unsigned ecx = cpuid_ecx(0x80000008);
b41e2939 789
faee9a5d 790 c->x86_max_cores = (ecx & 0xff) + 1;
b41e2939 791
faee9a5d
AK		 792 /* CPU telling us the core id bits shift? */
793 bits = (ecx >> 12) & 0xF;
794
795 /* Otherwise recompute */
796 if (bits == 0) {
797 while ((1 << bits) < c->x86_max_cores)
798 bits++;
799 }
b41e2939
AK		 800
801 /* Low order bits define the core id (index of core in socket) */
f3fa8ebc 802 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
b41e2939 803 /* Convert the APIC ID into the socket ID */
f3fa8ebc 804 c->phys_proc_id = phys_pkg_id(bits);
63518644
AK		 805
806#ifdef CONFIG_NUMA
f3fa8ebc 807 node = c->phys_proc_id;
3f098c26
AK		 808 if (apicid_to_node[apicid] != NUMA_NO_NODE)
809 node = apicid_to_node[apicid];
810 if (!node_online(node)) {
811 /* Two possibilities here:
812 - The CPU is missing memory and no node was created.
813 In that case try picking one from a nearby CPU
814 - The APIC IDs differ from the HyperTransport node IDs
815 which the K8 northbridge parsing fills in.
816 Assume they are all increased by a constant offset,
817 but in the same order as the HT nodeids.
818 If that doesn't result in a usable node fall back to the
819 path for the previous case. */
f3fa8ebc 820 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
3f098c26
AK		 821 if (ht_nodeid >= 0 &&
822 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
823 node = apicid_to_node[ht_nodeid];
824 /* Pick a nearby node */
825 if (!node_online(node))
826 node = nearby_node(apicid);
827 }
69d81fcd 828 numa_set_node(cpu, node);
3f098c26 829
e42f9437 830 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
63518644 831#endif
63518644
AK		 832#endif
833}
1da177e4 834
e42f9437 835static void __init init_amd(struct cpuinfo_x86 *c)
1da177e4 836{
7bcd3f34 837 unsigned level;
1da177e4 838
bc5e8fdf
LT		 839#ifdef CONFIG_SMP
840 unsigned long value;
841
7d318d77
AK		 842 /*
843 * Disable TLB flush filter by setting HWCR.FFDIS on K8
844 * bit 6 of msr C001_0015
845 *
846 * Errata 63 for SH-B3 steppings
847 * Errata 122 for all steppings (F+ have it disabled by default)
848 */
849 if (c->x86 == 15) {
850 rdmsrl(MSR_K8_HWCR, value);
851 value |= 1 << 6;
852 wrmsrl(MSR_K8_HWCR, value);
853 }
bc5e8fdf
LT		 854#endif
855
1da177e4
LT		 856 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
857 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
858 clear_bit(0*32+31, &c->x86_capability);
859
7bcd3f34
AK		 860 /* On C+ stepping K8 rep microcode works well for copy/memset */
861 level = cpuid_eax(1);
862 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
863 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
864
18bd057b
AK		 865 /* Enable workaround for FXSAVE leak */
866 if (c->x86 >= 6)
867 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
868
e42f9437
RS		 869 level = get_model_name(c);
870 if (!level) {
1da177e4
LT		 871 switch (c->x86) {
872 case 15:
873 /* Should distinguish Models here, but this is only
874 a fallback anyways. */
875 strcpy(c->x86_model_id, "Hammer");
876 break;
877 }
878 }
879 display_cacheinfo(c);
880
130951cc
AK		 881 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
882 if (c->x86_power & (1<<8))
883 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
884
faee9a5d
AK		 885 /* Multi core CPU? */
886 if (c->extended_cpuid_level >= 0x80000008)
63518644 887 amd_detect_cmp(c);
1da177e4 888
240cd6a8
AK		 889 /* Fix cpuid4 emulation for more */
890 num_cache_leaves = 3;
1da177e4
LT		 891}
892
e6982c67 893static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
1da177e4
LT		 894{
895#ifdef CONFIG_SMP
896 u32 eax, ebx, ecx, edx;
94605eff 897 int index_msb, core_bits;
94605eff
SS		 898
899 cpuid(1, &eax, &ebx, &ecx, &edx);
900
94605eff 901
e42f9437 902 if (!cpu_has(c, X86_FEATURE_HT))
1da177e4 903 return;
e42f9437
RS		 904 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
905 goto out;
1da177e4 906
1da177e4 907 smp_num_siblings = (ebx & 0xff0000) >> 16;
94605eff 908
1da177e4
LT		 909 if (smp_num_siblings == 1) {
910 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
94605eff
SS		 911 } else if (smp_num_siblings > 1 ) {
912
1da177e4
LT		 913 if (smp_num_siblings > NR_CPUS) {
914 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
915 smp_num_siblings = 1;
916 return;
917 }
94605eff
SS		 918
919 index_msb = get_count_order(smp_num_siblings);
f3fa8ebc 920 c->phys_proc_id = phys_pkg_id(index_msb);
3dd9d514 921
94605eff 922 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
3dd9d514 923
94605eff
SS		 924 index_msb = get_count_order(smp_num_siblings) ;
925
926 core_bits = get_count_order(c->x86_max_cores);
3dd9d514 927
f3fa8ebc 928 c->cpu_core_id = phys_pkg_id(index_msb) &
94605eff 929 ((1 << core_bits) - 1);
1da177e4 930 }
e42f9437
RS		 931out:
932 if ((c->x86_max_cores * smp_num_siblings) > 1) {
933 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
934 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
935 }
936
1da177e4
LT		 937#endif
938}
939
3dd9d514
AK		 940/*
941 * find out the number of processor cores on the die
942 */
e6982c67 943static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
3dd9d514 944{
2bbc419f 945 unsigned int eax, t;
3dd9d514
AK		 946
947 if (c->cpuid_level < 4)
948 return 1;
949
2bbc419f 950 cpuid_count(4, 0, &eax, &t, &t, &t);
3dd9d514
AK		 951
952 if (eax & 0x1f)
953 return ((eax >> 26) + 1);
954 else
955 return 1;
956}
957
df0cc26b
AK		 958static void srat_detect_node(void)
959{
960#ifdef CONFIG_NUMA
ddea7be0 961 unsigned node;
df0cc26b 962 int cpu = smp_processor_id();
e42f9437 963 int apicid = hard_smp_processor_id();
df0cc26b
AK		 964
965 /* Don't do the funky fallback heuristics the AMD version employs
966 for now. */
e42f9437 967 node = apicid_to_node[apicid];
df0cc26b 968 if (node == NUMA_NO_NODE)
0d015324 969 node = first_node(node_online_map);
69d81fcd 970 numa_set_node(cpu, node);
df0cc26b
AK		 971
972 if (acpi_numa > 0)
e42f9437 973 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
df0cc26b
AK		 974#endif
975}
976
e6982c67 977static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1da177e4
LT		 978{
979 /* Cache sizes */
980 unsigned n;
981
982 init_intel_cacheinfo(c);
0080e667
VP		 983 if (c->cpuid_level > 9 ) {
984 unsigned eax = cpuid_eax(10);
985 /* Check for version and the number of counters */
986 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
987 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
988 }
989
ebfcaa96 990 n = c->extended_cpuid_level;
1da177e4
LT		 991 if (n >= 0x80000008) {
992 unsigned eax = cpuid_eax(0x80000008);
993 c->x86_virt_bits = (eax >> 8) & 0xff;
994 c->x86_phys_bits = eax & 0xff;
af9c142d
SL		 995 /* CPUID workaround for Intel 0F34 CPU */
996 if (c->x86_vendor == X86_VENDOR_INTEL &&
997 c->x86 == 0xF && c->x86_model == 0x3 &&
998 c->x86_mask == 0x4)
999 c->x86_phys_bits = 36;
1da177e4
LT		 1000 }
1001
1002 if (c->x86 == 15)
1003 c->x86_cache_alignment = c->x86_clflush_size * 2;
39b3a791
AK		 1004 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1005 (c->x86 == 0x6 && c->x86_model >= 0x0e))
c29601e9 1006 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
c818a181 1007 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
94605eff 1008 c->x86_max_cores = intel_num_cpu_cores(c);
df0cc26b
AK		 1009
1010 srat_detect_node();
1da177e4
LT		 1011}
1012
672289e9 1013static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1da177e4
LT		 1014{
1015 char *v = c->x86_vendor_id;
1016
1017 if (!strcmp(v, "AuthenticAMD"))
1018 c->x86_vendor = X86_VENDOR_AMD;
1019 else if (!strcmp(v, "GenuineIntel"))
1020 c->x86_vendor = X86_VENDOR_INTEL;
1021 else
1022 c->x86_vendor = X86_VENDOR_UNKNOWN;
1023}
1024
1025struct cpu_model_info {
1026 int vendor;
1027 int family;
1028 char *model_names[16];
1029};
1030
1031/* Do some early cpuid on the boot CPU to get some parameter that are
1032 needed before check_bugs. Everything advanced is in identify_cpu
1033 below. */
e6982c67 1034void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1035{
1036 u32 tfms;
1037
1038 c->loops_per_jiffy = loops_per_jiffy;
1039 c->x86_cache_size = -1;
1040 c->x86_vendor = X86_VENDOR_UNKNOWN;
1041 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1042 c->x86_vendor_id[0] = '\0'; /* Unset */
1043 c->x86_model_id[0] = '\0'; /* Unset */
1044 c->x86_clflush_size = 64;
1045 c->x86_cache_alignment = c->x86_clflush_size;
94605eff 1046 c->x86_max_cores = 1;
ebfcaa96 1047 c->extended_cpuid_level = 0;
1da177e4
LT		 1048 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1049
1050 /* Get vendor name */
1051 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1052 (unsigned int *)&c->x86_vendor_id[0],
1053 (unsigned int *)&c->x86_vendor_id[8],
1054 (unsigned int *)&c->x86_vendor_id[4]);
1055
1056 get_cpu_vendor(c);
1057
1058 /* Initialize the standard set of capabilities */
1059 /* Note that the vendor-specific code below might override */
1060
1061 /* Intel-defined flags: level 0x00000001 */
1062 if (c->cpuid_level >= 0x00000001) {
1063 __u32 misc;
1064 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1065 &c->x86_capability[0]);
1066 c->x86 = (tfms >> 8) & 0xf;
1067 c->x86_model = (tfms >> 4) & 0xf;
1068 c->x86_mask = tfms & 0xf;
f5f786d0 1069 if (c->x86 == 0xf)
1da177e4 1070 c->x86 += (tfms >> 20) & 0xff;
f5f786d0 1071 if (c->x86 >= 0x6)
1da177e4 1072 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1da177e4
LT		 1073 if (c->x86_capability[0] & (1<<19))
1074 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1da177e4
LT		 1075 } else {
1076 /* Have CPUID level 0 only - unheard of */
1077 c->x86 = 4;
1078 }
a158608b
AK		 1079
1080#ifdef CONFIG_SMP
f3fa8ebc 1081 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
a158608b 1082#endif
1da177e4
LT		 1083}
1084
1085/*
1086 * This does the hard work of actually picking apart the CPU stuff...
1087 */
e6982c67 1088void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1089{
1090 int i;
1091 u32 xlvl;
1092
1093 early_identify_cpu(c);
1094
1095 /* AMD-defined flags: level 0x80000001 */
1096 xlvl = cpuid_eax(0x80000000);
ebfcaa96 1097 c->extended_cpuid_level = xlvl;
1da177e4
LT		 1098 if ((xlvl & 0xffff0000) == 0x80000000) {
1099 if (xlvl >= 0x80000001) {
1100 c->x86_capability[1] = cpuid_edx(0x80000001);
5b7abc6f 1101 c->x86_capability[6] = cpuid_ecx(0x80000001);
1da177e4
LT		 1102 }
1103 if (xlvl >= 0x80000004)
1104 get_model_name(c); /* Default name */
1105 }
1106
1107 /* Transmeta-defined flags: level 0x80860001 */
1108 xlvl = cpuid_eax(0x80860000);
1109 if ((xlvl & 0xffff0000) == 0x80860000) {
1110 /* Don't set x86_cpuid_level here for now to not confuse. */
1111 if (xlvl >= 0x80860001)
1112 c->x86_capability[2] = cpuid_edx(0x80860001);
1113 }
1114
1e9f28fa
SS		 1115 c->apicid = phys_pkg_id(0);
1116
1da177e4
LT		 1117 /*
1118 * Vendor-specific initialization. In this section we
1119 * canonicalize the feature flags, meaning if there are
1120 * features a certain CPU supports which CPUID doesn't
1121 * tell us, CPUID claiming incorrect flags, or other bugs,
1122 * we handle them here.
1123 *
1124 * At the end of this section, c->x86_capability better
1125 * indicate the features this CPU genuinely supports!
1126 */
1127 switch (c->x86_vendor) {
1128 case X86_VENDOR_AMD:
1129 init_amd(c);
1130 break;
1131
1132 case X86_VENDOR_INTEL:
1133 init_intel(c);
1134 break;
1135
1136 case X86_VENDOR_UNKNOWN:
1137 default:
1138 display_cacheinfo(c);
1139 break;
1140 }
1141
1142 select_idle_routine(c);
1143 detect_ht(c);
1da177e4
LT		 1144
1145 /*
1146 * On SMP, boot_cpu_data holds the common feature set between
1147 * all CPUs; so make sure that we indicate which features are
1148 * common between the CPUs. The first time this routine gets
1149 * executed, c == &boot_cpu_data.
1150 */
1151 if (c != &boot_cpu_data) {
1152 /* AND the already accumulated flags with these */
1153 for (i = 0 ; i < NCAPINTS ; i++)
1154 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1155 }
1156
1157#ifdef CONFIG_X86_MCE
1158 mcheck_init(c);
1159#endif
3b520b23
SL		 1160 if (c == &boot_cpu_data)
1161 mtrr_bp_init();
1162 else
1163 mtrr_ap_init();
1da177e4 1164#ifdef CONFIG_NUMA
3019e8eb 1165 numa_add_cpu(smp_processor_id());
1da177e4
LT		 1166#endif
1167}
1168
1169
e6982c67 1170void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1da177e4
LT		 1171{
1172 if (c->x86_model_id[0])
1173 printk("%s", c->x86_model_id);
1174
1175 if (c->x86_mask || c->cpuid_level >= 0)
1176 printk(" stepping %02x\n", c->x86_mask);
1177 else
1178 printk("\n");
1179}
1180
1181/*
1182 * Get CPU information for use by the procfs.
1183 */
1184
1185static int show_cpuinfo(struct seq_file *m, void *v)
1186{
1187 struct cpuinfo_x86 *c = v;
1188
1189 /*
1190 * These flag bits must match the definitions in <asm/cpufeature.h>.
1191 * NULL means this bit is undefined or reserved; either way it doesn't
1192 * have meaning as far as Linux is concerned. Note that it's important
1193 * to realize there is a difference between this table and CPUID -- if
1194 * applications want to get the raw CPUID data, they should access
1195 * /dev/cpu/<cpu_nr>/cpuid instead.
1196 */
1197 static char *x86_cap_flags[] = {
1198 /* Intel-defined */
1199 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1200 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1201 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1202 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1203
1204 /* AMD-defined */
3c3b73b6 1205 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1206 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1207 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
7b0e8501 1208 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1da177e4
LT		 1209
1210 /* Transmeta-defined */
1211 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1212 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1215
1216 /* Other (Linux-defined) */
622dcaf9 1217 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
c29601e9 1218 "constant_tsc", NULL, NULL,
d167a518 1219 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1220 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1221 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222
1223 /* Intel-defined (#2) */
9d95dd84 1224 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1da177e4
LT		 1225 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1226 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1227 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1228
5b7abc6f
PA		 1229 /* VIA/Cyrix/Centaur-defined */
1230 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1231 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1232 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1233 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1234
1da177e4 1235 /* AMD-defined (#2) */
3f98bc49 1236 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1da177e4
LT		 1237 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1238 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
5b7abc6f 1239 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1240 };
1241 static char *x86_power_flags[] = {
1242 "ts", /* temperature sensor */
1243 "fid", /* frequency id control */
1244 "vid", /* voltage id control */
1245 "ttp", /* thermal trip */
1246 "tm",
3f98bc49
AK		 1247 "stc",
1248 NULL,
39b3a791 1249 /* nothing */ /* constant_tsc - moved to flags */
1da177e4
LT		 1250 };
1251
1252
1253#ifdef CONFIG_SMP
1254 if (!cpu_online(c-cpu_data))
1255 return 0;
1256#endif
1257
1258 seq_printf(m,"processor\t: %u\n"
1259 "vendor_id\t: %s\n"
1260 "cpu family\t: %d\n"
1261 "model\t\t: %d\n"
1262 "model name\t: %s\n",
1263 (unsigned)(c-cpu_data),
1264 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1265 c->x86,
1266 (int)c->x86_model,
1267 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1268
1269 if (c->x86_mask || c->cpuid_level >= 0)
1270 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1271 else
1272 seq_printf(m, "stepping\t: unknown\n");
1273
1274 if (cpu_has(c,X86_FEATURE_TSC)) {
95235ca2
VP		 1275 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1276 if (!freq)
1277 freq = cpu_khz;
1da177e4 1278 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
95235ca2 1279 freq / 1000, (freq % 1000));
1da177e4
LT		 1280 }
1281
1282 /* Cache size */
1283 if (c->x86_cache_size >= 0)
1284 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1285
1286#ifdef CONFIG_SMP
94605eff 1287 if (smp_num_siblings * c->x86_max_cores > 1) {
db468681 1288 int cpu = c - cpu_data;
f3fa8ebc 1289 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
94605eff 1290 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
f3fa8ebc 1291 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
94605eff 1292 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
db468681 1293 }
1da177e4
LT		 1294#endif
1295
1296 seq_printf(m,
1297 "fpu\t\t: yes\n"
1298 "fpu_exception\t: yes\n"
1299 "cpuid level\t: %d\n"
1300 "wp\t\t: yes\n"
1301 "flags\t\t:",
1302 c->cpuid_level);
1303
1304 {
1305 int i;
1306 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
3d1712c9 1307 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1da177e4
LT		 1308 seq_printf(m, " %s", x86_cap_flags[i]);
1309 }
1310
1311 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1312 c->loops_per_jiffy/(500000/HZ),
1313 (c->loops_per_jiffy/(5000/HZ)) % 100);
1314
1315 if (c->x86_tlbsize > 0)
1316 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1317 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1318 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1319
1320 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1321 c->x86_phys_bits, c->x86_virt_bits);
1322
1323 seq_printf(m, "power management:");
1324 {
1325 unsigned i;
1326 for (i = 0; i < 32; i++)
1327 if (c->x86_power & (1 << i)) {
3f98bc49
AK		 1328 if (i < ARRAY_SIZE(x86_power_flags) &&
1329 x86_power_flags[i])
1330 seq_printf(m, "%s%s",
1331 x86_power_flags[i][0]?" ":"",
1332 x86_power_flags[i]);
1da177e4
LT		 1333 else
1334 seq_printf(m, " [%d]", i);
1335 }
1336 }
1da177e4 1337
d31ddaa1 1338 seq_printf(m, "\n\n");
1da177e4
LT		 1339
1340 return 0;
1341}
1342
1343static void *c_start(struct seq_file *m, loff_t *pos)
1344{
1345 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1346}
1347
1348static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1349{
1350 ++*pos;
1351 return c_start(m, pos);
1352}
1353
1354static void c_stop(struct seq_file *m, void *v)
1355{
1356}
1357
1358struct seq_operations cpuinfo_op = {
1359 .start =c_start,
1360 .next = c_next,
1361 .stop = c_stop,
1362 .show = show_cpuinfo,
1363};
e9928674 1364
9c63f873 1365#if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
160bd18e
MP		 1366#include <linux/platform_device.h>
1367static __init int add_pcspkr(void)
1368{
1369 struct platform_device *pd;
1370 int ret;
1371
1372 pd = platform_device_alloc("pcspkr", -1);
1373 if (!pd)
1374 return -ENOMEM;
1375
1376 ret = platform_device_add(pd);
1377 if (ret)
1378 platform_device_put(pd);
1379
1380 return ret;
1381}
1382device_initcall(add_pcspkr);
1383#endif
Linux kernel - Deliverables
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