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[PATCH] x86_64: Fix NUMA node lookup debug code which had bitrotted
[deliverable/linux.git] / arch / x86_64 / kernel / setup.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
8 *
9 * $Id$
10 */
11
12/*
13 * This file handles the architecture-dependent parts of initialization
14 */
15
16#include <linux/errno.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/mm.h>
20#include <linux/stddef.h>
21#include <linux/unistd.h>
22#include <linux/ptrace.h>
23#include <linux/slab.h>
24#include <linux/user.h>
25#include <linux/a.out.h>
26#include <linux/tty.h>
27#include <linux/ioport.h>
28#include <linux/delay.h>
29#include <linux/config.h>
30#include <linux/init.h>
31#include <linux/initrd.h>
32#include <linux/highmem.h>
33#include <linux/bootmem.h>
34#include <linux/module.h>
35#include <asm/processor.h>
36#include <linux/console.h>
37#include <linux/seq_file.h>
38#include <linux/root_dev.h>
39#include <linux/pci.h>
40#include <linux/acpi.h>
41#include <linux/kallsyms.h>
42#include <linux/edd.h>
bbfceef4 43#include <linux/mmzone.h>
5f5609df 44#include <linux/kexec.h>
bbfceef4 45
1da177e4
LT		 46#include <asm/mtrr.h>
47#include <asm/uaccess.h>
48#include <asm/system.h>
49#include <asm/io.h>
50#include <asm/smp.h>
51#include <asm/msr.h>
52#include <asm/desc.h>
53#include <video/edid.h>
54#include <asm/e820.h>
55#include <asm/dma.h>
56#include <asm/mpspec.h>
57#include <asm/mmu_context.h>
58#include <asm/bootsetup.h>
59#include <asm/proto.h>
60#include <asm/setup.h>
61#include <asm/mach_apic.h>
62#include <asm/numa.h>
2bc0414e 63#include <asm/sections.h>
1da177e4
LT		 64
65/*
66 * Machine setup..
67 */
68
6c231b7b 69struct cpuinfo_x86 boot_cpu_data __read_mostly;
1da177e4
LT		 70
71unsigned long mmu_cr4_features;
72
73int acpi_disabled;
74EXPORT_SYMBOL(acpi_disabled);
888ba6c6 75#ifdef CONFIG_ACPI
1da177e4
LT		 76extern int __initdata acpi_ht;
77extern acpi_interrupt_flags acpi_sci_flags;
78int __initdata acpi_force = 0;
79#endif
80
81int acpi_numa __initdata;
82
1da177e4
LT		 83/* Boot loader ID as an integer, for the benefit of proc_dointvec */
84int bootloader_type;
85
86unsigned long saved_video_mode;
87
88#ifdef CONFIG_SWIOTLB
89int swiotlb;
90EXPORT_SYMBOL(swiotlb);
91#endif
92
93/*
94 * Setup options
95 */
96struct drive_info_struct { char dummy[32]; } drive_info;
97struct screen_info screen_info;
98struct sys_desc_table_struct {
99 unsigned short length;
100 unsigned char table[0];
101};
102
103struct edid_info edid_info;
104struct e820map e820;
105
106extern int root_mountflags;
1da177e4
LT		 107
108char command_line[COMMAND_LINE_SIZE];
109
110struct resource standard_io_resources[] = {
111 { .name = "dma1", .start = 0x00, .end = 0x1f,
112 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
113 { .name = "pic1", .start = 0x20, .end = 0x21,
114 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
115 { .name = "timer0", .start = 0x40, .end = 0x43,
116 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
117 { .name = "timer1", .start = 0x50, .end = 0x53,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "keyboard", .start = 0x60, .end = 0x6f,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "pic2", .start = 0xa0, .end = 0xa1,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "dma2", .start = 0xc0, .end = 0xdf,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "fpu", .start = 0xf0, .end = 0xff,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
129};
130
131#define STANDARD_IO_RESOURCES \
132 (sizeof standard_io_resources / sizeof standard_io_resources[0])
133
134#define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
135
136struct resource data_resource = {
137 .name = "Kernel data",
138 .start = 0,
139 .end = 0,
140 .flags = IORESOURCE_RAM,
141};
142struct resource code_resource = {
143 .name = "Kernel code",
144 .start = 0,
145 .end = 0,
146 .flags = IORESOURCE_RAM,
147};
148
149#define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
150
151static struct resource system_rom_resource = {
152 .name = "System ROM",
153 .start = 0xf0000,
154 .end = 0xfffff,
155 .flags = IORESOURCE_ROM,
156};
157
158static struct resource extension_rom_resource = {
159 .name = "Extension ROM",
160 .start = 0xe0000,
161 .end = 0xeffff,
162 .flags = IORESOURCE_ROM,
163};
164
165static struct resource adapter_rom_resources[] = {
166 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
167 .flags = IORESOURCE_ROM },
168 { .name = "Adapter ROM", .start = 0, .end = 0,
169 .flags = IORESOURCE_ROM },
170 { .name = "Adapter ROM", .start = 0, .end = 0,
171 .flags = IORESOURCE_ROM },
172 { .name = "Adapter ROM", .start = 0, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM }
178};
179
180#define ADAPTER_ROM_RESOURCES \
181 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
182
183static struct resource video_rom_resource = {
184 .name = "Video ROM",
185 .start = 0xc0000,
186 .end = 0xc7fff,
187 .flags = IORESOURCE_ROM,
188};
189
190static struct resource video_ram_resource = {
191 .name = "Video RAM area",
192 .start = 0xa0000,
193 .end = 0xbffff,
194 .flags = IORESOURCE_RAM,
195};
196
197#define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
198
199static int __init romchecksum(unsigned char *rom, unsigned long length)
200{
201 unsigned char *p, sum = 0;
202
203 for (p = rom; p < rom + length; p++)
204 sum += *p;
205 return sum == 0;
206}
207
208static void __init probe_roms(void)
209{
210 unsigned long start, length, upper;
211 unsigned char *rom;
212 int i;
213
214 /* video rom */
215 upper = adapter_rom_resources[0].start;
216 for (start = video_rom_resource.start; start < upper; start += 2048) {
217 rom = isa_bus_to_virt(start);
218 if (!romsignature(rom))
219 continue;
220
221 video_rom_resource.start = start;
222
223 /* 0 < length <= 0x7f * 512, historically */
224 length = rom[2] * 512;
225
226 /* if checksum okay, trust length byte */
227 if (length && romchecksum(rom, length))
228 video_rom_resource.end = start + length - 1;
229
230 request_resource(&iomem_resource, &video_rom_resource);
231 break;
232 }
233
234 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
235 if (start < upper)
236 start = upper;
237
238 /* system rom */
239 request_resource(&iomem_resource, &system_rom_resource);
240 upper = system_rom_resource.start;
241
242 /* check for extension rom (ignore length byte!) */
243 rom = isa_bus_to_virt(extension_rom_resource.start);
244 if (romsignature(rom)) {
245 length = extension_rom_resource.end - extension_rom_resource.start + 1;
246 if (romchecksum(rom, length)) {
247 request_resource(&iomem_resource, &extension_rom_resource);
248 upper = extension_rom_resource.start;
249 }
250 }
251
252 /* check for adapter roms on 2k boundaries */
253 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
254 rom = isa_bus_to_virt(start);
255 if (!romsignature(rom))
256 continue;
257
258 /* 0 < length <= 0x7f * 512, historically */
259 length = rom[2] * 512;
260
261 /* but accept any length that fits if checksum okay */
262 if (!length || start + length > upper || !romchecksum(rom, length))
263 continue;
264
265 adapter_rom_resources[i].start = start;
266 adapter_rom_resources[i].end = start + length - 1;
267 request_resource(&iomem_resource, &adapter_rom_resources[i]);
268
269 start = adapter_rom_resources[i++].end & ~2047UL;
270 }
271}
272
273static __init void parse_cmdline_early (char ** cmdline_p)
274{
275 char c = ' ', *to = command_line, *from = COMMAND_LINE;
276 int len = 0;
277
278 /* Save unparsed command line copy for /proc/cmdline */
279 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
280 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
281
282 for (;;) {
283 if (c != ' ')
284 goto next_char;
285
286#ifdef CONFIG_SMP
287 /*
288 * If the BIOS enumerates physical processors before logical,
289 * maxcpus=N at enumeration-time can be used to disable HT.
290 */
291 else if (!memcmp(from, "maxcpus=", 8)) {
292 extern unsigned int maxcpus;
293
294 maxcpus = simple_strtoul(from + 8, NULL, 0);
295 }
296#endif
888ba6c6 297#ifdef CONFIG_ACPI
1da177e4
LT		 298 /* "acpi=off" disables both ACPI table parsing and interpreter init */
299 if (!memcmp(from, "acpi=off", 8))
300 disable_acpi();
301
302 if (!memcmp(from, "acpi=force", 10)) {
303 /* add later when we do DMI horrors: */
304 acpi_force = 1;
305 acpi_disabled = 0;
306 }
307
308 /* acpi=ht just means: do ACPI MADT parsing
309 at bootup, but don't enable the full ACPI interpreter */
310 if (!memcmp(from, "acpi=ht", 7)) {
311 if (!acpi_force)
312 disable_acpi();
313 acpi_ht = 1;
314 }
315 else if (!memcmp(from, "pci=noacpi", 10))
316 acpi_disable_pci();
317 else if (!memcmp(from, "acpi=noirq", 10))
318 acpi_noirq_set();
319
320 else if (!memcmp(from, "acpi_sci=edge", 13))
321 acpi_sci_flags.trigger = 1;
322 else if (!memcmp(from, "acpi_sci=level", 14))
323 acpi_sci_flags.trigger = 3;
324 else if (!memcmp(from, "acpi_sci=high", 13))
325 acpi_sci_flags.polarity = 1;
326 else if (!memcmp(from, "acpi_sci=low", 12))
327 acpi_sci_flags.polarity = 3;
328
329 /* acpi=strict disables out-of-spec workarounds */
330 else if (!memcmp(from, "acpi=strict", 11)) {
331 acpi_strict = 1;
332 }
22999244
AK		 333#ifdef CONFIG_X86_IO_APIC
334 else if (!memcmp(from, "acpi_skip_timer_override", 24))
335 acpi_skip_timer_override = 1;
336#endif
1da177e4
LT		 337#endif
338
66759a01
CE		 339 if (!memcmp(from, "disable_timer_pin_1", 19))
340 disable_timer_pin_1 = 1;
341 if (!memcmp(from, "enable_timer_pin_1", 18))
342 disable_timer_pin_1 = -1;
343
1da177e4
LT		 344 if (!memcmp(from, "nolapic", 7) ||
345 !memcmp(from, "disableapic", 11))
346 disable_apic = 1;
347
348 if (!memcmp(from, "noapic", 6))
349 skip_ioapic_setup = 1;
350
351 if (!memcmp(from, "apic", 4)) {
352 skip_ioapic_setup = 0;
353 ioapic_force = 1;
354 }
355
356 if (!memcmp(from, "mem=", 4))
357 parse_memopt(from+4, &from);
358
2b97690f 359#ifdef CONFIG_NUMA
1da177e4
LT		 360 if (!memcmp(from, "numa=", 5))
361 numa_setup(from+5);
362#endif
363
364#ifdef CONFIG_GART_IOMMU
365 if (!memcmp(from,"iommu=",6)) {
366 iommu_setup(from+6);
367 }
368#endif
369
370 if (!memcmp(from,"oops=panic", 10))
371 panic_on_oops = 1;
372
373 if (!memcmp(from, "noexec=", 7))
374 nonx_setup(from + 7);
375
5f5609df
EB		 376#ifdef CONFIG_KEXEC
377 /* crashkernel=size@addr specifies the location to reserve for
378 * a crash kernel. By reserving this memory we guarantee
379 * that linux never set's it up as a DMA target.
380 * Useful for holding code to do something appropriate
381 * after a kernel panic.
382 */
383 else if (!memcmp(from, "crashkernel=", 12)) {
384 unsigned long size, base;
385 size = memparse(from+12, &from);
386 if (*from == '@') {
387 base = memparse(from+1, &from);
388 /* FIXME: Do I want a sanity check
389 * to validate the memory range?
390 */
391 crashk_res.start = base;
392 crashk_res.end = base + size - 1;
393 }
394 }
395#endif
396
1da177e4
LT		 397 next_char:
398 c = *(from++);
399 if (!c)
400 break;
401 if (COMMAND_LINE_SIZE <= ++len)
402 break;
403 *(to++) = c;
404 }
405 *to = '\0';
406 *cmdline_p = command_line;
407}
408
2b97690f 409#ifndef CONFIG_NUMA
bbfceef4
MT		 410static void __init
411contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
1da177e4 412{
bbfceef4
MT		 413 unsigned long bootmap_size, bootmap;
414
415 memory_present(0, start_pfn, end_pfn);
416 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
417 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
418 if (bootmap == -1L)
419 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
420 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
421 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
422 reserve_bootmem(bootmap, bootmap_size);
1da177e4
LT		 423}
424#endif
425
426/* Use inline assembly to define this because the nops are defined
427 as inline assembly strings in the include files and we cannot
428 get them easily into strings. */
429asm("\t.data\nk8nops: "
430 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
431 K8_NOP7 K8_NOP8);
432
433extern unsigned char k8nops[];
434static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
435 NULL,
436 k8nops,
437 k8nops + 1,
438 k8nops + 1 + 2,
439 k8nops + 1 + 2 + 3,
440 k8nops + 1 + 2 + 3 + 4,
441 k8nops + 1 + 2 + 3 + 4 + 5,
442 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
443 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
444};
445
446/* Replace instructions with better alternatives for this CPU type.
447
448 This runs before SMP is initialized to avoid SMP problems with
449 self modifying code. This implies that assymetric systems where
450 APs have less capabilities than the boot processor are not handled.
451 In this case boot with "noreplacement". */
452void apply_alternatives(void *start, void *end)
453{
454 struct alt_instr *a;
455 int diff, i, k;
456 for (a = start; (void *)a < end; a++) {
457 if (!boot_cpu_has(a->cpuid))
458 continue;
459
460 BUG_ON(a->replacementlen > a->instrlen);
461 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
462 diff = a->instrlen - a->replacementlen;
463
464 /* Pad the rest with nops */
465 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
466 k = diff;
467 if (k > ASM_NOP_MAX)
468 k = ASM_NOP_MAX;
469 __inline_memcpy(a->instr + i, k8_nops[k], k);
470 }
471 }
472}
473
474static int no_replacement __initdata = 0;
475
476void __init alternative_instructions(void)
477{
478 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
479 if (no_replacement)
480 return;
481 apply_alternatives(__alt_instructions, __alt_instructions_end);
482}
483
484static int __init noreplacement_setup(char *s)
485{
486 no_replacement = 1;
487 return 0;
488}
489
490__setup("noreplacement", noreplacement_setup);
491
492#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
493struct edd edd;
494#ifdef CONFIG_EDD_MODULE
495EXPORT_SYMBOL(edd);
496#endif
497/**
498 * copy_edd() - Copy the BIOS EDD information
499 * from boot_params into a safe place.
500 *
501 */
502static inline void copy_edd(void)
503{
504 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
505 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
506 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
507 edd.edd_info_nr = EDD_NR;
508}
509#else
510static inline void copy_edd(void)
511{
512}
513#endif
514
515#define EBDA_ADDR_POINTER 0x40E
516static void __init reserve_ebda_region(void)
517{
518 unsigned int addr;
519 /**
520 * there is a real-mode segmented pointer pointing to the
521 * 4K EBDA area at 0x40E
522 */
523 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
524 addr <<= 4;
525 if (addr)
526 reserve_bootmem_generic(addr, PAGE_SIZE);
527}
528
529void __init setup_arch(char **cmdline_p)
530{
1da177e4
LT		 531 unsigned long kernel_end;
532
533 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
534 drive_info = DRIVE_INFO;
535 screen_info = SCREEN_INFO;
536 edid_info = EDID_INFO;
537 saved_video_mode = SAVED_VIDEO_MODE;
538 bootloader_type = LOADER_TYPE;
539
540#ifdef CONFIG_BLK_DEV_RAM
541 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
542 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
543 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
544#endif
545 setup_memory_region();
546 copy_edd();
547
548 if (!MOUNT_ROOT_RDONLY)
549 root_mountflags &= ~MS_RDONLY;
550 init_mm.start_code = (unsigned long) &_text;
551 init_mm.end_code = (unsigned long) &_etext;
552 init_mm.end_data = (unsigned long) &_edata;
553 init_mm.brk = (unsigned long) &_end;
554
555 code_resource.start = virt_to_phys(&_text);
556 code_resource.end = virt_to_phys(&_etext)-1;
557 data_resource.start = virt_to_phys(&_etext);
558 data_resource.end = virt_to_phys(&_edata)-1;
559
560 parse_cmdline_early(cmdline_p);
561
562 early_identify_cpu(&boot_cpu_data);
563
564 /*
565 * partially used pages are not usable - thus
566 * we are rounding upwards:
567 */
568 end_pfn = e820_end_of_ram();
569
570 check_efer();
571
572 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
573
f6c2e333
SS		 574 zap_low_mappings(0);
575
888ba6c6 576#ifdef CONFIG_ACPI
1da177e4
LT		 577 /*
578 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
579 * Call this early for SRAT node setup.
580 */
581 acpi_boot_table_init();
582#endif
583
584#ifdef CONFIG_ACPI_NUMA
585 /*
586 * Parse SRAT to discover nodes.
587 */
588 acpi_numa_init();
589#endif
590
2b97690f 591#ifdef CONFIG_NUMA
1da177e4
LT		 592 numa_initmem_init(0, end_pfn);
593#else
bbfceef4 594 contig_initmem_init(0, end_pfn);
1da177e4
LT		 595#endif
596
597 /* Reserve direct mapping */
598 reserve_bootmem_generic(table_start << PAGE_SHIFT,
599 (table_end - table_start) << PAGE_SHIFT);
600
601 /* reserve kernel */
602 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
603 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
604
605 /*
606 * reserve physical page 0 - it's a special BIOS page on many boxes,
607 * enabling clean reboots, SMP operation, laptop functions.
608 */
609 reserve_bootmem_generic(0, PAGE_SIZE);
610
611 /* reserve ebda region */
612 reserve_ebda_region();
613
614#ifdef CONFIG_SMP
615 /*
616 * But first pinch a few for the stack/trampoline stuff
617 * FIXME: Don't need the extra page at 4K, but need to fix
618 * trampoline before removing it. (see the GDT stuff)
619 */
620 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
621
622 /* Reserve SMP trampoline */
623 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
624#endif
625
626#ifdef CONFIG_ACPI_SLEEP
627 /*
628 * Reserve low memory region for sleep support.
629 */
630 acpi_reserve_bootmem();
631#endif
632#ifdef CONFIG_X86_LOCAL_APIC
633 /*
634 * Find and reserve possible boot-time SMP configuration:
635 */
636 find_smp_config();
637#endif
638#ifdef CONFIG_BLK_DEV_INITRD
639 if (LOADER_TYPE && INITRD_START) {
640 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
641 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
642 initrd_start =
643 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
644 initrd_end = initrd_start+INITRD_SIZE;
645 }
646 else {
647 printk(KERN_ERR "initrd extends beyond end of memory "
648 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
649 (unsigned long)(INITRD_START + INITRD_SIZE),
650 (unsigned long)(end_pfn << PAGE_SHIFT));
651 initrd_start = 0;
652 }
653 }
654#endif
5f5609df
EB		 655#ifdef CONFIG_KEXEC
656 if (crashk_res.start != crashk_res.end) {
657 reserve_bootmem(crashk_res.start,
658 crashk_res.end - crashk_res.start + 1);
659 }
660#endif
0d317fb7
EB		 661
662 sparse_init();
663
1da177e4
LT		 664 paging_init();
665
666 check_ioapic();
667
888ba6c6 668#ifdef CONFIG_ACPI
1da177e4
LT		 669 /*
670 * Read APIC and some other early information from ACPI tables.
671 */
672 acpi_boot_init();
673#endif
674
675#ifdef CONFIG_X86_LOCAL_APIC
676 /*
677 * get boot-time SMP configuration:
678 */
679 if (smp_found_config)
680 get_smp_config();
681 init_apic_mappings();
682#endif
683
684 /*
685 * Request address space for all standard RAM and ROM resources
686 * and also for regions reported as reserved by the e820.
687 */
688 probe_roms();
689 e820_reserve_resources();
690
691 request_resource(&iomem_resource, &video_ram_resource);
692
693 {
694 unsigned i;
695 /* request I/O space for devices used on all i[345]86 PCs */
696 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
697 request_resource(&ioport_resource, &standard_io_resources[i]);
698 }
699
a1e97782 700 e820_setup_gap();
1da177e4
LT		 701
702#ifdef CONFIG_GART_IOMMU
703 iommu_hole_init();
704#endif
705
706#ifdef CONFIG_VT
707#if defined(CONFIG_VGA_CONSOLE)
708 conswitchp = &vga_con;
709#elif defined(CONFIG_DUMMY_CONSOLE)
710 conswitchp = &dummy_con;
711#endif
712#endif
713}
714
e6982c67 715static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
1da177e4
LT		 716{
717 unsigned int *v;
718
ebfcaa96 719 if (c->extended_cpuid_level < 0x80000004)
1da177e4
LT		 720 return 0;
721
722 v = (unsigned int *) c->x86_model_id;
723 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
724 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
725 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
726 c->x86_model_id[48] = 0;
727 return 1;
728}
729
730
e6982c67 731static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
1da177e4
LT		 732{
733 unsigned int n, dummy, eax, ebx, ecx, edx;
734
ebfcaa96 735 n = c->extended_cpuid_level;
1da177e4
LT		 736
737 if (n >= 0x80000005) {
738 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
739 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
740 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
741 c->x86_cache_size=(ecx>>24)+(edx>>24);
742 /* On K8 L1 TLB is inclusive, so don't count it */
743 c->x86_tlbsize = 0;
744 }
745
746 if (n >= 0x80000006) {
747 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
748 ecx = cpuid_ecx(0x80000006);
749 c->x86_cache_size = ecx >> 16;
750 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
751
752 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
753 c->x86_cache_size, ecx & 0xFF);
754 }
755
756 if (n >= 0x80000007)
757 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
758 if (n >= 0x80000008) {
759 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
760 c->x86_virt_bits = (eax >> 8) & 0xff;
761 c->x86_phys_bits = eax & 0xff;
762 }
763}
764
3f098c26
AK		 765#ifdef CONFIG_NUMA
766static int nearby_node(int apicid)
767{
768 int i;
769 for (i = apicid - 1; i >= 0; i--) {
770 int node = apicid_to_node[i];
771 if (node != NUMA_NO_NODE && node_online(node))
772 return node;
773 }
774 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
775 int node = apicid_to_node[i];
776 if (node != NUMA_NO_NODE && node_online(node))
777 return node;
778 }
779 return first_node(node_online_map); /* Shouldn't happen */
780}
781#endif
782
63518644
AK		 783/*
784 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
785 * Assumes number of cores is a power of two.
786 */
787static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
788{
789#ifdef CONFIG_SMP
2942283e 790 int cpu = smp_processor_id();
b41e2939 791 unsigned bits;
3f098c26
AK		 792#ifdef CONFIG_NUMA
793 int node = 0;
0b07e984 794 unsigned apicid = phys_proc_id[cpu];
3f098c26 795#endif
b41e2939
AK		 796
797 bits = 0;
798 while ((1 << bits) < c->x86_num_cores)
799 bits++;
800
801 /* Low order bits define the core id (index of core in socket) */
802 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
803 /* Convert the APIC ID into the socket ID */
804 phys_proc_id[cpu] >>= bits;
63518644
AK		 805
806#ifdef CONFIG_NUMA
3f098c26
AK		 807 node = phys_proc_id[cpu];
808 if (apicid_to_node[apicid] != NUMA_NO_NODE)
809 node = apicid_to_node[apicid];
810 if (!node_online(node)) {
811 /* Two possibilities here:
812 - The CPU is missing memory and no node was created.
813 In that case try picking one from a nearby CPU
814 - The APIC IDs differ from the HyperTransport node IDs
815 which the K8 northbridge parsing fills in.
816 Assume they are all increased by a constant offset,
817 but in the same order as the HT nodeids.
818 If that doesn't result in a usable node fall back to the
819 path for the previous case. */
820 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
821 if (ht_nodeid >= 0 &&
822 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
823 node = apicid_to_node[ht_nodeid];
824 /* Pick a nearby node */
825 if (!node_online(node))
826 node = nearby_node(apicid);
827 }
69d81fcd 828 numa_set_node(cpu, node);
3f098c26
AK		 829
830 printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
831 cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
63518644 832#endif
63518644
AK		 833#endif
834}
1da177e4
LT		 835
836static int __init init_amd(struct cpuinfo_x86 *c)
837{
838 int r;
839 int level;
1da177e4 840
bc5e8fdf
LT		 841#ifdef CONFIG_SMP
842 unsigned long value;
843
7d318d77
AK		 844 /*
845 * Disable TLB flush filter by setting HWCR.FFDIS on K8
846 * bit 6 of msr C001_0015
847 *
848 * Errata 63 for SH-B3 steppings
849 * Errata 122 for all steppings (F+ have it disabled by default)
850 */
851 if (c->x86 == 15) {
852 rdmsrl(MSR_K8_HWCR, value);
853 value |= 1 << 6;
854 wrmsrl(MSR_K8_HWCR, value);
855 }
bc5e8fdf
LT		 856#endif
857
1da177e4
LT		 858 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
859 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
860 clear_bit(0*32+31, &c->x86_capability);
861
862 /* C-stepping K8? */
863 level = cpuid_eax(1);
864 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
865 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
866
867 r = get_model_name(c);
868 if (!r) {
869 switch (c->x86) {
870 case 15:
871 /* Should distinguish Models here, but this is only
872 a fallback anyways. */
873 strcpy(c->x86_model_id, "Hammer");
874 break;
875 }
876 }
877 display_cacheinfo(c);
878
ebfcaa96 879 if (c->extended_cpuid_level >= 0x80000008) {
1da177e4
LT		 880 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
881 if (c->x86_num_cores & (c->x86_num_cores - 1))
882 c->x86_num_cores = 1;
883
63518644 884 amd_detect_cmp(c);
1da177e4
LT		 885 }
886
887 return r;
888}
889
e6982c67 890static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
1da177e4
LT		 891{
892#ifdef CONFIG_SMP
893 u32 eax, ebx, ecx, edx;
3dd9d514 894 int index_msb, tmp;
1da177e4
LT		 895 int cpu = smp_processor_id();
896
63518644 897 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
1da177e4
LT		 898 return;
899
900 cpuid(1, &eax, &ebx, &ecx, &edx);
901 smp_num_siblings = (ebx & 0xff0000) >> 16;
902
903 if (smp_num_siblings == 1) {
904 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
905 } else if (smp_num_siblings > 1) {
1da177e4
LT		 906 index_msb = 31;
907 /*
908 * At this point we only support two siblings per
909 * processor package.
910 */
911 if (smp_num_siblings > NR_CPUS) {
912 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
913 smp_num_siblings = 1;
914 return;
915 }
916 tmp = smp_num_siblings;
1da177e4
LT		 917 while ((tmp & 0x80000000 ) == 0) {
918 tmp <<=1 ;
919 index_msb--;
920 }
3dd9d514 921 if (smp_num_siblings & (smp_num_siblings - 1))
1da177e4
LT		 922 index_msb++;
923 phys_proc_id[cpu] = phys_pkg_id(index_msb);
924
925 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
926 phys_proc_id[cpu]);
3dd9d514
AK		 927
928 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
929
930 tmp = smp_num_siblings;
931 index_msb = 31;
932 while ((tmp & 0x80000000) == 0) {
933 tmp <<=1 ;
934 index_msb--;
935 }
936 if (smp_num_siblings & (smp_num_siblings - 1))
937 index_msb++;
938
939 cpu_core_id[cpu] = phys_pkg_id(index_msb);
940
941 if (c->x86_num_cores > 1)
942 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
943 cpu_core_id[cpu]);
1da177e4
LT		 944 }
945#endif
946}
947
3dd9d514
AK		 948/*
949 * find out the number of processor cores on the die
950 */
e6982c67 951static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
3dd9d514
AK		 952{
953 unsigned int eax;
954
955 if (c->cpuid_level < 4)
956 return 1;
957
958 __asm__("cpuid"
959 : "=a" (eax)
960 : "0" (4), "c" (0)
961 : "bx", "dx");
962
963 if (eax & 0x1f)
964 return ((eax >> 26) + 1);
965 else
966 return 1;
967}
968
df0cc26b
AK		 969static void srat_detect_node(void)
970{
971#ifdef CONFIG_NUMA
ddea7be0 972 unsigned node;
df0cc26b
AK		 973 int cpu = smp_processor_id();
974
975 /* Don't do the funky fallback heuristics the AMD version employs
976 for now. */
ddea7be0 977 node = apicid_to_node[hard_smp_processor_id()];
df0cc26b
AK		 978 if (node == NUMA_NO_NODE)
979 node = 0;
69d81fcd 980 numa_set_node(cpu, node);
df0cc26b
AK		 981
982 if (acpi_numa > 0)
983 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
984#endif
985}
986
e6982c67 987static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1da177e4
LT		 988{
989 /* Cache sizes */
990 unsigned n;
991
992 init_intel_cacheinfo(c);
ebfcaa96 993 n = c->extended_cpuid_level;
1da177e4
LT		 994 if (n >= 0x80000008) {
995 unsigned eax = cpuid_eax(0x80000008);
996 c->x86_virt_bits = (eax >> 8) & 0xff;
997 c->x86_phys_bits = eax & 0xff;
af9c142d
SL		 998 /* CPUID workaround for Intel 0F34 CPU */
999 if (c->x86_vendor == X86_VENDOR_INTEL &&
1000 c->x86 == 0xF && c->x86_model == 0x3 &&
1001 c->x86_mask == 0x4)
1002 c->x86_phys_bits = 36;
1da177e4
LT		 1003 }
1004
1005 if (c->x86 == 15)
1006 c->x86_cache_alignment = c->x86_clflush_size * 2;
c29601e9
AK		 1007 if (c->x86 >= 15)
1008 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
3dd9d514 1009 c->x86_num_cores = intel_num_cpu_cores(c);
df0cc26b
AK		 1010
1011 srat_detect_node();
1da177e4
LT		 1012}
1013
672289e9 1014static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1da177e4
LT		 1015{
1016 char *v = c->x86_vendor_id;
1017
1018 if (!strcmp(v, "AuthenticAMD"))
1019 c->x86_vendor = X86_VENDOR_AMD;
1020 else if (!strcmp(v, "GenuineIntel"))
1021 c->x86_vendor = X86_VENDOR_INTEL;
1022 else
1023 c->x86_vendor = X86_VENDOR_UNKNOWN;
1024}
1025
1026struct cpu_model_info {
1027 int vendor;
1028 int family;
1029 char *model_names[16];
1030};
1031
1032/* Do some early cpuid on the boot CPU to get some parameter that are
1033 needed before check_bugs. Everything advanced is in identify_cpu
1034 below. */
e6982c67 1035void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1036{
1037 u32 tfms;
1038
1039 c->loops_per_jiffy = loops_per_jiffy;
1040 c->x86_cache_size = -1;
1041 c->x86_vendor = X86_VENDOR_UNKNOWN;
1042 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1043 c->x86_vendor_id[0] = '\0'; /* Unset */
1044 c->x86_model_id[0] = '\0'; /* Unset */
1045 c->x86_clflush_size = 64;
1046 c->x86_cache_alignment = c->x86_clflush_size;
1047 c->x86_num_cores = 1;
ebfcaa96 1048 c->extended_cpuid_level = 0;
1da177e4
LT		 1049 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1050
1051 /* Get vendor name */
1052 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1053 (unsigned int *)&c->x86_vendor_id[0],
1054 (unsigned int *)&c->x86_vendor_id[8],
1055 (unsigned int *)&c->x86_vendor_id[4]);
1056
1057 get_cpu_vendor(c);
1058
1059 /* Initialize the standard set of capabilities */
1060 /* Note that the vendor-specific code below might override */
1061
1062 /* Intel-defined flags: level 0x00000001 */
1063 if (c->cpuid_level >= 0x00000001) {
1064 __u32 misc;
1065 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1066 &c->x86_capability[0]);
1067 c->x86 = (tfms >> 8) & 0xf;
1068 c->x86_model = (tfms >> 4) & 0xf;
1069 c->x86_mask = tfms & 0xf;
f5f786d0 1070 if (c->x86 == 0xf)
1da177e4 1071 c->x86 += (tfms >> 20) & 0xff;
f5f786d0 1072 if (c->x86 >= 0x6)
1da177e4 1073 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1da177e4
LT		 1074 if (c->x86_capability[0] & (1<<19))
1075 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1da177e4
LT		 1076 } else {
1077 /* Have CPUID level 0 only - unheard of */
1078 c->x86 = 4;
1079 }
a158608b
AK		 1080
1081#ifdef CONFIG_SMP
b41e2939 1082 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
a158608b 1083#endif
1da177e4
LT		 1084}
1085
1086/*
1087 * This does the hard work of actually picking apart the CPU stuff...
1088 */
e6982c67 1089void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1090{
1091 int i;
1092 u32 xlvl;
1093
1094 early_identify_cpu(c);
1095
1096 /* AMD-defined flags: level 0x80000001 */
1097 xlvl = cpuid_eax(0x80000000);
ebfcaa96 1098 c->extended_cpuid_level = xlvl;
1da177e4
LT		 1099 if ((xlvl & 0xffff0000) == 0x80000000) {
1100 if (xlvl >= 0x80000001) {
1101 c->x86_capability[1] = cpuid_edx(0x80000001);
5b7abc6f 1102 c->x86_capability[6] = cpuid_ecx(0x80000001);
1da177e4
LT		 1103 }
1104 if (xlvl >= 0x80000004)
1105 get_model_name(c); /* Default name */
1106 }
1107
1108 /* Transmeta-defined flags: level 0x80860001 */
1109 xlvl = cpuid_eax(0x80860000);
1110 if ((xlvl & 0xffff0000) == 0x80860000) {
1111 /* Don't set x86_cpuid_level here for now to not confuse. */
1112 if (xlvl >= 0x80860001)
1113 c->x86_capability[2] = cpuid_edx(0x80860001);
1114 }
1115
1116 /*
1117 * Vendor-specific initialization. In this section we
1118 * canonicalize the feature flags, meaning if there are
1119 * features a certain CPU supports which CPUID doesn't
1120 * tell us, CPUID claiming incorrect flags, or other bugs,
1121 * we handle them here.
1122 *
1123 * At the end of this section, c->x86_capability better
1124 * indicate the features this CPU genuinely supports!
1125 */
1126 switch (c->x86_vendor) {
1127 case X86_VENDOR_AMD:
1128 init_amd(c);
1129 break;
1130
1131 case X86_VENDOR_INTEL:
1132 init_intel(c);
1133 break;
1134
1135 case X86_VENDOR_UNKNOWN:
1136 default:
1137 display_cacheinfo(c);
1138 break;
1139 }
1140
1141 select_idle_routine(c);
1142 detect_ht(c);
1da177e4
LT		 1143
1144 /*
1145 * On SMP, boot_cpu_data holds the common feature set between
1146 * all CPUs; so make sure that we indicate which features are
1147 * common between the CPUs. The first time this routine gets
1148 * executed, c == &boot_cpu_data.
1149 */
1150 if (c != &boot_cpu_data) {
1151 /* AND the already accumulated flags with these */
1152 for (i = 0 ; i < NCAPINTS ; i++)
1153 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1154 }
1155
1156#ifdef CONFIG_X86_MCE
1157 mcheck_init(c);
1158#endif
3b520b23
SL		 1159 if (c == &boot_cpu_data)
1160 mtrr_bp_init();
1161 else
1162 mtrr_ap_init();
1da177e4 1163#ifdef CONFIG_NUMA
3019e8eb 1164 numa_add_cpu(smp_processor_id());
1da177e4
LT		 1165#endif
1166}
1167
1168
e6982c67 1169void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1da177e4
LT		 1170{
1171 if (c->x86_model_id[0])
1172 printk("%s", c->x86_model_id);
1173
1174 if (c->x86_mask || c->cpuid_level >= 0)
1175 printk(" stepping %02x\n", c->x86_mask);
1176 else
1177 printk("\n");
1178}
1179
1180/*
1181 * Get CPU information for use by the procfs.
1182 */
1183
1184static int show_cpuinfo(struct seq_file *m, void *v)
1185{
1186 struct cpuinfo_x86 *c = v;
1187
1188 /*
1189 * These flag bits must match the definitions in <asm/cpufeature.h>.
1190 * NULL means this bit is undefined or reserved; either way it doesn't
1191 * have meaning as far as Linux is concerned. Note that it's important
1192 * to realize there is a difference between this table and CPUID -- if
1193 * applications want to get the raw CPUID data, they should access
1194 * /dev/cpu/<cpu_nr>/cpuid instead.
1195 */
1196 static char *x86_cap_flags[] = {
1197 /* Intel-defined */
1198 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1199 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1200 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1201 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1202
1203 /* AMD-defined */
3c3b73b6 1204 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1205 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1206 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1207 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1208
1209 /* Transmeta-defined */
1210 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1211 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1212 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214
1215 /* Other (Linux-defined) */
622dcaf9 1216 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
c29601e9 1217 "constant_tsc", NULL, NULL,
1da177e4
LT		 1218 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1219 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1220 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1221
1222 /* Intel-defined (#2) */
daedb82d 1223 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1da177e4
LT		 1224 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1225 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1226 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1227
5b7abc6f
PA		 1228 /* VIA/Cyrix/Centaur-defined */
1229 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1230 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1231 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1232 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1233
1da177e4
LT		 1234 /* AMD-defined (#2) */
1235 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1236 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1237 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
5b7abc6f 1238 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1239 };
1240 static char *x86_power_flags[] = {
1241 "ts", /* temperature sensor */
1242 "fid", /* frequency id control */
1243 "vid", /* voltage id control */
1244 "ttp", /* thermal trip */
1245 "tm",
1246 "stc"
1247 };
1248
1249
1250#ifdef CONFIG_SMP
1251 if (!cpu_online(c-cpu_data))
1252 return 0;
1253#endif
1254
1255 seq_printf(m,"processor\t: %u\n"
1256 "vendor_id\t: %s\n"
1257 "cpu family\t: %d\n"
1258 "model\t\t: %d\n"
1259 "model name\t: %s\n",
1260 (unsigned)(c-cpu_data),
1261 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1262 c->x86,
1263 (int)c->x86_model,
1264 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1265
1266 if (c->x86_mask || c->cpuid_level >= 0)
1267 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1268 else
1269 seq_printf(m, "stepping\t: unknown\n");
1270
1271 if (cpu_has(c,X86_FEATURE_TSC)) {
1272 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1273 cpu_khz / 1000, (cpu_khz % 1000));
1274 }
1275
1276 /* Cache size */
1277 if (c->x86_cache_size >= 0)
1278 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1279
1280#ifdef CONFIG_SMP
db468681
AK		 1281 if (smp_num_siblings * c->x86_num_cores > 1) {
1282 int cpu = c - cpu_data;
1283 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1284 seq_printf(m, "siblings\t: %d\n",
1285 c->x86_num_cores * smp_num_siblings);
d31ddaa1
SS		 1286 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1287 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
db468681 1288 }
1da177e4
LT		 1289#endif
1290
1291 seq_printf(m,
1292 "fpu\t\t: yes\n"
1293 "fpu_exception\t: yes\n"
1294 "cpuid level\t: %d\n"
1295 "wp\t\t: yes\n"
1296 "flags\t\t:",
1297 c->cpuid_level);
1298
1299 {
1300 int i;
1301 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1302 if ( test_bit(i, &c->x86_capability) &&
1303 x86_cap_flags[i] != NULL )
1304 seq_printf(m, " %s", x86_cap_flags[i]);
1305 }
1306
1307 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1308 c->loops_per_jiffy/(500000/HZ),
1309 (c->loops_per_jiffy/(5000/HZ)) % 100);
1310
1311 if (c->x86_tlbsize > 0)
1312 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1313 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1314 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1315
1316 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1317 c->x86_phys_bits, c->x86_virt_bits);
1318
1319 seq_printf(m, "power management:");
1320 {
1321 unsigned i;
1322 for (i = 0; i < 32; i++)
1323 if (c->x86_power & (1 << i)) {
1324 if (i < ARRAY_SIZE(x86_power_flags))
1325 seq_printf(m, " %s", x86_power_flags[i]);
1326 else
1327 seq_printf(m, " [%d]", i);
1328 }
1329 }
1da177e4 1330
d31ddaa1 1331 seq_printf(m, "\n\n");
1da177e4
LT		 1332
1333 return 0;
1334}
1335
1336static void *c_start(struct seq_file *m, loff_t *pos)
1337{
1338 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1339}
1340
1341static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1342{
1343 ++*pos;
1344 return c_start(m, pos);
1345}
1346
1347static void c_stop(struct seq_file *m, void *v)
1348{
1349}
1350
1351struct seq_operations cpuinfo_op = {
1352 .start =c_start,
1353 .next = c_next,
1354 .stop = c_stop,
1355 .show = show_cpuinfo,
1356};
Linux kernel - Deliverables
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