* symbols.c (fb_label_name): Allow an augend of 2 for mmix.
[deliverable/binutils-gdb.git] / bfd / coff-arm.c
CommitLineData
252b5132 1/* BFD back-end for ARM COFF files.
7898deda 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
5ff625e9 3 2000, 2001, 2002, 2003, 2004, 2005
252b5132
RH
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
6
d21356d8 7 This file is part of BFD, the Binary File Descriptor library.
252b5132 8
d21356d8
NC
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
252b5132 13
d21356d8
NC
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
252b5132 18
d21356d8
NC
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
252b5132
RH
22
23#include "bfd.h"
24#include "sysdep.h"
25#include "libbfd.h"
26
27#include "coff/arm.h"
28
29#include "coff/internal.h"
30
31#ifdef COFF_WITH_PE
32#include "coff/pe.h"
33#endif
34
35#include "libcoff.h"
36
37/* Macros for manipulation the bits in the flags field of the coff data
38 structure. */
dc810e39
AM
39#define APCS_26_FLAG(abfd) \
40 (coff_data (abfd)->flags & F_APCS_26)
41
42#define APCS_FLOAT_FLAG(abfd) \
43 (coff_data (abfd)->flags & F_APCS_FLOAT)
44
45#define PIC_FLAG(abfd) \
46 (coff_data (abfd)->flags & F_PIC)
47
48#define APCS_SET(abfd) \
49 (coff_data (abfd)->flags & F_APCS_SET)
50
51#define SET_APCS_FLAGS(abfd, flgs) \
52 do \
53 { \
54 coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \
55 coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \
56 } \
57 while (0)
58
59#define INTERWORK_FLAG(abfd) \
60 (coff_data (abfd)->flags & F_INTERWORK)
61
62#define INTERWORK_SET(abfd) \
63 (coff_data (abfd)->flags & F_INTERWORK_SET)
64
65#define SET_INTERWORK_FLAG(abfd, flg) \
66 do \
67 { \
68 coff_data (abfd)->flags &= ~F_INTERWORK; \
69 coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \
70 } \
71 while (0)
af74ae99
NC
72
73#ifndef NUM_ELEM
74#define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
75#endif
d70910e8 76
252b5132
RH
77typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
78/* some typedefs for holding instructions */
79typedef unsigned long int insn32;
80typedef unsigned short int insn16;
81
252b5132 82 /* Forward declarations for stupid compilers. */
b34976b6 83static bfd_boolean coff_arm_relocate_section
252b5132
RH
84 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
85 struct internal_reloc *, struct internal_syment *, asection **));
86static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
87 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
88static bfd_reloc_status_type aoutarm_fix_pcrel_26
89 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
7831a775 90#ifndef ARM_WINCE
252b5132
RH
91static bfd_reloc_status_type coff_thumb_pcrel_23
92 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
252b5132
RH
93static bfd_reloc_status_type coff_thumb_pcrel_9
94 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
7831a775
NC
95static insn32 insert_thumb_branch
96 PARAMS ((insn32, int));
97#endif
98static bfd_reloc_status_type coff_thumb_pcrel_12
99 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
252b5132
RH
100static bfd_reloc_status_type coff_arm_reloc
101 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
b34976b6 102static bfd_boolean coff_arm_adjust_symndx
252b5132 103 PARAMS ((bfd *, struct bfd_link_info *, bfd *,
b34976b6 104 asection *, struct internal_reloc *, bfd_boolean *));
d70910e8 105static reloc_howto_type * coff_arm_rtype_to_howto
252b5132 106 PARAMS ((bfd *, asection *, struct internal_reloc *,
dc810e39
AM
107 struct coff_link_hash_entry *, struct internal_syment *,
108 bfd_vma *));
252b5132
RH
109static bfd_reloc_status_type coff_thumb_pcrel_common
110 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **,
111 thumb_pcrel_branchtype));
dc810e39 112static const struct reloc_howto_struct * coff_arm_reloc_type_lookup
252b5132
RH
113 PARAMS ((bfd *, bfd_reloc_code_real_type));
114static struct bfd_link_hash_table * coff_arm_link_hash_table_create
115 PARAMS ((bfd *));
252b5132 116static struct coff_link_hash_entry * find_thumb_glue
dc810e39 117 PARAMS ((struct bfd_link_info *, const char *, bfd *));
252b5132 118static struct coff_link_hash_entry * find_arm_glue
dc810e39 119 PARAMS ((struct bfd_link_info *, const char *, bfd *));
e049a0de 120#ifndef COFF_IMAGE_WITH_PE
252b5132
RH
121static void record_arm_to_thumb_glue
122 PARAMS ((struct bfd_link_info *, struct coff_link_hash_entry *));
7831a775 123#ifndef ARM_WINCE
252b5132
RH
124static void record_thumb_to_arm_glue
125 PARAMS ((struct bfd_link_info *, struct coff_link_hash_entry *));
e049a0de 126#endif
7831a775 127#endif
b34976b6 128static bfd_boolean coff_arm_merge_private_bfd_data
252b5132 129 PARAMS ((bfd *, bfd *));
b34976b6 130static bfd_boolean coff_arm_print_private_bfd_data
252b5132 131 PARAMS ((bfd *, PTR));
b34976b6 132static bfd_boolean _bfd_coff_arm_set_private_flags
252b5132 133 PARAMS ((bfd *, flagword));
b34976b6 134static bfd_boolean coff_arm_copy_private_bfd_data
252b5132 135 PARAMS ((bfd *, bfd *));
b34976b6 136static bfd_boolean coff_arm_is_local_label_name
252b5132 137 PARAMS ((bfd *, const char *));
b34976b6 138static bfd_boolean coff_arm_link_output_has_begun
252b5132 139 PARAMS ((bfd *, struct coff_final_link_info *));
b34976b6 140static bfd_boolean coff_arm_final_link_postscript
252b5132 141 PARAMS ((bfd *, struct coff_final_link_info *));
917583ad
NC
142static void arm_emit_base_file_entry
143 PARAMS ((struct bfd_link_info *, bfd *, asection *, bfd_vma));
252b5132
RH
144
145/* The linker script knows the section names for placement.
146 The entry_names are used to do simple name mangling on the stubs.
147 Given a function name, and its type, the stub can be found. The
917583ad 148 name can be changed. The only requirement is the %s be present. */
d70910e8 149
252b5132
RH
150#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
151#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
152
153#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
154#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
155
d70910e8 156/* Used by the assembler. */
917583ad 157
252b5132
RH
158static bfd_reloc_status_type
159coff_arm_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
160 error_message)
161 bfd *abfd;
162 arelent *reloc_entry;
5f771d47 163 asymbol *symbol ATTRIBUTE_UNUSED;
252b5132 164 PTR data;
5f771d47 165 asection *input_section ATTRIBUTE_UNUSED;
252b5132 166 bfd *output_bfd;
5f771d47 167 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
168{
169 symvalue diff;
170 if (output_bfd == (bfd *) NULL)
171 return bfd_reloc_continue;
172
173 diff = reloc_entry->addend;
174
dc810e39
AM
175#define DOIT(x) \
176 x = ((x & ~howto->dst_mask) \
177 | (((x & howto->src_mask) + diff) & howto->dst_mask))
252b5132
RH
178
179 if (diff != 0)
180 {
181 reloc_howto_type *howto = reloc_entry->howto;
182 unsigned char *addr = (unsigned char *) data + reloc_entry->address;
183
184 switch (howto->size)
185 {
186 case 0:
187 {
188 char x = bfd_get_8 (abfd, addr);
189 DOIT (x);
190 bfd_put_8 (abfd, x, addr);
191 }
192 break;
193
194 case 1:
195 {
196 short x = bfd_get_16 (abfd, addr);
197 DOIT (x);
dc810e39 198 bfd_put_16 (abfd, (bfd_vma) x, addr);
252b5132
RH
199 }
200 break;
201
202 case 2:
203 {
204 long x = bfd_get_32 (abfd, addr);
205 DOIT (x);
dc810e39 206 bfd_put_32 (abfd, (bfd_vma) x, addr);
252b5132
RH
207 }
208 break;
209
210 default:
211 abort ();
212 }
213 }
214
215 /* Now let bfd_perform_relocation finish everything up. */
216 return bfd_reloc_continue;
217}
218
219/* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
220 in this file), then TARGET_UNDERSCORE should be defined, otherwise it
221 should not. */
222#ifndef TARGET_UNDERSCORE
223#define TARGET_UNDERSCORE '_'
224#endif
225
226#ifndef PCRELOFFSET
b34976b6 227#define PCRELOFFSET TRUE
252b5132
RH
228#endif
229
230/* These most certainly belong somewhere else. Just had to get rid of
17505c5c 231 the manifest constants in the code. */
252b5132
RH
232#define ARM_8 0
233#define ARM_16 1
234#define ARM_32 2
235#define ARM_26 3
236#define ARM_DISP8 4
237#define ARM_DISP16 5
238#define ARM_DISP32 6
239#define ARM_26D 7
240/* 8 is unused */
241#define ARM_NEG16 9
242#define ARM_NEG32 10
243#define ARM_RVA32 11
244#define ARM_THUMB9 12
245#define ARM_THUMB12 13
246#define ARM_THUMB23 14
247
17505c5c
NC
248#ifdef ARM_WINCE
249#undef ARM_32
250#undef ARM_RVA32
251#undef ARM_26
252#undef ARM_THUMB12
253#undef ARM_26D
254
d3793eaa 255#define ARM_26D 0
17505c5c
NC
256#define ARM_32 1
257#define ARM_RVA32 2
258#define ARM_26 3
259#define ARM_THUMB12 4
17505c5c
NC
260#define ARM_SECTION 14
261#define ARM_SECREL 15
262#endif
263
d70910e8 264static reloc_howto_type aoutarm_std_reloc_howto[] =
917583ad 265 {
17505c5c 266#ifdef ARM_WINCE
d3793eaa
NC
267 HOWTO (ARM_26D,
268 2,
269 2,
270 24,
44e88952 271 TRUE,
d3793eaa
NC
272 0,
273 complain_overflow_dont,
274 aoutarm_fix_pcrel_26_done,
275 "ARM_26D",
276 FALSE,
277 0x00ffffff,
278 0x0,
44e88952 279 PCRELOFFSET),
917583ad
NC
280 HOWTO (ARM_32,
281 0,
282 2,
283 32,
b34976b6 284 FALSE,
917583ad
NC
285 0,
286 complain_overflow_bitfield,
287 coff_arm_reloc,
288 "ARM_32",
d3793eaa 289 FALSE,
917583ad
NC
290 0xffffffff,
291 0xffffffff,
292 PCRELOFFSET),
293 HOWTO (ARM_RVA32,
294 0,
295 2,
296 32,
b34976b6 297 FALSE,
917583ad
NC
298 0,
299 complain_overflow_bitfield,
300 coff_arm_reloc,
301 "ARM_RVA32",
d3793eaa 302 FALSE,
917583ad
NC
303 0xffffffff,
304 0xffffffff,
305 PCRELOFFSET),
306 HOWTO (ARM_26,
307 2,
308 2,
309 24,
b34976b6 310 TRUE,
917583ad
NC
311 0,
312 complain_overflow_signed,
313 aoutarm_fix_pcrel_26 ,
314 "ARM_26",
b34976b6 315 FALSE,
917583ad
NC
316 0x00ffffff,
317 0x00ffffff,
318 PCRELOFFSET),
319 HOWTO (ARM_THUMB12,
320 1,
321 1,
322 11,
b34976b6 323 TRUE,
917583ad
NC
324 0,
325 complain_overflow_signed,
326 coff_thumb_pcrel_12 ,
327 "ARM_THUMB12",
b34976b6 328 FALSE,
917583ad
NC
329 0x000007ff,
330 0x000007ff,
331 PCRELOFFSET),
d3793eaa 332 EMPTY_HOWTO (-1),
917583ad
NC
333 EMPTY_HOWTO (-1),
334 EMPTY_HOWTO (-1),
335 EMPTY_HOWTO (-1),
336 EMPTY_HOWTO (-1),
337 EMPTY_HOWTO (-1),
338 EMPTY_HOWTO (-1),
339 EMPTY_HOWTO (-1),
340 EMPTY_HOWTO (-1),
341 HOWTO (ARM_SECTION,
342 0,
343 1,
344 16,
b34976b6 345 FALSE,
917583ad
NC
346 0,
347 complain_overflow_bitfield,
348 coff_arm_reloc,
d3793eaa
NC
349 "ARM_SECTION",
350 FALSE,
917583ad
NC
351 0x0000ffff,
352 0x0000ffff,
353 PCRELOFFSET),
354 HOWTO (ARM_SECREL,
355 0,
356 2,
357 32,
b34976b6 358 FALSE,
917583ad
NC
359 0,
360 complain_overflow_bitfield,
361 coff_arm_reloc,
d3793eaa
NC
362 "ARM_SECREL",
363 FALSE,
917583ad
NC
364 0xffffffff,
365 0xffffffff,
366 PCRELOFFSET),
17505c5c 367#else /* not ARM_WINCE */
b34976b6 368 HOWTO (ARM_8, /* type */
917583ad
NC
369 0, /* rightshift */
370 0, /* size */
371 8, /* bitsize */
b34976b6 372 FALSE, /* pc_relative */
917583ad
NC
373 0, /* bitpos */
374 complain_overflow_bitfield, /* complain_on_overflow */
b34976b6 375 coff_arm_reloc, /* special_function */
917583ad 376 "ARM_8", /* name */
b34976b6 377 TRUE, /* partial_inplace */
917583ad
NC
378 0x000000ff, /* src_mask */
379 0x000000ff, /* dst_mask */
380 PCRELOFFSET /* pcrel_offset */),
381 HOWTO (ARM_16,
382 0,
383 1,
384 16,
b34976b6 385 FALSE,
917583ad
NC
386 0,
387 complain_overflow_bitfield,
388 coff_arm_reloc,
389 "ARM_16",
b34976b6 390 TRUE,
917583ad
NC
391 0x0000ffff,
392 0x0000ffff,
393 PCRELOFFSET),
394 HOWTO (ARM_32,
395 0,
396 2,
397 32,
b34976b6 398 FALSE,
917583ad
NC
399 0,
400 complain_overflow_bitfield,
401 coff_arm_reloc,
402 "ARM_32",
b34976b6 403 TRUE,
917583ad
NC
404 0xffffffff,
405 0xffffffff,
406 PCRELOFFSET),
407 HOWTO (ARM_26,
408 2,
409 2,
410 24,
b34976b6 411 TRUE,
917583ad
NC
412 0,
413 complain_overflow_signed,
414 aoutarm_fix_pcrel_26 ,
415 "ARM_26",
b34976b6 416 FALSE,
917583ad
NC
417 0x00ffffff,
418 0x00ffffff,
419 PCRELOFFSET),
420 HOWTO (ARM_DISP8,
421 0,
422 0,
423 8,
b34976b6 424 TRUE,
917583ad
NC
425 0,
426 complain_overflow_signed,
427 coff_arm_reloc,
428 "ARM_DISP8",
b34976b6 429 TRUE,
917583ad
NC
430 0x000000ff,
431 0x000000ff,
b34976b6 432 TRUE),
917583ad
NC
433 HOWTO (ARM_DISP16,
434 0,
435 1,
436 16,
b34976b6 437 TRUE,
917583ad
NC
438 0,
439 complain_overflow_signed,
440 coff_arm_reloc,
441 "ARM_DISP16",
b34976b6 442 TRUE,
917583ad
NC
443 0x0000ffff,
444 0x0000ffff,
b34976b6 445 TRUE),
917583ad
NC
446 HOWTO (ARM_DISP32,
447 0,
448 2,
449 32,
b34976b6 450 TRUE,
917583ad
NC
451 0,
452 complain_overflow_signed,
453 coff_arm_reloc,
454 "ARM_DISP32",
b34976b6 455 TRUE,
917583ad
NC
456 0xffffffff,
457 0xffffffff,
b34976b6 458 TRUE),
917583ad
NC
459 HOWTO (ARM_26D,
460 2,
461 2,
462 24,
b34976b6 463 FALSE,
917583ad
NC
464 0,
465 complain_overflow_dont,
466 aoutarm_fix_pcrel_26_done,
467 "ARM_26D",
b34976b6 468 TRUE,
917583ad
NC
469 0x00ffffff,
470 0x0,
b34976b6 471 FALSE),
917583ad
NC
472 /* 8 is unused */
473 EMPTY_HOWTO (-1),
474 HOWTO (ARM_NEG16,
475 0,
476 -1,
477 16,
b34976b6 478 FALSE,
917583ad
NC
479 0,
480 complain_overflow_bitfield,
481 coff_arm_reloc,
482 "ARM_NEG16",
b34976b6 483 TRUE,
917583ad
NC
484 0x0000ffff,
485 0x0000ffff,
b34976b6 486 FALSE),
917583ad
NC
487 HOWTO (ARM_NEG32,
488 0,
489 -2,
490 32,
b34976b6 491 FALSE,
917583ad
NC
492 0,
493 complain_overflow_bitfield,
494 coff_arm_reloc,
495 "ARM_NEG32",
b34976b6 496 TRUE,
917583ad
NC
497 0xffffffff,
498 0xffffffff,
b34976b6 499 FALSE),
917583ad
NC
500 HOWTO (ARM_RVA32,
501 0,
502 2,
503 32,
b34976b6 504 FALSE,
917583ad
NC
505 0,
506 complain_overflow_bitfield,
507 coff_arm_reloc,
508 "ARM_RVA32",
b34976b6 509 TRUE,
917583ad
NC
510 0xffffffff,
511 0xffffffff,
512 PCRELOFFSET),
513 HOWTO (ARM_THUMB9,
514 1,
515 1,
516 8,
b34976b6 517 TRUE,
917583ad
NC
518 0,
519 complain_overflow_signed,
520 coff_thumb_pcrel_9 ,
521 "ARM_THUMB9",
b34976b6 522 FALSE,
917583ad
NC
523 0x000000ff,
524 0x000000ff,
525 PCRELOFFSET),
526 HOWTO (ARM_THUMB12,
527 1,
528 1,
529 11,
b34976b6 530 TRUE,
917583ad
NC
531 0,
532 complain_overflow_signed,
533 coff_thumb_pcrel_12 ,
534 "ARM_THUMB12",
b34976b6 535 FALSE,
917583ad
NC
536 0x000007ff,
537 0x000007ff,
538 PCRELOFFSET),
539 HOWTO (ARM_THUMB23,
540 1,
541 2,
542 22,
b34976b6 543 TRUE,
917583ad
NC
544 0,
545 complain_overflow_signed,
546 coff_thumb_pcrel_23 ,
547 "ARM_THUMB23",
b34976b6 548 FALSE,
917583ad
NC
549 0x07ff07ff,
550 0x07ff07ff,
551 PCRELOFFSET)
17505c5c 552#endif /* not ARM_WINCE */
917583ad 553 };
252b5132 554
af74ae99
NC
555#define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)
556
252b5132 557#ifdef COFF_WITH_PE
b34976b6
AM
558static bfd_boolean in_reloc_p PARAMS ((bfd *, reloc_howto_type *));
559/* Return TRUE if this relocation should
d70910e8 560 appear in the output .reloc section. */
252b5132 561
b34976b6 562static bfd_boolean
252b5132 563in_reloc_p (abfd, howto)
5f771d47 564 bfd * abfd ATTRIBUTE_UNUSED;
252b5132
RH
565 reloc_howto_type * howto;
566{
567 return !howto->pc_relative && howto->type != ARM_RVA32;
d70910e8 568}
252b5132
RH
569#endif
570
af74ae99
NC
571#define RTYPE2HOWTO(cache_ptr, dst) \
572 (cache_ptr)->howto = \
573 (dst)->r_type < NUM_RELOCS \
574 ? aoutarm_std_reloc_howto + (dst)->r_type \
575 : NULL
252b5132
RH
576
577#define coff_rtype_to_howto coff_arm_rtype_to_howto
578
579static reloc_howto_type *
580coff_arm_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
5f771d47 581 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
582 asection *sec;
583 struct internal_reloc *rel;
5f771d47
ILT
584 struct coff_link_hash_entry *h ATTRIBUTE_UNUSED;
585 struct internal_syment *sym ATTRIBUTE_UNUSED;
252b5132
RH
586 bfd_vma *addendp;
587{
af74ae99 588 reloc_howto_type * howto;
252b5132 589
af74ae99
NC
590 if (rel->r_type >= NUM_RELOCS)
591 return NULL;
d70910e8 592
252b5132
RH
593 howto = aoutarm_std_reloc_howto + rel->r_type;
594
595 if (rel->r_type == ARM_RVA32)
17505c5c 596 *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
252b5132
RH
597
598 return howto;
252b5132 599}
917583ad 600
d70910e8 601/* Used by the assembler. */
252b5132
RH
602
603static bfd_reloc_status_type
604aoutarm_fix_pcrel_26_done (abfd, reloc_entry, symbol, data, input_section,
605 output_bfd, error_message)
5f771d47
ILT
606 bfd *abfd ATTRIBUTE_UNUSED;
607 arelent *reloc_entry ATTRIBUTE_UNUSED;
608 asymbol *symbol ATTRIBUTE_UNUSED;
609 PTR data ATTRIBUTE_UNUSED;
610 asection *input_section ATTRIBUTE_UNUSED;
611 bfd *output_bfd ATTRIBUTE_UNUSED;
612 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
613{
614 /* This is dead simple at present. */
615 return bfd_reloc_ok;
616}
617
d70910e8 618/* Used by the assembler. */
252b5132
RH
619
620static bfd_reloc_status_type
621aoutarm_fix_pcrel_26 (abfd, reloc_entry, symbol, data, input_section,
622 output_bfd, error_message)
623 bfd *abfd;
624 arelent *reloc_entry;
625 asymbol *symbol;
626 PTR data;
627 asection *input_section;
628 bfd *output_bfd;
5f771d47 629 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
630{
631 bfd_vma relocation;
632 bfd_size_type addr = reloc_entry->address;
633 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
634 bfd_reloc_status_type flag = bfd_reloc_ok;
d70910e8 635
917583ad 636 /* If this is an undefined symbol, return error. */
252b5132
RH
637 if (symbol->section == &bfd_und_section
638 && (symbol->flags & BSF_WEAK) == 0)
639 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
640
641 /* If the sections are different, and we are doing a partial relocation,
642 just ignore it for now. */
643 if (symbol->section->name != input_section->name
644 && output_bfd != (bfd *)NULL)
645 return bfd_reloc_continue;
646
647 relocation = (target & 0x00ffffff) << 2;
917583ad 648 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
252b5132
RH
649 relocation += symbol->value;
650 relocation += symbol->section->output_section->vma;
651 relocation += symbol->section->output_offset;
652 relocation += reloc_entry->addend;
653 relocation -= input_section->output_section->vma;
654 relocation -= input_section->output_offset;
655 relocation -= addr;
d70910e8 656
252b5132
RH
657 if (relocation & 3)
658 return bfd_reloc_overflow;
659
917583ad 660 /* Check for overflow. */
252b5132
RH
661 if (relocation & 0x02000000)
662 {
663 if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
664 flag = bfd_reloc_overflow;
665 }
dc810e39 666 else if (relocation & ~(bfd_vma) 0x03ffffff)
252b5132
RH
667 flag = bfd_reloc_overflow;
668
669 target &= ~0x00ffffff;
670 target |= (relocation >> 2) & 0x00ffffff;
dc810e39 671 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
252b5132
RH
672
673 /* Now the ARM magic... Change the reloc type so that it is marked as done.
674 Strictly this is only necessary if we are doing a partial relocation. */
675 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
676
677 return flag;
678}
679
680static bfd_reloc_status_type
681coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, input_section,
682 output_bfd, error_message, btype)
683 bfd *abfd;
684 arelent *reloc_entry;
685 asymbol *symbol;
686 PTR data;
687 asection *input_section;
688 bfd *output_bfd;
5f771d47 689 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
690 thumb_pcrel_branchtype btype;
691{
692 bfd_vma relocation = 0;
693 bfd_size_type addr = reloc_entry->address;
694 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
695 bfd_reloc_status_type flag = bfd_reloc_ok;
696 bfd_vma dstmsk;
697 bfd_vma offmsk;
698 bfd_vma signbit;
699
700 /* NOTE: This routine is currently used by GAS, but not by the link
701 phase. */
702
703 switch (btype)
704 {
705 case b9:
706 dstmsk = 0x000000ff;
707 offmsk = 0x000001fe;
708 signbit = 0x00000100;
709 break;
710
711 case b12:
712 dstmsk = 0x000007ff;
713 offmsk = 0x00000ffe;
714 signbit = 0x00000800;
715 break;
716
717 case b23:
718 dstmsk = 0x07ff07ff;
719 offmsk = 0x007fffff;
720 signbit = 0x00400000;
721 break;
722
723 default:
724 abort ();
725 }
d70910e8 726
917583ad 727 /* If this is an undefined symbol, return error. */
252b5132
RH
728 if (symbol->section == &bfd_und_section
729 && (symbol->flags & BSF_WEAK) == 0)
730 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
731
732 /* If the sections are different, and we are doing a partial relocation,
733 just ignore it for now. */
734 if (symbol->section->name != input_section->name
735 && output_bfd != (bfd *)NULL)
736 return bfd_reloc_continue;
737
738 switch (btype)
739 {
740 case b9:
741 case b12:
742 relocation = ((target & dstmsk) << 1);
743 break;
744
745 case b23:
746 if (bfd_big_endian (abfd))
747 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
748 else
749 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
750 break;
751
752 default:
753 abort ();
754 }
755
917583ad 756 relocation = (relocation ^ signbit) - signbit; /* Sign extend. */
252b5132
RH
757 relocation += symbol->value;
758 relocation += symbol->section->output_section->vma;
759 relocation += symbol->section->output_offset;
760 relocation += reloc_entry->addend;
761 relocation -= input_section->output_section->vma;
762 relocation -= input_section->output_offset;
763 relocation -= addr;
764
765 if (relocation & 1)
766 return bfd_reloc_overflow;
767
917583ad 768 /* Check for overflow. */
252b5132
RH
769 if (relocation & signbit)
770 {
771 if ((relocation & ~offmsk) != ~offmsk)
772 flag = bfd_reloc_overflow;
773 }
774 else if (relocation & ~offmsk)
775 flag = bfd_reloc_overflow;
776
777 target &= ~dstmsk;
778 switch (btype)
779 {
780 case b9:
781 case b12:
782 target |= (relocation >> 1);
783 break;
784
785 case b23:
786 if (bfd_big_endian (abfd))
dc810e39
AM
787 target |= (((relocation & 0xfff) >> 1)
788 | ((relocation << 4) & 0x07ff0000));
252b5132 789 else
dc810e39
AM
790 target |= (((relocation & 0xffe) << 15)
791 | ((relocation >> 12) & 0x7ff));
252b5132
RH
792 break;
793
794 default:
795 abort ();
796 }
797
dc810e39 798 bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
252b5132
RH
799
800 /* Now the ARM magic... Change the reloc type so that it is marked as done.
801 Strictly this is only necessary if we are doing a partial relocation. */
802 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
d70910e8 803
917583ad 804 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */
252b5132
RH
805 return flag;
806}
807
7831a775 808#ifndef ARM_WINCE
252b5132
RH
809static bfd_reloc_status_type
810coff_thumb_pcrel_23 (abfd, reloc_entry, symbol, data, input_section,
811 output_bfd, error_message)
812 bfd *abfd;
813 arelent *reloc_entry;
814 asymbol *symbol;
815 PTR data;
816 asection *input_section;
817 bfd *output_bfd;
818 char **error_message;
819{
820 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
dc810e39
AM
821 input_section, output_bfd, error_message,
822 b23);
252b5132
RH
823}
824
825static bfd_reloc_status_type
7831a775 826coff_thumb_pcrel_9 (abfd, reloc_entry, symbol, data, input_section,
252b5132
RH
827 output_bfd, error_message)
828 bfd *abfd;
829 arelent *reloc_entry;
830 asymbol *symbol;
831 PTR data;
832 asection *input_section;
833 bfd *output_bfd;
834 char **error_message;
835{
836 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
dc810e39 837 input_section, output_bfd, error_message,
7831a775 838 b9);
252b5132 839}
7831a775 840#endif /* not ARM_WINCE */
252b5132
RH
841
842static bfd_reloc_status_type
7831a775 843coff_thumb_pcrel_12 (abfd, reloc_entry, symbol, data, input_section,
252b5132
RH
844 output_bfd, error_message)
845 bfd *abfd;
846 arelent *reloc_entry;
847 asymbol *symbol;
848 PTR data;
849 asection *input_section;
850 bfd *output_bfd;
851 char **error_message;
852{
853 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
dc810e39 854 input_section, output_bfd, error_message,
7831a775 855 b12);
252b5132
RH
856}
857
dc810e39 858static const struct reloc_howto_struct *
252b5132
RH
859coff_arm_reloc_type_lookup (abfd, code)
860 bfd * abfd;
861 bfd_reloc_code_real_type code;
862{
af74ae99 863#define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j
d70910e8 864
252b5132
RH
865 if (code == BFD_RELOC_CTOR)
866 switch (bfd_get_arch_info (abfd)->bits_per_address)
867 {
868 case 32:
869 code = BFD_RELOC_32;
870 break;
917583ad 871 default:
dc810e39 872 return (const struct reloc_howto_struct *) 0;
252b5132
RH
873 }
874
875 switch (code)
876 {
17505c5c
NC
877#ifdef ARM_WINCE
878 ASTD (BFD_RELOC_32, ARM_32);
879 ASTD (BFD_RELOC_RVA, ARM_RVA32);
880 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
881 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
882#else
252b5132
RH
883 ASTD (BFD_RELOC_8, ARM_8);
884 ASTD (BFD_RELOC_16, ARM_16);
885 ASTD (BFD_RELOC_32, ARM_32);
886 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
077b8428 887 ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26);
252b5132
RH
888 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
889 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
890 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
891 ASTD (BFD_RELOC_RVA, ARM_RVA32);
892 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
893 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
894 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
f8f3c6cc 895 ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23);
d70910e8 896#endif
dc810e39 897 default: return (const struct reloc_howto_struct *) 0;
252b5132
RH
898 }
899}
900
901#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (2)
902#define COFF_PAGE_SIZE 0x1000
903/* Turn a howto into a reloc nunmber */
904
905#define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
906#define BADMAG(x) ARMBADMAG(x)
907#define ARM 1 /* Customize coffcode.h */
908
7831a775 909#ifndef ARM_WINCE
2106126f 910/* Make sure that the 'r_offset' field is copied properly
830629ab 911 so that identical binaries will compare the same. */
2106126f
NC
912#define SWAP_IN_RELOC_OFFSET H_GET_32
913#define SWAP_OUT_RELOC_OFFSET H_PUT_32
7831a775 914#endif
2106126f 915
252b5132
RH
916/* Extend the coff_link_hash_table structure with a few ARM specific fields.
917 This allows us to store global data here without actually creating any
918 global variables, which is a no-no in the BFD world. */
919struct coff_arm_link_hash_table
917583ad
NC
920 {
921 /* The original coff_link_hash_table structure. MUST be first field. */
922 struct coff_link_hash_table root;
d70910e8 923
5c4491d3 924 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 925 bfd_size_type thumb_glue_size;
d70910e8 926
5c4491d3 927 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 928 bfd_size_type arm_glue_size;
252b5132 929
5c4491d3 930 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 931 bfd * bfd_of_glue_owner;
252b5132 932
917583ad
NC
933 /* Support interworking with old, non-interworking aware ARM code. */
934 int support_old_code;
252b5132
RH
935};
936
937/* Get the ARM coff linker hash table from a link_info structure. */
938#define coff_arm_hash_table(info) \
939 ((struct coff_arm_link_hash_table *) ((info)->hash))
940
941/* Create an ARM coff linker hash table. */
942
943static struct bfd_link_hash_table *
944coff_arm_link_hash_table_create (abfd)
945 bfd * abfd;
946{
947 struct coff_arm_link_hash_table * ret;
dc810e39 948 bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
252b5132 949
e2d34d7d 950 ret = (struct coff_arm_link_hash_table *) bfd_malloc (amt);
252b5132
RH
951 if (ret == (struct coff_arm_link_hash_table *) NULL)
952 return NULL;
953
954 if (! _bfd_coff_link_hash_table_init
955 (& ret->root, abfd, _bfd_coff_link_hash_newfunc))
956 {
e2d34d7d 957 free (ret);
252b5132
RH
958 return (struct bfd_link_hash_table *) NULL;
959 }
960
961 ret->thumb_glue_size = 0;
962 ret->arm_glue_size = 0;
963 ret->bfd_of_glue_owner = NULL;
964
965 return & ret->root.root;
966}
967
271025eb 968static void
252b5132
RH
969arm_emit_base_file_entry (info, output_bfd, input_section, reloc_offset)
970 struct bfd_link_info *info;
971 bfd *output_bfd;
972 asection *input_section;
973 bfd_vma reloc_offset;
974{
975 bfd_vma addr = reloc_offset
976 - input_section->vma
977 + input_section->output_offset
978 + input_section->output_section->vma;
979
917583ad
NC
980 if (coff_data (output_bfd)->pe)
981 addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
982 fwrite (& addr, 1, sizeof (addr), (FILE *) info->base_file);
252b5132
RH
983
984}
985\f
7831a775 986#ifndef ARM_WINCE
252b5132
RH
987/* The thumb form of a long branch is a bit finicky, because the offset
988 encoding is split over two fields, each in it's own instruction. They
d70910e8 989 can occur in any order. So given a thumb form of long branch, and an
252b5132 990 offset, insert the offset into the thumb branch and return finished
d70910e8 991 instruction.
252b5132 992
d70910e8 993 It takes two thumb instructions to encode the target address. Each has
5c4491d3 994 11 bits to invest. The upper 11 bits are stored in one (identified by
d70910e8
KH
995 H-0.. see below), the lower 11 bits are stored in the other (identified
996 by H-1).
252b5132 997
d70910e8 998 Combine together and shifted left by 1 (it's a half word address) and
252b5132
RH
999 there you have it.
1000
1001 Op: 1111 = F,
1002 H-0, upper address-0 = 000
1003 Op: 1111 = F,
1004 H-1, lower address-0 = 800
1005
d70910e8 1006 They can be ordered either way, but the arm tools I've seen always put
252b5132
RH
1007 the lower one first. It probably doesn't matter. krk@cygnus.com
1008
1009 XXX: Actually the order does matter. The second instruction (H-1)
1010 moves the computed address into the PC, so it must be the second one
1011 in the sequence. The problem, however is that whilst little endian code
1012 stores the instructions in HI then LOW order, big endian code does the
917583ad 1013 reverse. nickc@cygnus.com. */
252b5132
RH
1014
1015#define LOW_HI_ORDER 0xF800F000
1016#define HI_LOW_ORDER 0xF000F800
1017
1018static insn32
1019insert_thumb_branch (br_insn, rel_off)
1020 insn32 br_insn;
1021 int rel_off;
1022{
1023 unsigned int low_bits;
1024 unsigned int high_bits;
1025
252b5132
RH
1026 BFD_ASSERT((rel_off & 1) != 1);
1027
1028 rel_off >>= 1; /* half word aligned address */
1029 low_bits = rel_off & 0x000007FF; /* the bottom 11 bits */
1030 high_bits = (rel_off >> 11) & 0x000007FF; /* the top 11 bits */
1031
1032 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
1033 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
1034 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
1035 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
1036 else
dc810e39
AM
1037 /* FIXME: the BFD library should never abort except for internal errors
1038 - it should return an error status. */
917583ad 1039 abort (); /* Error - not a valid branch instruction form. */
252b5132
RH
1040
1041 return br_insn;
1042}
7831a775 1043
252b5132
RH
1044\f
1045static struct coff_link_hash_entry *
1046find_thumb_glue (info, name, input_bfd)
dc810e39
AM
1047 struct bfd_link_info *info;
1048 const char *name;
1049 bfd *input_bfd;
252b5132 1050{
dc810e39
AM
1051 char *tmp_name;
1052 struct coff_link_hash_entry *myh;
1053 bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
252b5132 1054
dc810e39 1055 tmp_name = (char *) bfd_malloc (amt);
252b5132
RH
1056
1057 BFD_ASSERT (tmp_name);
1058
1059 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
d70910e8 1060
252b5132 1061 myh = coff_link_hash_lookup
b34976b6 1062 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
d70910e8 1063
252b5132
RH
1064 if (myh == NULL)
1065 /* xgettext:c-format */
d003868e
AM
1066 _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"),
1067 input_bfd, tmp_name, name);
d70910e8 1068
252b5132
RH
1069 free (tmp_name);
1070
1071 return myh;
1072}
7831a775 1073#endif /* not ARM_WINCE */
252b5132
RH
1074
1075static struct coff_link_hash_entry *
1076find_arm_glue (info, name, input_bfd)
dc810e39
AM
1077 struct bfd_link_info *info;
1078 const char *name;
1079 bfd *input_bfd;
252b5132 1080{
dc810e39 1081 char *tmp_name;
252b5132 1082 struct coff_link_hash_entry * myh;
dc810e39 1083 bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
252b5132 1084
dc810e39 1085 tmp_name = (char *) bfd_malloc (amt);
252b5132
RH
1086
1087 BFD_ASSERT (tmp_name);
1088
1089 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
d70910e8 1090
252b5132 1091 myh = coff_link_hash_lookup
b34976b6 1092 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
1093
1094 if (myh == NULL)
1095 /* xgettext:c-format */
d003868e
AM
1096 _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"),
1097 input_bfd, tmp_name, name);
d70910e8 1098
252b5132
RH
1099 free (tmp_name);
1100
1101 return myh;
1102}
1103
1104/*
1105 ARM->Thumb glue:
1106
1107 .arm
1108 __func_from_arm:
1109 ldr r12, __func_addr
1110 bx r12
1111 __func_addr:
1112 .word func @ behave as if you saw a ARM_32 reloc
1113*/
1114
1115#define ARM2THUMB_GLUE_SIZE 12
1116static const insn32 a2t1_ldr_insn = 0xe59fc000;
1117static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
1118static const insn32 a2t3_func_addr_insn = 0x00000001;
1119
252b5132
RH
1120/*
1121 Thumb->ARM: Thumb->(non-interworking aware) ARM
1122
1123 .thumb .thumb
1124 .align 2 .align 2
1125 __func_from_thumb: __func_from_thumb:
1126 bx pc push {r6, lr}
1127 nop ldr r6, __func_addr
1128 .arm mov lr, pc
1129 __func_change_to_arm: bx r6
1130 b func .arm
1131 __func_back_to_thumb:
1132 ldmia r13! {r6, lr}
1133 bx lr
1134 __func_addr:
d70910e8 1135 .word func
252b5132
RH
1136*/
1137
1138#define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8)
1139static const insn16 t2a1_bx_pc_insn = 0x4778;
1140static const insn16 t2a2_noop_insn = 0x46c0;
1141static const insn32 t2a3_b_insn = 0xea000000;
1142
252b5132
RH
1143static const insn16 t2a1_push_insn = 0xb540;
1144static const insn16 t2a2_ldr_insn = 0x4e03;
1145static const insn16 t2a3_mov_insn = 0x46fe;
1146static const insn16 t2a4_bx_insn = 0x4730;
1147static const insn32 t2a5_pop_insn = 0xe8bd4040;
1148static const insn32 t2a6_bx_insn = 0xe12fff1e;
1149
1150/* TODO:
1151 We should really create new local (static) symbols in destination
1152 object for each stub we create. We should also create local
1153 (static) symbols within the stubs when switching between ARM and
1154 Thumb code. This will ensure that the debugger and disassembler
1155 can present a better view of stubs.
1156
1157 We can treat stubs like literal sections, and for the THUMB9 ones
1158 (short addressing range) we should be able to insert the stubs
1159 between sections. i.e. the simplest approach (since relocations
1160 are done on a section basis) is to dump the stubs at the end of
1161 processing a section. That way we can always try and minimise the
1162 offset to and from a stub. However, this does not map well onto
1163 the way that the linker/BFD does its work: mapping all input
1164 sections to output sections via the linker script before doing
1165 all the processing.
1166
1167 Unfortunately it may be easier to just to disallow short range
1168 Thumb->ARM stubs (i.e. no conditional inter-working branches,
1169 only branch-and-link (BL) calls. This will simplify the processing
1170 since we can then put all of the stubs into their own section.
1171
1172 TODO:
1173 On a different subject, rather than complaining when a
1174 branch cannot fit in the number of bits available for the
1175 instruction we should generate a trampoline stub (needed to
1176 address the complete 32bit address space). */
1177
d70910e8 1178/* The standard COFF backend linker does not cope with the special
252b5132
RH
1179 Thumb BRANCH23 relocation. The alternative would be to split the
1180 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
d70910e8 1181 bit simpler simply providing our own relocation driver. */
252b5132
RH
1182
1183/* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
1184 This code is a very slightly modified copy of
1185 _bfd_coff_generic_relocate_section. It would be a much more
1186 maintainable solution to have a MACRO that could be expanded within
1187 _bfd_coff_generic_relocate_section that would only be provided for
1188 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that
1189 is different from the original. */
1190
b34976b6 1191static bfd_boolean
252b5132
RH
1192coff_arm_relocate_section (output_bfd, info, input_bfd, input_section,
1193 contents, relocs, syms, sections)
1194 bfd *output_bfd;
1195 struct bfd_link_info *info;
1196 bfd *input_bfd;
1197 asection *input_section;
1198 bfd_byte *contents;
1199 struct internal_reloc *relocs;
1200 struct internal_syment *syms;
1201 asection **sections;
1202{
1203 struct internal_reloc * rel;
1204 struct internal_reloc * relend;
07515404 1205 bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section);
252b5132
RH
1206
1207 rel = relocs;
1208 relend = rel + input_section->reloc_count;
1209
1210 for (; rel < relend; rel++)
1211 {
1212 int done = 0;
1213 long symndx;
1214 struct coff_link_hash_entry * h;
1215 struct internal_syment * sym;
1216 bfd_vma addend;
1217 bfd_vma val;
1218 reloc_howto_type * howto;
1219 bfd_reloc_status_type rstat;
1220 bfd_vma h_val;
1221
1222 symndx = rel->r_symndx;
1223
1224 if (symndx == -1)
1225 {
1226 h = NULL;
1227 sym = NULL;
1228 }
1229 else
d70910e8 1230 {
252b5132
RH
1231 h = obj_coff_sym_hashes (input_bfd)[symndx];
1232 sym = syms + symndx;
1233 }
1234
1235 /* COFF treats common symbols in one of two ways. Either the
1236 size of the symbol is included in the section contents, or it
1237 is not. We assume that the size is not included, and force
1238 the rtype_to_howto function to adjust the addend as needed. */
1239
1240 if (sym != NULL && sym->n_scnum != 0)
1241 addend = - sym->n_value;
1242 else
1243 addend = 0;
1244
252b5132
RH
1245 howto = coff_rtype_to_howto (input_bfd, input_section, rel, h,
1246 sym, &addend);
1247 if (howto == NULL)
b34976b6 1248 return FALSE;
252b5132
RH
1249
1250 /* The relocation_section function will skip pcrel_offset relocs
1049f94e 1251 when doing a relocatable link. However, we want to convert
d21356d8 1252 ARM_26 to ARM_26D relocs if possible. We return a fake howto in
252b5132 1253 this case without pcrel_offset set, and adjust the addend to
44e88952
NC
1254 compensate. 'partial_inplace' is also set, since we want 'done'
1255 relocations to be reflected in section's data. */
252b5132
RH
1256 if (rel->r_type == ARM_26
1257 && h != NULL
1049f94e 1258 && info->relocatable
252b5132
RH
1259 && (h->root.type == bfd_link_hash_defined
1260 || h->root.type == bfd_link_hash_defweak)
dc810e39
AM
1261 && (h->root.u.def.section->output_section
1262 == input_section->output_section))
252b5132 1263 {
d70910e8 1264 static reloc_howto_type fake_arm26_reloc =
252b5132
RH
1265 HOWTO (ARM_26,
1266 2,
1267 2,
1268 24,
b34976b6 1269 TRUE,
252b5132
RH
1270 0,
1271 complain_overflow_signed,
1272 aoutarm_fix_pcrel_26 ,
1273 "ARM_26",
44e88952 1274 TRUE,
252b5132 1275 0x00ffffff,
d70910e8 1276 0x00ffffff,
b34976b6 1277 FALSE);
252b5132
RH
1278
1279 addend -= rel->r_vaddr - input_section->vma;
44e88952
NC
1280#ifdef ARM_WINCE
1281 /* FIXME: I don't know why, but the hack is necessary for correct
1282 generation of bl's instruction offset. */
1283 addend -= 8;
1284#endif
252b5132
RH
1285 howto = &fake_arm26_reloc;
1286 }
1287
17505c5c
NC
1288#ifdef ARM_WINCE
1289 /* MS ARM-CE makes the reloc relative to the opcode's pc, not
d70910e8 1290 the next opcode's pc, so is off by one. */
17505c5c 1291#endif
d70910e8 1292
1049f94e 1293 /* If we are doing a relocatable link, then we can just ignore
252b5132 1294 a PC relative reloc that is pcrel_offset. It will already
1049f94e 1295 have the correct value. If this is not a relocatable link,
252b5132
RH
1296 then we should ignore the symbol value. */
1297 if (howto->pc_relative && howto->pcrel_offset)
1298 {
1049f94e 1299 if (info->relocatable)
252b5132 1300 continue;
87748b32
NC
1301 /* FIXME - it is not clear which targets need this next test
1302 and which do not. It is known that it is needed for the
d8adc60f 1303 VxWorks and EPOC-PE targets, but it is also known that it
5c4491d3 1304 was suppressed for other ARM targets. This ought to be
d8adc60f
NC
1305 sorted out one day. */
1306#ifdef ARM_COFF_BUGFIX
87748b32
NC
1307 /* We must not ignore the symbol value. If the symbol is
1308 within the same section, the relocation should have already
1309 been fixed, but if it is not, we'll be handed a reloc into
1310 the beginning of the symbol's section, so we must not cancel
1311 out the symbol's value, otherwise we'll be adding it in
1312 twice. */
252b5132
RH
1313 if (sym != NULL && sym->n_scnum != 0)
1314 addend += sym->n_value;
ed1de528 1315#endif
252b5132
RH
1316 }
1317
1318 val = 0;
1319
1320 if (h == NULL)
1321 {
1322 asection *sec;
1323
1324 if (symndx == -1)
1325 {
1326 sec = bfd_abs_section_ptr;
1327 val = 0;
1328 }
1329 else
1330 {
1331 sec = sections[symndx];
1332 val = (sec->output_section->vma
1333 + sec->output_offset
1334 + sym->n_value
1335 - sec->vma);
1336 }
1337 }
1338 else
1339 {
252b5132
RH
1340 /* We don't output the stubs if we are generating a
1341 relocatable output file, since we may as well leave the
1342 stub generation to the final linker pass. If we fail to
1343 verify that the name is defined, we'll try to build stubs
d70910e8 1344 for an undefined name... */
1049f94e 1345 if (! info->relocatable
252b5132
RH
1346 && ( h->root.type == bfd_link_hash_defined
1347 || h->root.type == bfd_link_hash_defweak))
1348 {
1349 asection * h_sec = h->root.u.def.section;
1350 const char * name = h->root.root.string;
d70910e8 1351
252b5132
RH
1352 /* h locates the symbol referenced in the reloc. */
1353 h_val = (h->root.u.def.value
1354 + h_sec->output_section->vma
1355 + h_sec->output_offset);
1356
1357 if (howto->type == ARM_26)
1358 {
1359 if ( h->class == C_THUMBSTATFUNC
1360 || h->class == C_THUMBEXTFUNC)
1361 {
917583ad 1362 /* Arm code calling a Thumb function. */
252b5132 1363 unsigned long int tmp;
dc810e39 1364 bfd_vma my_offset;
252b5132
RH
1365 asection * s;
1366 long int ret_offset;
d70910e8 1367 struct coff_link_hash_entry * myh;
252b5132 1368 struct coff_arm_link_hash_table * globals;
d70910e8 1369
252b5132
RH
1370 myh = find_arm_glue (info, name, input_bfd);
1371 if (myh == NULL)
b34976b6 1372 return FALSE;
252b5132
RH
1373
1374 globals = coff_arm_hash_table (info);
1375
1376 BFD_ASSERT (globals != NULL);
1377 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1378
252b5132 1379 my_offset = myh->root.u.def.value;
d70910e8
KH
1380
1381 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
252b5132
RH
1382 ARM2THUMB_GLUE_SECTION_NAME);
1383 BFD_ASSERT (s != NULL);
1384 BFD_ASSERT (s->contents != NULL);
1385 BFD_ASSERT (s->output_section != NULL);
1386
1387 if ((my_offset & 0x01) == 0x01)
1388 {
1389 if (h_sec->owner != NULL
1390 && INTERWORK_SET (h_sec->owner)
1391 && ! INTERWORK_FLAG (h_sec->owner))
d003868e
AM
1392 _bfd_error_handler
1393 /* xgettext:c-format */
1394 (_("%B(%s): warning: interworking not enabled.\n"
1395 " first occurrence: %B: arm call to thumb"),
1396 h_sec->owner, input_bfd, name);
252b5132
RH
1397
1398 --my_offset;
1399 myh->root.u.def.value = my_offset;
1400
dc810e39 1401 bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn,
252b5132 1402 s->contents + my_offset);
d70910e8 1403
dc810e39 1404 bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn,
252b5132 1405 s->contents + my_offset + 4);
d70910e8 1406
252b5132
RH
1407 /* It's a thumb address. Add the low order bit. */
1408 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn,
1409 s->contents + my_offset + 8);
1410
1411 if (info->base_file)
d70910e8 1412 arm_emit_base_file_entry (info, output_bfd, s,
dc810e39 1413 my_offset + 8);
252b5132
RH
1414
1415 }
1416
1417 BFD_ASSERT (my_offset <= globals->arm_glue_size);
1418
1419 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1420 - input_section->vma);
d70910e8 1421
252b5132
RH
1422 tmp = tmp & 0xFF000000;
1423
d70910e8 1424 /* Somehow these are both 4 too far, so subtract 8. */
252b5132
RH
1425 ret_offset =
1426 s->output_offset
d70910e8 1427 + my_offset
252b5132
RH
1428 + s->output_section->vma
1429 - (input_section->output_offset
d70910e8 1430 + input_section->output_section->vma
252b5132
RH
1431 + rel->r_vaddr)
1432 - 8;
1433
1434 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
d70910e8 1435
dc810e39
AM
1436 bfd_put_32 (output_bfd, (bfd_vma) tmp,
1437 contents + rel->r_vaddr - input_section->vma);
252b5132
RH
1438 done = 1;
1439 }
1440 }
d70910e8 1441
17505c5c 1442#ifndef ARM_WINCE
917583ad 1443 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */
252b5132
RH
1444 else if (howto->type == ARM_THUMB23)
1445 {
d70910e8 1446 if ( h->class == C_EXT
252b5132
RH
1447 || h->class == C_STAT
1448 || h->class == C_LABEL)
1449 {
1450 /* Thumb code calling an ARM function */
1451 asection * s = 0;
dc810e39 1452 bfd_vma my_offset;
252b5132
RH
1453 unsigned long int tmp;
1454 long int ret_offset;
1455 struct coff_link_hash_entry * myh;
1456 struct coff_arm_link_hash_table * globals;
1457
1458 myh = find_thumb_glue (info, name, input_bfd);
1459 if (myh == NULL)
b34976b6 1460 return FALSE;
252b5132
RH
1461
1462 globals = coff_arm_hash_table (info);
d70910e8 1463
252b5132
RH
1464 BFD_ASSERT (globals != NULL);
1465 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1466
252b5132 1467 my_offset = myh->root.u.def.value;
d70910e8
KH
1468
1469 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
252b5132 1470 THUMB2ARM_GLUE_SECTION_NAME);
d70910e8 1471
252b5132
RH
1472 BFD_ASSERT (s != NULL);
1473 BFD_ASSERT (s->contents != NULL);
1474 BFD_ASSERT (s->output_section != NULL);
d70910e8 1475
252b5132
RH
1476 if ((my_offset & 0x01) == 0x01)
1477 {
1478 if (h_sec->owner != NULL
1479 && INTERWORK_SET (h_sec->owner)
1480 && ! INTERWORK_FLAG (h_sec->owner)
1481 && ! globals->support_old_code)
d003868e
AM
1482 _bfd_error_handler
1483 /* xgettext:c-format */
1484 (_("%B(%s): warning: interworking not enabled.\n"
1485 " first occurrence: %B: thumb call to arm\n"
1486 " consider relinking with --support-old-code enabled"),
1487 h_sec->owner, input_bfd, name);
d70910e8 1488
252b5132
RH
1489 -- my_offset;
1490 myh->root.u.def.value = my_offset;
1491
1492 if (globals->support_old_code)
1493 {
dc810e39 1494 bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn,
252b5132 1495 s->contents + my_offset);
d70910e8 1496
dc810e39 1497 bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn,
252b5132
RH
1498 s->contents + my_offset + 2);
1499
dc810e39 1500 bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn,
252b5132
RH
1501 s->contents + my_offset + 4);
1502
dc810e39 1503 bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn,
252b5132 1504 s->contents + my_offset + 6);
d70910e8 1505
dc810e39 1506 bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn,
252b5132 1507 s->contents + my_offset + 8);
d70910e8 1508
dc810e39 1509 bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn,
252b5132 1510 s->contents + my_offset + 12);
d70910e8 1511
252b5132
RH
1512 /* Store the address of the function in the last word of the stub. */
1513 bfd_put_32 (output_bfd, h_val,
1514 s->contents + my_offset + 16);
fa0e42e4
CM
1515
1516 if (info->base_file)
dc810e39
AM
1517 arm_emit_base_file_entry (info, output_bfd, s,
1518 my_offset + 16);
252b5132
RH
1519 }
1520 else
1521 {
dc810e39 1522 bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn,
252b5132 1523 s->contents + my_offset);
d70910e8 1524
dc810e39 1525 bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn,
252b5132 1526 s->contents + my_offset + 2);
d70910e8 1527
252b5132 1528 ret_offset =
917583ad 1529 ((bfd_signed_vma) h_val) /* Address of destination of the stub. */
252b5132
RH
1530 - ((bfd_signed_vma)
1531 (s->output_offset /* Offset from the start of the current section to the start of the stubs. */
1532 + my_offset /* Offset of the start of this stub from the start of the stubs. */
1533 + s->output_section->vma) /* Address of the start of the current section. */
1534 + 4 /* The branch instruction is 4 bytes into the stub. */
1535 + 8); /* ARM branches work from the pc of the instruction + 8. */
d70910e8 1536
252b5132 1537 bfd_put_32 (output_bfd,
dc810e39 1538 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
252b5132
RH
1539 s->contents + my_offset + 4);
1540
252b5132
RH
1541 }
1542 }
1543
1544 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
1545
1546 /* Now go back and fix up the original BL insn to point
1547 to here. */
1548 ret_offset =
1549 s->output_offset
1550 + my_offset
1551 - (input_section->output_offset
1552 + rel->r_vaddr)
1553 -4;
d70910e8 1554
252b5132
RH
1555 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr
1556 - input_section->vma);
1557
1558 bfd_put_32 (output_bfd,
dc810e39
AM
1559 (bfd_vma) insert_thumb_branch (tmp,
1560 ret_offset),
1561 contents + rel->r_vaddr - input_section->vma);
d70910e8 1562
252b5132
RH
1563 done = 1;
1564 }
1565 }
17505c5c 1566#endif
252b5132 1567 }
d70910e8 1568
252b5132
RH
1569 /* If the relocation type and destination symbol does not
1570 fall into one of the above categories, then we can just
d70910e8 1571 perform a direct link. */
252b5132
RH
1572
1573 if (done)
1574 rstat = bfd_reloc_ok;
d70910e8 1575 else
252b5132
RH
1576 if ( h->root.type == bfd_link_hash_defined
1577 || h->root.type == bfd_link_hash_defweak)
1578 {
1579 asection *sec;
1580
1581 sec = h->root.u.def.section;
1582 val = (h->root.u.def.value
1583 + sec->output_section->vma
1584 + sec->output_offset);
1585 }
1586
1049f94e 1587 else if (! info->relocatable)
252b5132
RH
1588 {
1589 if (! ((*info->callbacks->undefined_symbol)
1590 (info, h->root.root.string, input_bfd, input_section,
b34976b6
AM
1591 rel->r_vaddr - input_section->vma, TRUE)))
1592 return FALSE;
252b5132
RH
1593 }
1594 }
1595
1596 if (info->base_file)
1597 {
d70910e8 1598 /* Emit a reloc if the backend thinks it needs it. */
252b5132 1599 if (sym && pe_data(output_bfd)->in_reloc_p(output_bfd, howto))
dc810e39
AM
1600 arm_emit_base_file_entry (info, output_bfd, input_section,
1601 rel->r_vaddr);
252b5132 1602 }
d70910e8 1603
252b5132
RH
1604 if (done)
1605 rstat = bfd_reloc_ok;
17505c5c 1606#ifndef ARM_WINCE
252b5132 1607 /* Only perform this fix during the final link, not a relocatable link. nickc@cygnus.com */
1049f94e 1608 else if (! info->relocatable
252b5132
RH
1609 && howto->type == ARM_THUMB23)
1610 {
1611 /* This is pretty much a copy of what the default
1612 _bfd_final_link_relocate and _bfd_relocate_contents
1613 routines do to perform a relocation, with special
1614 processing for the split addressing of the Thumb BL
1615 instruction. Again, it would probably be simpler adding a
1616 ThumbBRANCH23 specific macro expansion into the default
1617 code. */
d70910e8 1618
252b5132 1619 bfd_vma address = rel->r_vaddr - input_section->vma;
d70910e8 1620
07515404 1621 if (address > high_address)
252b5132
RH
1622 rstat = bfd_reloc_outofrange;
1623 else
1624 {
b34976b6
AM
1625 bfd_vma relocation = val + addend;
1626 int size = bfd_get_reloc_size (howto);
1627 bfd_boolean overflow = FALSE;
1628 bfd_byte *location = contents + address;
1629 bfd_vma x = bfd_get_32 (input_bfd, location);
1630 bfd_vma src_mask = 0x007FFFFE;
1631 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
1632 bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
1633 bfd_vma check;
1634 bfd_signed_vma signed_check;
1635 bfd_vma add;
1636 bfd_signed_vma signed_add;
252b5132
RH
1637
1638 BFD_ASSERT (size == 4);
d70910e8 1639
4f3c3dbb 1640 /* howto->pc_relative should be TRUE for type 14 BRANCH23. */
252b5132
RH
1641 relocation -= (input_section->output_section->vma
1642 + input_section->output_offset);
d70910e8 1643
4f3c3dbb 1644 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */
252b5132 1645 relocation -= address;
d70910e8
KH
1646
1647 /* No need to negate the relocation with BRANCH23. */
252b5132
RH
1648 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */
1649 /* howto->rightshift == 1 */
d70910e8 1650
4f3c3dbb 1651 /* Drop unwanted bits from the value we are relocating to. */
252b5132 1652 check = relocation >> howto->rightshift;
d70910e8 1653
252b5132
RH
1654 /* If this is a signed value, the rightshift just dropped
1655 leading 1 bits (assuming twos complement). */
1656 if ((bfd_signed_vma) relocation >= 0)
1657 signed_check = check;
1658 else
1659 signed_check = (check
1660 | ((bfd_vma) - 1
1661 & ~((bfd_vma) - 1 >> howto->rightshift)));
d70910e8 1662
252b5132
RH
1663 /* Get the value from the object file. */
1664 if (bfd_big_endian (input_bfd))
4f3c3dbb 1665 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
252b5132 1666 else
4f3c3dbb 1667 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));
252b5132
RH
1668
1669 /* Get the value from the object file with an appropriate sign.
1670 The expression involving howto->src_mask isolates the upper
1671 bit of src_mask. If that bit is set in the value we are
1672 adding, it is negative, and we subtract out that number times
1673 two. If src_mask includes the highest possible bit, then we
1674 can not get the upper bit, but that does not matter since
1675 signed_add needs no adjustment to become negative in that
1676 case. */
252b5132 1677 signed_add = add;
d70910e8 1678
252b5132
RH
1679 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
1680 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;
d70910e8 1681
4f3c3dbb 1682 /* howto->bitpos == 0 */
252b5132
RH
1683 /* Add the value from the object file, shifted so that it is a
1684 straight number. */
252b5132 1685 signed_check += signed_add;
4f3c3dbb 1686 relocation += signed_add;
252b5132
RH
1687
1688 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);
1689
1690 /* Assumes two's complement. */
1691 if ( signed_check > reloc_signed_max
1692 || signed_check < reloc_signed_min)
b34976b6 1693 overflow = TRUE;
d70910e8 1694
c62e1cc3
NC
1695 /* Put the relocation into the correct bits.
1696 For a BLX instruction, make sure that the relocation is rounded up
1697 to a word boundary. This follows the semantics of the instruction
1698 which specifies that bit 1 of the target address will come from bit
1699 1 of the base address. */
252b5132 1700 if (bfd_big_endian (input_bfd))
c62e1cc3
NC
1701 {
1702 if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
1703 relocation += 2;
1704 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
1705 }
252b5132 1706 else
c62e1cc3
NC
1707 {
1708 if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
1709 relocation += 2;
1710 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
1711 }
d70910e8 1712
4f3c3dbb 1713 /* Add the relocation to the correct bits of X. */
252b5132
RH
1714 x = ((x & ~howto->dst_mask) | relocation);
1715
4f3c3dbb 1716 /* Put the relocated value back in the object file. */
252b5132
RH
1717 bfd_put_32 (input_bfd, x, location);
1718
1719 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
1720 }
1721 }
17505c5c 1722#endif
252b5132 1723 else
1e7fef1d
NC
1724 if (info->relocatable && ! howto->partial_inplace)
1725 rstat = bfd_reloc_ok;
1726 else
1727 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
1728 contents,
1729 rel->r_vaddr - input_section->vma,
1730 val, addend);
d70910e8 1731 /* FIXME:
252b5132
RH
1732 Is this the best way to fix up thumb addresses? krk@cygnus.com
1733 Probably not, but it works, and if it works it don't need fixing! nickc@cygnus.com */
1734 /* Only perform this fix during the final link, not a relocatable link. nickc@cygnus.com */
1049f94e 1735 if (! info->relocatable
b44267fd 1736 && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32))
252b5132
RH
1737 {
1738 /* Determine if we need to set the bottom bit of a relocated address
1739 because the address is the address of a Thumb code symbol. */
d70910e8 1740
b34976b6 1741 int patchit = FALSE;
d70910e8 1742
252b5132
RH
1743 if (h != NULL
1744 && ( h->class == C_THUMBSTATFUNC
1745 || h->class == C_THUMBEXTFUNC))
1746 {
b34976b6 1747 patchit = TRUE;
252b5132
RH
1748 }
1749 else if (sym != NULL
1750 && sym->n_scnum > N_UNDEF)
1751 {
1752 /* No hash entry - use the symbol instead. */
1753
1754 if ( sym->n_sclass == C_THUMBSTATFUNC
1755 || sym->n_sclass == C_THUMBEXTFUNC)
b34976b6 1756 patchit = TRUE;
252b5132
RH
1757 }
1758
1759 if (patchit)
1760 {
1761 bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
1762 bfd_vma x = bfd_get_32 (input_bfd, location);
1763
1764 bfd_put_32 (input_bfd, x | 1, location);
1765 }
1766 }
d70910e8 1767
252b5132
RH
1768 switch (rstat)
1769 {
1770 default:
1771 abort ();
1772 case bfd_reloc_ok:
1773 break;
1774 case bfd_reloc_outofrange:
1775 (*_bfd_error_handler)
d003868e
AM
1776 (_("%B: bad reloc address 0x%lx in section `%A'"),
1777 input_bfd, input_section, (unsigned long) rel->r_vaddr);
b34976b6 1778 return FALSE;
252b5132
RH
1779 case bfd_reloc_overflow:
1780 {
1781 const char *name;
1782 char buf[SYMNMLEN + 1];
1783
1784 if (symndx == -1)
1785 name = "*ABS*";
1786 else if (h != NULL)
dfeffb9f 1787 name = NULL;
252b5132
RH
1788 else
1789 {
1790 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
1791 if (name == NULL)
b34976b6 1792 return FALSE;
252b5132
RH
1793 }
1794
1795 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
1796 (info, (h ? &h->root : NULL), name, howto->name,
1797 (bfd_vma) 0, input_bfd, input_section,
1798 rel->r_vaddr - input_section->vma)))
b34976b6 1799 return FALSE;
252b5132
RH
1800 }
1801 }
1802 }
1803
b34976b6 1804 return TRUE;
252b5132
RH
1805}
1806
e049a0de
ILT
1807#ifndef COFF_IMAGE_WITH_PE
1808
b34976b6 1809bfd_boolean
d70910e8 1810bfd_arm_allocate_interworking_sections (info)
252b5132
RH
1811 struct bfd_link_info * info;
1812{
1813 asection * s;
1814 bfd_byte * foo;
1815 struct coff_arm_link_hash_table * globals;
252b5132
RH
1816
1817 globals = coff_arm_hash_table (info);
d70910e8 1818
252b5132
RH
1819 BFD_ASSERT (globals != NULL);
1820
1821 if (globals->arm_glue_size != 0)
1822 {
1823 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1824
252b5132
RH
1825 s = bfd_get_section_by_name
1826 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1827
1828 BFD_ASSERT (s != NULL);
d70910e8 1829
dc810e39
AM
1830 foo = (bfd_byte *) bfd_alloc (globals->bfd_of_glue_owner,
1831 globals->arm_glue_size);
d70910e8 1832
eea6121a 1833 s->size = globals->arm_glue_size;
252b5132
RH
1834 s->contents = foo;
1835 }
1836
1837 if (globals->thumb_glue_size != 0)
1838 {
1839 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
d70910e8 1840
252b5132
RH
1841 s = bfd_get_section_by_name
1842 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1843
1844 BFD_ASSERT (s != NULL);
d70910e8 1845
dc810e39
AM
1846 foo = (bfd_byte *) bfd_alloc (globals->bfd_of_glue_owner,
1847 globals->thumb_glue_size);
d70910e8 1848
eea6121a 1849 s->size = globals->thumb_glue_size;
252b5132
RH
1850 s->contents = foo;
1851 }
1852
b34976b6 1853 return TRUE;
252b5132
RH
1854}
1855
1856static void
1857record_arm_to_thumb_glue (info, h)
1858 struct bfd_link_info * info;
1859 struct coff_link_hash_entry * h;
1860{
1861 const char * name = h->root.root.string;
1862 register asection * s;
1863 char * tmp_name;
1864 struct coff_link_hash_entry * myh;
14a793b2 1865 struct bfd_link_hash_entry * bh;
252b5132 1866 struct coff_arm_link_hash_table * globals;
dc810e39
AM
1867 bfd_vma val;
1868 bfd_size_type amt;
252b5132
RH
1869
1870 globals = coff_arm_hash_table (info);
1871
1872 BFD_ASSERT (globals != NULL);
1873 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1874
1875 s = bfd_get_section_by_name
1876 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1877
1878 BFD_ASSERT (s != NULL);
1879
dc810e39
AM
1880 amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1;
1881 tmp_name = (char *) bfd_malloc (amt);
252b5132
RH
1882
1883 BFD_ASSERT (tmp_name);
1884
1885 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
d70910e8 1886
252b5132 1887 myh = coff_link_hash_lookup
b34976b6 1888 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
d70910e8 1889
252b5132
RH
1890 if (myh != NULL)
1891 {
1892 free (tmp_name);
1893 return; /* we've already seen this guy */
1894 }
1895
1896 /* The only trick here is using globals->arm_glue_size as the value. Even
1897 though the section isn't allocated yet, this is where we will be putting
1898 it. */
1899
14a793b2 1900 bh = NULL;
dc810e39 1901 val = globals->arm_glue_size + 1;
252b5132 1902 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
b34976b6 1903 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
d70910e8 1904
252b5132 1905 free (tmp_name);
d70910e8 1906
252b5132
RH
1907 globals->arm_glue_size += ARM2THUMB_GLUE_SIZE;
1908
1909 return;
1910}
1911
7831a775 1912#ifndef ARM_WINCE
252b5132
RH
1913static void
1914record_thumb_to_arm_glue (info, h)
1915 struct bfd_link_info * info;
1916 struct coff_link_hash_entry * h;
1917{
1918 const char * name = h->root.root.string;
1919 register asection * s;
1920 char * tmp_name;
1921 struct coff_link_hash_entry * myh;
14a793b2 1922 struct bfd_link_hash_entry * bh;
252b5132 1923 struct coff_arm_link_hash_table * globals;
dc810e39
AM
1924 bfd_vma val;
1925 bfd_size_type amt;
252b5132 1926
252b5132 1927 globals = coff_arm_hash_table (info);
d70910e8 1928
252b5132
RH
1929 BFD_ASSERT (globals != NULL);
1930 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
1931
1932 s = bfd_get_section_by_name
1933 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1934
1935 BFD_ASSERT (s != NULL);
1936
dc810e39
AM
1937 amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1;
1938 tmp_name = (char *) bfd_malloc (amt);
252b5132
RH
1939
1940 BFD_ASSERT (tmp_name);
1941
1942 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1943
1944 myh = coff_link_hash_lookup
b34976b6 1945 (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE);
d70910e8 1946
252b5132
RH
1947 if (myh != NULL)
1948 {
1949 free (tmp_name);
1950 return; /* we've already seen this guy */
1951 }
1952
14a793b2 1953 bh = NULL;
dc810e39 1954 val = globals->thumb_glue_size + 1;
252b5132 1955 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
b34976b6 1956 BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh);
d70910e8 1957
252b5132 1958 /* If we mark it 'thumb', the disassembler will do a better job. */
14a793b2 1959 myh = (struct coff_link_hash_entry *) bh;
252b5132
RH
1960 myh->class = C_THUMBEXTFUNC;
1961
1962 free (tmp_name);
1963
1964 /* Allocate another symbol to mark where we switch to arm mode. */
d70910e8 1965
252b5132
RH
1966#define CHANGE_TO_ARM "__%s_change_to_arm"
1967#define BACK_FROM_ARM "__%s_back_from_arm"
d70910e8 1968
dc810e39
AM
1969 amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1;
1970 tmp_name = (char *) bfd_malloc (amt);
d70910e8 1971
252b5132 1972 BFD_ASSERT (tmp_name);
d70910e8 1973
252b5132
RH
1974 sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name);
1975
14a793b2 1976 bh = NULL;
dc810e39 1977 val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4);
252b5132 1978 bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name,
b34976b6 1979 BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh);
252b5132 1980
d70910e8
KH
1981 free (tmp_name);
1982
252b5132
RH
1983 globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
1984
1985 return;
1986}
7831a775 1987#endif /* not ARM_WINCE */
252b5132
RH
1988
1989/* Select a BFD to be used to hold the sections used by the glue code.
1990 This function is called from the linker scripts in ld/emultempl/
1991 {armcoff/pe}.em */
e049a0de 1992
b34976b6 1993bfd_boolean
252b5132
RH
1994bfd_arm_get_bfd_for_interworking (abfd, info)
1995 bfd * abfd;
1996 struct bfd_link_info * info;
1997{
1998 struct coff_arm_link_hash_table * globals;
1999 flagword flags;
2000 asection * sec;
d70910e8 2001
252b5132
RH
2002 /* If we are only performing a partial link do not bother
2003 getting a bfd to hold the glue. */
1049f94e 2004 if (info->relocatable)
b34976b6 2005 return TRUE;
d70910e8 2006
252b5132 2007 globals = coff_arm_hash_table (info);
d70910e8 2008
252b5132
RH
2009 BFD_ASSERT (globals != NULL);
2010
2011 if (globals->bfd_of_glue_owner != NULL)
b34976b6 2012 return TRUE;
d70910e8 2013
252b5132 2014 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
d70910e8
KH
2015
2016 if (sec == NULL)
252b5132 2017 {
ba3d4249 2018 flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY;
d70910e8 2019
252b5132 2020 sec = bfd_make_section (abfd, ARM2THUMB_GLUE_SECTION_NAME);
d70910e8 2021
252b5132
RH
2022 if (sec == NULL
2023 || ! bfd_set_section_flags (abfd, sec, flags)
2024 || ! bfd_set_section_alignment (abfd, sec, 2))
b34976b6 2025 return FALSE;
252b5132
RH
2026 }
2027
2028 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
2029
d70910e8 2030 if (sec == NULL)
252b5132 2031 {
ba3d4249 2032 flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY;
d70910e8 2033
252b5132 2034 sec = bfd_make_section (abfd, THUMB2ARM_GLUE_SECTION_NAME);
d70910e8 2035
252b5132
RH
2036 if (sec == NULL
2037 || ! bfd_set_section_flags (abfd, sec, flags)
2038 || ! bfd_set_section_alignment (abfd, sec, 2))
b34976b6 2039 return FALSE;
252b5132 2040 }
d70910e8 2041
252b5132
RH
2042 /* Save the bfd for later use. */
2043 globals->bfd_of_glue_owner = abfd;
d70910e8 2044
b34976b6 2045 return TRUE;
252b5132
RH
2046}
2047
b34976b6 2048bfd_boolean
252b5132
RH
2049bfd_arm_process_before_allocation (abfd, info, support_old_code)
2050 bfd * abfd;
2051 struct bfd_link_info * info;
2052 int support_old_code;
2053{
2054 asection * sec;
2055 struct coff_arm_link_hash_table * globals;
2056
2057 /* If we are only performing a partial link do not bother
2058 to construct any glue. */
1049f94e 2059 if (info->relocatable)
b34976b6 2060 return TRUE;
d70910e8 2061
252b5132
RH
2062 /* Here we have a bfd that is to be included on the link. We have a hook
2063 to do reloc rummaging, before section sizes are nailed down. */
2064
2065 _bfd_coff_get_external_symbols (abfd);
2066
2067 globals = coff_arm_hash_table (info);
d70910e8 2068
252b5132
RH
2069 BFD_ASSERT (globals != NULL);
2070 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2071
2072 globals->support_old_code = support_old_code;
d70910e8 2073
252b5132
RH
2074 /* Rummage around all the relocs and map the glue vectors. */
2075 sec = abfd->sections;
2076
2077 if (sec == NULL)
b34976b6 2078 return TRUE;
252b5132
RH
2079
2080 for (; sec != NULL; sec = sec->next)
2081 {
2082 struct internal_reloc * i;
2083 struct internal_reloc * rel;
2084
d70910e8 2085 if (sec->reloc_count == 0)
252b5132
RH
2086 continue;
2087
2088 /* Load the relocs. */
d70910e8
KH
2089 /* FIXME: there may be a storage leak here. */
2090
252b5132 2091 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);
d70910e8 2092
252b5132
RH
2093 BFD_ASSERT (i != 0);
2094
d70910e8 2095 for (rel = i; rel < i + sec->reloc_count; ++rel)
252b5132
RH
2096 {
2097 unsigned short r_type = rel->r_type;
86033394 2098 long symndx;
252b5132
RH
2099 struct coff_link_hash_entry * h;
2100
2101 symndx = rel->r_symndx;
2102
d70910e8 2103 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH
2104 if (symndx == -1)
2105 continue;
2106
17505c5c 2107 /* If the index is outside of the range of our table, something has gone wrong. */
af74ae99
NC
2108 if (symndx >= obj_conv_table_size (abfd))
2109 {
d003868e
AM
2110 _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"),
2111 abfd, symndx);
af74ae99
NC
2112 continue;
2113 }
d70910e8 2114
252b5132
RH
2115 h = obj_coff_sym_hashes (abfd)[symndx];
2116
2117 /* If the relocation is against a static symbol it must be within
2118 the current section and so cannot be a cross ARM/Thumb relocation. */
2119 if (h == NULL)
2120 continue;
2121
2122 switch (r_type)
2123 {
2124 case ARM_26:
2125 /* This one is a call from arm code. We need to look up
2126 the target of the call. If it is a thumb target, we
2127 insert glue. */
d70910e8 2128
252b5132
RH
2129 if (h->class == C_THUMBEXTFUNC)
2130 record_arm_to_thumb_glue (info, h);
2131 break;
d70910e8 2132
17505c5c 2133#ifndef ARM_WINCE
252b5132
RH
2134 case ARM_THUMB23:
2135 /* This one is a call from thumb code. We used to look
2136 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look
2137 up the target of the call. If it is an arm target, we
2138 insert glue. If the symbol does not exist it will be
2139 given a class of C_EXT and so we will generate a stub
2140 for it. This is not really a problem, since the link
2141 is doomed anyway. */
2142
2143 switch (h->class)
2144 {
2145 case C_EXT:
2146 case C_STAT:
2147 case C_LABEL:
2148 record_thumb_to_arm_glue (info, h);
2149 break;
2150 default:
2151 ;
2152 }
2153 break;
17505c5c 2154#endif
d70910e8 2155
252b5132
RH
2156 default:
2157 break;
2158 }
2159 }
2160 }
2161
b34976b6 2162 return TRUE;
252b5132
RH
2163}
2164
e049a0de
ILT
2165#endif /* ! defined (COFF_IMAGE_WITH_PE) */
2166
252b5132
RH
2167#define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup
2168#define coff_relocate_section coff_arm_relocate_section
2169#define coff_bfd_is_local_label_name coff_arm_is_local_label_name
2170#define coff_adjust_symndx coff_arm_adjust_symndx
2171#define coff_link_output_has_begun coff_arm_link_output_has_begun
2172#define coff_final_link_postscript coff_arm_final_link_postscript
2173#define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data
2174#define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data
2175#define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags
2176#define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data
2177#define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create
2178
d21356d8
NC
2179/* When doing a relocatable link, we want to convert ARM_26 relocs
2180 into ARM_26D relocs. */
252b5132 2181
b34976b6 2182static bfd_boolean
252b5132 2183coff_arm_adjust_symndx (obfd, info, ibfd, sec, irel, adjustedp)
5f771d47
ILT
2184 bfd *obfd ATTRIBUTE_UNUSED;
2185 struct bfd_link_info *info ATTRIBUTE_UNUSED;
252b5132
RH
2186 bfd *ibfd;
2187 asection *sec;
2188 struct internal_reloc *irel;
b34976b6 2189 bfd_boolean *adjustedp;
252b5132 2190{
d21356d8 2191 if (irel->r_type == ARM_26)
252b5132
RH
2192 {
2193 struct coff_link_hash_entry *h;
2194
2195 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
2196 if (h != NULL
2197 && (h->root.type == bfd_link_hash_defined
2198 || h->root.type == bfd_link_hash_defweak)
2199 && h->root.u.def.section->output_section == sec->output_section)
d21356d8 2200 irel->r_type = ARM_26D;
252b5132 2201 }
b34976b6
AM
2202 *adjustedp = FALSE;
2203 return TRUE;
252b5132
RH
2204}
2205
2206/* Called when merging the private data areas of two BFDs.
2207 This is important as it allows us to detect if we are
2208 attempting to merge binaries compiled for different ARM
5c4491d3 2209 targets, eg different CPUs or different APCS's. */
252b5132 2210
b34976b6 2211static bfd_boolean
252b5132
RH
2212coff_arm_merge_private_bfd_data (ibfd, obfd)
2213 bfd * ibfd;
2214 bfd * obfd;
2215{
2216 BFD_ASSERT (ibfd != NULL && obfd != NULL);
2217
2218 if (ibfd == obfd)
b34976b6 2219 return TRUE;
252b5132
RH
2220
2221 /* If the two formats are different we cannot merge anything.
2222 This is not an error, since it is permissable to change the
2223 input and output formats. */
2224 if ( ibfd->xvec->flavour != bfd_target_coff_flavour
2225 || obfd->xvec->flavour != bfd_target_coff_flavour)
b34976b6 2226 return TRUE;
252b5132 2227
5a6c6817
NC
2228 /* Determine what should happen if the input ARM architecture
2229 does not match the output ARM architecture. */
2230 if (! bfd_arm_merge_machines (ibfd, obfd))
2231 return FALSE;
2232
2233 /* Verify that the APCS is the same for the two BFDs. */
252b5132
RH
2234 if (APCS_SET (ibfd))
2235 {
2236 if (APCS_SET (obfd))
2237 {
2238 /* If the src and dest have different APCS flag bits set, fail. */
2239 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
2240 {
2241 _bfd_error_handler
2242 /* xgettext: c-format */
d003868e
AM
2243 (_("ERROR: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
2244 ibfd, obfd,
2245 APCS_26_FLAG (ibfd) ? 26 : 32,
2246 APCS_26_FLAG (obfd) ? 26 : 32
252b5132
RH
2247 );
2248
2249 bfd_set_error (bfd_error_wrong_format);
b34976b6 2250 return FALSE;
252b5132 2251 }
d70910e8 2252
252b5132
RH
2253 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
2254 {
2255 const char *msg;
2256
2257 if (APCS_FLOAT_FLAG (ibfd))
2258 /* xgettext: c-format */
d003868e 2259 msg = _("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers");
252b5132
RH
2260 else
2261 /* xgettext: c-format */
d003868e 2262 msg = _("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers");
d70910e8 2263
d003868e 2264 _bfd_error_handler (msg, ibfd, obfd);
252b5132
RH
2265
2266 bfd_set_error (bfd_error_wrong_format);
b34976b6 2267 return FALSE;
252b5132 2268 }
d70910e8 2269
252b5132
RH
2270 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
2271 {
2272 const char * msg;
2273
2274 if (PIC_FLAG (ibfd))
2275 /* xgettext: c-format */
d003868e 2276 msg = _("ERROR: %B is compiled as position independent code, whereas target %B is absolute position");
252b5132
RH
2277 else
2278 /* xgettext: c-format */
d003868e
AM
2279 msg = _("ERROR: %B is compiled as absolute position code, whereas target %B is position independent");
2280 _bfd_error_handler (msg, ibfd, obfd);
252b5132
RH
2281
2282 bfd_set_error (bfd_error_wrong_format);
b34976b6 2283 return FALSE;
252b5132
RH
2284 }
2285 }
2286 else
2287 {
2288 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));
d70910e8 2289
252b5132
RH
2290 /* Set up the arch and fields as well as these are probably wrong. */
2291 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
2292 }
2293 }
2294
2295 /* Check the interworking support. */
2296 if (INTERWORK_SET (ibfd))
2297 {
2298 if (INTERWORK_SET (obfd))
2299 {
2300 /* If the src and dest differ in their interworking issue a warning. */
2301 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
2302 {
2303 const char * msg;
2304
2305 if (INTERWORK_FLAG (ibfd))
2306 /* xgettext: c-format */
d003868e 2307 msg = _("Warning: %B supports interworking, whereas %B does not");
252b5132
RH
2308 else
2309 /* xgettext: c-format */
d003868e 2310 msg = _("Warning: %B does not support interworking, whereas %B does");
d70910e8 2311
d003868e 2312 _bfd_error_handler (msg, ibfd, obfd);
252b5132
RH
2313 }
2314 }
2315 else
2316 {
2317 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
2318 }
2319 }
2320
b34976b6 2321 return TRUE;
252b5132
RH
2322}
2323
252b5132
RH
2324/* Display the flags field. */
2325
b34976b6 2326static bfd_boolean
252b5132
RH
2327coff_arm_print_private_bfd_data (abfd, ptr)
2328 bfd * abfd;
2329 PTR ptr;
2330{
2331 FILE * file = (FILE *) ptr;
d70910e8 2332
252b5132 2333 BFD_ASSERT (abfd != NULL && ptr != NULL);
d70910e8 2334
252b5132
RH
2335 /* xgettext:c-format */
2336 fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags);
d70910e8 2337
252b5132
RH
2338 if (APCS_SET (abfd))
2339 {
5c4491d3 2340 /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */
252b5132
RH
2341 fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32);
2342
2343 if (APCS_FLOAT_FLAG (abfd))
2344 fprintf (file, _(" [floats passed in float registers]"));
2345 else
2346 fprintf (file, _(" [floats passed in integer registers]"));
2347
2348 if (PIC_FLAG (abfd))
2349 fprintf (file, _(" [position independent]"));
2350 else
2351 fprintf (file, _(" [absolute position]"));
2352 }
d70910e8 2353
252b5132
RH
2354 if (! INTERWORK_SET (abfd))
2355 fprintf (file, _(" [interworking flag not initialised]"));
2356 else if (INTERWORK_FLAG (abfd))
2357 fprintf (file, _(" [interworking supported]"));
2358 else
2359 fprintf (file, _(" [interworking not supported]"));
d70910e8 2360
252b5132 2361 fputc ('\n', file);
d70910e8 2362
b34976b6 2363 return TRUE;
252b5132
RH
2364}
2365
252b5132
RH
2366/* Copies the given flags into the coff_tdata.flags field.
2367 Typically these flags come from the f_flags[] field of
2368 the COFF filehdr structure, which contains important,
2369 target specific information.
2370 Note: Although this function is static, it is explicitly
2371 called from both coffcode.h and peicode.h. */
2372
b34976b6 2373static bfd_boolean
252b5132
RH
2374_bfd_coff_arm_set_private_flags (abfd, flags)
2375 bfd * abfd;
2376 flagword flags;
2377{
2378 flagword flag;
2379
2380 BFD_ASSERT (abfd != NULL);
2381
2382 flag = (flags & F_APCS26) ? F_APCS_26 : 0;
d70910e8 2383
252b5132
RH
2384 /* Make sure that the APCS field has not been initialised to the opposite
2385 value. */
2386 if (APCS_SET (abfd)
2387 && ( (APCS_26_FLAG (abfd) != flag)
2388 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
948221a8 2389 || (PIC_FLAG (abfd) != (flags & F_PIC))
252b5132 2390 ))
b34976b6 2391 return FALSE;
252b5132
RH
2392
2393 flag |= (flags & (F_APCS_FLOAT | F_PIC));
d70910e8 2394
252b5132
RH
2395 SET_APCS_FLAGS (abfd, flag);
2396
2397 flag = (flags & F_INTERWORK);
d70910e8 2398
252b5132
RH
2399 /* If the BFD has already had its interworking flag set, but it
2400 is different from the value that we have been asked to set,
2401 then assume that that merged code will not support interworking
2402 and set the flag accordingly. */
2403 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
2404 {
2405 if (flag)
2406 /* xgettext: c-format */
d003868e
AM
2407 _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
2408 abfd);
252b5132
RH
2409 else
2410 /* xgettext: c-format */
d003868e
AM
2411 _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"),
2412 abfd);
252b5132
RH
2413 flag = 0;
2414 }
2415
2416 SET_INTERWORK_FLAG (abfd, flag);
2417
b34976b6 2418 return TRUE;
252b5132
RH
2419}
2420
252b5132
RH
2421/* Copy the important parts of the target specific data
2422 from one instance of a BFD to another. */
2423
b34976b6 2424static bfd_boolean
252b5132
RH
2425coff_arm_copy_private_bfd_data (src, dest)
2426 bfd * src;
2427 bfd * dest;
2428{
2429 BFD_ASSERT (src != NULL && dest != NULL);
d70910e8 2430
252b5132 2431 if (src == dest)
b34976b6 2432 return TRUE;
252b5132
RH
2433
2434 /* If the destination is not in the same format as the source, do not do
2435 the copy. */
2436 if (src->xvec != dest->xvec)
b34976b6 2437 return TRUE;
252b5132
RH
2438
2439 /* copy the flags field */
2440 if (APCS_SET (src))
2441 {
2442 if (APCS_SET (dest))
2443 {
2444 /* If the src and dest have different APCS flag bits set, fail. */
2445 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
b34976b6 2446 return FALSE;
d70910e8 2447
252b5132 2448 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
b34976b6 2449 return FALSE;
d70910e8 2450
252b5132 2451 if (PIC_FLAG (dest) != PIC_FLAG (src))
b34976b6 2452 return FALSE;
252b5132
RH
2453 }
2454 else
2455 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src)
2456 | PIC_FLAG (src));
2457 }
2458
2459 if (INTERWORK_SET (src))
2460 {
2461 if (INTERWORK_SET (dest))
2462 {
2463 /* If the src and dest have different interworking flags then turn
2464 off the interworking bit. */
2465 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
2466 {
2467 if (INTERWORK_FLAG (dest))
2468 {
2469 /* xgettext:c-format */
ae1a89b7 2470 _bfd_error_handler (("\
d003868e
AM
2471Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
2472 dest, src);
252b5132 2473 }
d70910e8 2474
252b5132
RH
2475 SET_INTERWORK_FLAG (dest, 0);
2476 }
2477 }
2478 else
2479 {
2480 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
2481 }
2482 }
2483
b34976b6 2484 return TRUE;
252b5132
RH
2485}
2486
2487/* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
c31c1f70
NC
2488 *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */
2489#define LOCAL_LABEL_PREFIX ""
252b5132
RH
2490#ifndef USER_LABEL_PREFIX
2491#define USER_LABEL_PREFIX "_"
2492#endif
2493
f8111282
NC
2494/* Like _bfd_coff_is_local_label_name, but
2495 a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be
2496 non-local.
2497 b) Allow other prefixes than ".", e.g. an empty prefix would cause all
2498 labels of the form Lxxx to be stripped. */
b34976b6 2499static bfd_boolean
252b5132 2500coff_arm_is_local_label_name (abfd, name)
5f771d47 2501 bfd * abfd ATTRIBUTE_UNUSED;
252b5132
RH
2502 const char * name;
2503{
252b5132
RH
2504#ifdef USER_LABEL_PREFIX
2505 if (USER_LABEL_PREFIX[0] != 0)
2506 {
5ff625e9
AM
2507 size_t len = strlen (USER_LABEL_PREFIX);
2508
2509 if (strncmp (name, USER_LABEL_PREFIX, len) == 0)
b34976b6 2510 return FALSE;
252b5132
RH
2511 }
2512#endif
f8111282
NC
2513
2514#ifdef LOCAL_LABEL_PREFIX
2515 /* If there is a prefix for local labels then look for this.
d70910e8
KH
2516 If the prefix exists, but it is empty, then ignore the test. */
2517
f8111282 2518 if (LOCAL_LABEL_PREFIX[0] != 0)
252b5132 2519 {
dc810e39 2520 size_t len = strlen (LOCAL_LABEL_PREFIX);
d70910e8 2521
f8111282 2522 if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0)
b34976b6 2523 return FALSE;
d70910e8 2524
f8111282
NC
2525 /* Perform the checks below for the rest of the name. */
2526 name += len;
252b5132 2527 }
f8111282 2528#endif
d70910e8 2529
f8111282 2530 return name[0] == 'L';
252b5132
RH
2531}
2532
2533/* This piece of machinery exists only to guarantee that the bfd that holds
d70910e8 2534 the glue section is written last.
252b5132
RH
2535
2536 This does depend on bfd_make_section attaching a new section to the
d70910e8 2537 end of the section list for the bfd.
252b5132
RH
2538
2539 krk@cygnus.com */
2540
b34976b6 2541static bfd_boolean
252b5132
RH
2542coff_arm_link_output_has_begun (sub, info)
2543 bfd * sub;
2544 struct coff_final_link_info * info;
2545{
2546 return (sub->output_has_begun
2547 || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner);
2548}
2549
b34976b6 2550static bfd_boolean
252b5132 2551coff_arm_final_link_postscript (abfd, pfinfo)
5f771d47 2552 bfd * abfd ATTRIBUTE_UNUSED;
252b5132
RH
2553 struct coff_final_link_info * pfinfo;
2554{
2555 struct coff_arm_link_hash_table * globals;
2556
2557 globals = coff_arm_hash_table (pfinfo->info);
d70910e8 2558
252b5132 2559 BFD_ASSERT (globals != NULL);
d70910e8 2560
252b5132
RH
2561 if (globals->bfd_of_glue_owner != NULL)
2562 {
2563 if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner))
b34976b6 2564 return FALSE;
d70910e8 2565
b34976b6 2566 globals->bfd_of_glue_owner->output_has_begun = TRUE;
252b5132 2567 }
d70910e8 2568
5a6c6817 2569 return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
252b5132
RH
2570}
2571
252b5132
RH
2572#include "coffcode.h"
2573
c3c89269
NC
2574#ifndef TARGET_LITTLE_SYM
2575#define TARGET_LITTLE_SYM armcoff_little_vec
252b5132 2576#endif
c3c89269
NC
2577#ifndef TARGET_LITTLE_NAME
2578#define TARGET_LITTLE_NAME "coff-arm-little"
252b5132 2579#endif
c3c89269
NC
2580#ifndef TARGET_BIG_SYM
2581#define TARGET_BIG_SYM armcoff_big_vec
252b5132 2582#endif
c3c89269
NC
2583#ifndef TARGET_BIG_NAME
2584#define TARGET_BIG_NAME "coff-arm-big"
252b5132 2585#endif
252b5132 2586
c3c89269
NC
2587#ifndef TARGET_UNDERSCORE
2588#define TARGET_UNDERSCORE 0
252b5132 2589#endif
c3c89269 2590
f78c5281 2591#ifndef EXTRA_S_FLAGS
c3c89269 2592#ifdef COFF_WITH_PE
20650579 2593#define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES)
252b5132 2594#else
20650579 2595#define EXTRA_S_FLAGS SEC_CODE
252b5132 2596#endif
f78c5281 2597#endif
252b5132 2598
c3c89269
NC
2599/* Forward declaration for use initialising alternative_target field. */
2600extern const bfd_target TARGET_BIG_SYM ;
252b5132 2601
c3c89269 2602/* Target vectors. */
3fa78519
SS
2603CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE)
2604CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE)
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