[deliverable/binutils-gdb.git] / bfd / coff-arm.c

/* BFD back-end for ARM COFF files.
   Copyright 1990, 91, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
   Written by Cygnus Support.

This file is part of BFD, the Binary File Descriptor library.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"

#include "coff/arm.h"

#include "coff/internal.h"

#ifdef COFF_WITH_PE
#include "coff/pe.h"
#endif

#include "libcoff.h"

static bfd_reloc_status_type
aoutarm_fix_pcrel_26_done PARAMS ((bfd *, arelent *, asymbol *, PTR,
				  asection *, bfd *, char **));

static bfd_reloc_status_type
aoutarm_fix_pcrel_26 PARAMS ((bfd *, arelent *, asymbol *, PTR,
			     asection *, bfd *, char **));


static bfd_reloc_status_type coff_arm_reloc 
  PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
static boolean coff_arm_adjust_symndx
  PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *,
	   struct internal_reloc *, boolean *));

/* Used by the assembler. */
static bfd_reloc_status_type
coff_arm_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
		 error_message)
     bfd *abfd;
     arelent *reloc_entry;
     asymbol *symbol;
     PTR data;
     asection *input_section;
     bfd *output_bfd;
     char **error_message;
{
  symvalue diff;
  if (output_bfd == (bfd *) NULL)
    return bfd_reloc_continue;

  diff = reloc_entry->addend;

#define DOIT(x) \
  x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask))

    if (diff != 0)
      {
	reloc_howto_type *howto = reloc_entry->howto;
	unsigned char *addr = (unsigned char *) data + reloc_entry->address;

	switch (howto->size)
	  {
	  case 0:
	    {
	      char x = bfd_get_8 (abfd, addr);
	      DOIT (x);
	      bfd_put_8 (abfd, x, addr);
	    }
	    break;

	  case 1:
	    {
	      short x = bfd_get_16 (abfd, addr);
	      DOIT (x);
	      bfd_put_16 (abfd, x, addr);
	    }
	    break;

	  case 2:
	    {
	      long x = bfd_get_32 (abfd, addr);
	      DOIT (x);
	      bfd_put_32 (abfd, x, addr);
	    }
	    break;

	  default:
	    abort ();
	  }
      }

  /* Now let bfd_perform_relocation finish everything up.  */
  return bfd_reloc_continue;
}

#ifndef PCRELOFFSET
#define PCRELOFFSET true
#endif

static reloc_howto_type aoutarm_std_reloc_howto[] = 
{
  /* type              rs size bsz  pcrel bitpos ovrf                     sf name     part_inpl readmask  setmask    pcdone */
  HOWTO(0,			/* type */
	0,			/* rs */
	0,			/* size */
	8,			/* bsz */
	false,			/* pcrel */
	0,			/* bitpos */
	complain_overflow_bitfield, /* ovf */
	coff_arm_reloc,		/* sf */
	"8",			/*name */
        true,			/* partial */
	0x000000ff,		/*read mask */
	0x000000ff,		/* setmask */
	PCRELOFFSET		/* pcdone */),
  HOWTO(1,  
	0, 
	1, 
	16, 
	false,
	0,
	complain_overflow_bitfield,
	coff_arm_reloc,
	"16", 
	true,
	0x0000ffff,
	0x0000ffff, 
	PCRELOFFSET),
  HOWTO( 2, 
	0,
	2, 
	32,
	false,
	0,
	complain_overflow_bitfield,
	coff_arm_reloc,
	"32",
        true,
	0xffffffff,
	0xffffffff,
	PCRELOFFSET),
  HOWTO( 3,
	2,
	2,
	26,
	true,
	0,
	complain_overflow_signed,
	aoutarm_fix_pcrel_26 ,
	"ARM26",
	false,
	0x00ffffff,
	0x00ffffff, 
	PCRELOFFSET),
  HOWTO( 4,        
	0,
	0,
	8, 
	true,
	0,
	complain_overflow_signed, 
	coff_arm_reloc,
	"DISP8",  
	true,
	0x000000ff,
	0x000000ff,
	true),
  HOWTO( 5, 
	0,
	1,
	16,
	true,
	0,
	complain_overflow_signed, 
	coff_arm_reloc,
	"DISP16",
	true,
	0x0000ffff,
	0x0000ffff,
	true),
  HOWTO( 6,
	0,
	2,
	32,
	true,
	0,
	complain_overflow_signed, 
 	coff_arm_reloc,
	"DISP32",
	true,
	0xffffffff,
	0xffffffff,
	true),
  HOWTO( 7,  
	2, 
	2,
	26,
	false,
	0,
	complain_overflow_signed,
	aoutarm_fix_pcrel_26_done, 
	"ARM26D",
	true,
	0x00ffffff,
	0x0,
	false),
  {-1},
  HOWTO( 9,
	0,
	-1,
	16,
	false,
	0, 
	complain_overflow_bitfield,
	coff_arm_reloc,
	"NEG16",
        true, 
	0x0000ffff,
	0x0000ffff, 
	false),
  HOWTO( 10, 
	0, 
	-2,
	32,
	false,
	0,
	complain_overflow_bitfield,
	coff_arm_reloc,
	"NEG32",
        true,
	0xffffffff,
	0xffffffff,
	false),
  HOWTO( 11, 
	0,
	2, 
	32,
	false,
	0,
	complain_overflow_bitfield,
	coff_arm_reloc,
	"rva32",
        true,
	0xffffffff,
	0xffffffff,
	PCRELOFFSET),
};
#ifdef COFF_WITH_PE
/* Return true if this relocation should
   appear in the output .reloc section. */

static boolean in_reloc_p (abfd, howto)
     bfd * abfd;
     reloc_howto_type *howto;
{
  return !howto->pc_relative && howto->type != 11;
}     
#endif


#define RTYPE2HOWTO(cache_ptr, dst) \
	    (cache_ptr)->howto = aoutarm_std_reloc_howto + (dst)->r_type;

#define coff_rtype_to_howto coff_arm_rtype_to_howto

static reloc_howto_type *
coff_arm_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
     bfd *abfd;
     asection *sec;
     struct internal_reloc *rel;
     struct coff_link_hash_entry *h;
     struct internal_syment *sym;
     bfd_vma *addendp;
{
  reloc_howto_type *howto;

  howto = aoutarm_std_reloc_howto + rel->r_type;

  if (rel->r_type == 11)
    {
      *addendp -= pe_data(sec->output_section->owner)->pe_opthdr.ImageBase;
    }

  /* The relocation_section function will skip pcrel_offset relocs
     when doing a relocateable link.  However, we want to convert
     ARM26 to ARM26D relocs if possible.  We return a fake howto in
     this case without pcrel_offset set, and adjust the addend to
     compensate.  */
  if (rel->r_type == 3
      && h != NULL
      && (h->root.type == bfd_link_hash_defined
	  || h->root.type == bfd_link_hash_defweak)
      && h->root.u.def.section->output_section == sec->output_section)
    {
      static reloc_howto_type fake_arm26_reloc = 
	HOWTO (3,
	       2,
	       2,
	       26,
	       true,
	       0,
	       complain_overflow_signed,
	       aoutarm_fix_pcrel_26 ,
	       "ARM26",
	       false,
	       0x00ffffff,
	       0x00ffffff, 
	       false);

      *addendp -= rel->r_vaddr - sec->vma;
      return &fake_arm26_reloc;
    }

  return howto;

}
/* Used by the assembler. */

static bfd_reloc_status_type
aoutarm_fix_pcrel_26_done (abfd, reloc_entry, symbol, data, input_section,
			  output_bfd, error_message)
     bfd *abfd;
     arelent *reloc_entry;
     asymbol *symbol;
     PTR data;
     asection *input_section;
     bfd *output_bfd;
     char **error_message;
{
  /* This is dead simple at present.  */
  return bfd_reloc_ok;
}

/* Used by the assembler. */

static bfd_reloc_status_type
aoutarm_fix_pcrel_26 (abfd, reloc_entry, symbol, data, input_section,
		     output_bfd, error_message)
     bfd *abfd;
     arelent *reloc_entry;
     asymbol *symbol;
     PTR data;
     asection *input_section;
     bfd *output_bfd;
     char **error_message;
{
  bfd_vma relocation;
  bfd_size_type addr = reloc_entry->address;
  long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
  bfd_reloc_status_type flag = bfd_reloc_ok;
  
  /* If this is an undefined symbol, return error */
  if (symbol->section == &bfd_und_section
      && (symbol->flags & BSF_WEAK) == 0)
    return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;

  /* If the sections are different, and we are doing a partial relocation,
     just ignore it for now.  */
  if (symbol->section->name != input_section->name
      && output_bfd != (bfd *)NULL)
    return bfd_reloc_continue;

  relocation = (target & 0x00ffffff) << 2;
  relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend */
  relocation += symbol->value;
  relocation += symbol->section->output_section->vma;
  relocation += symbol->section->output_offset;
  relocation += reloc_entry->addend;
  relocation -= input_section->output_section->vma;
  relocation -= input_section->output_offset;
  relocation -= addr;
  if (relocation & 3)
    return bfd_reloc_overflow;

  /* Check for overflow */
  if (relocation & 0x02000000)
    {
      if ((relocation & ~0x03ffffff) != ~0x03ffffff)
	flag = bfd_reloc_overflow;
    }
  else if (relocation & ~0x03ffffff)
    flag = bfd_reloc_overflow;

  target &= ~0x00ffffff;
  target |= (relocation >> 2) & 0x00ffffff;
  bfd_put_32 (abfd, target, (bfd_byte *) data + addr);

  /* Now the ARM magic... Change the reloc type so that it is marked as done.
     Strictly this is only necessary if we are doing a partial relocation.  */
  reloc_entry->howto = &aoutarm_std_reloc_howto[7];

  return flag;
}


static CONST struct reloc_howto_struct *
arm_reloc_type_lookup(abfd,code)
      bfd *abfd;
      bfd_reloc_code_real_type code;
{
#define ASTD(i,j)       case i: return &aoutarm_std_reloc_howto[j]
  if (code == BFD_RELOC_CTOR)
    switch (bfd_get_arch_info (abfd)->bits_per_address)
      {
      case 32:
        code = BFD_RELOC_32;
        break;
      default: return (CONST struct reloc_howto_struct *) 0;
      }

  switch (code)
    {
      ASTD (BFD_RELOC_16, 1);
      ASTD (BFD_RELOC_32, 2);
      ASTD (BFD_RELOC_ARM_PCREL_BRANCH, 3);
      ASTD (BFD_RELOC_8_PCREL, 4);
      ASTD (BFD_RELOC_16_PCREL, 5);
      ASTD (BFD_RELOC_32_PCREL, 6);
      ASTD (BFD_RELOC_RVA, 11);
    default: return (CONST struct reloc_howto_struct *) 0;
    }
}


#define coff_bfd_reloc_type_lookup arm_reloc_type_lookup

#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (2)
#define COFF_PAGE_SIZE 0x1000
/* Turn a howto into a reloc  nunmber */

#define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
#define BADMAG(x) ARMBADMAG(x)
#define ARM 1			/* Customize coffcode.h */


/* We use the special COFF backend linker.  */
#define coff_relocate_section _bfd_coff_generic_relocate_section

/* When doing a relocateable link, we want to convert ARM26 relocs
   into ARM26D relocs.  */

static boolean
coff_arm_adjust_symndx (obfd, info, ibfd, sec, irel, adjustedp)
     bfd *obfd;
     struct bfd_link_info *info;
     bfd *ibfd;
     asection *sec;
     struct internal_reloc *irel;
     boolean *adjustedp;
{
  if (irel->r_type == 3)
    {
      struct coff_link_hash_entry *h;

      h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
      if (h != NULL
	  && (h->root.type == bfd_link_hash_defined
	      || h->root.type == bfd_link_hash_defweak)
	  && h->root.u.def.section->output_section == sec->output_section)
	irel->r_type = 7;
    }
  *adjustedp = false;
  return true;
}


#define APCS_FLAG( abfd )	 	(coff_data (abfd)->flags & F_APCS_26)
#define APCS_SET(  abfd )	 	(coff_data (abfd)->flags & F_APCS_SET)
#define SET_APCS_FLAG( abfd, flg )	(coff_data (abfd)->flags = (coff_data (abfd)->flags & ~ F_APCS_26) | (flg | F_APCS_SET))

/* Called when merging the private data areas of two BFDs.
   This is important as it allows us to detect if we are
   attempting to merge binaries compiled for different ARM
   targets, eg different CPUs or differents APCS's.     */

boolean
coff_arm_bfd_merge_private_bfd_data (ibfd, obfd)
     bfd *   ibfd;
     bfd *   obfd;
{
  BFD_ASSERT (ibfd != NULL && obfd != NULL)

  if (ibfd == obfd)
    return true;

  /* If the two formats are different we cannot check anything */
  if (ibfd->xvec != obfd->xvec)
    return true;

  /* Verify that the APCS is the same for the two BFDs */
  if (APCS_SET (ibfd))
    {
      if (APCS_SET (obfd))
	{
	  /* If the src and dest have different APCS flag bits set, fail */
	  if (APCS_FLAG (obfd) != APCS_FLAG (ibfd))
	    {
	      _bfd_error_handler
		("%s: ERROR: compiled for APCS-%d whereas target %s uses APCS-%d",
		 bfd_get_filename (ibfd), APCS_FLAG (ibfd) ? 26 : 32,
		 bfd_get_filename (obfd), APCS_FLAG (obfd) ? 26 : 32
		 );

	      bfd_set_error (bfd_error_wrong_format);
	      return false;
	    }
	}
      else
	SET_APCS_FLAG (obfd, APCS_FLAG (ibfd));
    }
  
  return true;
}


/* Display the flags field */

boolean
coff_arm_bfd_print_private_bfd_data (abfd, ptr)
     bfd *   abfd;
     PTR     ptr;
{
  FILE * file = (FILE *) ptr;
  
  BFD_ASSERT (abfd != NULL && ptr != NULL)
  
  fprintf (file, "private flags = %x", coff_data( abfd )->flags);
  
  if (APCS_SET (abfd))
    fprintf (file, ": [APCS-%d]", APCS_FLAG( abfd ) ? 26 : 32);
  
  fputc ('\n', file);
  
  return true;
}


/* Copies the given flags into the coff_tdata.flags field.
   Typically these flags come from the f_flags[] field of
   the COFF filehdr structure, which contains important,
   target specific information.                       */

boolean
coff_arm_bfd_set_private_flags (abfd, flags)
	bfd *	   abfd;
	flagword   flags;
{
  int flag;
  
  BFD_ASSERT (abfd != NULL);

  flag = (flags & F_APCS26) ? F_APCS_26 : 0;

  /* Make sure that the APCS field has not been initialised to the opposite value */
  if (APCS_SET (abfd) && (APCS_FLAG (abfd) != flag))
    return false;

  SET_APCS_FLAG (abfd, flag);
  
  return true;
}


/* Copy the important parts of the target specific data
   from one instance of a BFD to another.            */

boolean
coff_arm_bfd_copy_private_bfd_data (src, dest)
     bfd *  src;
     bfd *  dest;
{
  BFD_ASSERT (src != NULL && dest != NULL)

  if (src == dest)
    return true;

  /* If the destination is not in the same format as the source, do not do the copy */
  if (src->xvec != dest->xvec)
    return true;

  /* copy the flags field */
  if (APCS_SET (src))
    {
      if (APCS_SET (dest))
	{
	  /* If the src and dest have different APCS flag bits set, fail */
	  if (APCS_FLAG (dest) != APCS_FLAG (src))
	    return false;
	}
      else
	SET_APCS_FLAG (dest, APCS_FLAG (src));
    }

  return true;
}


#define coff_adjust_symndx			coff_arm_adjust_symndx
#define coff_bfd_merge_private_bfd_data		coff_arm_bfd_merge_private_bfd_data
#define coff_bfd_print_private_bfd_data		coff_arm_bfd_print_private_bfd_data
#define coff_bfd_set_private_flags              coff_arm_bfd_set_private_flags
#define coff_bfd_copy_private_bfd_data          coff_arm_bfd_copy_private_bfd_data

#include "coffcode.h"

const bfd_target
#ifdef TARGET_LITTLE_SYM
TARGET_LITTLE_SYM =
#else
armcoff_little_vec =
#endif
{
#ifdef TARGET_LITTLE_NAME
  TARGET_LITTLE_NAME,
#else
  "coff-arm-little",
#endif
  bfd_target_coff_flavour,
  BFD_ENDIAN_LITTLE,		/* data byte order is little */
  BFD_ENDIAN_LITTLE,		/* header byte order is little */

  (HAS_RELOC | EXEC_P |		/* object flags */
   HAS_LINENO | HAS_DEBUG |
   HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED),

#ifndef COFF_WITH_PE
  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
#else
  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC /* section flags */
   | SEC_LINK_ONCE | SEC_LINK_DUPLICATES),
#endif

#ifdef TARGET_UNDERSCORE
  TARGET_UNDERSCORE,		/* leading underscore */
#else
  0,				/* leading underscore */
#endif
  '/',				/* ar_pad_char */
  15,				/* ar_max_namelen */

  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
     bfd_getl32, bfd_getl_signed_32, bfd_putl32,
     bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
  bfd_getl64, bfd_getl_signed_64, bfd_putl64,
     bfd_getl32, bfd_getl_signed_32, bfd_putl32,
     bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */

/* Note that we allow an object file to be treated as a core file as well. */
    {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
       bfd_generic_archive_p, coff_object_p},
    {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
       bfd_false},
    {bfd_false, coff_write_object_contents, /* bfd_write_contents */
       _bfd_write_archive_contents, bfd_false},

     BFD_JUMP_TABLE_GENERIC (coff),
     BFD_JUMP_TABLE_COPY (coff),
     BFD_JUMP_TABLE_CORE (_bfd_nocore),
     BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
     BFD_JUMP_TABLE_SYMBOLS (coff),
     BFD_JUMP_TABLE_RELOCS (coff),
     BFD_JUMP_TABLE_WRITE (coff),
     BFD_JUMP_TABLE_LINK (coff),
     BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),

  COFF_SWAP_TABLE,
};

const bfd_target
#ifdef TARGET_BIG_SYM
TARGET_BIG_SYM =
#else
armcoff_big_vec =
#endif
{
#ifdef TARGET_BIG_NAME
  TARGET_BIG_NAME,
#else
  "coff-arm-big",
#endif
  bfd_target_coff_flavour,
  BFD_ENDIAN_BIG,		/* data byte order is big */
  BFD_ENDIAN_BIG,		/* header byte order is big */

  (HAS_RELOC | EXEC_P |		/* object flags */
   HAS_LINENO | HAS_DEBUG |
   HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED),

#ifndef COFF_WITH_PE
  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
#else
  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC /* section flags */
   | SEC_LINK_ONCE | SEC_LINK_DUPLICATES),
#endif

#ifdef TARGET_UNDERSCORE
  TARGET_UNDERSCORE,		/* leading underscore */
#else
  0,				/* leading underscore */
#endif
  '/',				/* ar_pad_char */
  15,				/* ar_max_namelen */

  bfd_getb64, bfd_getb_signed_64, bfd_putb64,
     bfd_getb32, bfd_getb_signed_32, bfd_putb32,
     bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */
  bfd_getb64, bfd_getb_signed_64, bfd_putb64,
     bfd_getb32, bfd_getb_signed_32, bfd_putb32,
     bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */

/* Note that we allow an object file to be treated as a core file as well. */
    {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
       bfd_generic_archive_p, coff_object_p},
    {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
       bfd_false},
    {bfd_false, coff_write_object_contents, /* bfd_write_contents */
       _bfd_write_archive_contents, bfd_false},

     BFD_JUMP_TABLE_GENERIC (coff),
     BFD_JUMP_TABLE_COPY (coff),
     BFD_JUMP_TABLE_CORE (_bfd_nocore),
     BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
     BFD_JUMP_TABLE_SYMBOLS (coff),
     BFD_JUMP_TABLE_RELOCS (coff),
     BFD_JUMP_TABLE_WRITE (coff),
     BFD_JUMP_TABLE_LINK (coff),
     BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),

  COFF_SWAP_TABLE,
};
Commit	Line	Data
177b1932	1	/* BFD back-end for ARM COFF files.
46686c78	2	Copyright 1990, 91, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
943fbd5b KR	3	Written by Cygnus Support.
	4
	5	This file is part of BFD, the Binary File Descriptor library.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	20
	21	#include "bfd.h"
	22	#include "sysdep.h"
	23	#include "libbfd.h"
943fbd5b KR	24
	25	#include "coff/arm.h"
	26
	27	#include "coff/internal.h"
	28
	29	#ifdef COFF_WITH_PE
	30	#include "coff/pe.h"
	31	#endif
	32
	33	#include "libcoff.h"
	34
	35	static bfd_reloc_status_type
	36	aoutarm_fix_pcrel_26_done PARAMS ((bfd , arelent , asymbol *, PTR,
	37	asection , bfd , char **));
	38
	39	static bfd_reloc_status_type
	40	aoutarm_fix_pcrel_26 PARAMS ((bfd , arelent , asymbol *, PTR,
	41	asection , bfd , char **));
	42
	43
	44	static bfd_reloc_status_type coff_arm_reloc
	45	PARAMS ((bfd , arelent , asymbol , PTR, asection , bfd , char *));
46686c78 NC	46	static boolean coff_arm_adjust_symndx
	47	PARAMS ((bfd , struct bfd_link_info , bfd , asection ,
	48	struct internal_reloc , boolean ));
275143eb SC	49
275143eb SC	50	/* Used by the assembler. */
943fbd5b KR	51	static bfd_reloc_status_type
	52	coff_arm_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
	53	error_message)
	54	bfd *abfd;
	55	arelent *reloc_entry;
	56	asymbol *symbol;
	57	PTR data;
	58	asection *input_section;
	59	bfd *output_bfd;
	60	char **error_message;
	61	{
	62	symvalue diff;
943fbd5b KR	63	if (output_bfd == (bfd *) NULL)
	64	return bfd_reloc_continue;
	65
da7afe3b	66	diff = reloc_entry->addend;
943fbd5b KR	67
	68	#define DOIT(x) \
	69	x = ((x & ~howto->dst_mask) \| (((x & howto->src_mask) + diff) & howto->dst_mask))
	70
da7afe3b SC	71	if (diff != 0)
	72	{
	73	reloc_howto_type *howto = reloc_entry->howto;
	74	unsigned char addr = (unsigned char ) data + reloc_entry->address;
943fbd5b	75
da7afe3b	76	switch (howto->size)
943fbd5b	77	{
da7afe3b SC	78	case 0:
	79	{
	80	char x = bfd_get_8 (abfd, addr);
	81	DOIT (x);
	82	bfd_put_8 (abfd, x, addr);
	83	}
	84	break;
	85
	86	case 1:
	87	{
	88	short x = bfd_get_16 (abfd, addr);
	89	DOIT (x);
	90	bfd_put_16 (abfd, x, addr);
	91	}
	92	break;
	93
	94	case 2:
	95	{
	96	long x = bfd_get_32 (abfd, addr);
	97	DOIT (x);
	98	bfd_put_32 (abfd, x, addr);
	99	}
	100	break;
	101
	102	default:
	103	abort ();
943fbd5b	104	}
da7afe3b	105	}
943fbd5b KR	106
	107	/* Now let bfd_perform_relocation finish everything up. */
	108	return bfd_reloc_continue;
	109	}
	110
3ea928f5 SC	111	#ifndef PCRELOFFSET
	112	#define PCRELOFFSET true
	113	#endif
	114
943fbd5b KR	115	static reloc_howto_type aoutarm_std_reloc_howto[] =
	116	{
	117	/* type rs size bsz pcrel bitpos ovrf sf name part_inpl readmask setmask pcdone */
	118	HOWTO(0, /* type */
	119	0, /* rs */
	120	0, /* size */
	121	8, /* bsz */
	122	false, /* pcrel */
	123	0, /* bitpos */
	124	complain_overflow_bitfield, /* ovf */
	125	coff_arm_reloc, /* sf */
	126	"8", /name /
	127	true, /* partial */
	128	0x000000ff, /read mask /
	129	0x000000ff, /* setmask */
	130	PCRELOFFSET /* pcdone */),
	131	HOWTO(1,
	132	0,
	133	1,
	134	16,
	135	false,
	136	0,
	137	complain_overflow_bitfield,
	138	coff_arm_reloc,
	139	"16",
	140	true,
	141	0x0000ffff,
	142	0x0000ffff,
	143	PCRELOFFSET),
	144	HOWTO( 2,
	145	0,
	146	2,
	147	32,
	148	false,
	149	0,
	150	complain_overflow_bitfield,
	151	coff_arm_reloc,
	152	"32",
	153	true,
	154	0xffffffff,
	155	0xffffffff,
	156	PCRELOFFSET),
	157	HOWTO( 3,
	158	2,
3ea928f5	159	2,
943fbd5b KR	160	26,
	161	true,
	162	0,
	163	complain_overflow_signed,
	164	aoutarm_fix_pcrel_26 ,
	165	"ARM26",
275143eb	166	false,
943fbd5b KR	167	0x00ffffff,
	168	0x00ffffff,
	169	PCRELOFFSET),
	170	HOWTO( 4,
	171	0,
	172	0,
	173	8,
	174	true,
	175	0,
	176	complain_overflow_signed,
	177	coff_arm_reloc,
	178	"DISP8",
	179	true,
	180	0x000000ff,
	181	0x000000ff,
	182	true),
	183	HOWTO( 5,
	184	0,
	185	1,
	186	16,
	187	true,
	188	0,
	189	complain_overflow_signed,
	190	coff_arm_reloc,
	191	"DISP16",
	192	true,
	193	0x0000ffff,
	194	0x0000ffff,
	195	true),
	196	HOWTO( 6,
	197	0,
	198	2,
	199	32,
	200	true,
	201	0,
	202	complain_overflow_signed,
	203	coff_arm_reloc,
	204	"DISP32",
	205	true,
	206	0xffffffff,
	207	0xffffffff,
	208	true),
	209	HOWTO( 7,
	210	2,
3ea928f5	211	2,
943fbd5b KR	212	26,
	213	false,
	214	0,
	215	complain_overflow_signed,
	216	aoutarm_fix_pcrel_26_done,
	217	"ARM26D",
	218	true,
	219	0x00ffffff,
46686c78	220	0x0,
943fbd5b KR	221	false),
	222	{-1},
	223	HOWTO( 9,
	224	0,
	225	-1,
	226	16,
	227	false,
	228	0,
	229	complain_overflow_bitfield,
	230	coff_arm_reloc,
	231	"NEG16",
	232	true,
	233	0x0000ffff,
	234	0x0000ffff,
	235	false),
	236	HOWTO( 10,
	237	0,
	238	-2,
	239	32,
	240	false,
	241	0,
	242	complain_overflow_bitfield,
	243	coff_arm_reloc,
	244	"NEG32",
	245	true,
	246	0xffffffff,
	247	0xffffffff,
3ea928f5 SC	248	false),
	249	HOWTO( 11,
	250	0,
	251	2,
	252	32,
	253	false,
	254	0,
	255	complain_overflow_bitfield,
	256	coff_arm_reloc,
	257	"rva32",
	258	true,
	259	0xffffffff,
	260	0xffffffff,
	261	PCRELOFFSET),
943fbd5b	262	};
177b1932 DE	263	#ifdef COFF_WITH_PE
	264	/* Return true if this relocation should
	265	appear in the output .reloc section. */
	266
	267	static boolean in_reloc_p (abfd, howto)
	268	bfd * abfd;
	269	reloc_howto_type *howto;
	270	{
	271	return !howto->pc_relative && howto->type != 11;
	272	}
	273	#endif
943fbd5b KR	274
943fbd5b KR	275
943fbd5b KR	276	#define RTYPE2HOWTO(cache_ptr, dst) \
	277	(cache_ptr)->howto = aoutarm_std_reloc_howto + (dst)->r_type;
	278
275143eb	279	#define coff_rtype_to_howto coff_arm_rtype_to_howto
a5655244	280
275143eb SC	281	static reloc_howto_type *
	282	coff_arm_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
	283	bfd *abfd;
	284	asection *sec;
	285	struct internal_reloc *rel;
	286	struct coff_link_hash_entry *h;
	287	struct internal_syment *sym;
	288	bfd_vma *addendp;
	289	{
	290	reloc_howto_type *howto;
	291
	292	howto = aoutarm_std_reloc_howto + rel->r_type;
	293
	294	if (rel->r_type == 11)
	295	{
a5655244	296	*addendp -= pe_data(sec->output_section->owner)->pe_opthdr.ImageBase;
275143eb	297	}
46686c78 NC	298
	299	/* The relocation_section function will skip pcrel_offset relocs
	300	when doing a relocateable link. However, we want to convert
	301	ARM26 to ARM26D relocs if possible. We return a fake howto in
	302	this case without pcrel_offset set, and adjust the addend to
	303	compensate. */
	304	if (rel->r_type == 3
	305	&& h != NULL
	306	&& (h->root.type == bfd_link_hash_defined
	307	\|\| h->root.type == bfd_link_hash_defweak)
	308	&& h->root.u.def.section->output_section == sec->output_section)
	309	{
	310	static reloc_howto_type fake_arm26_reloc =
	311	HOWTO (3,
	312	2,
	313	2,
	314	26,
	315	true,
	316	0,
	317	complain_overflow_signed,
	318	aoutarm_fix_pcrel_26 ,
	319	"ARM26",
	320	false,
	321	0x00ffffff,
	322	0x00ffffff,
	323	false);
	324
	325	*addendp -= rel->r_vaddr - sec->vma;
	326	return &fake_arm26_reloc;
	327	}
	328
275143eb SC	329	return howto;
	330
	331	}
	332	/* Used by the assembler. */
	333
943fbd5b KR	334	static bfd_reloc_status_type
	335	aoutarm_fix_pcrel_26_done (abfd, reloc_entry, symbol, data, input_section,
	336	output_bfd, error_message)
	337	bfd *abfd;
	338	arelent *reloc_entry;
	339	asymbol *symbol;
	340	PTR data;
	341	asection *input_section;
	342	bfd *output_bfd;
	343	char **error_message;
	344	{
	345	/* This is dead simple at present. */
	346	return bfd_reloc_ok;
	347	}
	348
275143eb SC	349	/* Used by the assembler. */
275143eb SC	350
943fbd5b KR	351	static bfd_reloc_status_type
	352	aoutarm_fix_pcrel_26 (abfd, reloc_entry, symbol, data, input_section,
	353	output_bfd, error_message)
	354	bfd *abfd;
	355	arelent *reloc_entry;
	356	asymbol *symbol;
	357	PTR data;
	358	asection *input_section;
	359	bfd *output_bfd;
	360	char **error_message;
	361	{
	362	bfd_vma relocation;
	363	bfd_size_type addr = reloc_entry->address;
	364	long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
	365	bfd_reloc_status_type flag = bfd_reloc_ok;
	366
	367	/* If this is an undefined symbol, return error */
	368	if (symbol->section == &bfd_und_section
	369	&& (symbol->flags & BSF_WEAK) == 0)
	370	return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
	371
	372	/* If the sections are different, and we are doing a partial relocation,
	373	just ignore it for now. */
	374	if (symbol->section->name != input_section->name
	375	&& output_bfd != (bfd *)NULL)
	376	return bfd_reloc_continue;
	377
	378	relocation = (target & 0x00ffffff) << 2;
	379	relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend */
	380	relocation += symbol->value;
	381	relocation += symbol->section->output_section->vma;
	382	relocation += symbol->section->output_offset;
	383	relocation += reloc_entry->addend;
	384	relocation -= input_section->output_section->vma;
	385	relocation -= input_section->output_offset;
	386	relocation -= addr;
	387	if (relocation & 3)
	388	return bfd_reloc_overflow;
	389
	390	/* Check for overflow */
	391	if (relocation & 0x02000000)
	392	{
	393	if ((relocation & ~0x03ffffff) != ~0x03ffffff)
	394	flag = bfd_reloc_overflow;
	395	}
	396	else if (relocation & ~0x03ffffff)
	397	flag = bfd_reloc_overflow;
	398
	399	target &= ~0x00ffffff;
	400	target \|= (relocation >> 2) & 0x00ffffff;
	401	bfd_put_32 (abfd, target, (bfd_byte *) data + addr);
	402
	403	/* Now the ARM magic... Change the reloc type so that it is marked as done.
	404	Strictly this is only necessary if we are doing a partial relocation. */
	405	reloc_entry->howto = &aoutarm_std_reloc_howto[7];
275143eb	406
943fbd5b KR	407	return flag;
	408	}
	409
275143eb	410
943fbd5b KR	411	static CONST struct reloc_howto_struct *
	412	arm_reloc_type_lookup(abfd,code)
	413	bfd *abfd;
	414	bfd_reloc_code_real_type code;
	415	{
	416	#define ASTD(i,j) case i: return &aoutarm_std_reloc_howto[j]
	417	if (code == BFD_RELOC_CTOR)
	418	switch (bfd_get_arch_info (abfd)->bits_per_address)
	419	{
	420	case 32:
	421	code = BFD_RELOC_32;
	422	break;
	423	default: return (CONST struct reloc_howto_struct *) 0;
	424	}
	425
	426	switch (code)
	427	{
	428	ASTD (BFD_RELOC_16, 1);
	429	ASTD (BFD_RELOC_32, 2);
	430	ASTD (BFD_RELOC_ARM_PCREL_BRANCH, 3);
	431	ASTD (BFD_RELOC_8_PCREL, 4);
	432	ASTD (BFD_RELOC_16_PCREL, 5);
	433	ASTD (BFD_RELOC_32_PCREL, 6);
3ea928f5	434	ASTD (BFD_RELOC_RVA, 11);
943fbd5b KR	435	default: return (CONST struct reloc_howto_struct *) 0;
	436	}
	437	}
	438
	439
	440	#define coff_bfd_reloc_type_lookup arm_reloc_type_lookup
	441
943fbd5b	442	#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (2)
943fbd5b	443	#define COFF_PAGE_SIZE 0x1000
943fbd5b KR	444	/* Turn a howto into a reloc nunmber */
	445
	446	#define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
	447	#define BADMAG(x) ARMBADMAG(x)
	448	#define ARM 1 /* Customize coffcode.h */
	449
	450
943fbd5b KR	451	/* We use the special COFF backend linker. */
	452	#define coff_relocate_section _bfd_coff_generic_relocate_section
	453
46686c78 NC	454	/* When doing a relocateable link, we want to convert ARM26 relocs
	455	into ARM26D relocs. */
	456
	457	static boolean
	458	coff_arm_adjust_symndx (obfd, info, ibfd, sec, irel, adjustedp)
	459	bfd *obfd;
	460	struct bfd_link_info *info;
	461	bfd *ibfd;
	462	asection *sec;
	463	struct internal_reloc *irel;
	464	boolean *adjustedp;
	465	{
	466	if (irel->r_type == 3)
	467	{
	468	struct coff_link_hash_entry *h;
	469
	470	h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
	471	if (h != NULL
	472	&& (h->root.type == bfd_link_hash_defined
	473	\|\| h->root.type == bfd_link_hash_defweak)
	474	&& h->root.u.def.section->output_section == sec->output_section)
	475	irel->r_type = 7;
	476	}
	477	*adjustedp = false;
	478	return true;
	479	}
	480
	481
	482	#define APCS_FLAG( abfd ) (coff_data (abfd)->flags & F_APCS_26)
	483	#define APCS_SET( abfd ) (coff_data (abfd)->flags & F_APCS_SET)
	484	#define SET_APCS_FLAG( abfd, flg ) (coff_data (abfd)->flags = (coff_data (abfd)->flags & ~ F_APCS_26) \| (flg \| F_APCS_SET))
	485
	486	/* Called when merging the private data areas of two BFDs.
	487	This is important as it allows us to detect if we are
	488	attempting to merge binaries compiled for different ARM
	489	targets, eg different CPUs or differents APCS's. */
	490
	491	boolean
	492	coff_arm_bfd_merge_private_bfd_data (ibfd, obfd)
	493	bfd * ibfd;
	494	bfd * obfd;
	495	{
	496	BFD_ASSERT (ibfd != NULL && obfd != NULL)
	497
	498	if (ibfd == obfd)
	499	return true;
	500
	501	/* If the two formats are different we cannot check anything */
	502	if (ibfd->xvec != obfd->xvec)
	503	return true;
	504
	505	/* Verify that the APCS is the same for the two BFDs */
	506	if (APCS_SET (ibfd))
	507	{
	508	if (APCS_SET (obfd))
	509	{
	510	/* If the src and dest have different APCS flag bits set, fail */
	511	if (APCS_FLAG (obfd) != APCS_FLAG (ibfd))
	512	{
	513	_bfd_error_handler
	514	("%s: ERROR: compiled for APCS-%d whereas target %s uses APCS-%d",
	515	bfd_get_filename (ibfd), APCS_FLAG (ibfd) ? 26 : 32,
	516	bfd_get_filename (obfd), APCS_FLAG (obfd) ? 26 : 32
	517	);
518
519	bfd_set_error (bfd_error_wrong_format);
520	return false;
521	}
522	}
523	else
524	SET_APCS_FLAG (obfd, APCS_FLAG (ibfd));
525	}
526
527	return true;
528	}
529
530
531	/* Display the flags field */
532
533	boolean
534	coff_arm_bfd_print_private_bfd_data (abfd, ptr)
535	bfd * abfd;
536	PTR ptr;
537	{
538	FILE * file = (FILE *) ptr;
539
540	BFD_ASSERT (abfd != NULL && ptr != NULL)
541
542	fprintf (file, "private flags = %x", coff_data( abfd )->flags);
543
544	if (APCS_SET (abfd))
545	fprintf (file, ": [APCS-%d]", APCS_FLAG( abfd ) ? 26 : 32);
546
547	fputc ('\n', file);
548
549	return true;
550	}
551
552
553	/* Copies the given flags into the coff_tdata.flags field.
554	Typically these flags come from the f_flags[] field of
555	the COFF filehdr structure, which contains important,
556	target specific information. */
557
558	boolean
559	coff_arm_bfd_set_private_flags (abfd, flags)
560	bfd * abfd;
561	flagword flags;
562	{
563	int flag;
564
565	BFD_ASSERT (abfd != NULL);
566
567	flag = (flags & F_APCS26) ? F_APCS_26 : 0;
568
569	/* Make sure that the APCS field has not been initialised to the opposite value */
570	if (APCS_SET (abfd) && (APCS_FLAG (abfd) != flag))
571	return false;
572
573	SET_APCS_FLAG (abfd, flag);
574
575	return true;
576	}
577
578
579	/* Copy the important parts of the target specific data
580	from one instance of a BFD to another. */
581
582	boolean
583	coff_arm_bfd_copy_private_bfd_data (src, dest)
584	bfd * src;
585	bfd * dest;
586	{
587	BFD_ASSERT (src != NULL && dest != NULL)
588
589	if (src == dest)
590	return true;
591
592	/* If the destination is not in the same format as the source, do not do the copy */
593	if (src->xvec != dest->xvec)
594	return true;
595
596	/* copy the flags field */
597	if (APCS_SET (src))
598	{
599	if (APCS_SET (dest))
600	{
601	/* If the src and dest have different APCS flag bits set, fail */
602	if (APCS_FLAG (dest) != APCS_FLAG (src))
603	return false;
604	}
605	else
606	SET_APCS_FLAG (dest, APCS_FLAG (src));
607	}
608
609	return true;
610	}
611
612
613	#define coff_adjust_symndx coff_arm_adjust_symndx
614	#define coff_bfd_merge_private_bfd_data coff_arm_bfd_merge_private_bfd_data
615	#define coff_bfd_print_private_bfd_data coff_arm_bfd_print_private_bfd_data
616	#define coff_bfd_set_private_flags coff_arm_bfd_set_private_flags
617	#define coff_bfd_copy_private_bfd_data coff_arm_bfd_copy_private_bfd_data
a5655244	618
943fbd5b KR	619	#include "coffcode.h"
943fbd5b KR	620
177b1932	621	const bfd_target
3ea928f5	622	#ifdef TARGET_LITTLE_SYM
177b1932 DE	623	TARGET_LITTLE_SYM =
	624	#else
	625	armcoff_little_vec =
	626	#endif
943fbd5b	627	{
177b1932 DE	628	#ifdef TARGET_LITTLE_NAME
	629	TARGET_LITTLE_NAME,
	630	#else
	631	"coff-arm-little",
	632	#endif
943fbd5b	633	bfd_target_coff_flavour,
46686c78 NC	634	BFD_ENDIAN_LITTLE, /* data byte order is little */
46686c78 NC	635	BFD_ENDIAN_LITTLE, /* header byte order is little */
943fbd5b KR	636
	637	(HAS_RELOC \| EXEC_P \| /* object flags */
	638	HAS_LINENO \| HAS_DEBUG \|
	639	HAS_SYMS \| HAS_LOCALS \| WP_TEXT \| D_PAGED),
	640
46686c78	641	#ifndef COFF_WITH_PE
943fbd5b	642	(SEC_HAS_CONTENTS \| SEC_ALLOC \| SEC_LOAD \| SEC_RELOC), /* section flags */
46686c78 NC	643	#else
	644	(SEC_HAS_CONTENTS \| SEC_ALLOC \| SEC_LOAD \| SEC_RELOC /* section flags */
	645	\| SEC_LINK_ONCE \| SEC_LINK_DUPLICATES),
	646	#endif
	647
943fbd5b KR	648	#ifdef TARGET_UNDERSCORE
	649	TARGET_UNDERSCORE, /* leading underscore */
	650	#else
	651	0, /* leading underscore */
	652	#endif
	653	'/', /* ar_pad_char */
	654	15, /* ar_max_namelen */
	655
943fbd5b KR	656	bfd_getl64, bfd_getl_signed_64, bfd_putl64,
	657	bfd_getl32, bfd_getl_signed_32, bfd_putl32,
	658	bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
	659	bfd_getl64, bfd_getl_signed_64, bfd_putl64,
	660	bfd_getl32, bfd_getl_signed_32, bfd_putl32,
	661	bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
	662
	663	/* Note that we allow an object file to be treated as a core file as well. */
da7afe3b SC	664	{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
da7afe3b SC	665	bfd_generic_archive_p, coff_object_p},
943fbd5b KR	666	{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
	667	bfd_false},
	668	{bfd_false, coff_write_object_contents, /* bfd_write_contents */
	669	_bfd_write_archive_contents, bfd_false},
	670
	671	BFD_JUMP_TABLE_GENERIC (coff),
	672	BFD_JUMP_TABLE_COPY (coff),
	673	BFD_JUMP_TABLE_CORE (_bfd_nocore),
	674	BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
	675	BFD_JUMP_TABLE_SYMBOLS (coff),
	676	BFD_JUMP_TABLE_RELOCS (coff),
	677	BFD_JUMP_TABLE_WRITE (coff),
	678	BFD_JUMP_TABLE_LINK (coff),
	679	BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
	680
	681	COFF_SWAP_TABLE,
	682	};
3ea928f5	683
177b1932	684	const bfd_target
3ea928f5	685	#ifdef TARGET_BIG_SYM
177b1932 DE	686	TARGET_BIG_SYM =
	687	#else
	688	armcoff_big_vec =
	689	#endif
3ea928f5	690	{
177b1932 DE	691	#ifdef TARGET_BIG_NAME
	692	TARGET_BIG_NAME,
	693	#else
	694	"coff-arm-big",
	695	#endif
3ea928f5	696	bfd_target_coff_flavour,
46686c78 NC	697	BFD_ENDIAN_BIG, /* data byte order is big */
46686c78 NC	698	BFD_ENDIAN_BIG, /* header byte order is big */
3ea928f5 SC	699
	700	(HAS_RELOC \| EXEC_P \| /* object flags */
	701	HAS_LINENO \| HAS_DEBUG \|
	702	HAS_SYMS \| HAS_LOCALS \| WP_TEXT \| D_PAGED),
	703
46686c78	704	#ifndef COFF_WITH_PE
3ea928f5	705	(SEC_HAS_CONTENTS \| SEC_ALLOC \| SEC_LOAD \| SEC_RELOC), /* section flags */
46686c78 NC	706	#else
	707	(SEC_HAS_CONTENTS \| SEC_ALLOC \| SEC_LOAD \| SEC_RELOC /* section flags */
	708	\| SEC_LINK_ONCE \| SEC_LINK_DUPLICATES),
	709	#endif
	710
3ea928f5 SC	711	#ifdef TARGET_UNDERSCORE
	712	TARGET_UNDERSCORE, /* leading underscore */
	713	#else
	714	0, /* leading underscore */
	715	#endif
	716	'/', /* ar_pad_char */
	717	15, /* ar_max_namelen */
	718
3ea928f5 SC	719	bfd_getb64, bfd_getb_signed_64, bfd_putb64,
	720	bfd_getb32, bfd_getb_signed_32, bfd_putb32,
	721	bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */
	722	bfd_getb64, bfd_getb_signed_64, bfd_putb64,
	723	bfd_getb32, bfd_getb_signed_32, bfd_putb32,
	724	bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
	725
	726	/* Note that we allow an object file to be treated as a core file as well. */
da7afe3b SC	727	{_bfd_dummy_target, coff_object_p, /* bfd_check_format */
da7afe3b SC	728	bfd_generic_archive_p, coff_object_p},
3ea928f5 SC	729	{bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
	730	bfd_false},
	731	{bfd_false, coff_write_object_contents, /* bfd_write_contents */
	732	_bfd_write_archive_contents, bfd_false},
	733
	734	BFD_JUMP_TABLE_GENERIC (coff),
	735	BFD_JUMP_TABLE_COPY (coff),
	736	BFD_JUMP_TABLE_CORE (_bfd_nocore),
	737	BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
	738	BFD_JUMP_TABLE_SYMBOLS (coff),
	739	BFD_JUMP_TABLE_RELOCS (coff),
	740	BFD_JUMP_TABLE_WRITE (coff),
	741	BFD_JUMP_TABLE_LINK (coff),
	742	BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
	743
	744	COFF_SWAP_TABLE,
	745	};