* Makefile.am (PROGS,bin_PROGRAMS): Add @BUILD_MISC@
[deliverable/binutils-gdb.git] / bfd / coff-h8300.c
CommitLineData
14aa9a78 1/* BFD back-end for Hitachi H8/300 COFF binaries.
d3e572fe 2 Copyright 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
14aa9a78 3 Written by Steve Chamberlain, <sac@cygnus.com>.
b4e42a64
SC
4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
a5655244 19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
b4e42a64 20
b4e42a64
SC
21#include "bfd.h"
22#include "sysdep.h"
b4e42a64 23#include "obstack.h"
4991ebb9
ILT
24#include "libbfd.h"
25#include "bfdlink.h"
d3e572fe 26#include "genlink.h"
e98e6ec1
SC
27#include "coff/h8300.h"
28#include "coff/internal.h"
b4e42a64
SC
29#include "libcoff.h"
30
e7d9ee90
SC
31#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
32
39f27966
JL
33/* We derive a hash table from the basic BFD hash table to
34 hold entries in the function vector. Aside from the
35 info stored by the basic hash table, we need the offset
36 of a particular entry within the hash table as well as
37 the offset where we'll add the next entry. */
38
39struct funcvec_hash_entry
40{
41 /* The basic hash table entry. */
42 struct bfd_hash_entry root;
43
44 /* The offset within the vectors section where
45 this entry lives. */
46 bfd_vma offset;
47};
48
49struct funcvec_hash_table
50{
51 /* The basic hash table. */
52 struct bfd_hash_table root;
53
54 bfd *abfd;
55
56 /* Offset at which we'll add the next entry. */
57 unsigned int offset;
58};
59
60static struct bfd_hash_entry *
61funcvec_hash_newfunc
62 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
63
64static boolean
65funcvec_hash_table_init
66 PARAMS ((struct funcvec_hash_table *, bfd *,
67 struct bfd_hash_entry *(*) PARAMS ((struct bfd_hash_entry *,
68 struct bfd_hash_table *,
69 const char *))));
70
71/* To lookup a value in the function vector hash table. */
72#define funcvec_hash_lookup(table, string, create, copy) \
73 ((struct funcvec_hash_entry *) \
74 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
75
76/* The derived h8300 COFF linker table. Note it's derived from
77 the generic linker hash table, not the COFF backend linker hash
78 table! We use this to attach additional data structures we
79 need while linking on the h8300. */
80struct h8300_coff_link_hash_table
81{
82 /* The main hash table. */
83 struct generic_link_hash_table root;
84
85 /* Section for the vectors table. This gets attached to a
86 random input bfd, we keep it here for easy access. */
87 asection *vectors_sec;
88
89 /* Hash table of the functions we need to enter into the function
90 vector. */
91 struct funcvec_hash_table *funcvec_hash_table;
92};
93
94static struct bfd_link_hash_table *h8300_coff_link_hash_table_create
95 PARAMS ((bfd *));
96
97/* Get the H8/300 COFF linker hash table from a link_info structure. */
98
99#define h8300_coff_hash_table(p) \
100 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
101
102/* Initialize fields within a funcvec hash table entry. Called whenever
103 a new entry is added to the funcvec hash table. */
104
105static struct bfd_hash_entry *
106funcvec_hash_newfunc (entry, gen_table, string)
107 struct bfd_hash_entry *entry;
108 struct bfd_hash_table *gen_table;
109 const char *string;
110{
111 struct funcvec_hash_entry *ret;
112 struct funcvec_hash_table *table;
113
114 ret = (struct funcvec_hash_entry *) entry;
115 table = (struct funcvec_hash_table *) gen_table;
116
117 /* Allocate the structure if it has not already been allocated by a
118 subclass. */
119 if (ret == NULL)
120 ret = ((struct funcvec_hash_entry *)
121 bfd_hash_allocate (gen_table,
122 sizeof (struct funcvec_hash_entry)));
123 if (ret == NULL)
124 return NULL;
125
126 /* Call the allocation method of the superclass. */
127 ret = ((struct funcvec_hash_entry *)
128 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
129
130 if (ret == NULL)
131 return NULL;
132
133 /* Note where this entry will reside in the function vector table. */
134 ret->offset = table->offset;
135
136 /* Bump the offset at which we store entries in the function
137 vector. We'd like to bump up the size of the vectors section,
138 but it's not easily available here. */
139 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
140 table->offset += 2;
34255b70
JL
141 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
142 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
39f27966
JL
143 table->offset += 4;
144 else
145 return NULL;
146
147 /* Everything went OK. */
148 return (struct bfd_hash_entry *) ret;
149}
150
151/* Initialize the function vector hash table. */
152
153static boolean
154funcvec_hash_table_init (table, abfd, newfunc)
155 struct funcvec_hash_table *table;
156 bfd *abfd;
157 struct bfd_hash_entry *(*newfunc) PARAMS ((struct bfd_hash_entry *,
158 struct bfd_hash_table *,
159 const char *));
160{
161 /* Initialize our local fields, then call the generic initialization
162 routine. */
163 table->offset = 0;
164 table->abfd = abfd;
165 return (bfd_hash_table_init (&table->root, newfunc));
166}
167
168/* Create the derived linker hash table. We use a derived hash table
169 basically to hold "static" information during an h8/300 coff link
170 without using static variables. */
171
172static struct bfd_link_hash_table *
173h8300_coff_link_hash_table_create (abfd)
174 bfd *abfd;
175{
176 struct h8300_coff_link_hash_table *ret;
177 ret = ((struct h8300_coff_link_hash_table *)
178 bfd_alloc (abfd, sizeof (struct h8300_coff_link_hash_table)));
179 if (ret == NULL)
180 return NULL;
c9f5444e 181 if (!_bfd_link_hash_table_init (&ret->root.root, abfd, _bfd_generic_link_hash_newfunc))
39f27966
JL
182 {
183 bfd_release (abfd, ret);
184 return NULL;
185 }
186
187 /* Initialize our data. */
188 ret->vectors_sec = NULL;
189 ret->funcvec_hash_table = NULL;
190
191 /* OK. Everything's intialized, return the base pointer. */
192 return &ret->root.root;
193}
e7d9ee90
SC
194
195/* special handling for H8/300 relocs.
196 We only come here for pcrel stuff and return normally if not an -r link.
197 When doing -r, we can't do any arithmetic for the pcrel stuff, because
198 the code in reloc.c assumes that we can manipulate the targets of
199 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
200 which means that the gap after the instruction may not be enough to
201 contain the offset required for the branch, so we have to use the only
202 the addend until the final link */
203
204static bfd_reloc_status_type
205special (abfd, reloc_entry, symbol, data, input_section, output_bfd,
206 error_message)
207 bfd *abfd;
208 arelent *reloc_entry;
209 asymbol *symbol;
210 PTR data;
211 asection *input_section;
212 bfd *output_bfd;
213 char **error_message;
214{
e7d9ee90
SC
215 if (output_bfd == (bfd *) NULL)
216 return bfd_reloc_continue;
217
218 return bfd_reloc_ok;
219}
220
14aa9a78 221static reloc_howto_type howto_table[] =
b4e42a64 222{
e7d9ee90
SC
223 HOWTO (R_RELBYTE, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8", false, 0x000000ff, 0x000000ff, false),
224 HOWTO (R_RELWORD, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16", false, 0x0000ffff, 0x0000ffff, false),
225 HOWTO (R_RELLONG, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "32", false, 0xffffffff, 0xffffffff, false),
226 HOWTO (R_PCRBYTE, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8", false, 0x000000ff, 0x000000ff, true),
227 HOWTO (R_PCRWORD, 0, 1, 16, true, 0, complain_overflow_signed, special, "DISP16", false, 0x0000ffff, 0x0000ffff, true),
228 HOWTO (R_PCRLONG, 0, 2, 32, true, 0, complain_overflow_signed, special, "DISP32", false, 0xffffffff, 0xffffffff, true),
fd7c5d73
JL
229 HOWTO (R_MOV16B1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", false, 0x0000ffff, 0x0000ffff, false),
230 HOWTO (R_MOV16B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", false, 0x000000ff, 0x000000ff, false),
e7d9ee90
SC
231 HOWTO (R_JMP1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16/pcrel", false, 0x0000ffff, 0x0000ffff, false),
232 HOWTO (R_JMP2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pcrecl/16", false, 0x000000ff, 0x000000ff, false),
e7d9ee90 233 HOWTO (R_JMPL1, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "24/pcrell", false, 0x00ffffff, 0x00ffffff, false),
fd7c5d73
JL
234 HOWTO (R_JMPL2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pc8/24", false, 0x000000ff, 0x000000ff, false),
235 HOWTO (R_MOV24B1, 0, 1, 32, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", false, 0xffffffff, 0xffffffff, false),
236 HOWTO (R_MOV24B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", false, 0x0000ffff, 0x0000ffff, false),
e98e6ec1 237
d3e572fe
ILT
238 /* An indirect reference to a function. This causes the function's address
239 to be added to the function vector in lo-mem and puts the address of
240 the function vector's entry in the jsr instruction. */
241 HOWTO (R_MEM_INDIRECT, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8/indirect", false, 0x000000ff, 0x000000ff, false),
242
c9f5444e
JL
243 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
244 branch is turned into an 8bit pc-relative branch. */
fd7c5d73
JL
245 HOWTO (R_PCRWORD_B, 0, 0, 8, true, 0, complain_overflow_bitfield, special, "relaxed bCC:16", false, 0x000000ff, 0x000000ff, false),
246
247 HOWTO (R_MOVL1, 0, 2, 32, false, 0, complain_overflow_bitfield,special, "32/24 relaxable move", false, 0xffffffff, 0xffffffff, false),
248
249 HOWTO (R_MOVL2, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "32/24 relaxed move", false, 0x0000ffff, 0x0000ffff, false),
250
142aa7d9
ILT
251 HOWTO (R_BCC_INV, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8 inverted", false, 0x000000ff, 0x000000ff, true),
252
253 HOWTO (R_JMP_DEL, 0, 0, 8, true, 0, complain_overflow_signed, special, "Deleted jump", false, 0x000000ff, 0x000000ff, true),
b4e42a64
SC
254};
255
256
257/* Turn a howto into a reloc number */
258
e98e6ec1 259#define SELECT_RELOC(x,howto) \
47e70c54 260 { x.r_type = select_reloc(howto); }
e98e6ec1 261
34255b70 262#define BADMAG(x) (H8300BADMAG(x) && H8300HBADMAG(x) && H8300SBADMAG(x))
14aa9a78 263#define H8300 1 /* Customize coffcode.h */
b4e42a64
SC
264#define __A_MAGIC_SET__
265
266
267
268/* Code to swap in the reloc */
e98e6ec1
SC
269#define SWAP_IN_RELOC_OFFSET bfd_h_get_32
270#define SWAP_OUT_RELOC_OFFSET bfd_h_put_32
b4e42a64
SC
271#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
272 dst->r_stuff[0] = 'S'; \
14aa9a78
ILT
273 dst->r_stuff[1] = 'C';
274
275
276static int
277select_reloc (howto)
278 reloc_howto_type *howto;
279{
280 return howto->type;
281}
b4e42a64
SC
282
283/* Code to turn a r_type into a howto ptr, uses the above howto table
284 */
285
14aa9a78
ILT
286static void
287rtype2howto (internal, dst)
288 arelent *internal;
289 struct internal_reloc *dst;
e98e6ec1 290{
14aa9a78
ILT
291 switch (dst->r_type)
292 {
e98e6ec1 293 case R_RELBYTE:
14aa9a78 294 internal->howto = howto_table + 0;
e98e6ec1
SC
295 break;
296 case R_RELWORD:
14aa9a78
ILT
297 internal->howto = howto_table + 1;
298 break;
299 case R_RELLONG:
300 internal->howto = howto_table + 2;
301 break;
e98e6ec1 302 case R_PCRBYTE:
14aa9a78 303 internal->howto = howto_table + 3;
e98e6ec1
SC
304 break;
305 case R_PCRWORD:
14aa9a78
ILT
306 internal->howto = howto_table + 4;
307 break;
308 case R_PCRLONG:
309 internal->howto = howto_table + 5;
e98e6ec1 310 break;
fd7c5d73 311 case R_MOV16B1:
e98e6ec1
SC
312 internal->howto = howto_table + 6;
313 break;
fd7c5d73 314 case R_MOV16B2:
e98e6ec1
SC
315 internal->howto = howto_table + 7;
316 break;
317 case R_JMP1:
14aa9a78 318 internal->howto = howto_table + 8;
e98e6ec1 319 break;
e98e6ec1 320 case R_JMP2:
14aa9a78
ILT
321 internal->howto = howto_table + 9;
322 break;
323 case R_JMPL1:
324 internal->howto = howto_table + 10;
325 break;
fd7c5d73 326 case R_JMPL2:
14aa9a78
ILT
327 internal->howto = howto_table + 11;
328 break;
fd7c5d73 329 case R_MOV24B1:
14aa9a78
ILT
330 internal->howto = howto_table + 12;
331 break;
fd7c5d73 332 case R_MOV24B2:
14aa9a78 333 internal->howto = howto_table + 13;
e98e6ec1 334 break;
d3e572fe
ILT
335 case R_MEM_INDIRECT:
336 internal->howto = howto_table + 14;
337 break;
c9f5444e
JL
338 case R_PCRWORD_B:
339 internal->howto = howto_table + 15;
340 break;
fd7c5d73
JL
341 case R_MOVL1:
342 internal->howto = howto_table + 16;
343 break;
344 case R_MOVL2:
345 internal->howto = howto_table + 17;
346 break;
142aa7d9
ILT
347 case R_BCC_INV:
348 internal->howto = howto_table + 18;
349 break;
350 case R_JMP_DEL:
351 internal->howto = howto_table + 19;
352 break;
e98e6ec1 353 default:
d3e572fe 354 abort ();
e98e6ec1
SC
355 break;
356 }
357}
358
359#define RTYPE2HOWTO(internal, relocentry) rtype2howto(internal,relocentry)
b4e42a64
SC
360
361
362/* Perform any necessaru magic to the addend in a reloc entry */
363
364
365#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
366 cache_ptr->addend = ext_reloc.r_offset;
367
14aa9a78 368
e98e6ec1
SC
369#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
370 reloc_processing(relent, reloc, symbols, abfd, section)
371
14aa9a78 372static void
47e70c54
SC
373reloc_processing (relent, reloc, symbols, abfd, section)
374 arelent * relent;
375 struct internal_reloc *reloc;
376 asymbol ** symbols;
377 bfd * abfd;
378 asection * section;
e98e6ec1 379{
14aa9a78
ILT
380 relent->address = reloc->r_vaddr;
381 rtype2howto (relent, reloc);
382
383 if (((int) reloc->r_symndx) > 0)
384 {
385 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
386 }
387 else
388 {
e7d9ee90 389 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
14aa9a78
ILT
390 }
391
392
393
394 relent->addend = reloc->r_offset;
395
396 relent->address -= section->vma;
397 /* relent->section = 0;*/
398}
399
142aa7d9
ILT
400static boolean
401h8300_symbol_address_p (abfd, input_section, address)
402 bfd *abfd;
403 asection *input_section;
404 bfd_vma address;
405{
406 asymbol **s;
407
408 s = _bfd_generic_link_get_symbols (abfd);
409 BFD_ASSERT (s != (asymbol **) NULL);
410
411 /* Search all the symbols for one in INPUT_SECTION with
412 address ADDRESS. */
413 while (*s)
414 {
415 asymbol *p = *s;
416 if (p->section == input_section
417 && (input_section->output_section->vma
418 + input_section->output_offset
419 + p->value) == address)
420 return true;
421 s++;
422 }
423 return false;
424}
425
426
fd7c5d73
JL
427/* If RELOC represents a relaxable instruction/reloc, change it into
428 the relaxed reloc, notify the linker that symbol addresses
429 have changed (bfd_perform_slip) and return how much the current
430 section has shrunk by.
431
432 FIXME: Much of this code has knowledge of the ordering of entries
433 in the howto table. This needs to be fixed. */
14aa9a78
ILT
434
435static int
47e70c54
SC
436h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
437 bfd *abfd;
14aa9a78 438 asection *input_section;
14aa9a78
ILT
439 arelent *reloc;
440 unsigned int shrink;
4991ebb9 441 struct bfd_link_info *link_info;
14aa9a78
ILT
442{
443 bfd_vma value;
444 bfd_vma dot;
445 bfd_vma gap;
142aa7d9
ILT
446 static asection *last_input_section = NULL;
447 static arelent *last_reloc = NULL;
14aa9a78
ILT
448
449 /* The address of the thing to be relocated will have moved back by
fd7c5d73
JL
450 the size of the shrink - but we don't change reloc->address here,
451 since we need it to know where the relocation lives in the source
452 uncooked section. */
14aa9a78 453 bfd_vma address = reloc->address - shrink;
e98e6ec1 454
142aa7d9
ILT
455 if (input_section != last_input_section)
456 last_reloc = NULL;
457
fd7c5d73 458 /* Only examine the relocs which might be relaxable. */
14aa9a78
ILT
459 switch (reloc->howto->type)
460 {
14aa9a78 461
fd7c5d73
JL
462 /* This is the 16/24 bit absolute branch which could become an 8 bit
463 pc-relative branch. */
464 case R_JMP1:
465 case R_JMPL1:
466 /* Get the address of the target of this branch. */
4991ebb9
ILT
467 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
468
fd7c5d73
JL
469 /* Get the address of the next instruction (not the reloc). */
470 dot = (input_section->output_section->vma
471 + input_section->output_offset + address);
14aa9a78 472
fd7c5d73
JL
473 /* Adjust for R_JMP1 vs R_JMPL1. */
474 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
475
476 /* Compute the distance from this insn to the branch target. */
477 gap = value - dot;
478
479 /* If the distance is within -128..+128 inclusive, then we can relax
480 this jump. +128 is valid since the target will move two bytes
142aa7d9 481 closer if we do relax this branch. */
fd7c5d73
JL
482 if ((int)gap >= -128 && (int)gap <= 128 )
483 {
142aa7d9
ILT
484
485 /* It's possible we may be able to eliminate this branch entirely;
486 if the previous instruction is a branch around this instruction,
487 and there's no label at this instruction, then we can reverse
488 the condition on the previous branch and eliminate this jump.
489
490 original: new:
491 bCC lab1 bCC' lab2
492 jmp lab2
493 lab1: lab1:
494
495 This saves 4 bytes instead of two, and should be relatively
496 common. */
497
498 if (gap <= 126
499 && last_reloc
500 && last_reloc->howto->type == R_PCRBYTE)
501 {
502 bfd_vma last_value;
503 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
504 input_section) + 1;
505
506 if (last_value == dot + 2
507 && last_reloc->address + 1 == reloc->address
508 && ! h8300_symbol_address_p (abfd, input_section, dot - 2))
509 {
510 reloc->howto = howto_table + 19;
511 last_reloc->howto = howto_table + 18;
512 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
513 last_reloc->addend = reloc->addend;
514 shrink += 4;
515 bfd_perform_slip (abfd, 4, input_section, address);
516 break;
517 }
518 }
519
fd7c5d73 520 /* Change the reloc type. */
14aa9a78 521 reloc->howto = reloc->howto + 1;
14aa9a78 522
fd7c5d73
JL
523 /* This shrinks this section by two bytes. */
524 shrink += 2;
525 bfd_perform_slip(abfd, 2, input_section, address);
526 }
14aa9a78 527 break;
14aa9a78 528
fd7c5d73
JL
529 /* This is the 16 bit pc-relative branch which could become an 8 bit
530 pc-relative branch. */
531 case R_PCRWORD:
532 /* Get the address of the target of this branch, add one to the value
533 because the addend field in PCrel jumps is off by -1. */
534 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section) + 1;
14aa9a78 535
fd7c5d73 536 /* Get the address of the next instruction if we were to relax. */
14aa9a78
ILT
537 dot = input_section->output_section->vma +
538 input_section->output_offset + address;
e98e6ec1 539
fd7c5d73
JL
540 /* Compute the distance from this insn to the branch target. */
541 gap = value - dot;
14aa9a78 542
fd7c5d73
JL
543 /* If the distance is within -128..+128 inclusive, then we can relax
544 this jump. +128 is valid since the target will move two bytes
545 closer if we do relax this branch. */
546 if ((int)gap >= -128 && (int)gap <= 128 )
14aa9a78 547 {
fd7c5d73
JL
548 /* Change the reloc type. */
549 reloc->howto = howto_table + 15;
14aa9a78 550
fd7c5d73
JL
551 /* This shrinks this section by two bytes. */
552 shrink += 2;
47e70c54 553 bfd_perform_slip(abfd, 2, input_section, address);
14aa9a78
ILT
554 }
555 break;
556
fd7c5d73
JL
557 /* This is a 16 bit absolute address in a mov.b insn, which can
558 become an 8 bit absolute address if it's in the right range. */
559 case R_MOV16B1:
560 /* Get the address of the data referenced by this mov.b insn. */
4991ebb9 561 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
14aa9a78 562
fd7c5d73
JL
563 /* The address is in 0xff00..0xffff inclusive on the h8300 or
564 0xffff00..0xffffff inclusive on the h8300h, then we can
565 relax this mov.b */
566 if ((bfd_get_mach (abfd) == bfd_mach_h8300
567 && value >= 0xff00
568 && value <= 0xffff)
34255b70
JL
569 || ((bfd_get_mach (abfd) == bfd_mach_h8300h
570 || bfd_get_mach (abfd) == bfd_mach_h8300s)
fd7c5d73
JL
571 && value >= 0xffff00
572 && value <= 0xffffff))
573 {
574 /* Change the reloc type. */
575 reloc->howto = reloc->howto + 1;
14aa9a78 576
fd7c5d73
JL
577 /* This shrinks this section by two bytes. */
578 shrink += 2;
47e70c54 579 bfd_perform_slip(abfd, 2, input_section, address);
14aa9a78
ILT
580 }
581 break;
14aa9a78 582
fd7c5d73
JL
583 /* Similarly for a 24 bit absolute address in a mov.b. Note that
584 if we can't relax this into an 8 bit absolute, we'll fall through
585 and try to relax it into a 16bit absolute. */
586 case R_MOV24B1:
587 /* Get the address of the data referenced by this mov.b insn. */
c9f5444e 588 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
c9f5444e 589
fd7c5d73
JL
590 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
591 then we can relax this mov.b */
34255b70
JL
592 if ((bfd_get_mach (abfd) == bfd_mach_h8300h
593 || bfd_get_mach (abfd) == bfd_mach_h8300s)
fd7c5d73
JL
594 && value >= 0xffff00
595 && value <= 0xffffff)
596 {
597 /* Change the reloc type. */
598 reloc->howto = reloc->howto + 1;
c9f5444e 599
fd7c5d73
JL
600 /* This shrinks this section by four bytes. */
601 shrink += 4;
602 bfd_perform_slip(abfd, 4, input_section, address);
c9f5444e 603
fd7c5d73
JL
604 /* Done with this reloc. */
605 break;
606 }
607
608 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
609 reloc. */
c9f5444e 610
fd7c5d73
JL
611 /* This is a 24/32 bit absolute address in a mov insn, which can
612 become an 16 bit absolute address if it's in the right range. */
613 case R_MOVL1:
614 /* Get the address of the data referenced by this mov insn. */
615 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
616
617 /* If this address is in 0x0000..0x7fff inclusive or
618 0xff8000..0xffffff inclusive, then it can be relaxed. */
619 if (value <= 0x7fff || value >= 0xff8000)
620 {
621 /* Change the reloc type. */
622 reloc->howto = howto_table + 17;
623
624 /* This shrinks this section by two bytes. */
625 shrink += 2;
c9f5444e
JL
626 bfd_perform_slip(abfd, 2, input_section, address);
627 }
628 break;
fd7c5d73
JL
629
630 /* No other reloc types represent relaxing opportunities. */
631 default:
632 break;
c9f5444e
JL
633 }
634
142aa7d9
ILT
635 last_reloc = reloc;
636 last_input_section = input_section;
14aa9a78 637 return shrink;
e98e6ec1
SC
638}
639
14aa9a78 640
fd7c5d73
JL
641/* Handle relocations for the H8/300, including relocs for relaxed
642 instructions.
14aa9a78 643
fd7c5d73 644 FIXME: Not all relocations check for overflow! */
39f27966 645
14aa9a78 646static void
4991ebb9
ILT
647h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
648 dst_ptr)
14aa9a78 649 bfd *abfd;
4991ebb9
ILT
650 struct bfd_link_info *link_info;
651 struct bfd_link_order *link_order;
14aa9a78
ILT
652 arelent *reloc;
653 bfd_byte *data;
654 unsigned int *src_ptr;
655 unsigned int *dst_ptr;
656{
657 unsigned int src_address = *src_ptr;
658 unsigned int dst_address = *dst_ptr;
4991ebb9 659 asection *input_section = link_order->u.indirect.section;
fd7c5d73
JL
660 bfd_vma value;
661 bfd_vma dot;
662 int gap,tmp;
14aa9a78
ILT
663
664 switch (reloc->howto->type)
665 {
fd7c5d73
JL
666
667 /* Generic 8bit pc-relative relocation. */
14aa9a78 668 case R_PCRBYTE:
fd7c5d73
JL
669 /* Get the address of the target of this branch. */
670 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
14aa9a78 671
fd7c5d73
JL
672 dot = (link_order->offset
673 + dst_address
674 + link_order->u.indirect.section->output_section->vma);
675
676 gap = value - dot;
677
678 /* Sanity check. */
679 if (gap < -128 || gap > 126)
680 {
681 if (! ((*link_info->callbacks->reloc_overflow)
682 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
683 reloc->howto->name, reloc->addend, input_section->owner,
684 input_section, reloc->address)))
685 abort ();
686 }
687
688 /* Everything looks OK. Apply the relocation and update the
689 src/dst address appropriately. */
690
691 bfd_put_8 (abfd, gap, data + dst_address);
692 dst_address++;
693 src_address++;
694
695 /* All done. */
696 break;
697
698 /* Generic 16bit pc-relative relocation. */
47e70c54 699 case R_PCRWORD:
fd7c5d73
JL
700 /* Get the address of the target of this branch. */
701 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
47e70c54 702
fd7c5d73
JL
703 /* Get the address of the instruction (not the reloc). */
704 dot = (link_order->offset
705 + dst_address
706 + link_order->u.indirect.section->output_section->vma + 1);
707
708 gap = value - dot;
709
710 /* Sanity check. */
711 if (gap > 32766 || gap < -32768)
712 {
713 if (! ((*link_info->callbacks->reloc_overflow)
714 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
715 reloc->howto->name, reloc->addend, input_section->owner,
716 input_section, reloc->address)))
717 abort ();
718 }
719
720 /* Everything looks OK. Apply the relocation and update the
721 src/dst address appropriately. */
14aa9a78 722
fd7c5d73
JL
723 bfd_put_16 (abfd, gap, data + dst_address);
724 dst_address += 2;
725 src_address += 2;
726
727 /* All done. */
728 break;
729
730 /* Generic 8bit absolute relocation. */
14aa9a78 731 case R_RELBYTE:
fd7c5d73
JL
732 /* Get the address of the object referenced by this insn. */
733 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
734
735 /* Sanity check. */
bcb686ca 736 if (value <= 0xff
fd7c5d73
JL
737 || (value >= 0x0000ff00 && value <= 0x0000ffff)
738 || (value >= 0x00ffff00 && value <= 0x00ffffff)
739 || (value >= 0xffffff00 && value <= 0xffffffff))
740 {
741 /* Everything looks OK. Apply the relocation and update the
742 src/dst address appropriately. */
743
bcb686ca 744 bfd_put_8 (abfd, value & 0xff, data + dst_address);
fd7c5d73
JL
745 dst_address += 1;
746 src_address += 1;
747 }
748 else
749 {
750 if (! ((*link_info->callbacks->reloc_overflow)
751 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
752 reloc->howto->name, reloc->addend, input_section->owner,
753 input_section, reloc->address)))
754 abort ();
755 }
756
757 /* All done. */
14aa9a78 758 break;
fd7c5d73
JL
759
760 /* Various simple 16bit absolute relocations. */
761 case R_MOV16B1:
14aa9a78 762 case R_JMP1:
14aa9a78 763 case R_RELWORD:
fd7c5d73
JL
764 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
765 bfd_put_16 (abfd, value, data + dst_address);
14aa9a78
ILT
766 dst_address += 2;
767 src_address += 2;
768 break;
fd7c5d73
JL
769
770 /* Various simple 24/32bit absolute relocations. */
771 case R_MOV24B1:
772 case R_MOVL1:
14aa9a78 773 case R_RELLONG:
fd7c5d73
JL
774 /* Get the address of the target of this branch. */
775 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section),
776 bfd_put_32 (abfd, value, data + dst_address);
14aa9a78
ILT
777 dst_address += 4;
778 src_address += 4;
779 break;
780
fd7c5d73
JL
781 /* Another 24/32bit absolute relocation. */
782 case R_JMPL1:
783 /* Get the address of the target of this branch. */
784 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
14aa9a78 785
fd7c5d73
JL
786 value = ((value & 0x00ffffff)
787 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
788 bfd_put_32 (abfd, value, data + dst_address);
789 dst_address += 4;
790 src_address += 4;
791 break;
14aa9a78 792
fd7c5d73
JL
793 /* A 16bit abolute relocation that was formerlly a 24/32bit
794 absolute relocation. */
795 case R_MOVL2:
796 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
14aa9a78 797
fd7c5d73
JL
798 /* Sanity check. */
799 if (value < 0x8000 || value > 0xff8000)
800 {
801 /* Insert the 16bit value into the proper location. */
802 bfd_put_16 (abfd, value, data + dst_address);
803
804 /* Fix the opcode. For all the move insns, we simply
805 need to turn off bit 0x20 in the previous byte. */
806 data[dst_address - 1] &= ~0x20;
807 dst_address += 2;
808 src_address += 4;
809 }
810 else
811 {
812 if (! ((*link_info->callbacks->reloc_overflow)
813 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
814 reloc->howto->name, reloc->addend, input_section->owner,
815 input_section, reloc->address)))
816 abort ();
817 }
14aa9a78
ILT
818 break;
819
fd7c5d73 820 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
14aa9a78 821 case R_JMP2:
fd7c5d73
JL
822 /* Get the address of the target of this branch. */
823 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
14aa9a78 824
fd7c5d73
JL
825 /* Get the address of the next instruction. */
826 dot = (link_order->offset
827 + dst_address
828 + link_order->u.indirect.section->output_section->vma + 1);
14aa9a78 829
fd7c5d73 830 gap = value - dot;
14aa9a78 831
fd7c5d73
JL
832 /* Sanity check. */
833 if (gap < -128 || gap > 126)
834 {
835 if (! ((*link_info->callbacks->reloc_overflow)
836 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
837 reloc->howto->name, reloc->addend, input_section->owner,
838 input_section, reloc->address)))
14aa9a78 839 abort ();
fd7c5d73 840 }
14aa9a78 841
fd7c5d73
JL
842 /* Now fix the instruction itself. */
843 switch (data[dst_address - 1])
844 {
845 case 0x5e:
846 /* jsr -> bsr */
847 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
848 break;
849 case 0x5a:
850 /* jmp ->bra */
851 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
852 break;
c9f5444e 853
fd7c5d73
JL
854 default:
855 abort ();
856 }
c9f5444e 857
fd7c5d73
JL
858 /* Write out the 8bit value. */
859 bfd_put_8 (abfd, gap, data + dst_address);
c9f5444e 860
fd7c5d73
JL
861 dst_address += 1;
862 src_address += 3;
c9f5444e 863
fd7c5d73 864 break;
c9f5444e 865
fd7c5d73
JL
866 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
867 case R_PCRWORD_B:
868 /* Get the address of the target of this branch. */
869 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
c9f5444e 870
fd7c5d73
JL
871 /* Get the address of the instruction (not the reloc). */
872 dot = (link_order->offset
873 + dst_address
874 + link_order->u.indirect.section->output_section->vma - 1);
c9f5444e 875
fd7c5d73 876 gap = value - dot;
c9f5444e 877
fd7c5d73
JL
878 /* Sanity check. */
879 if (gap < -128 || gap > 126)
880 {
881 if (! ((*link_info->callbacks->reloc_overflow)
882 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
883 reloc->howto->name, reloc->addend, input_section->owner,
884 input_section, reloc->address)))
c9f5444e 885 abort ();
fd7c5d73
JL
886 }
887
888 /* Now fix the instruction. */
889 switch (data[dst_address - 2])
890 {
891 case 0x58:
892 /* bCC:16 -> bCC:8 */
893 /* Get the condition code from the original insn. */
894 tmp = data[dst_address - 1];
895 tmp &= 0xf0;
896 tmp >>= 4;
897
898 /* Now or in the high nibble of the opcode. */
899 tmp |= 0x40;
900
901 /* Write it. */
902 bfd_put_8 (abfd, tmp, data + dst_address - 2);
903 break;
904
905 default:
906 abort ();
907 }
c9f5444e
JL
908
909 /* Output the target. */
910 bfd_put_8 (abfd, gap, data + dst_address - 1);
911
912 /* We don't advance dst_address -- the 8bit reloc is applied at
fd7c5d73 913 dst_address - 1, so the next insn should begin at dst_address. */
c9f5444e
JL
914 src_address += 2;
915
916 break;
14aa9a78 917
fd7c5d73
JL
918 /* Similarly for a 24bit absolute that is now 8 bits. */
919 case R_JMPL2:
920 /* Get the address of the target of this branch. */
921 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
922
923 /* Get the address of the instruction (not the reloc). */
924 dot = (link_order->offset
925 + dst_address
926 + link_order->u.indirect.section->output_section->vma + 2);
14aa9a78 927
fd7c5d73 928 gap = value - dot;
14aa9a78 929
fd7c5d73
JL
930 /* Fix the instruction. */
931 switch (data[src_address])
932 {
933 case 0x5e:
934 /* jsr -> bsr */
935 bfd_put_8 (abfd, 0x55, data + dst_address);
936 break;
937 case 0x5a:
938 /* jmp ->bra */
939 bfd_put_8 (abfd, 0x40, data + dst_address);
940 break;
941 default:
14aa9a78 942 abort ();
fd7c5d73
JL
943 }
944
945 bfd_put_8 (abfd, gap, data + dst_address + 1);
946 dst_address += 2;
947 src_address += 4;
14aa9a78 948
fd7c5d73 949 break;
14aa9a78 950
fd7c5d73
JL
951 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
952 case R_MOV16B2:
953 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
14aa9a78 954
fd7c5d73
JL
955 /* Sanity check. */
956 if (data[dst_address - 2] != 0x6a)
957 abort ();
14aa9a78 958
fd7c5d73
JL
959 /* Fix up the opcode. */
960 switch (data[src_address-1] & 0xf0)
961 {
962 case 0x00:
963 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x20;
964 break;
965 case 0x80:
966 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x30;
967 break;
968 default:
969 abort ();
970 }
971
972 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
973 src_address += 2;
974 break;
975
976 /* Similarly for a 24bit mov.b */
977 case R_MOV24B2:
978 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
979
980 /* Sanity check. */
981 if (data[dst_address - 2] != 0x6a)
982 abort ();
983
984 /* Fix up the opcode. */
985 switch (data[src_address-1] & 0xf0)
986 {
987 case 0x20:
988 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x20;
989 break;
990 case 0xa0:
991 data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x30;
992 break;
993 default:
994 abort ();
995 }
996
997 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
998 src_address += 4;
14aa9a78 999 break;
14aa9a78 1000
142aa7d9
ILT
1001 case R_BCC_INV:
1002 /* Get the address of the target of this branch. */
1003 value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
1004
1005 dot = (link_order->offset
1006 + dst_address
1007 + link_order->u.indirect.section->output_section->vma) + 1;
1008
1009 gap = value - dot;
1010
1011 /* Sanity check. */
1012 if (gap < -128 || gap > 126)
1013 {
1014 if (! ((*link_info->callbacks->reloc_overflow)
1015 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1016 reloc->howto->name, reloc->addend, input_section->owner,
1017 input_section, reloc->address)))
1018 abort ();
1019 }
1020
1021 /* Everything looks OK. Fix the condition in the instruction, apply
1022 the relocation, and update the src/dst address appropriately. */
1023
1024 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1025 data + dst_address - 1);
1026 bfd_put_8 (abfd, gap, data + dst_address);
1027 dst_address++;
1028 src_address++;
1029
1030 /* All done. */
1031 break;
1032
1033 case R_JMP_DEL:
1034 src_address += 4;
1035 break;
1036
39f27966
JL
1037 /* An 8bit memory indirect instruction (jmp/jsr).
1038
1039 There's several things that need to be done to handle
1040 this relocation.
1041
1042 If this is a reloc against the absolute symbol, then
1043 we should handle it just R_RELBYTE. Likewise if it's
1044 for a symbol with a value ge 0 and le 0xff.
1045
1046 Otherwise it's a jump/call through the function vector,
1047 and the linker is expected to set up the function vector
1048 and put the right value into the jump/call instruction. */
1049 case R_MEM_INDIRECT:
1050 {
1051 /* We need to find the symbol so we can determine it's
1052 address in the function vector table. */
1053 asymbol *symbol;
1054 bfd_vma value;
142aa7d9 1055 const char *name;
39f27966
JL
1056 struct funcvec_hash_entry *h;
1057 asection *vectors_sec = h8300_coff_hash_table (link_info)->vectors_sec;
1058
1059 /* First see if this is a reloc against the absolute symbol
1060 or against a symbol with a nonnegative value <= 0xff. */
1061 symbol = *(reloc->sym_ptr_ptr);
1062 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1063 if (symbol == bfd_abs_section_ptr->symbol
1064 || (value >= 0 && value <= 0xff))
1065 {
1066 /* This should be handled in a manner very similar to
1067 R_RELBYTES. If the value is in range, then just slam
1068 the value into the right location. Else trigger a
1069 reloc overflow callback. */
1070 if (value >= 0 && value <= 0xff)
1071 {
1072 bfd_put_8 (abfd, value, data + dst_address);
1073 dst_address += 1;
1074 src_address += 1;
1075 }
1076 else
1077 {
1078 if (! ((*link_info->callbacks->reloc_overflow)
1079 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1080 reloc->howto->name, reloc->addend, input_section->owner,
1081 input_section, reloc->address)))
1082 abort ();
1083 }
1084 break;
1085 }
1086
1087 /* This is a jump/call through a function vector, and we're
1088 expected to create the function vector ourselves.
1089
1090 First look up this symbol in the linker hash table -- we need
1091 the derived linker symbol which holds this symbol's index
1092 in the function vector. */
1093 name = symbol->name;
1094 if (symbol->flags & BSF_LOCAL)
1095 {
1096 char *new_name = bfd_malloc (strlen (name) + 9);
1097 if (new_name == NULL)
1098 abort ();
1099
1100 strcpy (new_name, name);
1101 sprintf (new_name + strlen (name), "_%08x",
1102 (int)symbol->section);
1103 name = new_name;
1104 }
1105
1106 h = funcvec_hash_lookup (h8300_coff_hash_table (link_info)->funcvec_hash_table,
1107 name, false, false);
1108
1109 /* This shouldn't ever happen. If it does that means we've got
1110 data corruption of some kind. Aborting seems like a reasonable
1111 think to do here. */
1112 if (h == NULL || vectors_sec == NULL)
1113 abort ();
1114
1115 /* Place the address of the function vector entry into the
1116 reloc's address. */
1117 bfd_put_8 (abfd,
1118 vectors_sec->output_offset + h->offset,
1119 data + dst_address);
1120
1121 dst_address++;
1122 src_address++;
1123
1124 /* Now create an entry in the function vector itself. */
1125 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1126 bfd_put_16 (abfd,
1127 bfd_coff_reloc16_get_value (reloc,
1128 link_info,
1129 input_section),
1130 vectors_sec->contents + h->offset);
34255b70
JL
1131 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1132 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
39f27966
JL
1133 bfd_put_32 (abfd,
1134 bfd_coff_reloc16_get_value (reloc,
1135 link_info,
1136 input_section),
1137 vectors_sec->contents + h->offset);
1138 else
1139 abort ();
1140
1141 /* Gross. We've already written the contents of the vector section
1142 before we get here... So we write it again with the new data. */
1143 bfd_set_section_contents (vectors_sec->output_section->owner,
1144 vectors_sec->output_section,
1145 vectors_sec->contents,
1146 vectors_sec->output_offset,
1147 vectors_sec->_raw_size);
1148 break;
1149 }
1150
1151 default:
14aa9a78
ILT
1152 abort ();
1153 break;
1154
1155 }
39f27966 1156
14aa9a78
ILT
1157 *src_ptr = src_address;
1158 *dst_ptr = dst_address;
39f27966
JL
1159}
1160
1161
1162/* Routine for the h8300 linker.
1163
1164 This routine is necessary to handle the special R_MEM_INDIRECT
1165 relocs on the h8300. It's responsible for generating a vectors
1166 section and attaching it to an input bfd as well as sizing
1167 the vectors section. It also creates our vectors hash table.
1168
1169 It uses the generic linker routines to actually add the symbols.
1170 from this BFD to the bfd linker hash table. It may add a few
1171 selected static symbols to the bfd linker hash table. */
1172
1173static boolean
1174h8300_bfd_link_add_symbols(abfd, info)
1175 bfd *abfd;
1176 struct bfd_link_info *info;
1177{
1178 asection *sec;
1179 struct funcvec_hash_table *funcvec_hash_table;
1180
1181 /* If we haven't created a vectors section, do so now. */
1182 if (!h8300_coff_hash_table (info)->vectors_sec)
1183 {
1184 flagword flags;
1185
1186 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1187 flags = (SEC_ALLOC | SEC_LOAD
1188 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1189 h8300_coff_hash_table (info)->vectors_sec = bfd_make_section (abfd,
1190 ".vectors");
1191
1192 /* If the section wasn't created, or we couldn't set the flags,
1193 quit quickly now, rather than dieing a painful death later. */
1194 if (! h8300_coff_hash_table (info)->vectors_sec
1195 || ! bfd_set_section_flags (abfd,
1196 h8300_coff_hash_table(info)->vectors_sec,
1197 flags))
1198 return false;
1199
1200 /* Also create the vector hash table. */
1201 funcvec_hash_table = ((struct funcvec_hash_table *)
1202 bfd_alloc (abfd, sizeof (struct funcvec_hash_table)));
1203
1204 if (!funcvec_hash_table)
1205 return false;
1206
1207 /* And initialize the funcvec hash table. */
1208 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1209 funcvec_hash_newfunc))
1210 {
1211 bfd_release (abfd, funcvec_hash_table);
1212 return false;
1213 }
1214
1215 /* Store away a pointer to the funcvec hash table. */
1216 h8300_coff_hash_table (info)->funcvec_hash_table = funcvec_hash_table;
1217 }
1218
1219 /* Load up the function vector hash table. */
1220 funcvec_hash_table = h8300_coff_hash_table (info)->funcvec_hash_table;
1221
1222 /* Add the symbols using the generic code. */
1223 _bfd_generic_link_add_symbols (abfd, info);
1224
1225 /* Now scan the relocs for all the sections in this bfd; create
1226 additional space in the .vectors section as needed. */
1227 for (sec = abfd->sections; sec; sec = sec->next)
1228 {
1229 unsigned long reloc_size, reloc_count, i;
1230 asymbol **symbols;
1231 arelent **relocs;
1232
1233 /* Suck in the relocs, symbols & canonicalize them. */
1234 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1235 if (reloc_size <= 0)
1236 continue;
1237
1238 relocs = (arelent **)bfd_malloc ((size_t)reloc_size);
1239 if (!relocs)
1240 return false;
1241
1242 /* The symbols should have been read in by _bfd_generic link_add_symbols
1243 call abovec, so we can cheat and use the pointer to them that was
1244 saved in the above call. */
1245 symbols = _bfd_generic_link_get_symbols(abfd);
1246 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1247
1248 /* Now walk through all the relocations in this section. */
1249 for (i = 0; i < reloc_count; i++)
1250 {
1251 arelent *reloc = relocs[i];
1252 asymbol *symbol = *(reloc->sym_ptr_ptr);
142aa7d9 1253 const char *name;
39f27966
JL
1254
1255 /* We've got an indirect reloc. See if we need to add it
1256 to the function vector table. At this point, we have
1257 to add a new entry for each unique symbol referenced
1258 by an R_MEM_INDIRECT relocation except for a reloc
1259 against the absolute section symbol. */
1260 if (reloc->howto->type == R_MEM_INDIRECT
1261 && symbol != bfd_abs_section_ptr->symbol)
1262
1263 {
1264 struct funcvec_hash_entry *h;
1265
1266 name = symbol->name;
1267 if (symbol->flags & BSF_LOCAL)
1268 {
1269 char *new_name = bfd_malloc (strlen (name) + 9);
1270
1271 if (new_name == NULL)
1272 abort ();
1273
1274 strcpy (new_name, name);
1275 sprintf (new_name + strlen (name), "_%08x",
1276 (int)symbol->section);
1277 name = new_name;
1278 }
1279
1280 /* Look this symbol up in the function vector hash table. */
1281 h = funcvec_hash_lookup (h8300_coff_hash_table (info)->funcvec_hash_table,
1282 name, false, false);
1283
1284
1285 /* If this symbol isn't already in the hash table, add
1286 it and bump up the size of the hash table. */
1287 if (h == NULL)
1288 {
1289 h = funcvec_hash_lookup (h8300_coff_hash_table (info)->funcvec_hash_table,
1290 name, true, true);
1291 if (h == NULL)
1292 {
1293 free (relocs);
1294 return false;
1295 }
1296
1297 /* Bump the size of the vectors section. Each vector
1298 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1299 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1300 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2;
34255b70
JL
1301 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1302 || bfd_get_mach (abfd) == bfd_mach_h8300s)
39f27966
JL
1303 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4;
1304 }
1305 }
1306 }
1307
1308 /* We're done with the relocations, release them. */
1309 free (relocs);
1310 }
1311
1312 /* Now actually allocate some space for the function vector. It's
1313 wasteful to do this more than once, but this is easier. */
1314 if (h8300_coff_hash_table (info)->vectors_sec->_raw_size != 0)
1315 {
1316 /* Free the old contents. */
1317 if (h8300_coff_hash_table (info)->vectors_sec->contents)
1318 free (h8300_coff_hash_table (info)->vectors_sec->contents);
1319
1320 /* Allocate new contents. */
1321 h8300_coff_hash_table (info)->vectors_sec->contents
1322 = bfd_malloc (h8300_coff_hash_table (info)->vectors_sec->_raw_size);
1323 }
14aa9a78 1324
39f27966 1325 return true;
14aa9a78
ILT
1326}
1327
1328#define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1329#define coff_reloc16_estimate h8300_reloc16_estimate
39f27966
JL
1330#define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1331#define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
14aa9a78 1332
69b799df 1333#define COFF_LONG_FILENAMES
b4e42a64
SC
1334#include "coffcode.h"
1335
1336
14aa9a78 1337#undef coff_bfd_get_relocated_section_contents
294eaca4 1338#undef coff_bfd_relax_section
4991ebb9
ILT
1339#define coff_bfd_get_relocated_section_contents \
1340 bfd_coff_reloc16_get_relocated_section_contents
14aa9a78
ILT
1341#define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1342
1343
b4e42a64 1344
2f3508ad 1345const bfd_target h8300coff_vec =
b4e42a64 1346{
14aa9a78 1347 "coff-h8300", /* name */
b4e42a64 1348 bfd_target_coff_flavour,
d3e572fe
ILT
1349 BFD_ENDIAN_BIG, /* data byte order is big */
1350 BFD_ENDIAN_BIG, /* header byte order is big */
b4e42a64
SC
1351
1352 (HAS_RELOC | EXEC_P | /* object flags */
1353 HAS_LINENO | HAS_DEBUG |
4991ebb9 1354 HAS_SYMS | HAS_LOCALS | WP_TEXT | BFD_IS_RELAXABLE ),
14aa9a78
ILT
1355 (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
1356 '_', /* leading char */
b4e42a64
SC
1357 '/', /* ar_pad_char */
1358 15, /* ar_max_namelen */
14aa9a78
ILT
1359 bfd_getb64, bfd_getb_signed_64, bfd_putb64,
1360 bfd_getb32, bfd_getb_signed_32, bfd_putb32,
1361 bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */
1362 bfd_getb64, bfd_getb_signed_64, bfd_putb64,
1363 bfd_getb32, bfd_getb_signed_32, bfd_putb32,
1364 bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
1365
1366 {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
1367 bfd_generic_archive_p, _bfd_dummy_target},
1368 {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
1369 bfd_false},
b4e42a64 1370 {bfd_false, coff_write_object_contents, /* bfd_write_contents */
14aa9a78 1371 _bfd_write_archive_contents, bfd_false},
b4e42a64 1372
6812b607
ILT
1373 BFD_JUMP_TABLE_GENERIC (coff),
1374 BFD_JUMP_TABLE_COPY (coff),
1375 BFD_JUMP_TABLE_CORE (_bfd_nocore),
1376 BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
1377 BFD_JUMP_TABLE_SYMBOLS (coff),
1378 BFD_JUMP_TABLE_RELOCS (coff),
1379 BFD_JUMP_TABLE_WRITE (coff),
1380 BFD_JUMP_TABLE_LINK (coff),
2f3508ad 1381 BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
6812b607 1382
14aa9a78 1383 COFF_SWAP_TABLE,
b4e42a64 1384};
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