* elf32-ppc.h: New file.
[deliverable/binutils-gdb.git] / bfd / coff-h8300.c
CommitLineData
252b5132 1/* BFD back-end for Hitachi H8/300 COFF binaries.
7898deda 2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
e2d34d7d 3 2000, 2001, 2002
5f771d47 4 Free Software Foundation, Inc.
252b5132
RH
5 Written by Steve Chamberlain, <sac@cygnus.com>.
6
e514ac71 7 This file is part of BFD, the Binary File Descriptor library.
252b5132 8
e514ac71
NC
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
252b5132 13
e514ac71
NC
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
252b5132 18
e514ac71
NC
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
252b5132
RH
22
23#include "bfd.h"
24#include "sysdep.h"
25#include "libbfd.h"
26#include "bfdlink.h"
27#include "genlink.h"
28#include "coff/h8300.h"
29#include "coff/internal.h"
30#include "libcoff.h"
0171ee92 31#include "libiberty.h"
252b5132
RH
32
33#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
34
35/* We derive a hash table from the basic BFD hash table to
5fcfd273 36 hold entries in the function vector. Aside from the
252b5132
RH
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
40
41struct funcvec_hash_entry
f4ffd778
NC
42 {
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root;
252b5132 45
f4ffd778
NC
46 /* The offset within the vectors section where
47 this entry lives. */
48 bfd_vma offset;
49 };
252b5132
RH
50
51struct funcvec_hash_table
f4ffd778
NC
52 {
53 /* The basic hash table. */
54 struct bfd_hash_table root;
252b5132 55
f4ffd778 56 bfd *abfd;
252b5132 57
f4ffd778
NC
58 /* Offset at which we'll add the next entry. */
59 unsigned int offset;
60 };
252b5132
RH
61
62static struct bfd_hash_entry *
63funcvec_hash_newfunc
64 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
65
b34976b6 66static bfd_boolean
252b5132
RH
67funcvec_hash_table_init
68 PARAMS ((struct funcvec_hash_table *, bfd *,
0171ee92 69 struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
b34976b6
AM
70 struct bfd_hash_table *,
71 const char *)));
72
73static bfd_reloc_status_type special
74 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
75static int select_reloc
76 PARAMS ((reloc_howto_type *));
77static void rtype2howto
78 PARAMS ((arelent *, struct internal_reloc *));
79static void reloc_processing
80 PARAMS ((arelent *, struct internal_reloc *, asymbol **, bfd *, asection *));
81static bfd_boolean h8300_symbol_address_p
82 PARAMS ((bfd *, asection *, bfd_vma));
83static int h8300_reloc16_estimate
84 PARAMS ((bfd *, asection *, arelent *, unsigned int,
85 struct bfd_link_info *));
86static void h8300_reloc16_extra_cases
87 PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
88 bfd_byte *, unsigned int *, unsigned int *));
89static bfd_boolean h8300_bfd_link_add_symbols
90 PARAMS ((bfd *, struct bfd_link_info *));
f4ffd778 91
252b5132
RH
92/* To lookup a value in the function vector hash table. */
93#define funcvec_hash_lookup(table, string, create, copy) \
94 ((struct funcvec_hash_entry *) \
95 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
96
97/* The derived h8300 COFF linker table. Note it's derived from
98 the generic linker hash table, not the COFF backend linker hash
99 table! We use this to attach additional data structures we
100 need while linking on the h8300. */
bc7eab72 101struct h8300_coff_link_hash_table {
252b5132
RH
102 /* The main hash table. */
103 struct generic_link_hash_table root;
104
105 /* Section for the vectors table. This gets attached to a
106 random input bfd, we keep it here for easy access. */
107 asection *vectors_sec;
108
109 /* Hash table of the functions we need to enter into the function
110 vector. */
111 struct funcvec_hash_table *funcvec_hash_table;
112};
113
114static struct bfd_link_hash_table *h8300_coff_link_hash_table_create
115 PARAMS ((bfd *));
116
117/* Get the H8/300 COFF linker hash table from a link_info structure. */
118
119#define h8300_coff_hash_table(p) \
120 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
121
122/* Initialize fields within a funcvec hash table entry. Called whenever
123 a new entry is added to the funcvec hash table. */
124
125static struct bfd_hash_entry *
126funcvec_hash_newfunc (entry, gen_table, string)
127 struct bfd_hash_entry *entry;
128 struct bfd_hash_table *gen_table;
129 const char *string;
130{
131 struct funcvec_hash_entry *ret;
132 struct funcvec_hash_table *table;
133
134 ret = (struct funcvec_hash_entry *) entry;
135 table = (struct funcvec_hash_table *) gen_table;
136
137 /* Allocate the structure if it has not already been allocated by a
138 subclass. */
139 if (ret == NULL)
140 ret = ((struct funcvec_hash_entry *)
0171ee92
AM
141 bfd_hash_allocate (gen_table,
142 sizeof (struct funcvec_hash_entry)));
252b5132
RH
143 if (ret == NULL)
144 return NULL;
145
146 /* Call the allocation method of the superclass. */
147 ret = ((struct funcvec_hash_entry *)
bc7eab72 148 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
252b5132
RH
149
150 if (ret == NULL)
151 return NULL;
152
153 /* Note where this entry will reside in the function vector table. */
154 ret->offset = table->offset;
155
156 /* Bump the offset at which we store entries in the function
157 vector. We'd like to bump up the size of the vectors section,
158 but it's not easily available here. */
159 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
160 table->offset += 2;
161 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
162 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
163 table->offset += 4;
164 else
165 return NULL;
166
167 /* Everything went OK. */
168 return (struct bfd_hash_entry *) ret;
169}
170
171/* Initialize the function vector hash table. */
172
b34976b6 173static bfd_boolean
252b5132
RH
174funcvec_hash_table_init (table, abfd, newfunc)
175 struct funcvec_hash_table *table;
176 bfd *abfd;
b34976b6
AM
177 struct bfd_hash_entry *(*newfunc)
178 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *,
179 const char *));
252b5132
RH
180{
181 /* Initialize our local fields, then call the generic initialization
182 routine. */
183 table->offset = 0;
184 table->abfd = abfd;
185 return (bfd_hash_table_init (&table->root, newfunc));
186}
187
188/* Create the derived linker hash table. We use a derived hash table
19852a2a 189 basically to hold "static" information during an H8/300 coff link
252b5132
RH
190 without using static variables. */
191
192static struct bfd_link_hash_table *
193h8300_coff_link_hash_table_create (abfd)
194 bfd *abfd;
195{
196 struct h8300_coff_link_hash_table *ret;
dc810e39
AM
197 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
198
e2d34d7d 199 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
252b5132
RH
200 if (ret == NULL)
201 return NULL;
dc810e39
AM
202 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
203 _bfd_generic_link_hash_newfunc))
252b5132 204 {
e2d34d7d 205 free (ret);
252b5132
RH
206 return NULL;
207 }
208
209 /* Initialize our data. */
210 ret->vectors_sec = NULL;
211 ret->funcvec_hash_table = NULL;
212
213 /* OK. Everything's intialized, return the base pointer. */
214 return &ret->root.root;
215}
216
cc040812 217/* Special handling for H8/300 relocs.
252b5132
RH
218 We only come here for pcrel stuff and return normally if not an -r link.
219 When doing -r, we can't do any arithmetic for the pcrel stuff, because
220 the code in reloc.c assumes that we can manipulate the targets of
5fcfd273 221 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
252b5132 222 which means that the gap after the instruction may not be enough to
d562d2fb 223 contain the offset required for the branch, so we have to use only
cc040812 224 the addend until the final link. */
252b5132
RH
225
226static bfd_reloc_status_type
227special (abfd, reloc_entry, symbol, data, input_section, output_bfd,
cc040812 228 error_message)
5f771d47
ILT
229 bfd *abfd ATTRIBUTE_UNUSED;
230 arelent *reloc_entry ATTRIBUTE_UNUSED;
231 asymbol *symbol ATTRIBUTE_UNUSED;
232 PTR data ATTRIBUTE_UNUSED;
233 asection *input_section ATTRIBUTE_UNUSED;
252b5132 234 bfd *output_bfd;
5f771d47 235 char **error_message ATTRIBUTE_UNUSED;
252b5132
RH
236{
237 if (output_bfd == (bfd *) NULL)
238 return bfd_reloc_continue;
239
d562d2fb
AM
240 /* Adjust the reloc address to that in the output section. */
241 reloc_entry->address += input_section->output_offset;
252b5132
RH
242 return bfd_reloc_ok;
243}
244
bc7eab72 245static reloc_howto_type howto_table[] = {
b34976b6
AM
246 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
247 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
248 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
249 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
250 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
251 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
252 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
253 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
254 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
255 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
256 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
257 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
258 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
259 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
252b5132
RH
260
261 /* An indirect reference to a function. This causes the function's address
262 to be added to the function vector in lo-mem and puts the address of
263 the function vector's entry in the jsr instruction. */
b34976b6 264 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
252b5132
RH
265
266 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
267 branch is turned into an 8bit pc-relative branch. */
b34976b6 268 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
252b5132 269
b34976b6 270 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
252b5132 271
b34976b6 272 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
252b5132 273
b34976b6 274 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
252b5132 275
b34976b6 276 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
252b5132
RH
277};
278
cc040812 279/* Turn a howto into a reloc number. */
252b5132
RH
280
281#define SELECT_RELOC(x,howto) \
bc7eab72 282 { x.r_type = select_reloc (howto); }
252b5132 283
bc7eab72 284#define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x))
252b5132
RH
285#define H8300 1 /* Customize coffcode.h */
286#define __A_MAGIC_SET__
287
cc040812 288/* Code to swap in the reloc. */
dc810e39
AM
289#define SWAP_IN_RELOC_OFFSET H_GET_32
290#define SWAP_OUT_RELOC_OFFSET H_PUT_32
252b5132
RH
291#define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
292 dst->r_stuff[0] = 'S'; \
293 dst->r_stuff[1] = 'C';
294
252b5132
RH
295static int
296select_reloc (howto)
297 reloc_howto_type *howto;
298{
299 return howto->type;
300}
301
cc040812 302/* Code to turn a r_type into a howto ptr, uses the above howto table. */
252b5132
RH
303
304static void
305rtype2howto (internal, dst)
306 arelent *internal;
307 struct internal_reloc *dst;
308{
309 switch (dst->r_type)
310 {
311 case R_RELBYTE:
312 internal->howto = howto_table + 0;
313 break;
314 case R_RELWORD:
315 internal->howto = howto_table + 1;
316 break;
317 case R_RELLONG:
318 internal->howto = howto_table + 2;
319 break;
320 case R_PCRBYTE:
321 internal->howto = howto_table + 3;
322 break;
323 case R_PCRWORD:
324 internal->howto = howto_table + 4;
325 break;
326 case R_PCRLONG:
327 internal->howto = howto_table + 5;
328 break;
329 case R_MOV16B1:
330 internal->howto = howto_table + 6;
331 break;
332 case R_MOV16B2:
333 internal->howto = howto_table + 7;
334 break;
335 case R_JMP1:
336 internal->howto = howto_table + 8;
337 break;
338 case R_JMP2:
339 internal->howto = howto_table + 9;
340 break;
341 case R_JMPL1:
342 internal->howto = howto_table + 10;
343 break;
344 case R_JMPL2:
345 internal->howto = howto_table + 11;
346 break;
347 case R_MOV24B1:
348 internal->howto = howto_table + 12;
349 break;
350 case R_MOV24B2:
351 internal->howto = howto_table + 13;
352 break;
353 case R_MEM_INDIRECT:
354 internal->howto = howto_table + 14;
355 break;
356 case R_PCRWORD_B:
357 internal->howto = howto_table + 15;
358 break;
359 case R_MOVL1:
360 internal->howto = howto_table + 16;
361 break;
362 case R_MOVL2:
363 internal->howto = howto_table + 17;
364 break;
365 case R_BCC_INV:
366 internal->howto = howto_table + 18;
367 break;
368 case R_JMP_DEL:
369 internal->howto = howto_table + 19;
370 break;
371 default:
372 abort ();
373 break;
374 }
375}
376
bc7eab72 377#define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
252b5132 378
cc040812 379/* Perform any necessary magic to the addend in a reloc entry. */
252b5132
RH
380
381#define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
bc7eab72 382 cache_ptr->addend = ext_reloc.r_offset;
252b5132 383
252b5132 384#define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
bc7eab72 385 reloc_processing (relent, reloc, symbols, abfd, section)
252b5132
RH
386
387static void
388reloc_processing (relent, reloc, symbols, abfd, section)
cc040812 389 arelent *relent;
252b5132 390 struct internal_reloc *reloc;
cc040812
NC
391 asymbol **symbols;
392 bfd *abfd;
393 asection *section;
252b5132
RH
394{
395 relent->address = reloc->r_vaddr;
396 rtype2howto (relent, reloc);
397
398 if (((int) reloc->r_symndx) > 0)
399 {
400 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
401 }
402 else
403 {
404 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
405 }
406
252b5132
RH
407 relent->addend = reloc->r_offset;
408
409 relent->address -= section->vma;
cc040812
NC
410#if 0
411 relent->section = 0;
412#endif
252b5132
RH
413}
414
b34976b6 415static bfd_boolean
252b5132
RH
416h8300_symbol_address_p (abfd, input_section, address)
417 bfd *abfd;
418 asection *input_section;
419 bfd_vma address;
420{
421 asymbol **s;
422
423 s = _bfd_generic_link_get_symbols (abfd);
424 BFD_ASSERT (s != (asymbol **) NULL);
425
426 /* Search all the symbols for one in INPUT_SECTION with
427 address ADDRESS. */
cc040812 428 while (*s)
252b5132
RH
429 {
430 asymbol *p = *s;
431 if (p->section == input_section
432 && (input_section->output_section->vma
433 + input_section->output_offset
434 + p->value) == address)
b34976b6 435 return TRUE;
252b5132 436 s++;
cc040812 437 }
b34976b6 438 return FALSE;
252b5132
RH
439}
440
252b5132
RH
441/* If RELOC represents a relaxable instruction/reloc, change it into
442 the relaxed reloc, notify the linker that symbol addresses
443 have changed (bfd_perform_slip) and return how much the current
444 section has shrunk by.
445
446 FIXME: Much of this code has knowledge of the ordering of entries
447 in the howto table. This needs to be fixed. */
448
449static int
cc040812 450h8300_reloc16_estimate (abfd, input_section, reloc, shrink, link_info)
252b5132
RH
451 bfd *abfd;
452 asection *input_section;
453 arelent *reloc;
454 unsigned int shrink;
455 struct bfd_link_info *link_info;
456{
cc040812 457 bfd_vma value;
252b5132
RH
458 bfd_vma dot;
459 bfd_vma gap;
460 static asection *last_input_section = NULL;
461 static arelent *last_reloc = NULL;
462
5fcfd273 463 /* The address of the thing to be relocated will have moved back by
252b5132
RH
464 the size of the shrink - but we don't change reloc->address here,
465 since we need it to know where the relocation lives in the source
466 uncooked section. */
467 bfd_vma address = reloc->address - shrink;
468
469 if (input_section != last_input_section)
470 last_reloc = NULL;
471
472 /* Only examine the relocs which might be relaxable. */
473 switch (reloc->howto->type)
5fcfd273 474 {
252b5132
RH
475 /* This is the 16/24 bit absolute branch which could become an 8 bit
476 pc-relative branch. */
477 case R_JMP1:
478 case R_JMPL1:
479 /* Get the address of the target of this branch. */
cc040812 480 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
481
482 /* Get the address of the next instruction (not the reloc). */
483 dot = (input_section->output_section->vma
484 + input_section->output_offset + address);
485
486 /* Adjust for R_JMP1 vs R_JMPL1. */
487 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
488
489 /* Compute the distance from this insn to the branch target. */
490 gap = value - dot;
cc040812 491
252b5132
RH
492 /* If the distance is within -128..+128 inclusive, then we can relax
493 this jump. +128 is valid since the target will move two bytes
494 closer if we do relax this branch. */
bc7eab72 495 if ((int) gap >= -128 && (int) gap <= 128)
5fcfd273 496 {
e514ac71
NC
497 bfd_byte code;
498
499 if (!bfd_get_section_contents (abfd, input_section, & code,
500 reloc->address, 1))
501 break;
502 code = bfd_get_8 (abfd, & code);
503
252b5132
RH
504 /* It's possible we may be able to eliminate this branch entirely;
505 if the previous instruction is a branch around this instruction,
506 and there's no label at this instruction, then we can reverse
507 the condition on the previous branch and eliminate this jump.
508
509 original: new:
510 bCC lab1 bCC' lab2
511 jmp lab2
512 lab1: lab1:
5fcfd273 513
252b5132 514 This saves 4 bytes instead of two, and should be relatively
e514ac71
NC
515 common.
516
517 Only perform this optimisation for jumps (code 0x5a) not
518 subroutine calls, as otherwise it could transform:
b34976b6 519
0171ee92
AM
520 mov.w r0,r0
521 beq .L1
522 jsr @_bar
523 .L1: rts
524 _bar: rts
e514ac71 525 into:
0171ee92
AM
526 mov.w r0,r0
527 bne _bar
528 rts
529 _bar: rts
b34976b6 530
e514ac71
NC
531 which changes the call (jsr) into a branch (bne). */
532 if (code == 0x5a
533 && gap <= 126
252b5132
RH
534 && last_reloc
535 && last_reloc->howto->type == R_PCRBYTE)
536 {
537 bfd_vma last_value;
538 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
539 input_section) + 1;
540
541 if (last_value == dot + 2
542 && last_reloc->address + 1 == reloc->address
cc040812 543 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
252b5132
RH
544 {
545 reloc->howto = howto_table + 19;
546 last_reloc->howto = howto_table + 18;
547 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
548 last_reloc->addend = reloc->addend;
549 shrink += 4;
550 bfd_perform_slip (abfd, 4, input_section, address);
551 break;
552 }
553 }
554
555 /* Change the reloc type. */
cc040812 556 reloc->howto = reloc->howto + 1;
252b5132
RH
557
558 /* This shrinks this section by two bytes. */
559 shrink += 2;
cc040812 560 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
561 }
562 break;
563
564 /* This is the 16 bit pc-relative branch which could become an 8 bit
565 pc-relative branch. */
566 case R_PCRWORD:
567 /* Get the address of the target of this branch, add one to the value
0171ee92 568 because the addend field in PCrel jumps is off by -1. */
cc040812
NC
569 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
570
252b5132
RH
571 /* Get the address of the next instruction if we were to relax. */
572 dot = input_section->output_section->vma +
573 input_section->output_offset + address;
cc040812 574
252b5132
RH
575 /* Compute the distance from this insn to the branch target. */
576 gap = value - dot;
577
578 /* If the distance is within -128..+128 inclusive, then we can relax
579 this jump. +128 is valid since the target will move two bytes
580 closer if we do relax this branch. */
bc7eab72 581 if ((int) gap >= -128 && (int) gap <= 128)
5fcfd273 582 {
252b5132
RH
583 /* Change the reloc type. */
584 reloc->howto = howto_table + 15;
585
586 /* This shrinks this section by two bytes. */
587 shrink += 2;
cc040812 588 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
589 }
590 break;
591
592 /* This is a 16 bit absolute address in a mov.b insn, which can
593 become an 8 bit absolute address if it's in the right range. */
594 case R_MOV16B1:
595 /* Get the address of the data referenced by this mov.b insn. */
cc040812 596 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
597
598 /* The address is in 0xff00..0xffff inclusive on the h8300 or
599 0xffff00..0xffffff inclusive on the h8300h, then we can
600 relax this mov.b */
601 if ((bfd_get_mach (abfd) == bfd_mach_h8300
602 && value >= 0xff00
603 && value <= 0xffff)
604 || ((bfd_get_mach (abfd) == bfd_mach_h8300h
605 || bfd_get_mach (abfd) == bfd_mach_h8300s)
606 && value >= 0xffff00
607 && value <= 0xffffff))
608 {
609 /* Change the reloc type. */
610 reloc->howto = reloc->howto + 1;
611
612 /* This shrinks this section by two bytes. */
613 shrink += 2;
cc040812 614 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
615 }
616 break;
617
618 /* Similarly for a 24 bit absolute address in a mov.b. Note that
619 if we can't relax this into an 8 bit absolute, we'll fall through
620 and try to relax it into a 16bit absolute. */
621 case R_MOV24B1:
622 /* Get the address of the data referenced by this mov.b insn. */
cc040812 623 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
624
625 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
626 then we can relax this mov.b */
627 if ((bfd_get_mach (abfd) == bfd_mach_h8300h
628 || bfd_get_mach (abfd) == bfd_mach_h8300s)
629 && value >= 0xffff00
630 && value <= 0xffffff)
631 {
632 /* Change the reloc type. */
633 reloc->howto = reloc->howto + 1;
634
635 /* This shrinks this section by four bytes. */
636 shrink += 4;
cc040812 637 bfd_perform_slip (abfd, 4, input_section, address);
252b5132
RH
638
639 /* Done with this reloc. */
640 break;
641 }
642
643 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
644 reloc. */
645
646 /* This is a 24/32 bit absolute address in a mov insn, which can
647 become an 16 bit absolute address if it's in the right range. */
648 case R_MOVL1:
649 /* Get the address of the data referenced by this mov insn. */
cc040812 650 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
651
652 /* If this address is in 0x0000..0x7fff inclusive or
0171ee92 653 0xff8000..0xffffff inclusive, then it can be relaxed. */
252b5132
RH
654 if (value <= 0x7fff || value >= 0xff8000)
655 {
656 /* Change the reloc type. */
657 reloc->howto = howto_table + 17;
658
659 /* This shrinks this section by two bytes. */
660 shrink += 2;
cc040812 661 bfd_perform_slip (abfd, 2, input_section, address);
252b5132
RH
662 }
663 break;
664
665 /* No other reloc types represent relaxing opportunities. */
cc040812
NC
666 default:
667 break;
252b5132
RH
668 }
669
670 last_reloc = reloc;
671 last_input_section = input_section;
672 return shrink;
673}
674
252b5132
RH
675/* Handle relocations for the H8/300, including relocs for relaxed
676 instructions.
677
678 FIXME: Not all relocations check for overflow! */
679
680static void
681h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
682 dst_ptr)
683 bfd *abfd;
684 struct bfd_link_info *link_info;
685 struct bfd_link_order *link_order;
686 arelent *reloc;
687 bfd_byte *data;
688 unsigned int *src_ptr;
689 unsigned int *dst_ptr;
690{
691 unsigned int src_address = *src_ptr;
692 unsigned int dst_address = *dst_ptr;
693 asection *input_section = link_order->u.indirect.section;
694 bfd_vma value;
695 bfd_vma dot;
cc040812 696 int gap, tmp;
252b5132
RH
697
698 switch (reloc->howto->type)
699 {
252b5132
RH
700 /* Generic 8bit pc-relative relocation. */
701 case R_PCRBYTE:
702 /* Get the address of the target of this branch. */
cc040812 703 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132 704
cc040812
NC
705 dot = (link_order->offset
706 + dst_address
252b5132
RH
707 + link_order->u.indirect.section->output_section->vma);
708
709 gap = value - dot;
710
711 /* Sanity check. */
712 if (gap < -128 || gap > 126)
713 {
714 if (! ((*link_info->callbacks->reloc_overflow)
715 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
716 reloc->howto->name, reloc->addend, input_section->owner,
717 input_section, reloc->address)))
718 abort ();
719 }
720
721 /* Everything looks OK. Apply the relocation and update the
722 src/dst address appropriately. */
723
724 bfd_put_8 (abfd, gap, data + dst_address);
725 dst_address++;
726 src_address++;
727
728 /* All done. */
729 break;
730
731 /* Generic 16bit pc-relative relocation. */
732 case R_PCRWORD:
733 /* Get the address of the target of this branch. */
cc040812 734 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
735
736 /* Get the address of the instruction (not the reloc). */
5fcfd273
KH
737 dot = (link_order->offset
738 + dst_address
252b5132
RH
739 + link_order->u.indirect.section->output_section->vma + 1);
740
741 gap = value - dot;
742
743 /* Sanity check. */
744 if (gap > 32766 || gap < -32768)
745 {
746 if (! ((*link_info->callbacks->reloc_overflow)
747 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
748 reloc->howto->name, reloc->addend, input_section->owner,
749 input_section, reloc->address)))
750 abort ();
751 }
752
753 /* Everything looks OK. Apply the relocation and update the
754 src/dst address appropriately. */
755
dc810e39 756 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
252b5132
RH
757 dst_address += 2;
758 src_address += 2;
759
760 /* All done. */
761 break;
762
763 /* Generic 8bit absolute relocation. */
764 case R_RELBYTE:
765 /* Get the address of the object referenced by this insn. */
766 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
767
768 /* Sanity check. */
769 if (value <= 0xff
770 || (value >= 0x0000ff00 && value <= 0x0000ffff)
bc7eab72 771 || (value >= 0x00ffff00 && value <= 0x00ffffff)
252b5132
RH
772 || (value >= 0xffffff00 && value <= 0xffffffff))
773 {
774 /* Everything looks OK. Apply the relocation and update the
775 src/dst address appropriately. */
776
777 bfd_put_8 (abfd, value & 0xff, data + dst_address);
778 dst_address += 1;
779 src_address += 1;
780 }
781 else
782 {
783 if (! ((*link_info->callbacks->reloc_overflow)
784 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
785 reloc->howto->name, reloc->addend, input_section->owner,
786 input_section, reloc->address)))
787 abort ();
788 }
789
790 /* All done. */
791 break;
792
793 /* Various simple 16bit absolute relocations. */
794 case R_MOV16B1:
795 case R_JMP1:
796 case R_RELWORD:
cc040812 797 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
798 bfd_put_16 (abfd, value, data + dst_address);
799 dst_address += 2;
800 src_address += 2;
801 break;
802
803 /* Various simple 24/32bit absolute relocations. */
804 case R_MOV24B1:
805 case R_MOVL1:
806 case R_RELLONG:
807 /* Get the address of the target of this branch. */
cc040812 808 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132
RH
809 bfd_put_32 (abfd, value, data + dst_address);
810 dst_address += 4;
811 src_address += 4;
812 break;
813
814 /* Another 24/32bit absolute relocation. */
815 case R_JMPL1:
816 /* Get the address of the target of this branch. */
817 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
818
819 value = ((value & 0x00ffffff)
820 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
821 bfd_put_32 (abfd, value, data + dst_address);
822 dst_address += 4;
823 src_address += 4;
824 break;
825
826 /* A 16bit abolute relocation that was formerlly a 24/32bit
827 absolute relocation. */
828 case R_MOVL2:
829 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
830
831 /* Sanity check. */
003e46d0 832 if (value <= 0x7fff || value >= 0xff8000)
252b5132
RH
833 {
834 /* Insert the 16bit value into the proper location. */
835 bfd_put_16 (abfd, value, data + dst_address);
836
837 /* Fix the opcode. For all the move insns, we simply
838 need to turn off bit 0x20 in the previous byte. */
bc7eab72 839 data[dst_address - 1] &= ~0x20;
252b5132
RH
840 dst_address += 2;
841 src_address += 4;
842 }
843 else
844 {
845 if (! ((*link_info->callbacks->reloc_overflow)
846 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
847 reloc->howto->name, reloc->addend, input_section->owner,
848 input_section, reloc->address)))
849 abort ();
bc7eab72 850 }
252b5132
RH
851 break;
852
853 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
854 case R_JMP2:
855 /* Get the address of the target of this branch. */
856 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
857
858 /* Get the address of the next instruction. */
859 dot = (link_order->offset
860 + dst_address
861 + link_order->u.indirect.section->output_section->vma + 1);
862
863 gap = value - dot;
864
865 /* Sanity check. */
866 if (gap < -128 || gap > 126)
867 {
868 if (! ((*link_info->callbacks->reloc_overflow)
869 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
870 reloc->howto->name, reloc->addend, input_section->owner,
871 input_section, reloc->address)))
872 abort ();
873 }
874
875 /* Now fix the instruction itself. */
876 switch (data[dst_address - 1])
877 {
878 case 0x5e:
879 /* jsr -> bsr */
880 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
881 break;
882 case 0x5a:
883 /* jmp ->bra */
884 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
885 break;
886
887 default:
888 abort ();
889 }
890
891 /* Write out the 8bit value. */
892 bfd_put_8 (abfd, gap, data + dst_address);
893
894 dst_address += 1;
895 src_address += 3;
896
897 break;
898
899 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
900 case R_PCRWORD_B:
901 /* Get the address of the target of this branch. */
902 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
903
904 /* Get the address of the instruction (not the reloc). */
905 dot = (link_order->offset
906 + dst_address
907 + link_order->u.indirect.section->output_section->vma - 1);
908
909 gap = value - dot;
910
911 /* Sanity check. */
912 if (gap < -128 || gap > 126)
913 {
914 if (! ((*link_info->callbacks->reloc_overflow)
915 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
916 reloc->howto->name, reloc->addend, input_section->owner,
917 input_section, reloc->address)))
918 abort ();
919 }
920
921 /* Now fix the instruction. */
922 switch (data[dst_address - 2])
923 {
924 case 0x58:
925 /* bCC:16 -> bCC:8 */
926 /* Get the condition code from the original insn. */
927 tmp = data[dst_address - 1];
928 tmp &= 0xf0;
929 tmp >>= 4;
930
931 /* Now or in the high nibble of the opcode. */
932 tmp |= 0x40;
933
934 /* Write it. */
935 bfd_put_8 (abfd, tmp, data + dst_address - 2);
936 break;
d562d2fb 937
4259e8b6
JL
938 case 0x5c:
939 /* bsr:16 -> bsr:8 */
940 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
941 break;
252b5132
RH
942
943 default:
944 abort ();
945 }
946
bc7eab72
KH
947 /* Output the target. */
948 bfd_put_8 (abfd, gap, data + dst_address - 1);
252b5132 949
bc7eab72
KH
950 /* We don't advance dst_address -- the 8bit reloc is applied at
951 dst_address - 1, so the next insn should begin at dst_address. */
952 src_address += 2;
252b5132 953
bc7eab72 954 break;
5fcfd273 955
252b5132
RH
956 /* Similarly for a 24bit absolute that is now 8 bits. */
957 case R_JMPL2:
958 /* Get the address of the target of this branch. */
959 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
960
961 /* Get the address of the instruction (not the reloc). */
962 dot = (link_order->offset
963 + dst_address
964 + link_order->u.indirect.section->output_section->vma + 2);
965
966 gap = value - dot;
967
968 /* Fix the instruction. */
969 switch (data[src_address])
970 {
971 case 0x5e:
972 /* jsr -> bsr */
973 bfd_put_8 (abfd, 0x55, data + dst_address);
974 break;
975 case 0x5a:
976 /* jmp ->bra */
977 bfd_put_8 (abfd, 0x40, data + dst_address);
978 break;
979 default:
980 abort ();
981 }
982
983 bfd_put_8 (abfd, gap, data + dst_address + 1);
984 dst_address += 2;
985 src_address += 4;
986
987 break;
988
989 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
990 case R_MOV16B2:
991 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
992
993 /* Sanity check. */
994 if (data[dst_address - 2] != 0x6a)
995 abort ();
996
997 /* Fix up the opcode. */
cc040812 998 switch (data[src_address - 1] & 0xf0)
252b5132
RH
999 {
1000 case 0x00:
cc040812 1001 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
252b5132
RH
1002 break;
1003 case 0x80:
cc040812 1004 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
252b5132
RH
1005 break;
1006 default:
1007 abort ();
1008 }
1009
1010 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1011 src_address += 2;
1012 break;
1013
1014 /* Similarly for a 24bit mov.b */
1015 case R_MOV24B2:
1016 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1017
1018 /* Sanity check. */
1019 if (data[dst_address - 2] != 0x6a)
1020 abort ();
1021
1022 /* Fix up the opcode. */
cc040812 1023 switch (data[src_address - 1] & 0xf0)
252b5132
RH
1024 {
1025 case 0x20:
cc040812 1026 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
252b5132
RH
1027 break;
1028 case 0xa0:
cc040812 1029 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
252b5132
RH
1030 break;
1031 default:
1032 abort ();
1033 }
1034
1035 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1036 src_address += 4;
1037 break;
1038
1039 case R_BCC_INV:
1040 /* Get the address of the target of this branch. */
cc040812 1041 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
252b5132 1042
cc040812
NC
1043 dot = (link_order->offset
1044 + dst_address
252b5132
RH
1045 + link_order->u.indirect.section->output_section->vma) + 1;
1046
1047 gap = value - dot;
1048
1049 /* Sanity check. */
1050 if (gap < -128 || gap > 126)
1051 {
1052 if (! ((*link_info->callbacks->reloc_overflow)
1053 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1054 reloc->howto->name, reloc->addend, input_section->owner,
1055 input_section, reloc->address)))
1056 abort ();
1057 }
1058
1059 /* Everything looks OK. Fix the condition in the instruction, apply
1060 the relocation, and update the src/dst address appropriately. */
1061
1062 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1063 data + dst_address - 1);
1064 bfd_put_8 (abfd, gap, data + dst_address);
1065 dst_address++;
1066 src_address++;
1067
1068 /* All done. */
1069 break;
1070
1071 case R_JMP_DEL:
1072 src_address += 4;
1073 break;
1074
1075 /* An 8bit memory indirect instruction (jmp/jsr).
1076
1077 There's several things that need to be done to handle
1078 this relocation.
1079
1080 If this is a reloc against the absolute symbol, then
1081 we should handle it just R_RELBYTE. Likewise if it's
1082 for a symbol with a value ge 0 and le 0xff.
1083
1084 Otherwise it's a jump/call through the function vector,
1085 and the linker is expected to set up the function vector
1086 and put the right value into the jump/call instruction. */
1087 case R_MEM_INDIRECT:
1088 {
1089 /* We need to find the symbol so we can determine it's
1090 address in the function vector table. */
1091 asymbol *symbol;
252b5132 1092 const char *name;
dc810e39 1093 struct funcvec_hash_table *ftab;
252b5132 1094 struct funcvec_hash_entry *h;
0171ee92
AM
1095 struct h8300_coff_link_hash_table *htab;
1096 asection *vectors_sec;
1097
1098 if (link_info->hash->creator != abfd->xvec)
1099 {
1100 (*_bfd_error_handler)
1101 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1102 link_info->hash->creator->name);
1103
1104 /* What else can we do? This function doesn't allow return
1105 of an error, and we don't want to call abort as that
1106 indicates an internal error. */
1107#ifndef EXIT_FAILURE
1108#define EXIT_FAILURE 1
1109#endif
1110 xexit (EXIT_FAILURE);
1111 }
1112 htab = h8300_coff_hash_table (link_info);
1113 vectors_sec = htab->vectors_sec;
252b5132
RH
1114
1115 /* First see if this is a reloc against the absolute symbol
1116 or against a symbol with a nonnegative value <= 0xff. */
1117 symbol = *(reloc->sym_ptr_ptr);
1118 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1119 if (symbol == bfd_abs_section_ptr->symbol
5f771d47 1120 || value <= 0xff)
252b5132
RH
1121 {
1122 /* This should be handled in a manner very similar to
1123 R_RELBYTES. If the value is in range, then just slam
1124 the value into the right location. Else trigger a
1125 reloc overflow callback. */
5f771d47 1126 if (value <= 0xff)
252b5132
RH
1127 {
1128 bfd_put_8 (abfd, value, data + dst_address);
1129 dst_address += 1;
1130 src_address += 1;
1131 }
1132 else
1133 {
1134 if (! ((*link_info->callbacks->reloc_overflow)
1135 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1136 reloc->howto->name, reloc->addend, input_section->owner,
1137 input_section, reloc->address)))
1138 abort ();
1139 }
1140 break;
1141 }
1142
1143 /* This is a jump/call through a function vector, and we're
5fcfd273 1144 expected to create the function vector ourselves.
252b5132
RH
1145
1146 First look up this symbol in the linker hash table -- we need
1147 the derived linker symbol which holds this symbol's index
1148 in the function vector. */
1149 name = symbol->name;
1150 if (symbol->flags & BSF_LOCAL)
1151 {
dc810e39 1152 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
252b5132
RH
1153 if (new_name == NULL)
1154 abort ();
1155
1156 strcpy (new_name, name);
1157 sprintf (new_name + strlen (name), "_%08x",
cc040812 1158 (int) symbol->section);
252b5132
RH
1159 name = new_name;
1160 }
1161
0171ee92 1162 ftab = htab->funcvec_hash_table;
b34976b6 1163 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
252b5132
RH
1164
1165 /* This shouldn't ever happen. If it does that means we've got
1166 data corruption of some kind. Aborting seems like a reasonable
0171ee92 1167 thing to do here. */
252b5132
RH
1168 if (h == NULL || vectors_sec == NULL)
1169 abort ();
1170
1171 /* Place the address of the function vector entry into the
1172 reloc's address. */
1173 bfd_put_8 (abfd,
1174 vectors_sec->output_offset + h->offset,
1175 data + dst_address);
1176
1177 dst_address++;
1178 src_address++;
1179
1180 /* Now create an entry in the function vector itself. */
1181 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1182 bfd_put_16 (abfd,
1183 bfd_coff_reloc16_get_value (reloc,
1184 link_info,
1185 input_section),
1186 vectors_sec->contents + h->offset);
1187 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1188 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
1189 bfd_put_32 (abfd,
1190 bfd_coff_reloc16_get_value (reloc,
1191 link_info,
1192 input_section),
1193 vectors_sec->contents + h->offset);
1194 else
1195 abort ();
1196
1197 /* Gross. We've already written the contents of the vector section
1198 before we get here... So we write it again with the new data. */
1199 bfd_set_section_contents (vectors_sec->output_section->owner,
1200 vectors_sec->output_section,
1201 vectors_sec->contents,
dc810e39 1202 (file_ptr) vectors_sec->output_offset,
252b5132
RH
1203 vectors_sec->_raw_size);
1204 break;
1205 }
1206
1207 default:
1208 abort ();
1209 break;
1210
1211 }
1212
1213 *src_ptr = src_address;
1214 *dst_ptr = dst_address;
1215}
1216
252b5132
RH
1217/* Routine for the h8300 linker.
1218
1219 This routine is necessary to handle the special R_MEM_INDIRECT
1220 relocs on the h8300. It's responsible for generating a vectors
1221 section and attaching it to an input bfd as well as sizing
1222 the vectors section. It also creates our vectors hash table.
1223
1224 It uses the generic linker routines to actually add the symbols.
1225 from this BFD to the bfd linker hash table. It may add a few
1226 selected static symbols to the bfd linker hash table. */
1227
b34976b6 1228static bfd_boolean
cc040812 1229h8300_bfd_link_add_symbols (abfd, info)
252b5132
RH
1230 bfd *abfd;
1231 struct bfd_link_info *info;
1232{
1233 asection *sec;
1234 struct funcvec_hash_table *funcvec_hash_table;
dc810e39 1235 bfd_size_type amt;
0171ee92
AM
1236 struct h8300_coff_link_hash_table *htab;
1237
1238 /* Add the symbols using the generic code. */
1239 _bfd_generic_link_add_symbols (abfd, info);
1240
1241 if (info->hash->creator != abfd->xvec)
1242 return TRUE;
1243
1244 htab = h8300_coff_hash_table (info);
252b5132
RH
1245
1246 /* If we haven't created a vectors section, do so now. */
0171ee92 1247 if (!htab->vectors_sec)
252b5132
RH
1248 {
1249 flagword flags;
1250
1251 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1252 flags = (SEC_ALLOC | SEC_LOAD
1253 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
0171ee92 1254 htab->vectors_sec = bfd_make_section (abfd, ".vectors");
252b5132
RH
1255
1256 /* If the section wasn't created, or we couldn't set the flags,
0171ee92
AM
1257 quit quickly now, rather than dying a painful death later. */
1258 if (!htab->vectors_sec
1259 || !bfd_set_section_flags (abfd, htab->vectors_sec, flags))
b34976b6 1260 return FALSE;
252b5132
RH
1261
1262 /* Also create the vector hash table. */
dc810e39
AM
1263 amt = sizeof (struct funcvec_hash_table);
1264 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
252b5132
RH
1265
1266 if (!funcvec_hash_table)
b34976b6 1267 return FALSE;
252b5132
RH
1268
1269 /* And initialize the funcvec hash table. */
1270 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1271 funcvec_hash_newfunc))
1272 {
1273 bfd_release (abfd, funcvec_hash_table);
b34976b6 1274 return FALSE;
252b5132
RH
1275 }
1276
1277 /* Store away a pointer to the funcvec hash table. */
0171ee92 1278 htab->funcvec_hash_table = funcvec_hash_table;
252b5132
RH
1279 }
1280
1281 /* Load up the function vector hash table. */
0171ee92 1282 funcvec_hash_table = htab->funcvec_hash_table;
252b5132
RH
1283
1284 /* Now scan the relocs for all the sections in this bfd; create
1285 additional space in the .vectors section as needed. */
1286 for (sec = abfd->sections; sec; sec = sec->next)
1287 {
1288 long reloc_size, reloc_count, i;
1289 asymbol **symbols;
1290 arelent **relocs;
1291
1292 /* Suck in the relocs, symbols & canonicalize them. */
1293 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1294 if (reloc_size <= 0)
1295 continue;
1296
dc810e39 1297 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
252b5132 1298 if (!relocs)
b34976b6 1299 return FALSE;
252b5132
RH
1300
1301 /* The symbols should have been read in by _bfd_generic link_add_symbols
1302 call abovec, so we can cheat and use the pointer to them that was
1303 saved in the above call. */
1304 symbols = _bfd_generic_link_get_symbols(abfd);
1305 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1306 if (reloc_count <= 0)
1307 {
1308 free (relocs);
1309 continue;
1310 }
1311
1312 /* Now walk through all the relocations in this section. */
1313 for (i = 0; i < reloc_count; i++)
1314 {
1315 arelent *reloc = relocs[i];
1316 asymbol *symbol = *(reloc->sym_ptr_ptr);
1317 const char *name;
1318
1319 /* We've got an indirect reloc. See if we need to add it
1320 to the function vector table. At this point, we have
1321 to add a new entry for each unique symbol referenced
1322 by an R_MEM_INDIRECT relocation except for a reloc
1323 against the absolute section symbol. */
1324 if (reloc->howto->type == R_MEM_INDIRECT
1325 && symbol != bfd_abs_section_ptr->symbol)
1326
1327 {
dc810e39 1328 struct funcvec_hash_table *ftab;
252b5132
RH
1329 struct funcvec_hash_entry *h;
1330
1331 name = symbol->name;
1332 if (symbol->flags & BSF_LOCAL)
1333 {
dc810e39 1334 char *new_name;
252b5132 1335
dc810e39 1336 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
252b5132
RH
1337 if (new_name == NULL)
1338 abort ();
1339
1340 strcpy (new_name, name);
1341 sprintf (new_name + strlen (name), "_%08x",
cc040812 1342 (int) symbol->section);
252b5132
RH
1343 name = new_name;
1344 }
1345
1346 /* Look this symbol up in the function vector hash table. */
0171ee92 1347 ftab = htab->funcvec_hash_table;
b34976b6 1348 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
252b5132 1349
252b5132
RH
1350 /* If this symbol isn't already in the hash table, add
1351 it and bump up the size of the hash table. */
1352 if (h == NULL)
1353 {
b34976b6 1354 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
252b5132
RH
1355 if (h == NULL)
1356 {
1357 free (relocs);
b34976b6 1358 return FALSE;
252b5132
RH
1359 }
1360
1361 /* Bump the size of the vectors section. Each vector
1362 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1363 if (bfd_get_mach (abfd) == bfd_mach_h8300)
0171ee92 1364 htab->vectors_sec->_raw_size += 2;
252b5132
RH
1365 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1366 || bfd_get_mach (abfd) == bfd_mach_h8300s)
0171ee92 1367 htab->vectors_sec->_raw_size += 4;
252b5132
RH
1368 }
1369 }
1370 }
1371
1372 /* We're done with the relocations, release them. */
1373 free (relocs);
1374 }
1375
1376 /* Now actually allocate some space for the function vector. It's
1377 wasteful to do this more than once, but this is easier. */
0171ee92 1378 sec = htab->vectors_sec;
dc810e39 1379 if (sec->_raw_size != 0)
252b5132
RH
1380 {
1381 /* Free the old contents. */
dc810e39
AM
1382 if (sec->contents)
1383 free (sec->contents);
252b5132
RH
1384
1385 /* Allocate new contents. */
dc810e39 1386 sec->contents = bfd_malloc (sec->_raw_size);
252b5132
RH
1387 }
1388
b34976b6 1389 return TRUE;
252b5132
RH
1390}
1391
1392#define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1393#define coff_reloc16_estimate h8300_reloc16_estimate
1394#define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1395#define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1396
1397#define COFF_LONG_FILENAMES
1398#include "coffcode.h"
1399
252b5132
RH
1400#undef coff_bfd_get_relocated_section_contents
1401#undef coff_bfd_relax_section
1402#define coff_bfd_get_relocated_section_contents \
1403 bfd_coff_reloc16_get_relocated_section_contents
1404#define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1405
c3c89269 1406CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL)
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